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 program_id: credits.aleo,\n  function_name: transfer_public,\n  arguments: [\n    aleo1tj0598jpstejk8yp7cldez3y4vekmzv482h8l6v59yqsw9kk6cxsc79p0f,\n    aleo15c93yzhwpdm4ywat4ts6af7vs05stym59f7xatn6hs3crfpy3yzqvdzrev,\n    24260000u64\n  ]\n}"}],"tpk":"3782271543302371990778763236007376887875953901756169648513867730812296634028group","tcm":"1509112902985114668500781968762352560002369335980954162448564720350528970144field","scm":"6774558457283494212299763346642417451044396664291939205629139475021984498010field"}],"global_state_root":"sr1a00e8mk8rs5hfjdnzmf87ee5wvvagpeq3k43uur7lvf53e83d5pqlc7rvs","proof":"proof1qyqsqqqqqqqqqqqpqqqqqqqqqqqynjp7fmzefjja47a7deu679eu0u5jal4s2acrl26h3uftu8qmakd8329r9qrnsfm2mhqg7r3x9cgqqxhe9wek4xpf2denxdl56m8kf40aw38mh4wafpawgdgpjsyusyg8xajdeqqznnd2pjmtyxys2f8g8q979xn08h4vrw5lyszsf07y08x2wa69q0g4qk9xm9zu7t0pl7zkh2gav8c6dslsd7p0hezwkkcs3jqeukkyder54sswthvze74x276cn2vgukr2zkk9jwetpaccqm6dud96m0utegztulvgzyalcmuneyyp0pldwchqttv3x722xpdx997flyckhv5sy4zgw9mpkrplktwmrpacunwnkqwnew5mnen5tf4uz90sr76ja4ctvzckjfsnmm7jwwth7t3mx9grzp9qzwykyrcwvgsdkt5jkl856j8x00axaj677kql6jzfspwhjlq9pvtsvnt2j8n5gw23eagqvgwxw67vdk2ddpy85y4ucr2hfcq4kyj4yu4y4g07flaecc9xkqpz50pgpkj6zpyt90gwpzrpwdzghhuertdczn565hmwcqg7ksq2zek8tej6cnclvvssg7wr0zs8k2q8yeux99lsvs7qqfh7vvw3plr8ys0ryvxq4h2slmhkl3uj7kqhfa6sqctklwacqvj6u9gc8zuqugyppept2kqhcrfy8yc6nnl3m832swrharuqvtfhhda9973e0rfjysr9ch0xwv5v6xnd0622sxkdav7jfh9e8klexzzauv44432exh6cjrl3077ccz3jpt9gu7us5865wtfkkhmev64xa58h5w97fg224ey2pu88t2wspa8kxwdghhu0e5zqe9ahx92h8kctjjktv0prmutpzj8qs6mxq97d8rvpej97c9gfllhprspt9ayafrm54kkddddyjxgxaeg8nz73ysvd7hheml5fzltruyfmpjm26j6w80gnvqqhcldcluyxhuxdqwyfx9x2tg73fmgkpxhux9nn975sd9rr8ra9x5gdr9943vxezp0fpfh89jp08d2gr0gsqhemaczvvmj03r54gpfxh3x4hkrfjy3qpa9jsnrxu0kzcqlpkqk28u3zulyp4g3ewxgswxjgzzls9l20ks0se5q7sxz96ylv6p86nv2lpm4zw5s9hw3q5crnazqpk3astakwc9gfqvqqqqqqqqqqqf3u0rh3y487zw2cxj68gfw2xpwmfj86sp0qqmue4jz2xkgyt7vpr7fsmh2a6c2rks6kgqt29n3csyqplt24qs8xlqjaearkx7aa35ffx60y2wc4v90ud6qxqklc3qghneqya5r8gqxyeea9hkmvxpg243qqq9tczapae9x3fsp8fuyvxx32a99n6ledhgtzstquvgajej38tzmqdmtvvf33vkdlafkd7lwz878spvh8sg4u2jwrkhxxsyfjashj34sgvp69mlf7rume4ywdu78teklqqqqqvf7v96"},"fee":{"transition":{"id":"au1p3e32fvmv2flgzh7dq53skdv82pdfyhu27y9cn8nw3g6fm4tmqrseh223d","program":"credits.aleo","function":"fee_public","inputs":[{"type":"public","id":"5487984382340310846103962677746498606991616420758126501188230840863904350442field","value":"2725u64"},{"type":"public","id":"607604994061653348000017591650740921008972416285160417306678512778384318520field","value":"0u64"},{"type":"public","id":"5439931040265967442874178177608470138043541116884867250292284854778719694968field","value":"4781196800860721337184985237477599604095653640522839960798868078341746149761field"}],"outputs":[{"type":"future","id":"4859043215730162129830801242009351432750508306149886473643414033382135569839field","value":"{\n  program_id: credits.aleo,\n  function_name: fee_public,\n  arguments: [\n    aleo1tj0598jpstejk8yp7cldez3y4vekmzv482h8l6v59yqsw9kk6cxsc79p0f,\n    2725u64\n  ]\n}"}],"tpk":"5819379561231369381443087619633590666002364486459945778695541732247251119355group","tcm":"4415895066308531444359552886488765885379843612951828664075937348011642932158field","scm":"2266303712189336669595680527556730566419461430132703346847386780297939442494field"},"global_state_root":"sr1w43pc043an4a8tfph8max3apkpflztd0w0nmp2f7zpxs8v8ekgpsyusy2u","proof":"proof1qyqsqqqqqqqqqqqpqqqqqqqqqqqft605x7eqfcfmvh30nmqmlhn3vcrhtztjnrf5lgcjukjtudlunhj2g3ksheef23qrr5z2ghaa95sqq9n78q0jvet3t8e5z20l4jq8fqd7usjg7d5mpfkf9njjs22nz7h0fhz4e8m2l9hf9sc03vc6gy8z3qvg59sfad7rcd5f8qrlx6vw4cwj5y7ygm5a9wg0cvje9c075853tsew5vxhvmzy73esk7a3esw6q6qsxh0thgv0g6qn39qmmg8cx02vtd2u8pfw2lxqa6u6zldrzdz5w3f08ltuetgw5xr9cp3tv6kfnzuprjxp2urawskwaz6lugydrhm8aa2y5rulanqwjdf9rkzapqk063gp403e7kmcvlpyec07a35ynvyqp4pzsznlnc5x9fz4833thh3sny7ajmf6566y70nvwkv49msy6k0jrk3llcdgqy29zuu9fpsqkw58s83ywzsjxf56vmywhzvdnuy7dl26kjpp2v8xthkzwa68rrvw8gkksca3zhqvh8cctyuzd9edjqev8qrpder6v0lpt25hpdkqm8m0qvqaz0cajx749exlj5vm6pue2jfs6ma0gve5vs8fyv3nugpqudpnhcqtskd8kswnruvs8hfcl2ue3j7tace8rl46rlyvgv6y3yafwc9pshl38u35a3ndv7c40vj2p3wcggyqf754f0g5pa2dj8phy7njk4fqjrnnh6pdfs4gs0jfjxas9c4pvvy54dnw0metsxzjxl2zw44pg0p86ths9rzafgfmaenfr33wz9xsvyzlw5m000v2cu9dlflhuw8m5n2nvm8rpunfulrnmelaslnu9g3uz2f8f2p6av0epvz64mn8jmlja49p5jlr35fzf4p684dnvjs03kms8xu48g2pje7gceasyxwket9m8gxdye43gj2796fld4hxe40503sqaymple3jpt5hgww79pssvpfwyufq5lv8xmywykzqpkly6f4kgyyy729853e4j64r5fg7c25606eu3wpwl6wvzn4mzcphzsc09pftqz9vrj8d2kwyu6d93jn5t3gvgt72m4ptf3smglaff0g7j2yhg0acql9arue5qtly2m2xmxwcs938xhqcefej65qryjlp6x583dp5s7hpzxgcjfqhjvk9yzmmc2vt0mm7mwgsz6km3049hq8dtl4hudvpc0gjqvqqqqqqqqqqqaf4gmz0htgp5ruqlw8r7ws6rxar2934dsy76nkn4zfvs30d8x5vjw7a0vutk3es9gqhkw2c90gdqqqgsthgnf5j878rh8hmf65mcax8sej2w37u543glfgvglrkx9gm384rmesz2ngqahq3tvrw7glueusqq9cxtcsqd449cd42009nu6fta4acss4adyyp8ynrsp3d4wln9drs3jshesx7fqydavsgyxq9uervy9r8wagruknpapjwg5tvtkz35nqfz4kgydswsfmm69jgznglfddlqqqq7gmykm"}},"finalize":[{"type":"update_key_value","mapping_id":"2855157744830843716005407030207142101853521493742120919939436395872133863104field","key_id":"3173284676052768370492800882242470367997567168667336432369397697945324447457field","value_id":"307061989093289372258435802854337954556501711672514662129421602338458977540field"},{"type":"update_key_value","mapping_id":"2855157744830843716005407030207142101853521493742120919939436395872133863104field","key_id":"1436663086856328292118709360625414909946476318625788672009495556969830694606field","value_id":"681581144963537277056786721402228967476643388085462804838219763720862326113field"},{"type":"update_key_value","mapping_id":"2855157744830843716005407030207142101853521493742120919939436395872133863104field","key_id":"3173284676052768370492800882242470367997567168667336432369397697945324447457field","value_id":"2262428104444049529028918646225079869955325295200682822453654020934262656872field"}]},{"status":"accepted","type":"deploy","index":1,"transaction":{"type":"deploy","id":"at1t9fs22gh5lg7tp6j0w8r5x84rhu09h0wwnz97khxhevwp0mclqpqycgler","owner":{"address":"aleo12mhws2nvns7n0vrey5fmmq5mntmdy483lhpm20gvy2fks5vxrqgsh5g7pa","signature":"sign17dc63htt9sm6wdtpjtj6q0sqywm5d5ma2057rhlhas2l2zse8vqz3kvznzqtlevytxppgl57jhxqymmp7c7uz0h6rz9p5hgrxweuyqm0qrjc3ltpgevz0ef2pk3ldvslva42n82uatnr3h507cqcc8y2qsprl5qgtkgm2lnxc8ke4cz5tqch2pykt0eq7ffur9fek7afdh4pqtkaxya"},"deployment":{"edition":1,"program":"import shield_swap_freezelist.aleo;\nimport shield_swap_multisig_core.aleo;\n\nprogram shield_swap.aleo;\n\nrecord PositionNFT:\n    owner as address.private;\n    withdrawal as address.private;\n    token_id as field.private;\n    token0_id as field.private;\n    token1_id as field.private;\n    pool as field.private;\n    tick_lower as i32.private;\n    tick_upper as i32.private;\n\nstruct U256__8JquwLopp8:\n    hi as u128;\n    lo as u128;\n\nstruct SwapRequest:\n    pool as field;\n    zero_for_one as boolean;\n    amount_in as u128;\n    amount_out_min as u128;\n    sqrt_price_limit as U256__8JquwLopp8;\n    recipient as address;\n    nonce as u64;\n    deadline as u32;\n\nrecord SwapComplianceRecord:\n    owner as address.private;\n    swap_id as field.private;\n    token_in as field.private;\n    token_out as field.private;\n    request as SwapRequest.private;\n    caller as address.private;\n    signer as address.private;\n    blinded_address as address.private;\n\nstruct SwapHop:\n    pool as field;\n    zero_for_one as boolean;\n    sqrt_price_limit as U256__8JquwLopp8;\n\nstruct SwapMultiHopRequest:\n    token_in as field;\n    token_out as field;\n    amount_in as u128;\n    amount_out_min as u128;\n    recipient as address;\n    hop0 as SwapHop;\n    hop1 as SwapHop;\n    hop2 as SwapHop;\n    hop_count as u8;\n    nonce as u64;\n    deadline as u32;\n    caller as address;\n\nrecord MultiHopSwapComplianceRecord:\n    owner as address.private;\n    swap_id as field.private;\n    request as SwapMultiHopRequest.private;\n    caller as address.private;\n    signer as address.private;\n    blinded_address as address.private;\n\nstruct MintPositionRequest:\n    pool as field;\n    tick_lower as i32;\n    tick_upper as i32;\n    amount0_desired as u128;\n    amount1_desired as u128;\n    amount0_min as u128;\n    amount1_min as u128;\n    tick_lower_hint as i32;\n    tick_upper_hint as i32;\n\nrecord MintComplianceRecord:\n    owner as address.private;\n    token_id as field.private;\n    token0_id as field.private;\n    token1_id as field.private;\n    nonce as field.private;\n    request as MintPositionRequest.private;\n    caller as address.private;\n    signer as address.private;\n    recipient as address.private;\n    withdrawal as address.private;\n\nstruct ChecksumEdition:\n    checksum as [u8; 32u32];\n    edition as u16;\n\nstruct MerkleProof:\n    siblings as [field; 16u32];\n    leaf_index as u32;\n\nstruct PoolState:\n    token0 as field;\n    token1 as field;\n    fee as u16;\n    enabled as boolean;\n\nstruct Slot:\n    tick as i32;\n    tick_spacing as u32;\n    sqrt_price as U256__8JquwLopp8;\n    fee_protocol as u8;\n    liquidity as u128;\n    fee_growth_global0_x_128 as U256__8JquwLopp8;\n    fee_growth_global1_x_128 as U256__8JquwLopp8;\n    max_liquidity_per_tick as u128;\n    protocol_fees0 as u128;\n    protocol_fees1 as u128;\n    next_init_below as i32;\n    next_init_above as i32;\n\nstruct Tick:\n    pool as field;\n    liquidity_net as i128;\n    liquidity_gross as u128;\n    tick as i32;\n    fee_growth_outside0_x_128 as U256__8JquwLopp8;\n    fee_growth_outside1_x_128 as U256__8JquwLopp8;\n    prev as i32;\n    next as i32;\n\nstruct Position:\n    token_id as field;\n    pool as field;\n    tick_lower as i32;\n    tick_upper as i32;\n    liquidity as u128;\n    fee_growth_inside0_last_x_128 as U256__8JquwLopp8;\n    fee_growth_inside1_last_x_128 as U256__8JquwLopp8;\n    tokens_owed0 as u128;\n    tokens_owed1 as u128;\n\nstruct PoolKey:\n    token0 as field;\n    token1 as field;\n    fee as u16;\n\nstruct PairKey:\n    token0 as field;\n    token1 as field;\n\nstruct TickKey:\n    pool as field;\n    tick as i32;\n\nstruct SwapKey:\n    pool as field;\n    zero_for_one as boolean;\n    amount_in as u128;\n    sqrt_price_limit as U256__8JquwLopp8;\n    recipient as address;\n    nonce as u64;\n    caller as address;\n\nstruct TokenIDPreimage:\n    request as MintPositionRequest;\n    recipient as address;\n    nonce as field;\n\nstruct SwapIterCfg:\n    z as boolean;\n    lim as U256__8JquwLopp8;\n    fee_pips as u32;\n    fee_protocol as u8;\n    slot_fg0 as U256__8JquwLopp8;\n    slot_fg1 as U256__8JquwLopp8;\n\nstruct SwapIterState:\n    sp as U256__8JquwLopp8;\n    rem as u128;\n    out as u128;\n    fg as U256__8JquwLopp8;\n    liq as u128;\n    tk as i32;\n    crossed as boolean;\n    pf as u128;\n    nb as i32;\n    na as i32;\n\nstruct HopExecution:\n    pool as field;\n    zero_for_one as boolean;\n    amount_in as u128;\n    amount_out as u128;\n    fee_paid as u128;\n    protocol_fee as u128;\n    sqrt_price_after as U256__8JquwLopp8;\n    liquidity_after as u128;\n    tick_after as i32;\n\nstruct SwapExecutionHeader:\n    executed_height as u32;\n    hop_count as u8;\n\nstruct SwapExecutionKey:\n    swap_id as field;\n    hop_index as u8;\n\nstruct SwapOutput:\n    recipient as address;\n    caller as address;\n    token_in as field;\n    token_out as field;\n    amount_out as u128;\n    amount_remaining as u128;\n\nmapping pools:\n    key as field.public;\n    value as PoolState.public;\n\nmapping slots:\n    key as field.public;\n    value as Slot.public;\n\nmapping ticks:\n    key as field.public;\n    value as Tick.public;\n\nmapping initialized_pools:\n    key as field.public;\n    value as boolean.public;\n\nmapping tick_spacings:\n    key as u32.public;\n    value as boolean.public;\n\nmapping fee_tiers:\n    key as u16.public;\n    value as boolean.public;\n\nmapping fee_to_tick_spacing:\n    key as u16.public;\n    value as u32.public;\n\nmapping positions:\n    key as field.public;\n    value as Position.public;\n\nmapping swap_outputs:\n    key as field.public;\n    value as SwapOutput.public;\n\nmapping swap_execution_headers:\n    key as field.public;\n    value as SwapExecutionHeader.public;\n\nmapping swap_execution_hops:\n    key as SwapExecutionKey.public;\n    value as HopExecution.public;\n\nmapping admin:\n    key as boolean.public;\n    value as address.public;\n\nmapping pending_admin:\n    key as boolean.public;\n    value as address.public;\n\nmapping used_blinded_addresses:\n    key as address.public;\n    value as boolean.public;\n\nmapping pool_creation_is_open:\n    key as boolean.public;\n    value as boolean.public;\n\nmapping global_paused:\n    key as boolean.public;\n    value as boolean.public;\n\nmapping token_allowed:\n    key as field.public;\n    value as boolean.public;\n\nmapping token_paused:\n    key as field.public;\n    value as boolean.public;\n\nmapping pair_paused:\n    key as PairKey.public;\n    value as boolean.public;\n\nmapping frozen_position:\n    key as field.public;\n    value as u32.public;\n\nmapping from_wrapper_token_id:\n    key as field.public;\n    value as field.public;\n\nmapping to_wrapper_token_id:\n    key as field.public;\n    value as field.public;\n\nmapping pool_creators:\n    key as field.public;\n    value as address.public;\n\nfunction transfer_admin:\n    input r0 as address.public;\n    async transfer_admin self.caller r0 into r1;\n    output r1 as shield_swap.aleo/transfer_admin.future;\n\nfinalize transfer_admin:\n    input r0 as address.public;\n    input r1 as address.public;\n    get admin[true] into r2;\n    is.eq r0 r2 into r3;\n    assert.eq r3 true;\n    set r1 into pending_admin[true];\n\nfunction accept_admin:\n    async accept_admin self.caller into r0;\n    output r0 as shield_swap.aleo/accept_admin.future;\n\nfinalize accept_admin:\n    input r0 as address.public;\n    get pending_admin[true] into r1;\n    is.eq r0 r1 into r2;\n    assert.eq r2 true;\n    set r0 into admin[true];\n    remove pending_admin[true];\n\nfunction add_tick_spacing:\n    input r0 as u32.public;\n    async add_tick_spacing self.caller r0 into r1;\n    output r1 as shield_swap.aleo/add_tick_spacing.future;\n\nfinalize add_tick_spacing:\n    input r0 as address.public;\n    input r1 as u32.public;\n    get admin[true] into r2;\n    is.eq r0 r2 into r3;\n    assert.eq r3 true;\n    gt r1 0u32 into r4;\n    assert.eq r4 true;\n    lte r1 400000u32 into r5;\n    assert.eq r5 true;\n    set true into tick_spacings[r1];\n\nfunction add_fee_tier:\n    input r0 as u16.public;\n    async add_fee_tier self.caller r0 into r1;\n    output r1 as shield_swap.aleo/add_fee_tier.future;\n\nfinalize add_fee_tier:\n    input r0 as address.public;\n    input r1 as u16.public;\n    get admin[true] into r2;\n    is.eq r0 r2 into r3;\n    assert.eq r3 true;\n    set true into fee_tiers[r1];\n\nfunction bind_fee_to_tick_spacing:\n    input r0 as u16.public;\n    input r1 as u32.public;\n    async bind_fee_to_tick_spacing self.caller r0 r1 into r2;\n    output r2 as shield_swap.aleo/bind_fee_to_tick_spacing.future;\n\nfinalize bind_fee_to_tick_spacing:\n    input r0 as address.public;\n    input r1 as u16.public;\n    input r2 as u32.public;\n    get admin[true] into r3;\n    is.eq r0 r3 into r4;\n    assert.eq r4 true;\n    get.or_use fee_tiers[r1] false into r5;\n    assert.eq r5 true;\n    get.or_use tick_spacings[r2] false into r6;\n    assert.eq r6 true;\n    set r2 into fee_to_tick_spacing[r1];\n\nfunction set_pool_enabled:\n    input r0 as field.public;\n    input r1 as boolean.public;\n    async set_pool_enabled self.caller r0 r1 into r2;\n    output r2 as shield_swap.aleo/set_pool_enabled.future;\n\nfinalize set_pool_enabled:\n    input r0 as address.public;\n    input r1 as field.public;\n    input r2 as boolean.public;\n    get admin[true] into r3;\n    is.eq r0 r3 into r4;\n    assert.eq r4 true;\n    get pools[r1] into r5;\n    cast r5.token0 r5.token1 r5.fee r2 into r6 as PoolState;\n    set r6 into pools[r1];\n\nfunction set_pool_creation_is_open:\n    input r0 as boolean.public;\n    async set_pool_creation_is_open self.caller r0 into r1;\n    output r1 as shield_swap.aleo/set_pool_creation_is_open.future;\n\nfinalize set_pool_creation_is_open:\n    input r0 as address.public;\n    input r1 as boolean.public;\n    get admin[true] into r2;\n    is.eq r0 r2 into r3;\n    assert.eq r3 true;\n    set r1 into pool_creation_is_open[true];\n\nfunction set_global_paused:\n    input r0 as boolean.public;\n    async set_global_paused self.caller r0 into r1;\n    output r1 as shield_swap.aleo/set_global_paused.future;\n\nfinalize set_global_paused:\n    input r0 as address.public;\n    input r1 as boolean.public;\n    get admin[true] into r2;\n    is.eq r0 r2 into r3;\n    assert.eq r3 true;\n    set r1 into global_paused[true];\n\nfunction allow_token:\n    input r0 as field.public;\n    input r1 as field.public;\n    async allow_token self.caller r0 r1 into r2;\n    output r2 as shield_swap.aleo/allow_token.future;\n\nfinalize allow_token:\n    input r0 as address.public;\n    input r1 as field.public;\n    input r2 as field.public;\n    get admin[true] into r3;\n    is.eq r0 r3 into r4;\n    assert.eq r4 true;\n    contains token_allowed[r1] into r5;\n    not r5 into r6;\n    assert.eq r6 true;\n    set true into token_allowed[r1];\n    contains from_wrapper_token_id[r1] into r7;\n    not r7 into r8;\n    assert.eq r8 true;\n    contains to_wrapper_token_id[r1] into r9;\n    not r9 into r10;\n    assert.eq r10 true;\n    contains from_wrapper_token_id[r2] into r11;\n    not r11 into r12;\n    assert.eq r12 true;\n    contains to_wrapper_token_id[r2] into r13;\n    not r13 into r14;\n    assert.eq r14 true;\n    is.neq r1 r2 into r15;\n    branch.eq r15 false to end_then_0_0;\n    set r2 into from_wrapper_token_id[r1];\n    set r1 into to_wrapper_token_id[r2];\n    branch.eq true true to end_otherwise_0_1;\n    position end_then_0_0;\n    position end_otherwise_0_1;\n\nfunction set_token_paused:\n    input r0 as field.public;\n    input r1 as boolean.public;\n    async set_token_paused self.caller r0 r1 into r2;\n    output r2 as shield_swap.aleo/set_token_paused.future;\n\nfinalize set_token_paused:\n    input r0 as address.public;\n    input r1 as field.public;\n    input r2 as boolean.public;\n    get admin[true] into r3;\n    is.eq r0 r3 into r4;\n    assert.eq r4 true;\n    set r2 into token_paused[r1];\n\nfunction set_pair_paused:\n    input r0 as field.public;\n    input r1 as field.public;\n    input r2 as boolean.public;\n    lt r0 r1 into r3;\n    ternary r3 r0 r1 into r4;\n    ternary r3 r1 r0 into r5;\n    cast r4 r5 into r6 as PairKey;\n    async set_pair_paused self.caller r6 r2 into r7;\n    output r7 as shield_swap.aleo/set_pair_paused.future;\n\nfinalize set_pair_paused:\n    input r0 as address.public;\n    input r1 as PairKey.public;\n    input r2 as boolean.public;\n    get admin[true] into r3;\n    is.eq r0 r3 into r4;\n    assert.eq r4 true;\n    set r2 into pair_paused[r1];\n\nview view_sqrt_price_at_tick_x128:\n    input r0 as i32.public;\n    gte r0 -524287i32 into r1;\n    lte r0 524287i32 into r2;\n    and r1 r2 into r3;\n    assert.eq r3 true;\n    lt r0 0i32 into r4;\n    sub 0i32 r0 into r5;\n    ternary r4 r5 r0 into r6;\n    gte r6 0i32 into r7;\n    assert.eq r7 true;\n    cast r6 into r8 as u32;\n    and r8 3u32 into r9;\n    is.eq r9 0u32 into r10;\n    is.eq r9 1u32 into r11;\n    is.eq r9 2u32 into r12;\n    ternary r12 0u128 0u128 into r13;\n    ternary r12 340248342086729790484326174814286782778u128 340231330945450418515964920540021147199u128 into r14;\n    cast r13 r14 into r15 as U256__8JquwLopp8;\n    ternary r11 0u128 r15.hi into r16;\n    ternary r11 340265354078544963557816517032075149313u128 r15.lo into r17;\n    cast r16 r17 into r18 as U256__8JquwLopp8;\n    ternary r10 1u128 r18.hi into r19;\n    ternary r10 0u128 r18.lo into r20;\n    cast r19 r20 into r21 as U256__8JquwLopp8;\n    and r8 4u32 into r22;\n    is.neq r22 0u32 into r23;\n    and r21.lo 18446744073709551615u128 into r24;\n    shr r21.lo 64u8 into r25;\n    mul r24 17226890335427755468u128 into r26;\n    mul r24 18443055278223354162u128 into r27;\n    mul r25 17226890335427755468u128 into r28;\n    mul r25 18443055278223354162u128 into r29;\n    and r26 18446744073709551615u128 into r30;\n    shr r26 64u8 into r31;\n    and r27 18446744073709551615u128 into r32;\n    add r31 r32 into r33;\n    and r28 18446744073709551615u128 into r34;\n    add r33 r34 into r35;\n    and r35 18446744073709551615u128 into r36;\n    shr r35 64u8 into r37;\n    shr r27 64u8 into r38;\n    shr r28 64u8 into r39;\n    add r38 r39 into r40;\n    and r29 18446744073709551615u128 into r41;\n    add r40 r41 into r42;\n    add r42 r37 into r43;\n    and r43 18446744073709551615u128 into r44;\n    shr r43 64u8 into r45;\n    shr r29 64u8 into r46;\n    add r46 r45 into r47;\n    shl r47 64u8 into r48;\n    add r48 r44 into r49;\n    shl r36 64u8 into r50;\n    add r50 r30 into r51;\n    and r21.hi 18446744073709551615u128 into r52;\n    shr r21.hi 64u8 into r53;\n    mul r52 17226890335427755468u128 into r54;\n    mul r52 18443055278223354162u128 into r55;\n    mul r53 17226890335427755468u128 into r56;\n    mul r53 18443055278223354162u128 into r57;\n    and r54 18446744073709551615u128 into r58;\n    shr r54 64u8 into r59;\n    and r55 18446744073709551615u128 into r60;\n    add r59 r60 into r61;\n    and r56 18446744073709551615u128 into r62;\n    add r61 r62 into r63;\n    and r63 18446744073709551615u128 into r64;\n    shr r63 64u8 into r65;\n    shr r55 64u8 into r66;\n    shr r56 64u8 into r67;\n    add r66 r67 into r68;\n    and r57 18446744073709551615u128 into r69;\n    add r68 r69 into r70;\n    add r70 r65 into r71;\n    and r71 18446744073709551615u128 into r72;\n    shr r71 64u8 into r73;\n    shr r57 64u8 into r74;\n    add r74 r73 into r75;\n    shl r75 64u8 into r76;\n    add r76 r72 into r77;\n    shl r64 64u8 into r78;\n    add r78 r58 into r79;\n    add.w r49 r79 into r80;\n    lt r80 r49 into r81;\n    ternary r81 1u128 0u128 into r82;\n    add.w r77 r82 into r83;\n    cast r83 r80 into r84 as U256__8JquwLopp8;\n    ternary r23 r84.hi r21.hi into r85;\n    ternary r23 r84.lo r21.lo into r86;\n    cast r85 r86 into r87 as U256__8JquwLopp8;\n    and r8 8u32 into r88;\n    is.neq r88 0u32 into r89;\n    and r87.lo 18446744073709551615u128 into r90;\n    shr r87.lo 64u8 into r91;\n    mul r90 2032852871939366096u128 into r92;\n    mul r90 18439367220385604838u128 into r93;\n    mul r91 2032852871939366096u128 into r94;\n    mul r91 18439367220385604838u128 into r95;\n    and r92 18446744073709551615u128 into r96;\n    shr r92 64u8 into r97;\n    and r93 18446744073709551615u128 into r98;\n    add r97 r98 into r99;\n    and r94 18446744073709551615u128 into r100;\n    add r99 r100 into r101;\n    and r101 18446744073709551615u128 into r102;\n    shr r101 64u8 into r103;\n    shr r93 64u8 into r104;\n    shr r94 64u8 into r105;\n    add r104 r105 into r106;\n    and r95 18446744073709551615u128 into r107;\n    add r106 r107 into r108;\n    add r108 r103 into r109;\n    and r109 18446744073709551615u128 into r110;\n    shr r109 64u8 into r111;\n    shr r95 64u8 into r112;\n    add r112 r111 into r113;\n    shl r113 64u8 into r114;\n    add r114 r110 into r115;\n    shl r102 64u8 into r116;\n    add r116 r96 into r117;\n    and r87.hi 18446744073709551615u128 into r118;\n    shr r87.hi 64u8 into r119;\n    mul r118 2032852871939366096u128 into r120;\n    mul r118 18439367220385604838u128 into r121;\n    mul r119 2032852871939366096u128 into r122;\n    mul r119 18439367220385604838u128 into r123;\n    and r120 18446744073709551615u128 into r124;\n    shr r120 64u8 into r125;\n    and r121 18446744073709551615u128 into r126;\n    add r125 r126 into r127;\n    and r122 18446744073709551615u128 into r128;\n    add r127 r128 into r129;\n    and r129 18446744073709551615u128 into r130;\n    shr r129 64u8 into r131;\n    shr r121 64u8 into r132;\n    shr r122 64u8 into r133;\n    add r132 r133 into r134;\n    and r123 18446744073709551615u128 into r135;\n    add r134 r135 into r136;\n    add r136 r131 into r137;\n    and r137 18446744073709551615u128 into r138;\n    shr r137 64u8 into r139;\n    shr r123 64u8 into r140;\n    add r140 r139 into r141;\n    shl r141 64u8 into r142;\n    add r142 r138 into r143;\n    shl r130 64u8 into r144;\n    add r144 r124 into r145;\n    add.w r115 r145 into r146;\n    lt r146 r115 into r147;\n    ternary r147 1u128 0u128 into r148;\n    add.w r143 r148 into r149;\n    cast r149 r146 into r150 as U256__8JquwLopp8;\n    ternary r89 r150.hi r87.hi into r151;\n    ternary r89 r150.lo r87.lo into r152;\n    cast r151 r152 into r153 as U256__8JquwLopp8;\n    and r8 16u32 into r154;\n    is.neq r154 0u32 into r155;\n    and r153.lo 18446744073709551615u128 into r156;\n    shr r153.lo 64u8 into r157;\n    mul r156 14545316742740207172u128 into r158;\n    mul r156 18431993317065449817u128 into r159;\n    mul r157 14545316742740207172u128 into r160;\n    mul r157 18431993317065449817u128 into r161;\n    and r158 18446744073709551615u128 into r162;\n    shr r158 64u8 into r163;\n    and r159 18446744073709551615u128 into r164;\n    add r163 r164 into r165;\n    and r160 18446744073709551615u128 into r166;\n    add r165 r166 into r167;\n    and r167 18446744073709551615u128 into r168;\n    shr r167 64u8 into r169;\n    shr r159 64u8 into r170;\n    shr r160 64u8 into r171;\n    add r170 r171 into r172;\n    and r161 18446744073709551615u128 into r173;\n    add r172 r173 into r174;\n    add r174 r169 into r175;\n    and r175 18446744073709551615u128 into r176;\n    shr r175 64u8 into r177;\n    shr r161 64u8 into r178;\n    add r178 r177 into r179;\n    shl r179 64u8 into r180;\n    add r180 r176 into r181;\n    shl r168 64u8 into r182;\n    add r182 r162 into r183;\n    and r153.hi 18446744073709551615u128 into r184;\n    shr r153.hi 64u8 into r185;\n    mul r184 14545316742740207172u128 into r186;\n    mul r184 18431993317065449817u128 into r187;\n    mul r185 14545316742740207172u128 into r188;\n    mul r185 18431993317065449817u128 into r189;\n    and r186 18446744073709551615u128 into r190;\n    shr r186 64u8 into r191;\n    and r187 18446744073709551615u128 into r192;\n    add r191 r192 into r193;\n    and r188 18446744073709551615u128 into r194;\n    add r193 r194 into r195;\n    and r195 18446744073709551615u128 into r196;\n    shr r195 64u8 into r197;\n    shr r187 64u8 into r198;\n    shr r188 64u8 into r199;\n    add r198 r199 into r200;\n    and r189 18446744073709551615u128 into r201;\n    add r200 r201 into r202;\n    add r202 r197 into r203;\n    and r203 18446744073709551615u128 into r204;\n    shr r203 64u8 into r205;\n    shr r189 64u8 into r206;\n    add r206 r205 into r207;\n    shl r207 64u8 into r208;\n    add r208 r204 into r209;\n    shl r196 64u8 into r210;\n    add r210 r190 into r211;\n    add.w r181 r211 into r212;\n    lt r212 r181 into r213;\n    ternary r213 1u128 0u128 into r214;\n    add.w r209 r214 into r215;\n    cast r215 r212 into r216 as U256__8JquwLopp8;\n    ternary r155 r216.hi r153.hi into r217;\n    ternary r155 r216.lo r153.lo into r218;\n    cast r217 r218 into r219 as U256__8JquwLopp8;\n    and r8 32u32 into r220;\n    is.neq r220 0u32 into r221;\n    and r219.lo 18446744073709551615u128 into r222;\n    shr r219.lo 64u8 into r223;\n    mul r222 5129152022828963008u128 into r224;\n    mul r222 18417254355718160513u128 into r225;\n    mul r223 5129152022828963008u128 into r226;\n    mul r223 18417254355718160513u128 into r227;\n    and r224 18446744073709551615u128 into r228;\n    shr r224 64u8 into r229;\n    and r225 18446744073709551615u128 into r230;\n    add r229 r230 into r231;\n    and r226 18446744073709551615u128 into r232;\n    add r231 r232 into r233;\n    and r233 18446744073709551615u128 into r234;\n    shr r233 64u8 into r235;\n    shr r225 64u8 into r236;\n    shr r226 64u8 into r237;\n    add r236 r237 into r238;\n    and r227 18446744073709551615u128 into r239;\n    add r238 r239 into r240;\n    add r240 r235 into r241;\n    and r241 18446744073709551615u128 into r242;\n    shr r241 64u8 into r243;\n    shr r227 64u8 into r244;\n    add r244 r243 into r245;\n    shl r245 64u8 into r246;\n    add r246 r242 into r247;\n    shl r234 64u8 into r248;\n    add r248 r228 into r249;\n    and r219.hi 18446744073709551615u128 into r250;\n    shr r219.hi 64u8 into r251;\n    mul r250 5129152022828963008u128 into r252;\n    mul r250 18417254355718160513u128 into r253;\n    mul r251 5129152022828963008u128 into r254;\n    mul r251 18417254355718160513u128 into r255;\n    and r252 18446744073709551615u128 into r256;\n    shr r252 64u8 into r257;\n    and r253 18446744073709551615u128 into r258;\n    add r257 r258 into r259;\n    and r254 18446744073709551615u128 into r260;\n    add r259 r260 into r261;\n    and r261 18446744073709551615u128 into r262;\n    shr r261 64u8 into r263;\n    shr r253 64u8 into r264;\n    shr r254 64u8 into r265;\n    add r264 r265 into r266;\n    and r255 18446744073709551615u128 into r267;\n    add r266 r267 into r268;\n    add r268 r263 into r269;\n    and r269 18446744073709551615u128 into r270;\n    shr r269 64u8 into r271;\n    shr r255 64u8 into r272;\n    add r272 r271 into r273;\n    shl r273 64u8 into r274;\n    add r274 r270 into r275;\n    shl r262 64u8 into r276;\n    add r276 r256 into r277;\n    add.w r247 r277 into r278;\n    lt r278 r247 into r279;\n    ternary r279 1u128 0u128 into r280;\n    add.w r275 r280 into r281;\n    cast r281 r278 into r282 as U256__8JquwLopp8;\n    ternary r221 r282.hi r219.hi into r283;\n    ternary r221 r282.lo r219.lo into r284;\n    cast r283 r284 into r285 as U256__8JquwLopp8;\n    and r8 64u32 into r286;\n    is.neq r286 0u32 into r287;\n    and r285.lo 18446744073709551615u128 into r288;\n    shr r285.lo 64u8 into r289;\n    mul r288 4894419605888772193u128 into r290;\n    mul r288 18387811781193591352u128 into r291;\n    mul r289 4894419605888772193u128 into r292;\n    mul r289 18387811781193591352u128 into r293;\n    and r290 18446744073709551615u128 into r294;\n    shr r290 64u8 into r295;\n    and r291 18446744073709551615u128 into r296;\n    add r295 r296 into r297;\n    and r292 18446744073709551615u128 into r298;\n    add r297 r298 into r299;\n    and r299 18446744073709551615u128 into r300;\n    shr r299 64u8 into r301;\n    shr r291 64u8 into r302;\n    shr r292 64u8 into r303;\n    add r302 r303 into r304;\n    and r293 18446744073709551615u128 into r305;\n    add r304 r305 into r306;\n    add r306 r301 into r307;\n    and r307 18446744073709551615u128 into r308;\n    shr r307 64u8 into r309;\n    shr r293 64u8 into r310;\n    add r310 r309 into r311;\n    shl r311 64u8 into r312;\n    add r312 r308 into r313;\n    shl r300 64u8 into r314;\n    add r314 r294 into r315;\n    and r285.hi 18446744073709551615u128 into r316;\n    shr r285.hi 64u8 into r317;\n    mul r316 4894419605888772193u128 into r318;\n    mul r316 18387811781193591352u128 into r319;\n    mul r317 4894419605888772193u128 into r320;\n    mul r317 18387811781193591352u128 into r321;\n    and r318 18446744073709551615u128 into r322;\n    shr r318 64u8 into r323;\n    and r319 18446744073709551615u128 into r324;\n    add r323 r324 into r325;\n    and r320 18446744073709551615u128 into r326;\n    add r325 r326 into r327;\n    and r327 18446744073709551615u128 into r328;\n    shr r327 64u8 into r329;\n    shr r319 64u8 into r330;\n    shr r320 64u8 into r331;\n    add r330 r331 into r332;\n    and r321 18446744073709551615u128 into r333;\n    add r332 r333 into r334;\n    add r334 r329 into r335;\n    and r335 18446744073709551615u128 into r336;\n    shr r335 64u8 into r337;\n    shr r321 64u8 into r338;\n    add r338 r337 into r339;\n    shl r339 64u8 into r340;\n    add r340 r336 into r341;\n    shl r328 64u8 into r342;\n    add r342 r322 into r343;\n    add.w r313 r343 into r344;\n    lt r344 r313 into r345;\n    ternary r345 1u128 0u128 into r346;\n    add.w r341 r346 into r347;\n    cast r347 r344 into r348 as U256__8JquwLopp8;\n    ternary r287 r348.hi r285.hi into r349;\n    ternary r287 r348.lo r285.lo into r350;\n    cast r349 r350 into r351 as U256__8JquwLopp8;\n    and r8 128u32 into r352;\n    is.neq r352 0u32 into r353;\n    and r351.lo 18446744073709551615u128 into r354;\n    shr r351.lo 64u8 into r355;\n    mul r354 1280255884321894483u128 into r356;\n    mul r354 18329067761203520168u128 into r357;\n    mul r355 1280255884321894483u128 into r358;\n    mul r355 18329067761203520168u128 into r359;\n    and r356 18446744073709551615u128 into r360;\n    shr r356 64u8 into r361;\n    and r357 18446744073709551615u128 into r362;\n    add r361 r362 into r363;\n    and r358 18446744073709551615u128 into r364;\n    add r363 r364 into r365;\n    and r365 18446744073709551615u128 into r366;\n    shr r365 64u8 into r367;\n    shr r357 64u8 into r368;\n    shr r358 64u8 into r369;\n    add r368 r369 into r370;\n    and r359 18446744073709551615u128 into r371;\n    add r370 r371 into r372;\n    add r372 r367 into r373;\n    and r373 18446744073709551615u128 into r374;\n    shr r373 64u8 into r375;\n    shr r359 64u8 into r376;\n    add r376 r375 into r377;\n    shl r377 64u8 into r378;\n    add r378 r374 into r379;\n    shl r366 64u8 into r380;\n    add r380 r360 into r381;\n    and r351.hi 18446744073709551615u128 into r382;\n    shr r351.hi 64u8 into r383;\n    mul r382 1280255884321894483u128 into r384;\n    mul r382 18329067761203520168u128 into r385;\n    mul r383 1280255884321894483u128 into r386;\n    mul r383 18329067761203520168u128 into r387;\n    and r384 18446744073709551615u128 into r388;\n    shr r384 64u8 into r389;\n    and r385 18446744073709551615u128 into r390;\n    add r389 r390 into r391;\n    and r386 18446744073709551615u128 into r392;\n    add r391 r392 into r393;\n    and r393 18446744073709551615u128 into r394;\n    shr r393 64u8 into r395;\n    shr r385 64u8 into r396;\n    shr r386 64u8 into r397;\n    add r396 r397 into r398;\n    and r387 18446744073709551615u128 into r399;\n    add r398 r399 into r400;\n    add r400 r395 into r401;\n    and r401 18446744073709551615u128 into r402;\n    shr r401 64u8 into r403;\n    shr r387 64u8 into r404;\n    add r404 r403 into r405;\n    shl r405 64u8 into r406;\n    add r406 r402 into r407;\n    shl r394 64u8 into r408;\n    add r408 r388 into r409;\n    add.w r379 r409 into r410;\n    lt r410 r379 into r411;\n    ternary r411 1u128 0u128 into r412;\n    add.w r407 r412 into r413;\n    cast r413 r410 into r414 as U256__8JquwLopp8;\n    ternary r353 r414.hi r351.hi into r415;\n    ternary r353 r414.lo r351.lo into r416;\n    cast r415 r416 into r417 as U256__8JquwLopp8;\n    and r8 256u32 into r418;\n    is.neq r418 0u32 into r419;\n    and r417.lo 18446744073709551615u128 into r420;\n    shr r417.lo 64u8 into r421;\n    mul r420 15924666964335305636u128 into r422;\n    mul r420 18212142134806087854u128 into r423;\n    mul r421 15924666964335305636u128 into r424;\n    mul r421 18212142134806087854u128 into r425;\n    and r422 18446744073709551615u128 into r426;\n    shr r422 64u8 into r427;\n    and r423 18446744073709551615u128 into r428;\n    add r427 r428 into r429;\n    and r424 18446744073709551615u128 into r430;\n    add r429 r430 into r431;\n    and r431 18446744073709551615u128 into r432;\n    shr r431 64u8 into r433;\n    shr r423 64u8 into r434;\n    shr r424 64u8 into r435;\n    add r434 r435 into r436;\n    and r425 18446744073709551615u128 into r437;\n    add r436 r437 into r438;\n    add r438 r433 into r439;\n    and r439 18446744073709551615u128 into r440;\n    shr r439 64u8 into r441;\n    shr r425 64u8 into r442;\n    add r442 r441 into r443;\n    shl r443 64u8 into r444;\n    add r444 r440 into r445;\n    shl r432 64u8 into r446;\n    add r446 r426 into r447;\n    and r417.hi 18446744073709551615u128 into r448;\n    shr r417.hi 64u8 into r449;\n    mul r448 15924666964335305636u128 into r450;\n    mul r448 18212142134806087854u128 into r451;\n    mul r449 15924666964335305636u128 into r452;\n    mul r449 18212142134806087854u128 into r453;\n    and r450 18446744073709551615u128 into r454;\n    shr r450 64u8 into r455;\n    and r451 18446744073709551615u128 into r456;\n    add r455 r456 into r457;\n    and r452 18446744073709551615u128 into r458;\n    add r457 r458 into r459;\n    and r459 18446744073709551615u128 into r460;\n    shr r459 64u8 into r461;\n    shr r451 64u8 into r462;\n    shr r452 64u8 into r463;\n    add r462 r463 into r464;\n    and r453 18446744073709551615u128 into r465;\n    add r464 r465 into r466;\n    add r466 r461 into r467;\n    and r467 18446744073709551615u128 into r468;\n    shr r467 64u8 into r469;\n    shr r453 64u8 into r470;\n    add r470 r469 into r471;\n    shl r471 64u8 into r472;\n    add r472 r468 into r473;\n    shl r460 64u8 into r474;\n    add r474 r454 into r475;\n    add.w r445 r475 into r476;\n    lt r476 r445 into r477;\n    ternary r477 1u128 0u128 into r478;\n    add.w r473 r478 into r479;\n    cast r479 r476 into r480 as U256__8JquwLopp8;\n    ternary r419 r480.hi r417.hi into r481;\n    ternary r419 r480.lo r417.lo into r482;\n    cast r481 r482 into r483 as U256__8JquwLopp8;\n    and r8 512u32 into r484;\n    is.neq r484 0u32 into r485;\n    and r483.lo 18446744073709551615u128 into r486;\n    shr r483.lo 64u8 into r487;\n    mul r486 8010504389359918676u128 into r488;\n    mul r486 17980523815641551639u128 into r489;\n    mul r487 8010504389359918676u128 into r490;\n    mul r487 17980523815641551639u128 into r491;\n    and r488 18446744073709551615u128 into r492;\n    shr r488 64u8 into r493;\n    and r489 18446744073709551615u128 into r494;\n    add r493 r494 into r495;\n    and r490 18446744073709551615u128 into r496;\n    add r495 r496 into r497;\n    and r497 18446744073709551615u128 into r498;\n    shr r497 64u8 into r499;\n    shr r489 64u8 into r500;\n    shr r490 64u8 into r501;\n    add r500 r501 into r502;\n    and r491 18446744073709551615u128 into r503;\n    add r502 r503 into r504;\n    add r504 r499 into r505;\n    and r505 18446744073709551615u128 into r506;\n    shr r505 64u8 into r507;\n    shr r491 64u8 into r508;\n    add r508 r507 into r509;\n    shl r509 64u8 into r510;\n    add r510 r506 into r511;\n    shl r498 64u8 into r512;\n    add r512 r492 into r513;\n    and r483.hi 18446744073709551615u128 into r514;\n    shr r483.hi 64u8 into r515;\n    mul r514 8010504389359918676u128 into r516;\n    mul r514 17980523815641551639u128 into r517;\n    mul r515 8010504389359918676u128 into r518;\n    mul r515 17980523815641551639u128 into r519;\n    and r516 18446744073709551615u128 into r520;\n    shr r516 64u8 into r521;\n    and r517 18446744073709551615u128 into r522;\n    add r521 r522 into r523;\n    and r518 18446744073709551615u128 into r524;\n    add r523 r524 into r525;\n    and r525 18446744073709551615u128 into r526;\n    shr r525 64u8 into r527;\n    shr r517 64u8 into r528;\n    shr r518 64u8 into r529;\n    add r528 r529 into r530;\n    and r519 18446744073709551615u128 into r531;\n    add r530 r531 into r532;\n    add r532 r527 into r533;\n    and r533 18446744073709551615u128 into r534;\n    shr r533 64u8 into r535;\n    shr r519 64u8 into r536;\n    add r536 r535 into r537;\n    shl r537 64u8 into r538;\n    add r538 r534 into r539;\n    shl r526 64u8 into r540;\n    add r540 r520 into r541;\n    add.w r511 r541 into r542;\n    lt r542 r511 into r543;\n    ternary r543 1u128 0u128 into r544;\n    add.w r539 r544 into r545;\n    cast r545 r542 into r546 as U256__8JquwLopp8;\n    ternary r485 r546.hi r483.hi into r547;\n    ternary r485 r546.lo r483.lo into r548;\n    cast r547 r548 into r549 as U256__8JquwLopp8;\n    and r8 1024u32 into r550;\n    is.neq r550 0u32 into r551;\n    and r549.lo 18446744073709551615u128 into r552;\n    shr r549.lo 64u8 into r553;\n    mul r552 10668036004952895731u128 into r554;\n    mul r552 17526086738831147013u128 into r555;\n    mul r553 10668036004952895731u128 into r556;\n    mul r553 17526086738831147013u128 into r557;\n    and r554 18446744073709551615u128 into r558;\n    shr r554 64u8 into r559;\n    and r555 18446744073709551615u128 into r560;\n    add r559 r560 into r561;\n    and r556 18446744073709551615u128 into r562;\n    add r561 r562 into r563;\n    and r563 18446744073709551615u128 into r564;\n    shr r563 64u8 into r565;\n    shr r555 64u8 into r566;\n    shr r556 64u8 into r567;\n    add r566 r567 into r568;\n    and r557 18446744073709551615u128 into r569;\n    add r568 r569 into r570;\n    add r570 r565 into r571;\n    and r571 18446744073709551615u128 into r572;\n    shr r571 64u8 into r573;\n    shr r557 64u8 into r574;\n    add r574 r573 into r575;\n    shl r575 64u8 into r576;\n    add r576 r572 into r577;\n    shl r564 64u8 into r578;\n    add r578 r558 into r579;\n    and r549.hi 18446744073709551615u128 into r580;\n    shr r549.hi 64u8 into r581;\n    mul r580 10668036004952895731u128 into r582;\n    mul r580 17526086738831147013u128 into r583;\n    mul r581 10668036004952895731u128 into r584;\n    mul r581 17526086738831147013u128 into r585;\n    and r582 18446744073709551615u128 into r586;\n    shr r582 64u8 into r587;\n    and r583 18446744073709551615u128 into r588;\n    add r587 r588 into r589;\n    and r584 18446744073709551615u128 into r590;\n    add r589 r590 into r591;\n    and r591 18446744073709551615u128 into r592;\n    shr r591 64u8 into r593;\n    shr r583 64u8 into r594;\n    shr r584 64u8 into r595;\n    add r594 r595 into r596;\n    and r585 18446744073709551615u128 into r597;\n    add r596 r597 into r598;\n    add r598 r593 into r599;\n    and r599 18446744073709551615u128 into r600;\n    shr r599 64u8 into r601;\n    shr r585 64u8 into r602;\n    add r602 r601 into r603;\n    shl r603 64u8 into r604;\n    add r604 r600 into r605;\n    shl r592 64u8 into r606;\n    add r606 r586 into r607;\n    add.w r577 r607 into r608;\n    lt r608 r577 into r609;\n    ternary r609 1u128 0u128 into r610;\n    add.w r605 r610 into r611;\n    cast r611 r608 into r612 as U256__8JquwLopp8;\n    ternary r551 r612.hi r549.hi into r613;\n    ternary r551 r612.lo r549.lo into r614;\n    cast r613 r614 into r615 as U256__8JquwLopp8;\n    and r8 2048u32 into r616;\n    is.neq r616 0u32 into r617;\n    and r615.lo 18446744073709551615u128 into r618;\n    shr r615.lo 64u8 into r619;\n    mul r618 4878133418470705625u128 into r620;\n    mul r618 16651378430235024244u128 into r621;\n    mul r619 4878133418470705625u128 into r622;\n    mul r619 16651378430235024244u128 into r623;\n    and r620 18446744073709551615u128 into r624;\n    shr r620 64u8 into r625;\n    and r621 18446744073709551615u128 into r626;\n    add r625 r626 into r627;\n    and r622 18446744073709551615u128 into r628;\n    add r627 r628 into r629;\n    and r629 18446744073709551615u128 into r630;\n    shr r629 64u8 into r631;\n    shr r621 64u8 into r632;\n    shr r622 64u8 into r633;\n    add r632 r633 into r634;\n    and r623 18446744073709551615u128 into r635;\n    add r634 r635 into r636;\n    add r636 r631 into r637;\n    and r637 18446744073709551615u128 into r638;\n    shr r637 64u8 into r639;\n    shr r623 64u8 into r640;\n    add r640 r639 into r641;\n    shl r641 64u8 into r642;\n    add r642 r638 into r643;\n    shl r630 64u8 into r644;\n    add r644 r624 into r645;\n    and r615.hi 18446744073709551615u128 into r646;\n    shr r615.hi 64u8 into r647;\n    mul r646 4878133418470705625u128 into r648;\n    mul r646 16651378430235024244u128 into r649;\n    mul r647 4878133418470705625u128 into r650;\n    mul r647 16651378430235024244u128 into r651;\n    and r648 18446744073709551615u128 into r652;\n    shr r648 64u8 into r653;\n    and r649 18446744073709551615u128 into r654;\n    add r653 r654 into r655;\n    and r650 18446744073709551615u128 into r656;\n    add r655 r656 into r657;\n    and r657 18446744073709551615u128 into r658;\n    shr r657 64u8 into r659;\n    shr r649 64u8 into r660;\n    shr r650 64u8 into r661;\n    add r660 r661 into r662;\n    and r651 18446744073709551615u128 into r663;\n    add r662 r663 into r664;\n    add r664 r659 into r665;\n    and r665 18446744073709551615u128 into r666;\n    shr r665 64u8 into r667;\n    shr r651 64u8 into r668;\n    add r668 r667 into r669;\n    shl r669 64u8 into r670;\n    add r670 r666 into r671;\n    shl r658 64u8 into r672;\n    add r672 r652 into r673;\n    add.w r643 r673 into r674;\n    lt r674 r643 into r675;\n    ternary r675 1u128 0u128 into r676;\n    add.w r671 r676 into r677;\n    cast r677 r674 into r678 as U256__8JquwLopp8;\n    ternary r617 r678.hi r615.hi into r679;\n    ternary r617 r678.lo r615.lo into r680;\n    cast r679 r680 into r681 as U256__8JquwLopp8;\n    and r8 4096u32 into r682;\n    is.neq r682 0u32 into r683;\n    and r681.lo 18446744073709551615u128 into r684;\n    shr r681.lo 64u8 into r685;\n    mul r684 9537173718739605541u128 into r686;\n    mul r684 15030750278693429944u128 into r687;\n    mul r685 9537173718739605541u128 into r688;\n    mul r685 15030750278693429944u128 into r689;\n    and r686 18446744073709551615u128 into r690;\n    shr r686 64u8 into r691;\n    and r687 18446744073709551615u128 into r692;\n    add r691 r692 into r693;\n    and r688 18446744073709551615u128 into r694;\n    add r693 r694 into r695;\n    and r695 18446744073709551615u128 into r696;\n    shr r695 64u8 into r697;\n    shr r687 64u8 into r698;\n    shr r688 64u8 into r699;\n    add r698 r699 into r700;\n    and r689 18446744073709551615u128 into r701;\n    add r700 r701 into r702;\n    add r702 r697 into r703;\n    and r703 18446744073709551615u128 into r704;\n    shr r703 64u8 into r705;\n    shr r689 64u8 into r706;\n    add r706 r705 into r707;\n    shl r707 64u8 into r708;\n    add r708 r704 into r709;\n    shl r696 64u8 into r710;\n    add r710 r690 into r711;\n    and r681.hi 18446744073709551615u128 into r712;\n    shr r681.hi 64u8 into r713;\n    mul r712 9537173718739605541u128 into r714;\n    mul r712 15030750278693429944u128 into r715;\n    mul r713 9537173718739605541u128 into r716;\n    mul r713 15030750278693429944u128 into r717;\n    and r714 18446744073709551615u128 into r718;\n    shr r714 64u8 into r719;\n    and r715 18446744073709551615u128 into r720;\n    add r719 r720 into r721;\n    and r716 18446744073709551615u128 into r722;\n    add r721 r722 into r723;\n    and r723 18446744073709551615u128 into r724;\n    shr r723 64u8 into r725;\n    shr r715 64u8 into r726;\n    shr r716 64u8 into r727;\n    add r726 r727 into r728;\n    and r717 18446744073709551615u128 into r729;\n    add r728 r729 into r730;\n    add r730 r725 into r731;\n    and r731 18446744073709551615u128 into r732;\n    shr r731 64u8 into r733;\n    shr r717 64u8 into r734;\n    add r734 r733 into r735;\n    shl r735 64u8 into r736;\n    add r736 r732 into r737;\n    shl r724 64u8 into r738;\n    add r738 r718 into r739;\n    add.w r709 r739 into r740;\n    lt r740 r709 into r741;\n    ternary r741 1u128 0u128 into r742;\n    add.w r737 r742 into r743;\n    cast r743 r740 into r744 as U256__8JquwLopp8;\n    ternary r683 r744.hi r681.hi into r745;\n    ternary r683 r744.lo r681.lo into r746;\n    cast r745 r746 into r747 as U256__8JquwLopp8;\n    and r8 8192u32 into r748;\n    is.neq r748 0u32 into r749;\n    and r747.lo 18446744073709551615u128 into r750;\n    shr r747.lo 64u8 into r751;\n    mul r750 9972618978014552549u128 into r752;\n    mul r750 12247334978882834399u128 into r753;\n    mul r751 9972618978014552549u128 into r754;\n    mul r751 12247334978882834399u128 into r755;\n    and r752 18446744073709551615u128 into r756;\n    shr r752 64u8 into r757;\n    and r753 18446744073709551615u128 into r758;\n    add r757 r758 into r759;\n    and r754 18446744073709551615u128 into r760;\n    add r759 r760 into r761;\n    and r761 18446744073709551615u128 into r762;\n    shr r761 64u8 into r763;\n    shr r753 64u8 into r764;\n    shr r754 64u8 into r765;\n    add r764 r765 into r766;\n    and r755 18446744073709551615u128 into r767;\n    add r766 r767 into r768;\n    add r768 r763 into r769;\n    and r769 18446744073709551615u128 into r770;\n    shr r769 64u8 into r771;\n    shr r755 64u8 into r772;\n    add r772 r771 into r773;\n    shl r773 64u8 into r774;\n    add r774 r770 into r775;\n    shl r762 64u8 into r776;\n    add r776 r756 into r777;\n    and r747.hi 18446744073709551615u128 into r778;\n    shr r747.hi 64u8 into r779;\n    mul r778 9972618978014552549u128 into r780;\n    mul r778 12247334978882834399u128 into r781;\n    mul r779 9972618978014552549u128 into r782;\n    mul r779 12247334978882834399u128 into r783;\n    and r780 18446744073709551615u128 into r784;\n    shr r780 64u8 into r785;\n    and r781 18446744073709551615u128 into r786;\n    add r785 r786 into r787;\n    and r782 18446744073709551615u128 into r788;\n    add r787 r788 into r789;\n    and r789 18446744073709551615u128 into r790;\n    shr r789 64u8 into r791;\n    shr r781 64u8 into r792;\n    shr r782 64u8 into r793;\n    add r792 r793 into r794;\n    and r783 18446744073709551615u128 into r795;\n    add r794 r795 into r796;\n    add r796 r791 into r797;\n    and r797 18446744073709551615u128 into r798;\n    shr r797 64u8 into r799;\n    shr r783 64u8 into r800;\n    add r800 r799 into r801;\n    shl r801 64u8 into r802;\n    add r802 r798 into r803;\n    shl r790 64u8 into r804;\n    add r804 r784 into r805;\n    add.w r775 r805 into r806;\n    lt r806 r775 into r807;\n    ternary r807 1u128 0u128 into r808;\n    add.w r803 r808 into r809;\n    cast r809 r806 into r810 as U256__8JquwLopp8;\n    ternary r749 r810.hi r747.hi into r811;\n    ternary r749 r810.lo r747.lo into r812;\n    cast r811 r812 into r813 as U256__8JquwLopp8;\n    and r8 16384u32 into r814;\n    is.neq r814 0u32 into r815;\n    and r813.lo 18446744073709551615u128 into r816;\n    shr r813.lo 64u8 into r817;\n    mul r816 10428997489610666743u128 into r818;\n    mul r816 8131365268884726200u128 into r819;\n    mul r817 10428997489610666743u128 into r820;\n    mul r817 8131365268884726200u128 into r821;\n    and r818 18446744073709551615u128 into r822;\n    shr r818 64u8 into r823;\n    and r819 18446744073709551615u128 into r824;\n    add r823 r824 into r825;\n    and r820 18446744073709551615u128 into r826;\n    add r825 r826 into r827;\n    and r827 18446744073709551615u128 into r828;\n    shr r827 64u8 into r829;\n    shr r819 64u8 into r830;\n    shr r820 64u8 into r831;\n    add r830 r831 into r832;\n    and r821 18446744073709551615u128 into r833;\n    add r832 r833 into r834;\n    add r834 r829 into r835;\n    and r835 18446744073709551615u128 into r836;\n    shr r835 64u8 into r837;\n    shr r821 64u8 into r838;\n    add r838 r837 into r839;\n    shl r839 64u8 into r840;\n    add r840 r836 into r841;\n    shl r828 64u8 into r842;\n    add r842 r822 into r843;\n    and r813.hi 18446744073709551615u128 into r844;\n    shr r813.hi 64u8 into r845;\n    mul r844 10428997489610666743u128 into r846;\n    mul r844 8131365268884726200u128 into r847;\n    mul r845 10428997489610666743u128 into r848;\n    mul r845 8131365268884726200u128 into r849;\n    and r846 18446744073709551615u128 into r850;\n    shr r846 64u8 into r851;\n    and r847 18446744073709551615u128 into r852;\n    add r851 r852 into r853;\n    and r848 18446744073709551615u128 into r854;\n    add r853 r854 into r855;\n    and r855 18446744073709551615u128 into r856;\n    shr r855 64u8 into r857;\n    shr r847 64u8 into r858;\n    shr r848 64u8 into r859;\n    add r858 r859 into r860;\n    and r849 18446744073709551615u128 into r861;\n    add r860 r861 into r862;\n    add r862 r857 into r863;\n    and r863 18446744073709551615u128 into r864;\n    shr r863 64u8 into r865;\n    shr r849 64u8 into r866;\n    add r866 r865 into r867;\n    shl r867 64u8 into r868;\n    add r868 r864 into r869;\n    shl r856 64u8 into r870;\n    add r870 r850 into r871;\n    add.w r841 r871 into r872;\n    lt r872 r841 into r873;\n    ternary r873 1u128 0u128 into r874;\n    add.w r869 r874 into r875;\n    cast r875 r872 into r876 as U256__8JquwLopp8;\n    ternary r815 r876.hi r813.hi into r877;\n    ternary r815 r876.lo r813.lo into r878;\n    cast r877 r878 into r879 as U256__8JquwLopp8;\n    and r8 32768u32 into r880;\n    is.neq r880 0u32 into r881;\n    and r879.lo 18446744073709551615u128 into r882;\n    shr r879.lo 64u8 into r883;\n    mul r882 9305304367709015974u128 into r884;\n    mul r882 3584323654723342297u128 into r885;\n    mul r883 9305304367709015974u128 into r886;\n    mul r883 3584323654723342297u128 into r887;\n    and r884 18446744073709551615u128 into r888;\n    shr r884 64u8 into r889;\n    and r885 18446744073709551615u128 into r890;\n    add r889 r890 into r891;\n    and r886 18446744073709551615u128 into r892;\n    add r891 r892 into r893;\n    and r893 18446744073709551615u128 into r894;\n    shr r893 64u8 into r895;\n    shr r885 64u8 into r896;\n    shr r886 64u8 into r897;\n    add r896 r897 into r898;\n    and r887 18446744073709551615u128 into r899;\n    add r898 r899 into r900;\n    add r900 r895 into r901;\n    and r901 18446744073709551615u128 into r902;\n    shr r901 64u8 into r903;\n    shr r887 64u8 into r904;\n    add r904 r903 into r905;\n    shl r905 64u8 into r906;\n    add r906 r902 into r907;\n    shl r894 64u8 into r908;\n    add r908 r888 into r909;\n    and r879.hi 18446744073709551615u128 into r910;\n    shr r879.hi 64u8 into r911;\n    mul r910 9305304367709015974u128 into r912;\n    mul r910 3584323654723342297u128 into r913;\n    mul r911 9305304367709015974u128 into r914;\n    mul r911 3584323654723342297u128 into r915;\n    and r912 18446744073709551615u128 into r916;\n    shr r912 64u8 into r917;\n    and r913 18446744073709551615u128 into r918;\n    add r917 r918 into r919;\n    and r914 18446744073709551615u128 into r920;\n    add r919 r920 into r921;\n    and r921 18446744073709551615u128 into r922;\n    shr r921 64u8 into r923;\n    shr r913 64u8 into r924;\n    shr r914 64u8 into r925;\n    add r924 r925 into r926;\n    and r915 18446744073709551615u128 into r927;\n    add r926 r927 into r928;\n    add r928 r923 into r929;\n    and r929 18446744073709551615u128 into r930;\n    shr r929 64u8 into r931;\n    shr r915 64u8 into r932;\n    add r932 r931 into r933;\n    shl r933 64u8 into r934;\n    add r934 r930 into r935;\n    shl r922 64u8 into r936;\n    add r936 r916 into r937;\n    add.w r907 r937 into r938;\n    lt r938 r907 into r939;\n    ternary r939 1u128 0u128 into r940;\n    add.w r935 r940 into r941;\n    cast r941 r938 into r942 as U256__8JquwLopp8;\n    ternary r881 r942.hi r879.hi into r943;\n    ternary r881 r942.lo r879.lo into r944;\n    cast r943 r944 into r945 as U256__8JquwLopp8;\n    and r8 65536u32 into r946;\n    is.neq r946 0u32 into r947;\n    and r945.lo 18446744073709551615u128 into r948;\n    shr r945.lo 64u8 into r949;\n    mul r948 14301143598189091785u128 into r950;\n    mul r948 696457651847595233u128 into r951;\n    mul r949 14301143598189091785u128 into r952;\n    mul r949 696457651847595233u128 into r953;\n    and r950 18446744073709551615u128 into r954;\n    shr r950 64u8 into r955;\n    and r951 18446744073709551615u128 into r956;\n    add r955 r956 into r957;\n    and r952 18446744073709551615u128 into r958;\n    add r957 r958 into r959;\n    and r959 18446744073709551615u128 into r960;\n    shr r959 64u8 into r961;\n    shr r951 64u8 into r962;\n    shr r952 64u8 into r963;\n    add r962 r963 into r964;\n    and r953 18446744073709551615u128 into r965;\n    add r964 r965 into r966;\n    add r966 r961 into r967;\n    and r967 18446744073709551615u128 into r968;\n    shr r967 64u8 into r969;\n    shr r953 64u8 into r970;\n    add r970 r969 into r971;\n    shl r971 64u8 into r972;\n    add r972 r968 into r973;\n    shl r960 64u8 into r974;\n    add r974 r954 into r975;\n    and r945.hi 18446744073709551615u128 into r976;\n    shr r945.hi 64u8 into r977;\n    mul r976 14301143598189091785u128 into r978;\n    mul r976 696457651847595233u128 into r979;\n    mul r977 14301143598189091785u128 into r980;\n    mul r977 696457651847595233u128 into r981;\n    and r978 18446744073709551615u128 into r982;\n    shr r978 64u8 into r983;\n    and r979 18446744073709551615u128 into r984;\n    add r983 r984 into r985;\n    and r980 18446744073709551615u128 into r986;\n    add r985 r986 into r987;\n    and r987 18446744073709551615u128 into r988;\n    shr r987 64u8 into r989;\n    shr r979 64u8 into r990;\n    shr r980 64u8 into r991;\n    add r990 r991 into r992;\n    and r981 18446744073709551615u128 into r993;\n    add r992 r993 into r994;\n    add r994 r989 into r995;\n    and r995 18446744073709551615u128 into r996;\n    shr r995 64u8 into r997;\n    shr r981 64u8 into r998;\n    add r998 r997 into r999;\n    shl r999 64u8 into r1000;\n    add r1000 r996 into r1001;\n    shl r988 64u8 into r1002;\n    add r1002 r982 into r1003;\n    add.w r973 r1003 into r1004;\n    lt r1004 r973 into r1005;\n    ternary r1005 1u128 0u128 into r1006;\n    add.w r1001 r1006 into r1007;\n    cast r1007 r1004 into r1008 as U256__8JquwLopp8;\n    ternary r947 r1008.hi r945.hi into r1009;\n    ternary r947 r1008.lo r945.lo into r1010;\n    cast r1009 r1010 into r1011 as U256__8JquwLopp8;\n    and r8 131072u32 into r1012;\n    is.neq r1012 0u32 into r1013;\n    and r1011.lo 18446744073709551615u128 into r1014;\n    shr r1011.lo 64u8 into r1015;\n    mul r1014 7393154844743099908u128 into r1016;\n    mul r1014 26294789957452057u128 into r1017;\n    mul r1015 7393154844743099908u128 into r1018;\n    mul r1015 26294789957452057u128 into r1019;\n    and r1016 18446744073709551615u128 into r1020;\n    shr r1016 64u8 into r1021;\n    and r1017 18446744073709551615u128 into r1022;\n    add r1021 r1022 into r1023;\n    and r1018 18446744073709551615u128 into r1024;\n    add r1023 r1024 into r1025;\n    and r1025 18446744073709551615u128 into r1026;\n    shr r1025 64u8 into r1027;\n    shr r1017 64u8 into r1028;\n    shr r1018 64u8 into r1029;\n    add r1028 r1029 into r1030;\n    and r1019 18446744073709551615u128 into r1031;\n    add r1030 r1031 into r1032;\n    add r1032 r1027 into r1033;\n    and r1033 18446744073709551615u128 into r1034;\n    shr r1033 64u8 into r1035;\n    shr r1019 64u8 into r1036;\n    add r1036 r1035 into r1037;\n    shl r1037 64u8 into r1038;\n    add r1038 r1034 into r1039;\n    shl r1026 64u8 into r1040;\n    add r1040 r1020 into r1041;\n    and r1011.hi 18446744073709551615u128 into r1042;\n    shr r1011.hi 64u8 into r1043;\n    mul r1042 7393154844743099908u128 into r1044;\n    mul r1042 26294789957452057u128 into r1045;\n    mul r1043 7393154844743099908u128 into r1046;\n    mul r1043 26294789957452057u128 into r1047;\n    and r1044 18446744073709551615u128 into r1048;\n    shr r1044 64u8 into r1049;\n    and r1045 18446744073709551615u128 into r1050;\n    add r1049 r1050 into r1051;\n    and r1046 18446744073709551615u128 into r1052;\n    add r1051 r1052 into r1053;\n    and r1053 18446744073709551615u128 into r1054;\n    shr r1053 64u8 into r1055;\n    shr r1045 64u8 into r1056;\n    shr r1046 64u8 into r1057;\n    add r1056 r1057 into r1058;\n    and r1047 18446744073709551615u128 into r1059;\n    add r1058 r1059 into r1060;\n    add r1060 r1055 into r1061;\n    and r1061 18446744073709551615u128 into r1062;\n    shr r1061 64u8 into r1063;\n    shr r1047 64u8 into r1064;\n    add r1064 r1063 into r1065;\n    shl r1065 64u8 into r1066;\n    add r1066 r1062 into r1067;\n    shl r1054 64u8 into r1068;\n    add r1068 r1048 into r1069;\n    add.w r1039 r1069 into r1070;\n    lt r1070 r1039 into r1071;\n    ternary r1071 1u128 0u128 into r1072;\n    add.w r1067 r1072 into r1073;\n    cast r1073 r1070 into r1074 as U256__8JquwLopp8;\n    ternary r1013 r1074.hi r1011.hi into r1075;\n    ternary r1013 r1074.lo r1011.lo into r1076;\n    cast r1075 r1076 into r1077 as U256__8JquwLopp8;\n    and r8 262144u32 into r1078;\n    is.neq r1078 0u32 into r1079;\n    and r1077.lo 18446744073709551615u128 into r1080;\n    shr r1077.lo 64u8 into r1081;\n    mul r1080 2209338891292245656u128 into r1082;\n    mul r1080 37481735321082u128 into r1083;\n    mul r1081 2209338891292245656u128 into r1084;\n    mul r1081 37481735321082u128 into r1085;\n    and r1082 18446744073709551615u128 into r1086;\n    shr r1082 64u8 into r1087;\n    and r1083 18446744073709551615u128 into r1088;\n    add r1087 r1088 into r1089;\n    and r1084 18446744073709551615u128 into r1090;\n    add r1089 r1090 into r1091;\n    and r1091 18446744073709551615u128 into r1092;\n    shr r1091 64u8 into r1093;\n    shr r1083 64u8 into r1094;\n    shr r1084 64u8 into r1095;\n    add r1094 r1095 into r1096;\n    and r1085 18446744073709551615u128 into r1097;\n    add r1096 r1097 into r1098;\n    add r1098 r1093 into r1099;\n    and r1099 18446744073709551615u128 into r1100;\n    shr r1099 64u8 into r1101;\n    shr r1085 64u8 into r1102;\n    add r1102 r1101 into r1103;\n    shl r1103 64u8 into r1104;\n    add r1104 r1100 into r1105;\n    shl r1092 64u8 into r1106;\n    add r1106 r1086 into r1107;\n    and r1077.hi 18446744073709551615u128 into r1108;\n    shr r1077.hi 64u8 into r1109;\n    mul r1108 2209338891292245656u128 into r1110;\n    mul r1108 37481735321082u128 into r1111;\n    mul r1109 2209338891292245656u128 into r1112;\n    mul r1109 37481735321082u128 into r1113;\n    and r1110 18446744073709551615u128 into r1114;\n    shr r1110 64u8 into r1115;\n    and r1111 18446744073709551615u128 into r1116;\n    add r1115 r1116 into r1117;\n    and r1112 18446744073709551615u128 into r1118;\n    add r1117 r1118 into r1119;\n    and r1119 18446744073709551615u128 into r1120;\n    shr r1119 64u8 into r1121;\n    shr r1111 64u8 into r1122;\n    shr r1112 64u8 into r1123;\n    add r1122 r1123 into r1124;\n    and r1113 18446744073709551615u128 into r1125;\n    add r1124 r1125 into r1126;\n    add r1126 r1121 into r1127;\n    and r1127 18446744073709551615u128 into r1128;\n    shr r1127 64u8 into r1129;\n    shr r1113 64u8 into r1130;\n    add r1130 r1129 into r1131;\n    shl r1131 64u8 into r1132;\n    add r1132 r1128 into r1133;\n    shl r1120 64u8 into r1134;\n    add r1134 r1114 into r1135;\n    add.w r1105 r1135 into r1136;\n    lt r1136 r1105 into r1137;\n    ternary r1137 1u128 0u128 into r1138;\n    add.w r1133 r1138 into r1139;\n    cast r1139 r1136 into r1140 as U256__8JquwLopp8;\n    ternary r1079 r1140.hi r1077.hi into r1141;\n    ternary r1079 r1140.lo r1077.lo into r1142;\n    cast r1141 r1142 into r1143 as U256__8JquwLopp8;\n    gt r0 0i32 into r1144;\n    is.eq r1143.lo 0u128 into r1145;\n    ternary r1145 1u128 r1143.lo into r1146;\n    div 340282366920938463463374607431768211455u128 r1146 into r1147;\n    rem 340282366920938463463374607431768211455u128 r1146 into r1148;\n    lt r1148 r1146 into r1149;\n    assert.eq r1149 true;\n    gte r1148 170141183460469231731687303715884105728u128 into r1150;\n    add.w r1148 r1148 into r1151;\n    add r1151 1u128 into r1152;\n    gte r1152 r1146 into r1153;\n    or r1150 r1153 into r1154;\n    sub.w r1152 r1146 into r1155;\n    ternary r1154 r1155 r1152 into r1156;\n    ternary r1154 170141183460469231731687303715884105728u128 0u128 into r1157;\n    gte r1156 170141183460469231731687303715884105728u128 into r1158;\n    add.w r1156 r1156 into r1159;\n    add r1159 1u128 into r1160;\n    gte r1160 r1146 into r1161;\n    or r1158 r1161 into r1162;\n    sub.w r1160 r1146 into r1163;\n    ternary r1162 r1163 r1160 into r1164;\n    add r1157 85070591730234615865843651857942052864u128 into r1165;\n    ternary r1162 r1165 r1157 into r1166;\n    gte r1164 170141183460469231731687303715884105728u128 into r1167;\n    add.w r1164 r1164 into r1168;\n    add r1168 1u128 into r1169;\n    gte r1169 r1146 into r1170;\n    or r1167 r1170 into r1171;\n    sub.w r1169 r1146 into r1172;\n    ternary r1171 r1172 r1169 into r1173;\n    add r1166 42535295865117307932921825928971026432u128 into r1174;\n    ternary r1171 r1174 r1166 into r1175;\n    gte r1173 170141183460469231731687303715884105728u128 into r1176;\n    add.w r1173 r1173 into r1177;\n    add r1177 1u128 into r1178;\n    gte r1178 r1146 into r1179;\n    or r1176 r1179 into r1180;\n    sub.w r1178 r1146 into r1181;\n    ternary r1180 r1181 r1178 into r1182;\n    add r1175 21267647932558653966460912964485513216u128 into r1183;\n    ternary r1180 r1183 r1175 into r1184;\n    gte r1182 170141183460469231731687303715884105728u128 into r1185;\n    add.w r1182 r1182 into r1186;\n    add r1186 1u128 into r1187;\n    gte r1187 r1146 into r1188;\n    or r1185 r1188 into r1189;\n    sub.w r1187 r1146 into r1190;\n    ternary r1189 r1190 r1187 into r1191;\n    add r1184 10633823966279326983230456482242756608u128 into r1192;\n    ternary r1189 r1192 r1184 into r1193;\n    gte r1191 170141183460469231731687303715884105728u128 into r1194;\n    add.w r1191 r1191 into r1195;\n    add r1195 1u128 into r1196;\n    gte r1196 r1146 into r1197;\n    or r1194 r1197 into r1198;\n    sub.w r1196 r1146 into r1199;\n    ternary r1198 r1199 r1196 into r1200;\n    add r1193 5316911983139663491615228241121378304u128 into r1201;\n    ternary r1198 r1201 r1193 into r1202;\n    gte r1200 170141183460469231731687303715884105728u128 into r1203;\n    add.w r1200 r1200 into r1204;\n    add r1204 1u128 into r1205;\n    gte r1205 r1146 into r1206;\n    or r1203 r1206 into r1207;\n    sub.w r1205 r1146 into r1208;\n    ternary r1207 r1208 r1205 into r1209;\n    add r1202 2658455991569831745807614120560689152u128 into r1210;\n    ternary r1207 r1210 r1202 into r1211;\n    gte r1209 170141183460469231731687303715884105728u128 into r1212;\n    add.w r1209 r1209 into r1213;\n    add r1213 1u128 into r1214;\n    gte r1214 r1146 into r1215;\n    or r1212 r1215 into r1216;\n    sub.w r1214 r1146 into r1217;\n    ternary r1216 r1217 r1214 into r1218;\n    add r1211 1329227995784915872903807060280344576u128 into r1219;\n    ternary r1216 r1219 r1211 into r1220;\n    gte r1218 170141183460469231731687303715884105728u128 into r1221;\n    add.w r1218 r1218 into r1222;\n    add r1222 1u128 into r1223;\n    gte r1223 r1146 into r1224;\n    or r1221 r1224 into r1225;\n    sub.w r1223 r1146 into r1226;\n    ternary r1225 r1226 r1223 into r1227;\n    add r1220 664613997892457936451903530140172288u128 into r1228;\n    ternary r1225 r1228 r1220 into r1229;\n    gte r1227 170141183460469231731687303715884105728u128 into r1230;\n    add.w r1227 r1227 into r1231;\n    add r1231 1u128 into r1232;\n    gte r1232 r1146 into r1233;\n    or r1230 r1233 into r1234;\n    sub.w r1232 r1146 into r1235;\n    ternary r1234 r1235 r1232 into r1236;\n    add r1229 332306998946228968225951765070086144u128 into r1237;\n    ternary r1234 r1237 r1229 into r1238;\n    gte r1236 170141183460469231731687303715884105728u128 into r1239;\n    add.w r1236 r1236 into r1240;\n    add r1240 1u128 into r1241;\n    gte r1241 r1146 into r1242;\n    or r1239 r1242 into r1243;\n    sub.w r1241 r1146 into r1244;\n    ternary r1243 r1244 r1241 into r1245;\n    add r1238 166153499473114484112975882535043072u128 into r1246;\n    ternary r1243 r1246 r1238 into r1247;\n    gte r1245 170141183460469231731687303715884105728u128 into r1248;\n    add.w r1245 r1245 into r1249;\n    add r1249 1u128 into r1250;\n    gte r1250 r1146 into r1251;\n    or r1248 r1251 into r1252;\n    sub.w r1250 r1146 into r1253;\n    ternary r1252 r1253 r1250 into r1254;\n    add r1247 83076749736557242056487941267521536u128 into r1255;\n    ternary r1252 r1255 r1247 into r1256;\n    gte r1254 170141183460469231731687303715884105728u128 into r1257;\n    add.w r1254 r1254 into r1258;\n    add r1258 1u128 into r1259;\n    gte r1259 r1146 into r1260;\n    or r1257 r1260 into r1261;\n    sub.w r1259 r1146 into r1262;\n    ternary r1261 r1262 r1259 into r1263;\n    add r1256 41538374868278621028243970633760768u128 into r1264;\n    ternary r1261 r1264 r1256 into r1265;\n    gte r1263 170141183460469231731687303715884105728u128 into r1266;\n    add.w r1263 r1263 into r1267;\n    add r1267 1u128 into r1268;\n    gte r1268 r1146 into r1269;\n    or r1266 r1269 into r1270;\n    sub.w r1268 r1146 into r1271;\n    ternary r1270 r1271 r1268 into r1272;\n    add r1265 20769187434139310514121985316880384u128 into r1273;\n    ternary r1270 r1273 r1265 into r1274;\n    gte r1272 170141183460469231731687303715884105728u128 into r1275;\n    add.w r1272 r1272 into r1276;\n    add r1276 1u128 into r1277;\n    gte r1277 r1146 into r1278;\n    or r1275 r1278 into r1279;\n    sub.w r1277 r1146 into r1280;\n    ternary r1279 r1280 r1277 into r1281;\n    add r1274 10384593717069655257060992658440192u128 into r1282;\n    ternary r1279 r1282 r1274 into r1283;\n    gte r1281 170141183460469231731687303715884105728u128 into r1284;\n    add.w r1281 r1281 into r1285;\n    add r1285 1u128 into r1286;\n    gte r1286 r1146 into r1287;\n    or r1284 r1287 into r1288;\n    sub.w r1286 r1146 into r1289;\n    ternary r1288 r1289 r1286 into r1290;\n    add r1283 5192296858534827628530496329220096u128 into r1291;\n    ternary r1288 r1291 r1283 into r1292;\n    gte r1290 170141183460469231731687303715884105728u128 into r1293;\n    add.w r1290 r1290 into r1294;\n    add r1294 1u128 into r1295;\n    gte r1295 r1146 into r1296;\n    or r1293 r1296 into r1297;\n    sub.w r1295 r1146 into r1298;\n    ternary r1297 r1298 r1295 into r1299;\n    add r1292 2596148429267413814265248164610048u128 into r1300;\n    ternary r1297 r1300 r1292 into r1301;\n    gte r1299 170141183460469231731687303715884105728u128 into r1302;\n    add.w r1299 r1299 into r1303;\n    add r1303 1u128 into r1304;\n    gte r1304 r1146 into r1305;\n    or r1302 r1305 into r1306;\n    sub.w r1304 r1146 into r1307;\n    ternary r1306 r1307 r1304 into r1308;\n    add r1301 1298074214633706907132624082305024u128 into r1309;\n    ternary r1306 r1309 r1301 into r1310;\n    gte r1308 170141183460469231731687303715884105728u128 into r1311;\n    add.w r1308 r1308 into r1312;\n    add r1312 1u128 into r1313;\n    gte r1313 r1146 into r1314;\n    or r1311 r1314 into r1315;\n    sub.w r1313 r1146 into r1316;\n    ternary r1315 r1316 r1313 into r1317;\n    add r1310 649037107316853453566312041152512u128 into r1318;\n    ternary r1315 r1318 r1310 into r1319;\n    gte r1317 170141183460469231731687303715884105728u128 into r1320;\n    add.w r1317 r1317 into r1321;\n    add r1321 1u128 into r1322;\n    gte r1322 r1146 into r1323;\n    or r1320 r1323 into r1324;\n    sub.w r1322 r1146 into r1325;\n    ternary r1324 r1325 r1322 into r1326;\n    add r1319 324518553658426726783156020576256u128 into r1327;\n    ternary r1324 r1327 r1319 into r1328;\n    gte r1326 170141183460469231731687303715884105728u128 into r1329;\n    add.w r1326 r1326 into r1330;\n    add r1330 1u128 into r1331;\n    gte r1331 r1146 into r1332;\n    or r1329 r1332 into r1333;\n    sub.w r1331 r1146 into r1334;\n    ternary r1333 r1334 r1331 into r1335;\n    add r1328 162259276829213363391578010288128u128 into r1336;\n    ternary r1333 r1336 r1328 into r1337;\n    gte r1335 170141183460469231731687303715884105728u128 into r1338;\n    add.w r1335 r1335 into r1339;\n    add r1339 1u128 into r1340;\n    gte r1340 r1146 into r1341;\n    or r1338 r1341 into r1342;\n    sub.w r1340 r1146 into r1343;\n    ternary r1342 r1343 r1340 into r1344;\n    add r1337 81129638414606681695789005144064u128 into r1345;\n    ternary r1342 r1345 r1337 into r1346;\n    gte r1344 170141183460469231731687303715884105728u128 into r1347;\n    add.w r1344 r1344 into r1348;\n    add r1348 1u128 into r1349;\n    gte r1349 r1146 into r1350;\n    or r1347 r1350 into r1351;\n    sub.w r1349 r1146 into r1352;\n    ternary r1351 r1352 r1349 into r1353;\n    add r1346 40564819207303340847894502572032u128 into r1354;\n    ternary r1351 r1354 r1346 into r1355;\n    gte r1353 170141183460469231731687303715884105728u128 into r1356;\n    add.w r1353 r1353 into r1357;\n    add r1357 1u128 into r1358;\n    gte r1358 r1146 into r1359;\n    or r1356 r1359 into r1360;\n    sub.w r1358 r1146 into r1361;\n    ternary r1360 r1361 r1358 into r1362;\n    add r1355 20282409603651670423947251286016u128 into r1363;\n    ternary r1360 r1363 r1355 into r1364;\n    gte r1362 170141183460469231731687303715884105728u128 into r1365;\n    add.w r1362 r1362 into r1366;\n    add r1366 1u128 into r1367;\n    gte r1367 r1146 into r1368;\n    or r1365 r1368 into r1369;\n    sub.w r1367 r1146 into r1370;\n    ternary r1369 r1370 r1367 into r1371;\n    add r1364 10141204801825835211973625643008u128 into r1372;\n    ternary r1369 r1372 r1364 into r1373;\n    gte r1371 170141183460469231731687303715884105728u128 into r1374;\n    add.w r1371 r1371 into r1375;\n    add r1375 1u128 into r1376;\n    gte r1376 r1146 into r1377;\n    or r1374 r1377 into r1378;\n    sub.w r1376 r1146 into r1379;\n    ternary r1378 r1379 r1376 into r1380;\n    add r1373 5070602400912917605986812821504u128 into r1381;\n    ternary r1378 r1381 r1373 into r1382;\n    gte r1380 170141183460469231731687303715884105728u128 into r1383;\n    add.w r1380 r1380 into r1384;\n    add r1384 1u128 into r1385;\n    gte r1385 r1146 into r1386;\n    or r1383 r1386 into r1387;\n    sub.w r1385 r1146 into r1388;\n    ternary r1387 r1388 r1385 into r1389;\n    add r1382 2535301200456458802993406410752u128 into r1390;\n    ternary r1387 r1390 r1382 into r1391;\n    gte r1389 170141183460469231731687303715884105728u128 into r1392;\n    add.w r1389 r1389 into r1393;\n    add r1393 1u128 into r1394;\n    gte r1394 r1146 into r1395;\n    or r1392 r1395 into r1396;\n    sub.w r1394 r1146 into r1397;\n    ternary r1396 r1397 r1394 into r1398;\n    add r1391 1267650600228229401496703205376u128 into r1399;\n    ternary r1396 r1399 r1391 into r1400;\n    gte r1398 170141183460469231731687303715884105728u128 into r1401;\n    add.w r1398 r1398 into r1402;\n    add r1402 1u128 into r1403;\n    gte r1403 r1146 into r1404;\n    or r1401 r1404 into r1405;\n    sub.w r1403 r1146 into r1406;\n    ternary r1405 r1406 r1403 into r1407;\n    add r1400 633825300114114700748351602688u128 into r1408;\n    ternary r1405 r1408 r1400 into r1409;\n    gte r1407 170141183460469231731687303715884105728u128 into r1410;\n    add.w r1407 r1407 into r1411;\n    add r1411 1u128 into r1412;\n    gte r1412 r1146 into r1413;\n    or r1410 r1413 into r1414;\n    sub.w r1412 r1146 into r1415;\n    ternary r1414 r1415 r1412 into r1416;\n    add r1409 316912650057057350374175801344u128 into r1417;\n    ternary r1414 r1417 r1409 into r1418;\n    gte r1416 170141183460469231731687303715884105728u128 into r1419;\n    add.w r1416 r1416 into r1420;\n    add r1420 1u128 into r1421;\n    gte r1421 r1146 into r1422;\n    or r1419 r1422 into r1423;\n    sub.w r1421 r1146 into r1424;\n    ternary r1423 r1424 r1421 into r1425;\n    add r1418 158456325028528675187087900672u128 into r1426;\n    ternary r1423 r1426 r1418 into r1427;\n    gte r1425 170141183460469231731687303715884105728u128 into r1428;\n    add.w r1425 r1425 into r1429;\n    add r1429 1u128 into r1430;\n    gte r1430 r1146 into r1431;\n    or r1428 r1431 into r1432;\n    sub.w r1430 r1146 into r1433;\n    ternary r1432 r1433 r1430 into r1434;\n    add r1427 79228162514264337593543950336u128 into r1435;\n    ternary r1432 r1435 r1427 into r1436;\n    gte r1434 170141183460469231731687303715884105728u128 into r1437;\n    add.w r1434 r1434 into r1438;\n    add r1438 1u128 into r1439;\n    gte r1439 r1146 into r1440;\n    or r1437 r1440 into r1441;\n    sub.w r1439 r1146 into r1442;\n    ternary r1441 r1442 r1439 into r1443;\n    add r1436 39614081257132168796771975168u128 into r1444;\n    ternary r1441 r1444 r1436 into r1445;\n    gte r1443 170141183460469231731687303715884105728u128 into r1446;\n    add.w r1443 r1443 into r1447;\n    add r1447 1u128 into r1448;\n    gte r1448 r1146 into r1449;\n    or r1446 r1449 into r1450;\n    sub.w r1448 r1146 into r1451;\n    ternary r1450 r1451 r1448 into r1452;\n    add r1445 19807040628566084398385987584u128 into r1453;\n    ternary r1450 r1453 r1445 into r1454;\n    gte r1452 170141183460469231731687303715884105728u128 into r1455;\n    add.w r1452 r1452 into r1456;\n    add r1456 1u128 into r1457;\n    gte r1457 r1146 into r1458;\n    or r1455 r1458 into r1459;\n    sub.w r1457 r1146 into r1460;\n    ternary r1459 r1460 r1457 into r1461;\n    add r1454 9903520314283042199192993792u128 into r1462;\n    ternary r1459 r1462 r1454 into r1463;\n    gte r1461 170141183460469231731687303715884105728u128 into r1464;\n    add.w r1461 r1461 into r1465;\n    add r1465 1u128 into r1466;\n    gte r1466 r1146 into r1467;\n    or r1464 r1467 into r1468;\n    sub.w r1466 r1146 into r1469;\n    ternary r1468 r1469 r1466 into r1470;\n    add r1463 4951760157141521099596496896u128 into r1471;\n    ternary r1468 r1471 r1463 into r1472;\n    gte r1470 170141183460469231731687303715884105728u128 into r1473;\n    add.w r1470 r1470 into r1474;\n    add r1474 1u128 into r1475;\n    gte r1475 r1146 into r1476;\n    or r1473 r1476 into r1477;\n    sub.w r1475 r1146 into r1478;\n    ternary r1477 r1478 r1475 into r1479;\n    add r1472 2475880078570760549798248448u128 into r1480;\n    ternary r1477 r1480 r1472 into r1481;\n    gte r1479 170141183460469231731687303715884105728u128 into r1482;\n    add.w r1479 r1479 into r1483;\n    add r1483 1u128 into r1484;\n    gte r1484 r1146 into r1485;\n    or r1482 r1485 into r1486;\n    sub.w r1484 r1146 into r1487;\n    ternary r1486 r1487 r1484 into r1488;\n    add r1481 1237940039285380274899124224u128 into r1489;\n    ternary r1486 r1489 r1481 into r1490;\n    gte r1488 170141183460469231731687303715884105728u128 into r1491;\n    add.w r1488 r1488 into r1492;\n    add r1492 1u128 into r1493;\n    gte r1493 r1146 into r1494;\n    or r1491 r1494 into r1495;\n    sub.w r1493 r1146 into r1496;\n    ternary r1495 r1496 r1493 into r1497;\n    add r1490 618970019642690137449562112u128 into r1498;\n    ternary r1495 r1498 r1490 into r1499;\n    gte r1497 170141183460469231731687303715884105728u128 into r1500;\n    add.w r1497 r1497 into r1501;\n    add r1501 1u128 into r1502;\n    gte r1502 r1146 into r1503;\n    or r1500 r1503 into r1504;\n    sub.w r1502 r1146 into r1505;\n    ternary r1504 r1505 r1502 into r1506;\n    add r1499 309485009821345068724781056u128 into r1507;\n    ternary r1504 r1507 r1499 into r1508;\n    gte r1506 170141183460469231731687303715884105728u128 into r1509;\n    add.w r1506 r1506 into r1510;\n    add r1510 1u128 into r1511;\n    gte r1511 r1146 into r1512;\n    or r1509 r1512 into r1513;\n    sub.w r1511 r1146 into r1514;\n    ternary r1513 r1514 r1511 into r1515;\n    add r1508 154742504910672534362390528u128 into r1516;\n    ternary r1513 r1516 r1508 into r1517;\n    gte r1515 170141183460469231731687303715884105728u128 into r1518;\n    add.w r1515 r1515 into r1519;\n    add r1519 1u128 into r1520;\n    gte r1520 r1146 into r1521;\n    or r1518 r1521 into r1522;\n    sub.w r1520 r1146 into r1523;\n    ternary r1522 r1523 r1520 into r1524;\n    add r1517 77371252455336267181195264u128 into r1525;\n    ternary r1522 r1525 r1517 into r1526;\n    gte r1524 170141183460469231731687303715884105728u128 into r1527;\n    add.w r1524 r1524 into r1528;\n    add r1528 1u128 into r1529;\n    gte r1529 r1146 into r1530;\n    or r1527 r1530 into r1531;\n    sub.w r1529 r1146 into r1532;\n    ternary r1531 r1532 r1529 into r1533;\n    add r1526 38685626227668133590597632u128 into r1534;\n    ternary r1531 r1534 r1526 into r1535;\n    gte r1533 170141183460469231731687303715884105728u128 into r1536;\n    add.w r1533 r1533 into r1537;\n    add r1537 1u128 into r1538;\n    gte r1538 r1146 into r1539;\n    or r1536 r1539 into r1540;\n    sub.w r1538 r1146 into r1541;\n    ternary r1540 r1541 r1538 into r1542;\n    add r1535 19342813113834066795298816u128 into r1543;\n    ternary r1540 r1543 r1535 into r1544;\n    gte r1542 170141183460469231731687303715884105728u128 into r1545;\n    add.w r1542 r1542 into r1546;\n    add r1546 1u128 into r1547;\n    gte r1547 r1146 into r1548;\n    or r1545 r1548 into r1549;\n    sub.w r1547 r1146 into r1550;\n    ternary r1549 r1550 r1547 into r1551;\n    add r1544 9671406556917033397649408u128 into r1552;\n    ternary r1549 r1552 r1544 into r1553;\n    gte r1551 170141183460469231731687303715884105728u128 into r1554;\n    add.w r1551 r1551 into r1555;\n    add r1555 1u128 into r1556;\n    gte r1556 r1146 into r1557;\n    or r1554 r1557 into r1558;\n    sub.w r1556 r1146 into r1559;\n    ternary r1558 r1559 r1556 into r1560;\n    add r1553 4835703278458516698824704u128 into r1561;\n    ternary r1558 r1561 r1553 into r1562;\n    gte r1560 170141183460469231731687303715884105728u128 into r1563;\n    add.w r1560 r1560 into r1564;\n    add r1564 1u128 into r1565;\n    gte r1565 r1146 into r1566;\n    or r1563 r1566 into r1567;\n    sub.w r1565 r1146 into r1568;\n    ternary r1567 r1568 r1565 into r1569;\n    add r1562 2417851639229258349412352u128 into r1570;\n    ternary r1567 r1570 r1562 into r1571;\n    gte r1569 170141183460469231731687303715884105728u128 into r1572;\n    add.w r1569 r1569 into r1573;\n    add r1573 1u128 into r1574;\n    gte r1574 r1146 into r1575;\n    or r1572 r1575 into r1576;\n    sub.w r1574 r1146 into r1577;\n    ternary r1576 r1577 r1574 into r1578;\n    add r1571 1208925819614629174706176u128 into r1579;\n    ternary r1576 r1579 r1571 into r1580;\n    gte r1578 170141183460469231731687303715884105728u128 into r1581;\n    add.w r1578 r1578 into r1582;\n    add r1582 1u128 into r1583;\n    gte r1583 r1146 into r1584;\n    or r1581 r1584 into r1585;\n    sub.w r1583 r1146 into r1586;\n    ternary r1585 r1586 r1583 into r1587;\n    add r1580 604462909807314587353088u128 into r1588;\n    ternary r1585 r1588 r1580 into r1589;\n    gte r1587 170141183460469231731687303715884105728u128 into r1590;\n    add.w r1587 r1587 into r1591;\n    add r1591 1u128 into r1592;\n    gte r1592 r1146 into r1593;\n    or r1590 r1593 into r1594;\n    sub.w r1592 r1146 into r1595;\n    ternary r1594 r1595 r1592 into r1596;\n    add r1589 302231454903657293676544u128 into r1597;\n    ternary r1594 r1597 r1589 into r1598;\n    gte r1596 170141183460469231731687303715884105728u128 into r1599;\n    add.w r1596 r1596 into r1600;\n    add r1600 1u128 into r1601;\n    gte r1601 r1146 into r1602;\n    or r1599 r1602 into r1603;\n    sub.w r1601 r1146 into r1604;\n    ternary r1603 r1604 r1601 into r1605;\n    add r1598 151115727451828646838272u128 into r1606;\n    ternary r1603 r1606 r1598 into r1607;\n    gte r1605 170141183460469231731687303715884105728u128 into r1608;\n    add.w r1605 r1605 into r1609;\n    add r1609 1u128 into r1610;\n    gte r1610 r1146 into r1611;\n    or r1608 r1611 into r1612;\n    sub.w r1610 r1146 into r1613;\n    ternary r1612 r1613 r1610 into r1614;\n    add r1607 75557863725914323419136u128 into r1615;\n    ternary r1612 r1615 r1607 into r1616;\n    gte r1614 170141183460469231731687303715884105728u128 into r1617;\n    add.w r1614 r1614 into r1618;\n    add r1618 1u128 into r1619;\n    gte r1619 r1146 into r1620;\n    or r1617 r1620 into r1621;\n    sub.w r1619 r1146 into r1622;\n    ternary r1621 r1622 r1619 into r1623;\n    add r1616 37778931862957161709568u128 into r1624;\n    ternary r1621 r1624 r1616 into r1625;\n    gte r1623 170141183460469231731687303715884105728u128 into r1626;\n    add.w r1623 r1623 into r1627;\n    add r1627 1u128 into r1628;\n    gte r1628 r1146 into r1629;\n    or r1626 r1629 into r1630;\n    sub.w r1628 r1146 into r1631;\n    ternary r1630 r1631 r1628 into r1632;\n    add r1625 18889465931478580854784u128 into r1633;\n    ternary r1630 r1633 r1625 into r1634;\n    gte r1632 170141183460469231731687303715884105728u128 into r1635;\n    add.w r1632 r1632 into r1636;\n    add r1636 1u128 into r1637;\n    gte r1637 r1146 into r1638;\n    or r1635 r1638 into r1639;\n    sub.w r1637 r1146 into r1640;\n    ternary r1639 r1640 r1637 into r1641;\n    add r1634 9444732965739290427392u128 into r1642;\n    ternary r1639 r1642 r1634 into r1643;\n    gte r1641 170141183460469231731687303715884105728u128 into r1644;\n    add.w r1641 r1641 into r1645;\n    add r1645 1u128 into r1646;\n    gte r1646 r1146 into r1647;\n    or r1644 r1647 into r1648;\n    sub.w r1646 r1146 into r1649;\n    ternary r1648 r1649 r1646 into r1650;\n    add r1643 4722366482869645213696u128 into r1651;\n    ternary r1648 r1651 r1643 into r1652;\n    gte r1650 170141183460469231731687303715884105728u128 into r1653;\n    add.w r1650 r1650 into r1654;\n    add r1654 1u128 into r1655;\n    gte r1655 r1146 into r1656;\n    or r1653 r1656 into r1657;\n    sub.w r1655 r1146 into r1658;\n    ternary r1657 r1658 r1655 into r1659;\n    add r1652 2361183241434822606848u128 into r1660;\n    ternary r1657 r1660 r1652 into r1661;\n    gte r1659 170141183460469231731687303715884105728u128 into r1662;\n    add.w r1659 r1659 into r1663;\n    add r1663 1u128 into r1664;\n    gte r1664 r1146 into r1665;\n    or r1662 r1665 into r1666;\n    sub.w r1664 r1146 into r1667;\n    ternary r1666 r1667 r1664 into r1668;\n    add r1661 1180591620717411303424u128 into r1669;\n    ternary r1666 r1669 r1661 into r1670;\n    gte r1668 170141183460469231731687303715884105728u128 into r1671;\n    add.w r1668 r1668 into r1672;\n    add r1672 1u128 into r1673;\n    gte r1673 r1146 into r1674;\n    or r1671 r1674 into r1675;\n    sub.w r1673 r1146 into r1676;\n    ternary r1675 r1676 r1673 into r1677;\n    add r1670 590295810358705651712u128 into r1678;\n    ternary r1675 r1678 r1670 into r1679;\n    gte r1677 170141183460469231731687303715884105728u128 into r1680;\n    add.w r1677 r1677 into r1681;\n    add r1681 1u128 into r1682;\n    gte r1682 r1146 into r1683;\n    or r1680 r1683 into r1684;\n    sub.w r1682 r1146 into r1685;\n    ternary r1684 r1685 r1682 into r1686;\n    add r1679 295147905179352825856u128 into r1687;\n    ternary r1684 r1687 r1679 into r1688;\n    gte r1686 170141183460469231731687303715884105728u128 into r1689;\n    add.w r1686 r1686 into r1690;\n    add r1690 1u128 into r1691;\n    gte r1691 r1146 into r1692;\n    or r1689 r1692 into r1693;\n    sub.w r1691 r1146 into r1694;\n    ternary r1693 r1694 r1691 into r1695;\n    add r1688 147573952589676412928u128 into r1696;\n    ternary r1693 r1696 r1688 into r1697;\n    gte r1695 170141183460469231731687303715884105728u128 into r1698;\n    add.w r1695 r1695 into r1699;\n    add r1699 1u128 into r1700;\n    gte r1700 r1146 into r1701;\n    or r1698 r1701 into r1702;\n    sub.w r1700 r1146 into r1703;\n    ternary r1702 r1703 r1700 into r1704;\n    add r1697 73786976294838206464u128 into r1705;\n    ternary r1702 r1705 r1697 into r1706;\n    gte r1704 170141183460469231731687303715884105728u128 into r1707;\n    add.w r1704 r1704 into r1708;\n    add r1708 1u128 into r1709;\n    gte r1709 r1146 into r1710;\n    or r1707 r1710 into r1711;\n    sub.w r1709 r1146 into r1712;\n    ternary r1711 r1712 r1709 into r1713;\n    add r1706 36893488147419103232u128 into r1714;\n    ternary r1711 r1714 r1706 into r1715;\n    gte r1713 170141183460469231731687303715884105728u128 into r1716;\n    add.w r1713 r1713 into r1717;\n    add r1717 1u128 into r1718;\n    gte r1718 r1146 into r1719;\n    or r1716 r1719 into r1720;\n    sub.w r1718 r1146 into r1721;\n    ternary r1720 r1721 r1718 into r1722;\n    add r1715 18446744073709551616u128 into r1723;\n    ternary r1720 r1723 r1715 into r1724;\n    gte r1722 170141183460469231731687303715884105728u128 into r1725;\n    add.w r1722 r1722 into r1726;\n    add r1726 1u128 into r1727;\n    gte r1727 r1146 into r1728;\n    or r1725 r1728 into r1729;\n    sub.w r1727 r1146 into r1730;\n    ternary r1729 r1730 r1727 into r1731;\n    add r1724 9223372036854775808u128 into r1732;\n    ternary r1729 r1732 r1724 into r1733;\n    gte r1731 170141183460469231731687303715884105728u128 into r1734;\n    add.w r1731 r1731 into r1735;\n    add r1735 1u128 into r1736;\n    gte r1736 r1146 into r1737;\n    or r1734 r1737 into r1738;\n    sub.w r1736 r1146 into r1739;\n    ternary r1738 r1739 r1736 into r1740;\n    add r1733 4611686018427387904u128 into r1741;\n    ternary r1738 r1741 r1733 into r1742;\n    gte r1740 170141183460469231731687303715884105728u128 into r1743;\n    add.w r1740 r1740 into r1744;\n    add r1744 1u128 into r1745;\n    gte r1745 r1146 into r1746;\n    or r1743 r1746 into r1747;\n    sub.w r1745 r1146 into r1748;\n    ternary r1747 r1748 r1745 into r1749;\n    add r1742 2305843009213693952u128 into r1750;\n    ternary r1747 r1750 r1742 into r1751;\n    gte r1749 170141183460469231731687303715884105728u128 into r1752;\n    add.w r1749 r1749 into r1753;\n    add r1753 1u128 into r1754;\n    gte r1754 r1146 into r1755;\n    or r1752 r1755 into r1756;\n    sub.w r1754 r1146 into r1757;\n    ternary r1756 r1757 r1754 into r1758;\n    add r1751 1152921504606846976u128 into r1759;\n    ternary r1756 r1759 r1751 into r1760;\n    gte r1758 170141183460469231731687303715884105728u128 into r1761;\n    add.w r1758 r1758 into r1762;\n    add r1762 1u128 into r1763;\n    gte r1763 r1146 into r1764;\n    or r1761 r1764 into r1765;\n    sub.w r1763 r1146 into r1766;\n    ternary r1765 r1766 r1763 into r1767;\n    add r1760 576460752303423488u128 into r1768;\n    ternary r1765 r1768 r1760 into r1769;\n    gte r1767 170141183460469231731687303715884105728u128 into r1770;\n    add.w r1767 r1767 into r1771;\n    add r1771 1u128 into r1772;\n    gte r1772 r1146 into r1773;\n    or r1770 r1773 into r1774;\n    sub.w r1772 r1146 into r1775;\n    ternary r1774 r1775 r1772 into r1776;\n    add r1769 288230376151711744u128 into r1777;\n    ternary r1774 r1777 r1769 into r1778;\n    gte r1776 170141183460469231731687303715884105728u128 into r1779;\n    add.w r1776 r1776 into r1780;\n    add r1780 1u128 into r1781;\n    gte r1781 r1146 into r1782;\n    or r1779 r1782 into r1783;\n    sub.w r1781 r1146 into r1784;\n    ternary r1783 r1784 r1781 into r1785;\n    add r1778 144115188075855872u128 into r1786;\n    ternary r1783 r1786 r1778 into r1787;\n    gte r1785 170141183460469231731687303715884105728u128 into r1788;\n    add.w r1785 r1785 into r1789;\n    add r1789 1u128 into r1790;\n    gte r1790 r1146 into r1791;\n    or r1788 r1791 into r1792;\n    sub.w r1790 r1146 into r1793;\n    ternary r1792 r1793 r1790 into r1794;\n    add r1787 72057594037927936u128 into r1795;\n    ternary r1792 r1795 r1787 into r1796;\n    gte r1794 170141183460469231731687303715884105728u128 into r1797;\n    add.w r1794 r1794 into r1798;\n    add r1798 1u128 into r1799;\n    gte r1799 r1146 into r1800;\n    or r1797 r1800 into r1801;\n    sub.w r1799 r1146 into r1802;\n    ternary r1801 r1802 r1799 into r1803;\n    add r1796 36028797018963968u128 into r1804;\n    ternary r1801 r1804 r1796 into r1805;\n    gte r1803 170141183460469231731687303715884105728u128 into r1806;\n    add.w r1803 r1803 into r1807;\n    add r1807 1u128 into r1808;\n    gte r1808 r1146 into r1809;\n    or r1806 r1809 into r1810;\n    sub.w r1808 r1146 into r1811;\n    ternary r1810 r1811 r1808 into r1812;\n    add r1805 18014398509481984u128 into r1813;\n    ternary r1810 r1813 r1805 into r1814;\n    gte r1812 170141183460469231731687303715884105728u128 into r1815;\n    add.w r1812 r1812 into r1816;\n    add r1816 1u128 into r1817;\n    gte r1817 r1146 into r1818;\n    or r1815 r1818 into r1819;\n    sub.w r1817 r1146 into r1820;\n    ternary r1819 r1820 r1817 into r1821;\n    add r1814 9007199254740992u128 into r1822;\n    ternary r1819 r1822 r1814 into r1823;\n    gte r1821 170141183460469231731687303715884105728u128 into r1824;\n    add.w r1821 r1821 into r1825;\n    add r1825 1u128 into r1826;\n    gte r1826 r1146 into r1827;\n    or r1824 r1827 into r1828;\n    sub.w r1826 r1146 into r1829;\n    ternary r1828 r1829 r1826 into r1830;\n    add r1823 4503599627370496u128 into r1831;\n    ternary r1828 r1831 r1823 into r1832;\n    gte r1830 170141183460469231731687303715884105728u128 into r1833;\n    add.w r1830 r1830 into r1834;\n    add r1834 1u128 into r1835;\n    gte r1835 r1146 into r1836;\n    or r1833 r1836 into r1837;\n    sub.w r1835 r1146 into r1838;\n    ternary r1837 r1838 r1835 into r1839;\n    add r1832 2251799813685248u128 into r1840;\n    ternary r1837 r1840 r1832 into r1841;\n    gte r1839 170141183460469231731687303715884105728u128 into r1842;\n    add.w r1839 r1839 into r1843;\n    add r1843 1u128 into r1844;\n    gte r1844 r1146 into r1845;\n    or r1842 r1845 into r1846;\n    sub.w r1844 r1146 into r1847;\n    ternary r1846 r1847 r1844 into r1848;\n    add r1841 1125899906842624u128 into r1849;\n    ternary r1846 r1849 r1841 into r1850;\n    gte r1848 170141183460469231731687303715884105728u128 into r1851;\n    add.w r1848 r1848 into r1852;\n    add r1852 1u128 into r1853;\n    gte r1853 r1146 into r1854;\n    or r1851 r1854 into r1855;\n    sub.w r1853 r1146 into r1856;\n    ternary r1855 r1856 r1853 into r1857;\n    add r1850 562949953421312u128 into r1858;\n    ternary r1855 r1858 r1850 into r1859;\n    gte r1857 170141183460469231731687303715884105728u128 into r1860;\n    add.w r1857 r1857 into r1861;\n    add r1861 1u128 into r1862;\n    gte r1862 r1146 into r1863;\n    or r1860 r1863 into r1864;\n    sub.w r1862 r1146 into r1865;\n    ternary r1864 r1865 r1862 into r1866;\n    add r1859 281474976710656u128 into r1867;\n    ternary r1864 r1867 r1859 into r1868;\n    gte r1866 170141183460469231731687303715884105728u128 into r1869;\n    add.w r1866 r1866 into r1870;\n    add r1870 1u128 into r1871;\n    gte r1871 r1146 into r1872;\n    or r1869 r1872 into r1873;\n    sub.w r1871 r1146 into r1874;\n    ternary r1873 r1874 r1871 into r1875;\n    add r1868 140737488355328u128 into r1876;\n    ternary r1873 r1876 r1868 into r1877;\n    gte r1875 170141183460469231731687303715884105728u128 into r1878;\n    add.w r1875 r1875 into r1879;\n    add r1879 1u128 into r1880;\n    gte r1880 r1146 into r1881;\n    or r1878 r1881 into r1882;\n    sub.w r1880 r1146 into r1883;\n    ternary r1882 r1883 r1880 into r1884;\n    add r1877 70368744177664u128 into r1885;\n    ternary r1882 r1885 r1877 into r1886;\n    gte r1884 170141183460469231731687303715884105728u128 into r1887;\n    add.w r1884 r1884 into r1888;\n    add r1888 1u128 into r1889;\n    gte r1889 r1146 into r1890;\n    or r1887 r1890 into r1891;\n    sub.w r1889 r1146 into r1892;\n    ternary r1891 r1892 r1889 into r1893;\n    add r1886 35184372088832u128 into r1894;\n    ternary r1891 r1894 r1886 into r1895;\n    gte r1893 170141183460469231731687303715884105728u128 into r1896;\n    add.w r1893 r1893 into r1897;\n    add r1897 1u128 into r1898;\n    gte r1898 r1146 into r1899;\n    or r1896 r1899 into r1900;\n    sub.w r1898 r1146 into r1901;\n    ternary r1900 r1901 r1898 into r1902;\n    add r1895 17592186044416u128 into r1903;\n    ternary r1900 r1903 r1895 into r1904;\n    gte r1902 170141183460469231731687303715884105728u128 into r1905;\n    add.w r1902 r1902 into r1906;\n    add r1906 1u128 into r1907;\n    gte r1907 r1146 into r1908;\n    or r1905 r1908 into r1909;\n    sub.w r1907 r1146 into r1910;\n    ternary r1909 r1910 r1907 into r1911;\n    add r1904 8796093022208u128 into r1912;\n    ternary r1909 r1912 r1904 into r1913;\n    gte r1911 170141183460469231731687303715884105728u128 into r1914;\n    add.w r1911 r1911 into r1915;\n    add r1915 1u128 into r1916;\n    gte r1916 r1146 into r1917;\n    or r1914 r1917 into r1918;\n    sub.w r1916 r1146 into r1919;\n    ternary r1918 r1919 r1916 into r1920;\n    add r1913 4398046511104u128 into r1921;\n    ternary r1918 r1921 r1913 into r1922;\n    gte r1920 170141183460469231731687303715884105728u128 into r1923;\n    add.w r1920 r1920 into r1924;\n    add r1924 1u128 into r1925;\n    gte r1925 r1146 into r1926;\n    or r1923 r1926 into r1927;\n    sub.w r1925 r1146 into r1928;\n    ternary r1927 r1928 r1925 into r1929;\n    add r1922 2199023255552u128 into r1930;\n    ternary r1927 r1930 r1922 into r1931;\n    gte r1929 170141183460469231731687303715884105728u128 into r1932;\n    add.w r1929 r1929 into r1933;\n    add r1933 1u128 into r1934;\n    gte r1934 r1146 into r1935;\n    or r1932 r1935 into r1936;\n    sub.w r1934 r1146 into r1937;\n    ternary r1936 r1937 r1934 into r1938;\n    add r1931 1099511627776u128 into r1939;\n    ternary r1936 r1939 r1931 into r1940;\n    gte r1938 170141183460469231731687303715884105728u128 into r1941;\n    add.w r1938 r1938 into r1942;\n    add r1942 1u128 into r1943;\n    gte r1943 r1146 into r1944;\n    or r1941 r1944 into r1945;\n    sub.w r1943 r1146 into r1946;\n    ternary r1945 r1946 r1943 into r1947;\n    add r1940 549755813888u128 into r1948;\n    ternary r1945 r1948 r1940 into r1949;\n    gte r1947 170141183460469231731687303715884105728u128 into r1950;\n    add.w r1947 r1947 into r1951;\n    add r1951 1u128 into r1952;\n    gte r1952 r1146 into r1953;\n    or r1950 r1953 into r1954;\n    sub.w r1952 r1146 into r1955;\n    ternary r1954 r1955 r1952 into r1956;\n    add r1949 274877906944u128 into r1957;\n    ternary r1954 r1957 r1949 into r1958;\n    gte r1956 170141183460469231731687303715884105728u128 into r1959;\n    add.w r1956 r1956 into r1960;\n    add r1960 1u128 into r1961;\n    gte r1961 r1146 into r1962;\n    or r1959 r1962 into r1963;\n    sub.w r1961 r1146 into r1964;\n    ternary r1963 r1964 r1961 into r1965;\n    add r1958 137438953472u128 into r1966;\n    ternary r1963 r1966 r1958 into r1967;\n    gte r1965 170141183460469231731687303715884105728u128 into r1968;\n    add.w r1965 r1965 into r1969;\n    add r1969 1u128 into r1970;\n    gte r1970 r1146 into r1971;\n    or r1968 r1971 into r1972;\n    sub.w r1970 r1146 into r1973;\n    ternary r1972 r1973 r1970 into r1974;\n    add r1967 68719476736u128 into r1975;\n    ternary r1972 r1975 r1967 into r1976;\n    gte r1974 170141183460469231731687303715884105728u128 into r1977;\n    add.w r1974 r1974 into r1978;\n    add r1978 1u128 into r1979;\n    gte r1979 r1146 into r1980;\n    or r1977 r1980 into r1981;\n    sub.w r1979 r1146 into r1982;\n    ternary r1981 r1982 r1979 into r1983;\n    add r1976 34359738368u128 into r1984;\n    ternary r1981 r1984 r1976 into r1985;\n    gte r1983 170141183460469231731687303715884105728u128 into r1986;\n    add.w r1983 r1983 into r1987;\n    add r1987 1u128 into r1988;\n    gte r1988 r1146 into r1989;\n    or r1986 r1989 into r1990;\n    sub.w r1988 r1146 into r1991;\n    ternary r1990 r1991 r1988 into r1992;\n    add r1985 17179869184u128 into r1993;\n    ternary r1990 r1993 r1985 into r1994;\n    gte r1992 170141183460469231731687303715884105728u128 into r1995;\n    add.w r1992 r1992 into r1996;\n    add r1996 1u128 into r1997;\n    gte r1997 r1146 into r1998;\n    or r1995 r1998 into r1999;\n    sub.w r1997 r1146 into r2000;\n    ternary r1999 r2000 r1997 into r2001;\n    add r1994 8589934592u128 into r2002;\n    ternary r1999 r2002 r1994 into r2003;\n    gte r2001 170141183460469231731687303715884105728u128 into r2004;\n    add.w r2001 r2001 into r2005;\n    add r2005 1u128 into r2006;\n    gte r2006 r1146 into r2007;\n    or r2004 r2007 into r2008;\n    sub.w r2006 r1146 into r2009;\n    ternary r2008 r2009 r2006 into r2010;\n    add r2003 4294967296u128 into r2011;\n    ternary r2008 r2011 r2003 into r2012;\n    gte r2010 170141183460469231731687303715884105728u128 into r2013;\n    add.w r2010 r2010 into r2014;\n    add r2014 1u128 into r2015;\n    gte r2015 r1146 into r2016;\n    or r2013 r2016 into r2017;\n    sub.w r2015 r1146 into r2018;\n    ternary r2017 r2018 r2015 into r2019;\n    add r2012 2147483648u128 into r2020;\n    ternary r2017 r2020 r2012 into r2021;\n    gte r2019 170141183460469231731687303715884105728u128 into r2022;\n    add.w r2019 r2019 into r2023;\n    add r2023 1u128 into r2024;\n    gte r2024 r1146 into r2025;\n    or r2022 r2025 into r2026;\n    sub.w r2024 r1146 into r2027;\n    ternary r2026 r2027 r2024 into r2028;\n    add r2021 1073741824u128 into r2029;\n    ternary r2026 r2029 r2021 into r2030;\n    gte r2028 170141183460469231731687303715884105728u128 into r2031;\n    add.w r2028 r2028 into r2032;\n    add r2032 1u128 into r2033;\n    gte r2033 r1146 into r2034;\n    or r2031 r2034 into r2035;\n    sub.w r2033 r1146 into r2036;\n    ternary r2035 r2036 r2033 into r2037;\n    add r2030 536870912u128 into r2038;\n    ternary r2035 r2038 r2030 into r2039;\n    gte r2037 170141183460469231731687303715884105728u128 into r2040;\n    add.w r2037 r2037 into r2041;\n    add r2041 1u128 into r2042;\n    gte r2042 r1146 into r2043;\n    or r2040 r2043 into r2044;\n    sub.w r2042 r1146 into r2045;\n    ternary r2044 r2045 r2042 into r2046;\n    add r2039 268435456u128 into r2047;\n    ternary r2044 r2047 r2039 into r2048;\n    gte r2046 170141183460469231731687303715884105728u128 into r2049;\n    add.w r2046 r2046 into r2050;\n    add r2050 1u128 into r2051;\n    gte r2051 r1146 into r2052;\n    or r2049 r2052 into r2053;\n    sub.w r2051 r1146 into r2054;\n    ternary r2053 r2054 r2051 into r2055;\n    add r2048 134217728u128 into r2056;\n    ternary r2053 r2056 r2048 into r2057;\n    gte r2055 170141183460469231731687303715884105728u128 into r2058;\n    add.w r2055 r2055 into r2059;\n    add r2059 1u128 into r2060;\n    gte r2060 r1146 into r2061;\n    or r2058 r2061 into r2062;\n    sub.w r2060 r1146 into r2063;\n    ternary r2062 r2063 r2060 into r2064;\n    add r2057 67108864u128 into r2065;\n    ternary r2062 r2065 r2057 into r2066;\n    gte r2064 170141183460469231731687303715884105728u128 into r2067;\n    add.w r2064 r2064 into r2068;\n    add r2068 1u128 into r2069;\n    gte r2069 r1146 into r2070;\n    or r2067 r2070 into r2071;\n    sub.w r2069 r1146 into r2072;\n    ternary r2071 r2072 r2069 into r2073;\n    add r2066 33554432u128 into r2074;\n    ternary r2071 r2074 r2066 into r2075;\n    gte r2073 170141183460469231731687303715884105728u128 into r2076;\n    add.w r2073 r2073 into r2077;\n    add r2077 1u128 into r2078;\n    gte r2078 r1146 into r2079;\n    or r2076 r2079 into r2080;\n    sub.w r2078 r1146 into r2081;\n    ternary r2080 r2081 r2078 into r2082;\n    add r2075 16777216u128 into r2083;\n    ternary r2080 r2083 r2075 into r2084;\n    gte r2082 170141183460469231731687303715884105728u128 into r2085;\n    add.w r2082 r2082 into r2086;\n    add r2086 1u128 into r2087;\n    gte r2087 r1146 into r2088;\n    or r2085 r2088 into r2089;\n    sub.w r2087 r1146 into r2090;\n    ternary r2089 r2090 r2087 into r2091;\n    add r2084 8388608u128 into r2092;\n    ternary r2089 r2092 r2084 into r2093;\n    gte r2091 170141183460469231731687303715884105728u128 into r2094;\n    add.w r2091 r2091 into r2095;\n    add r2095 1u128 into r2096;\n    gte r2096 r1146 into r2097;\n    or r2094 r2097 into r2098;\n    sub.w r2096 r1146 into r2099;\n    ternary r2098 r2099 r2096 into r2100;\n    add r2093 4194304u128 into r2101;\n    ternary r2098 r2101 r2093 into r2102;\n    gte r2100 170141183460469231731687303715884105728u128 into r2103;\n    add.w r2100 r2100 into r2104;\n    add r2104 1u128 into r2105;\n    gte r2105 r1146 into r2106;\n    or r2103 r2106 into r2107;\n    sub.w r2105 r1146 into r2108;\n    ternary r2107 r2108 r2105 into r2109;\n    add r2102 2097152u128 into r2110;\n    ternary r2107 r2110 r2102 into r2111;\n    gte r2109 170141183460469231731687303715884105728u128 into r2112;\n    add.w r2109 r2109 into r2113;\n    add r2113 1u128 into r2114;\n    gte r2114 r1146 into r2115;\n    or r2112 r2115 into r2116;\n    sub.w r2114 r1146 into r2117;\n    ternary r2116 r2117 r2114 into r2118;\n    add r2111 1048576u128 into r2119;\n    ternary r2116 r2119 r2111 into r2120;\n    gte r2118 170141183460469231731687303715884105728u128 into r2121;\n    add.w r2118 r2118 into r2122;\n    add r2122 1u128 into r2123;\n    gte r2123 r1146 into r2124;\n    or r2121 r2124 into r2125;\n    sub.w r2123 r1146 into r2126;\n    ternary r2125 r2126 r2123 into r2127;\n    add r2120 524288u128 into r2128;\n    ternary r2125 r2128 r2120 into r2129;\n    gte r2127 170141183460469231731687303715884105728u128 into r2130;\n    add.w r2127 r2127 into r2131;\n    add r2131 1u128 into r2132;\n    gte r2132 r1146 into r2133;\n    or r2130 r2133 into r2134;\n    sub.w r2132 r1146 into r2135;\n    ternary r2134 r2135 r2132 into r2136;\n    add r2129 262144u128 into r2137;\n    ternary r2134 r2137 r2129 into r2138;\n    gte r2136 170141183460469231731687303715884105728u128 into r2139;\n    add.w r2136 r2136 into r2140;\n    add r2140 1u128 into r2141;\n    gte r2141 r1146 into r2142;\n    or r2139 r2142 into r2143;\n    sub.w r2141 r1146 into r2144;\n    ternary r2143 r2144 r2141 into r2145;\n    add r2138 131072u128 into r2146;\n    ternary r2143 r2146 r2138 into r2147;\n    gte r2145 170141183460469231731687303715884105728u128 into r2148;\n    add.w r2145 r2145 into r2149;\n    add r2149 1u128 into r2150;\n    gte r2150 r1146 into r2151;\n    or r2148 r2151 into r2152;\n    sub.w r2150 r1146 into r2153;\n    ternary r2152 r2153 r2150 into r2154;\n    add r2147 65536u128 into r2155;\n    ternary r2152 r2155 r2147 into r2156;\n    gte r2154 170141183460469231731687303715884105728u128 into r2157;\n    add.w r2154 r2154 into r2158;\n    add r2158 1u128 into r2159;\n    gte r2159 r1146 into r2160;\n    or r2157 r2160 into r2161;\n    sub.w r2159 r1146 into r2162;\n    ternary r2161 r2162 r2159 into r2163;\n    add r2156 32768u128 into r2164;\n    ternary r2161 r2164 r2156 into r2165;\n    gte r2163 170141183460469231731687303715884105728u128 into r2166;\n    add.w r2163 r2163 into r2167;\n    add r2167 1u128 into r2168;\n    gte r2168 r1146 into r2169;\n    or r2166 r2169 into r2170;\n    sub.w r2168 r1146 into r2171;\n    ternary r2170 r2171 r2168 into r2172;\n    add r2165 16384u128 into r2173;\n    ternary r2170 r2173 r2165 into r2174;\n    gte r2172 170141183460469231731687303715884105728u128 into r2175;\n    add.w r2172 r2172 into r2176;\n    add r2176 1u128 into r2177;\n    gte r2177 r1146 into r2178;\n    or r2175 r2178 into r2179;\n    sub.w r2177 r1146 into r2180;\n    ternary r2179 r2180 r2177 into r2181;\n    add r2174 8192u128 into r2182;\n    ternary r2179 r2182 r2174 into r2183;\n    gte r2181 170141183460469231731687303715884105728u128 into r2184;\n    add.w r2181 r2181 into r2185;\n    add r2185 1u128 into r2186;\n    gte r2186 r1146 into r2187;\n    or r2184 r2187 into r2188;\n    sub.w r2186 r1146 into r2189;\n    ternary r2188 r2189 r2186 into r2190;\n    add r2183 4096u128 into r2191;\n    ternary r2188 r2191 r2183 into r2192;\n    gte r2190 170141183460469231731687303715884105728u128 into r2193;\n    add.w r2190 r2190 into r2194;\n    add r2194 1u128 into r2195;\n    gte r2195 r1146 into r2196;\n    or r2193 r2196 into r2197;\n    sub.w r2195 r1146 into r2198;\n    ternary r2197 r2198 r2195 into r2199;\n    add r2192 2048u128 into r2200;\n    ternary r2197 r2200 r2192 into r2201;\n    gte r2199 170141183460469231731687303715884105728u128 into r2202;\n    add.w r2199 r2199 into r2203;\n    add r2203 1u128 into r2204;\n    gte r2204 r1146 into r2205;\n    or r2202 r2205 into r2206;\n    sub.w r2204 r1146 into r2207;\n    ternary r2206 r2207 r2204 into r2208;\n    add r2201 1024u128 into r2209;\n    ternary r2206 r2209 r2201 into r2210;\n    gte r2208 170141183460469231731687303715884105728u128 into r2211;\n    add.w r2208 r2208 into r2212;\n    add r2212 1u128 into r2213;\n    gte r2213 r1146 into r2214;\n    or r2211 r2214 into r2215;\n    sub.w r2213 r1146 into r2216;\n    ternary r2215 r2216 r2213 into r2217;\n    add r2210 512u128 into r2218;\n    ternary r2215 r2218 r2210 into r2219;\n    gte r2217 170141183460469231731687303715884105728u128 into r2220;\n    add.w r2217 r2217 into r2221;\n    add r2221 1u128 into r2222;\n    gte r2222 r1146 into r2223;\n    or r2220 r2223 into r2224;\n    sub.w r2222 r1146 into r2225;\n    ternary r2224 r2225 r2222 into r2226;\n    add r2219 256u128 into r2227;\n    ternary r2224 r2227 r2219 into r2228;\n    gte r2226 170141183460469231731687303715884105728u128 into r2229;\n    add.w r2226 r2226 into r2230;\n    add r2230 1u128 into r2231;\n    gte r2231 r1146 into r2232;\n    or r2229 r2232 into r2233;\n    sub.w r2231 r1146 into r2234;\n    ternary r2233 r2234 r2231 into r2235;\n    add r2228 128u128 into r2236;\n    ternary r2233 r2236 r2228 into r2237;\n    gte r2235 170141183460469231731687303715884105728u128 into r2238;\n    add.w r2235 r2235 into r2239;\n    add r2239 1u128 into r2240;\n    gte r2240 r1146 into r2241;\n    or r2238 r2241 into r2242;\n    sub.w r2240 r1146 into r2243;\n    ternary r2242 r2243 r2240 into r2244;\n    add r2237 64u128 into r2245;\n    ternary r2242 r2245 r2237 into r2246;\n    gte r2244 170141183460469231731687303715884105728u128 into r2247;\n    add.w r2244 r2244 into r2248;\n    add r2248 1u128 into r2249;\n    gte r2249 r1146 into r2250;\n    or r2247 r2250 into r2251;\n    sub.w r2249 r1146 into r2252;\n    ternary r2251 r2252 r2249 into r2253;\n    add r2246 32u128 into r2254;\n    ternary r2251 r2254 r2246 into r2255;\n    gte r2253 170141183460469231731687303715884105728u128 into r2256;\n    add.w r2253 r2253 into r2257;\n    add r2257 1u128 into r2258;\n    gte r2258 r1146 into r2259;\n    or r2256 r2259 into r2260;\n    sub.w r2258 r1146 into r2261;\n    ternary r2260 r2261 r2258 into r2262;\n    add r2255 16u128 into r2263;\n    ternary r2260 r2263 r2255 into r2264;\n    gte r2262 170141183460469231731687303715884105728u128 into r2265;\n    add.w r2262 r2262 into r2266;\n    add r2266 1u128 into r2267;\n    gte r2267 r1146 into r2268;\n    or r2265 r2268 into r2269;\n    sub.w r2267 r1146 into r2270;\n    ternary r2269 r2270 r2267 into r2271;\n    add r2264 8u128 into r2272;\n    ternary r2269 r2272 r2264 into r2273;\n    gte r2271 170141183460469231731687303715884105728u128 into r2274;\n    add.w r2271 r2271 into r2275;\n    add r2275 1u128 into r2276;\n    gte r2276 r1146 into r2277;\n    or r2274 r2277 into r2278;\n    sub.w r2276 r1146 into r2279;\n    ternary r2278 r2279 r2276 into r2280;\n    add r2273 4u128 into r2281;\n    ternary r2278 r2281 r2273 into r2282;\n    gte r2280 170141183460469231731687303715884105728u128 into r2283;\n    add.w r2280 r2280 into r2284;\n    add r2284 1u128 into r2285;\n    gte r2285 r1146 into r2286;\n    or r2283 r2286 into r2287;\n    sub.w r2285 r1146 into r2288;\n    ternary r2287 r2288 r2285 into r2289;\n    add r2282 2u128 into r2290;\n    ternary r2287 r2290 r2282 into r2291;\n    gte r2289 170141183460469231731687303715884105728u128 into r2292;\n    add.w r2289 r2289 into r2293;\n    add r2293 1u128 into r2294;\n    gte r2294 r1146 into r2295;\n    or r2292 r2295 into r2296;\n    add r2291 1u128 into r2297;\n    ternary r2296 r2297 r2291 into r2298;\n    cast r1147 r2298 into r2299 as U256__8JquwLopp8;\n    ternary r1144 r2299.hi r1143.hi into r2300;\n    ternary r1144 r2299.lo r1143.lo into r2301;\n    cast r2300 r2301 into r2302 as U256__8JquwLopp8;\n    output r2302 as U256__8JquwLopp8.public;\n\nview view_mul_div:\n    input r0 as U256__8JquwLopp8.public;\n    input r1 as U256__8JquwLopp8.public;\n    input r2 as U256__8JquwLopp8.public;\n    input r3 as boolean.public;\n    and r0.lo 18446744073709551615u128 into r4;\n    shr r0.lo 64u8 into r5;\n    and r1.lo 18446744073709551615u128 into r6;\n    shr r1.lo 64u8 into r7;\n    mul r4 r6 into r8;\n    mul r4 r7 into r9;\n    mul r5 r6 into r10;\n    mul r5 r7 into r11;\n    and r8 18446744073709551615u128 into r12;\n    shr r8 64u8 into r13;\n    and r9 18446744073709551615u128 into r14;\n    add r13 r14 into r15;\n    and r10 18446744073709551615u128 into r16;\n    add r15 r16 into r17;\n    and r17 18446744073709551615u128 into r18;\n    shr r17 64u8 into r19;\n    shr r9 64u8 into r20;\n    shr r10 64u8 into r21;\n    add r20 r21 into r22;\n    and r11 18446744073709551615u128 into r23;\n    add r22 r23 into r24;\n    add r24 r19 into r25;\n    and r25 18446744073709551615u128 into r26;\n    shr r25 64u8 into r27;\n    shr r11 64u8 into r28;\n    add r28 r27 into r29;\n    shl r29 64u8 into r30;\n    add r30 r26 into r31;\n    shl r18 64u8 into r32;\n    add r32 r12 into r33;\n    and r0.lo 18446744073709551615u128 into r34;\n    shr r0.lo 64u8 into r35;\n    and r1.hi 18446744073709551615u128 into r36;\n    shr r1.hi 64u8 into r37;\n    mul r34 r36 into r38;\n    mul r34 r37 into r39;\n    mul r35 r36 into r40;\n    mul r35 r37 into r41;\n    and r38 18446744073709551615u128 into r42;\n    shr r38 64u8 into r43;\n    and r39 18446744073709551615u128 into r44;\n    add r43 r44 into r45;\n    and r40 18446744073709551615u128 into r46;\n    add r45 r46 into r47;\n    and r47 18446744073709551615u128 into r48;\n    shr r47 64u8 into r49;\n    shr r39 64u8 into r50;\n    shr r40 64u8 into r51;\n    add r50 r51 into r52;\n    and r41 18446744073709551615u128 into r53;\n    add r52 r53 into r54;\n    add r54 r49 into r55;\n    and r55 18446744073709551615u128 into r56;\n    shr r55 64u8 into r57;\n    shr r41 64u8 into r58;\n    add r58 r57 into r59;\n    shl r59 64u8 into r60;\n    add r60 r56 into r61;\n    shl r48 64u8 into r62;\n    add r62 r42 into r63;\n    and r0.hi 18446744073709551615u128 into r64;\n    shr r0.hi 64u8 into r65;\n    and r1.lo 18446744073709551615u128 into r66;\n    shr r1.lo 64u8 into r67;\n    mul r64 r66 into r68;\n    mul r64 r67 into r69;\n    mul r65 r66 into r70;\n    mul r65 r67 into r71;\n    and r68 18446744073709551615u128 into r72;\n    shr r68 64u8 into r73;\n    and r69 18446744073709551615u128 into r74;\n    add r73 r74 into r75;\n    and r70 18446744073709551615u128 into r76;\n    add r75 r76 into r77;\n    and r77 18446744073709551615u128 into r78;\n    shr r77 64u8 into r79;\n    shr r69 64u8 into r80;\n    shr r70 64u8 into r81;\n    add r80 r81 into r82;\n    and r71 18446744073709551615u128 into r83;\n    add r82 r83 into r84;\n    add r84 r79 into r85;\n    and r85 18446744073709551615u128 into r86;\n    shr r85 64u8 into r87;\n    shr r71 64u8 into r88;\n    add r88 r87 into r89;\n    shl r89 64u8 into r90;\n    add r90 r86 into r91;\n    shl r78 64u8 into r92;\n    add r92 r72 into r93;\n    and r0.hi 18446744073709551615u128 into r94;\n    shr r0.hi 64u8 into r95;\n    and r1.hi 18446744073709551615u128 into r96;\n    shr r1.hi 64u8 into r97;\n    mul r94 r96 into r98;\n    mul r94 r97 into r99;\n    mul r95 r96 into r100;\n    mul r95 r97 into r101;\n    and r98 18446744073709551615u128 into r102;\n    shr r98 64u8 into r103;\n    and r99 18446744073709551615u128 into r104;\n    add r103 r104 into r105;\n    and r100 18446744073709551615u128 into r106;\n    add r105 r106 into r107;\n    and r107 18446744073709551615u128 into r108;\n    shr r107 64u8 into r109;\n    shr r99 64u8 into r110;\n    shr r100 64u8 into r111;\n    add r110 r111 into r112;\n    and r101 18446744073709551615u128 into r113;\n    add r112 r113 into r114;\n    add r114 r109 into r115;\n    and r115 18446744073709551615u128 into r116;\n    shr r115 64u8 into r117;\n    shr r101 64u8 into r118;\n    add r118 r117 into r119;\n    shl r119 64u8 into r120;\n    add r120 r116 into r121;\n    shl r108 64u8 into r122;\n    add r122 r102 into r123;\n    add.w r31 r63 into r124;\n    lt r124 r31 into r125;\n    ternary r125 1u128 0u128 into r126;\n    add.w r124 r93 into r127;\n    lt r127 r124 into r128;\n    ternary r128 1u128 0u128 into r129;\n    add r126 r129 into r130;\n    add.w r61 r91 into r131;\n    lt r131 r61 into r132;\n    ternary r132 1u128 0u128 into r133;\n    add.w r131 r123 into r134;\n    lt r134 r131 into r135;\n    ternary r135 1u128 0u128 into r136;\n    add.w r134 r130 into r137;\n    lt r137 r134 into r138;\n    ternary r138 1u128 0u128 into r139;\n    add r133 r136 into r140;\n    add r140 r139 into r141;\n    add.w r121 r141 into r142;\n    cast r142 r137 into r143 as U256__8JquwLopp8;\n    cast r127 r33 into r144 as U256__8JquwLopp8;\n    lt r143.hi r2.hi into r145;\n    gt r143.hi r2.hi into r146;\n    lt r143.lo r2.lo into r147;\n    ternary r146 false r147 into r148;\n    ternary r145 true r148 into r149;\n    assert.eq r149 true;\n    gt r2.hi 0u128 into r150;\n    ternary r150 r2.hi r2.lo into r151;\n    ternary r150 128u32 0u32 into r152;\n    gte r151 18446744073709551616u128 into r153;\n    shr r151 64u8 into r154;\n    ternary r153 r154 r151 into r155;\n    ternary r153 64u32 0u32 into r156;\n    gte r155 4294967296u128 into r157;\n    shr r155 32u8 into r158;\n    add r156 32u32 into r159;\n    ternary r157 r158 r155 into r160;\n    ternary r157 r159 r156 into r161;\n    gte r160 65536u128 into r162;\n    shr r160 16u8 into r163;\n    add r161 16u32 into r164;\n    ternary r162 r163 r160 into r165;\n    ternary r162 r164 r161 into r166;\n    gte r165 256u128 into r167;\n    shr r165 8u8 into r168;\n    add r166 8u32 into r169;\n    ternary r167 r168 r165 into r170;\n    ternary r167 r169 r166 into r171;\n    gte r170 16u128 into r172;\n    shr r170 4u8 into r173;\n    add r171 4u32 into r174;\n    ternary r172 r173 r170 into r175;\n    ternary r172 r174 r171 into r176;\n    gte r175 4u128 into r177;\n    shr r175 2u8 into r178;\n    add r176 2u32 into r179;\n    ternary r177 r178 r175 into r180;\n    ternary r177 r179 r176 into r181;\n    gte r180 2u128 into r182;\n    add r181 1u32 into r183;\n    ternary r182 r183 r181 into r184;\n    add r152 r184 into r185;\n    sub 255u32 r185 into r186;\n    cast r186 into r187 as u16;\n    and r187 127u16 into r188;\n    cast r188 into r189 as u8;\n    is.eq r189 0u8 into r190;\n    sub 128u8 r189 into r191;\n    shr.w r2.lo r191 into r192;\n    ternary r190 0u128 r192 into r193;\n    shl.w r2.hi r189 into r194;\n    or r194 r193 into r195;\n    shl.w r2.lo r189 into r196;\n    shl.w r2.lo r189 into r197;\n    gte r187 128u16 into r198;\n    ternary r198 r197 r195 into r199;\n    ternary r198 0u128 r196 into r200;\n    cast r199 r200 into r201 as U256__8JquwLopp8;\n    and r201.lo 18446744073709551615u128 into r202;\n    shr r201.lo 64u8 into r203;\n    and r201.hi 18446744073709551615u128 into r204;\n    shr r201.hi 64u8 into r205;\n    cast r188 into r206 as u8;\n    is.eq r206 0u8 into r207;\n    sub 128u8 r206 into r208;\n    shr.w r144.lo r208 into r209;\n    ternary r207 0u128 r209 into r210;\n    shl.w r144.hi r206 into r211;\n    or r211 r210 into r212;\n    shl.w r144.lo r206 into r213;\n    shl.w r144.lo r206 into r214;\n    ternary r198 r214 r212 into r215;\n    ternary r198 0u128 r213 into r216;\n    cast r215 r216 into r217 as U256__8JquwLopp8;\n    is.eq r187 0u16 into r218;\n    sub 256u16 r187 into r219;\n    and r219 127u16 into r220;\n    cast r220 into r221 as u8;\n    is.eq r221 0u8 into r222;\n    sub 128u8 r221 into r223;\n    shl.w r144.hi r223 into r224;\n    ternary r222 0u128 r224 into r225;\n    shr r144.lo r221 into r226;\n    or r226 r225 into r227;\n    shr r144.hi r221 into r228;\n    shr r144.hi r221 into r229;\n    gte r219 128u16 into r230;\n    ternary r230 0u128 r228 into r231;\n    ternary r230 r229 r227 into r232;\n    cast r231 r232 into r233 as U256__8JquwLopp8;\n    ternary r218 0u128 r233.hi into r234;\n    ternary r218 0u128 r233.lo into r235;\n    cast r234 r235 into r236 as U256__8JquwLopp8;\n    cast r188 into r237 as u8;\n    is.eq r237 0u8 into r238;\n    sub 128u8 r237 into r239;\n    shr.w r143.lo r239 into r240;\n    ternary r238 0u128 r240 into r241;\n    shl.w r143.hi r237 into r242;\n    or r242 r241 into r243;\n    shl.w r143.lo r237 into r244;\n    shl.w r143.lo r237 into r245;\n    ternary r198 r245 r243 into r246;\n    ternary r198 0u128 r244 into r247;\n    cast r246 r247 into r248 as U256__8JquwLopp8;\n    add.w r248.lo r236.lo into r249;\n    lt r249 r248.lo into r250;\n    ternary r250 1u128 0u128 into r251;\n    add.w r248.hi r236.hi into r252;\n    add.w r252 r251 into r253;\n    cast r253 r249 into r254 as U256__8JquwLopp8;\n    and r217.lo 18446744073709551615u128 into r255;\n    shr r217.lo 64u8 into r256;\n    and r217.hi 18446744073709551615u128 into r257;\n    shr r217.hi 64u8 into r258;\n    and r254.lo 18446744073709551615u128 into r259;\n    shr r254.lo 64u8 into r260;\n    and r254.hi 18446744073709551615u128 into r261;\n    shr r254.hi 64u8 into r262;\n    shl r262 64u8 into r263;\n    add r263 r261 into r264;\n    div r264 r205 into r265;\n    gt r265 18446744073709551615u128 into r266;\n    ternary r266 18446744073709551615u128 r265 into r267;\n    mul r267 r205 into r268;\n    sub r264 r268 into r269;\n    lte r269 18446744073709551615u128 into r270;\n    mul r267 r204 into r271;\n    and r269 18446744073709551615u128 into r272;\n    shl r272 64u8 into r273;\n    add r273 r260 into r274;\n    gt r271 r274 into r275;\n    and r270 r275 into r276;\n    sub.w r267 1u128 into r277;\n    ternary r276 r277 r267 into r278;\n    add r269 r205 into r279;\n    ternary r276 r279 r269 into r280;\n    lte r280 18446744073709551615u128 into r281;\n    and r276 r281 into r282;\n    mul r278 r204 into r283;\n    and r280 18446744073709551615u128 into r284;\n    shl r284 64u8 into r285;\n    add r285 r260 into r286;\n    gt r283 r286 into r287;\n    and r282 r287 into r288;\n    sub.w r278 1u128 into r289;\n    ternary r288 r289 r278 into r290;\n    mul r290 r202 into r291;\n    and r291 18446744073709551615u128 into r292;\n    lt r258 r292 into r293;\n    add r258 18446744073709551616u128 into r294;\n    sub r294 r292 into r295;\n    and r295 18446744073709551615u128 into r296;\n    shr r291 64u8 into r297;\n    ternary r293 1u128 0u128 into r298;\n    add r297 r298 into r299;\n    mul r290 r203 into r300;\n    add r300 r299 into r301;\n    and r301 18446744073709551615u128 into r302;\n    lt r259 r302 into r303;\n    add r259 18446744073709551616u128 into r304;\n    sub r304 r302 into r305;\n    and r305 18446744073709551615u128 into r306;\n    shr r301 64u8 into r307;\n    ternary r303 1u128 0u128 into r308;\n    add r307 r308 into r309;\n    mul r290 r204 into r310;\n    add r310 r309 into r311;\n    and r311 18446744073709551615u128 into r312;\n    lt r260 r312 into r313;\n    add r260 18446744073709551616u128 into r314;\n    sub r314 r312 into r315;\n    and r315 18446744073709551615u128 into r316;\n    shr r311 64u8 into r317;\n    ternary r313 1u128 0u128 into r318;\n    add r317 r318 into r319;\n    mul r290 r205 into r320;\n    add r320 r319 into r321;\n    and r321 18446744073709551615u128 into r322;\n    lt r261 r322 into r323;\n    add r261 18446744073709551616u128 into r324;\n    sub r324 r322 into r325;\n    and r325 18446744073709551615u128 into r326;\n    shr r321 64u8 into r327;\n    ternary r323 1u128 0u128 into r328;\n    add r327 r328 into r329;\n    lt r262 r329 into r330;\n    add r262 18446744073709551616u128 into r331;\n    sub r331 r329 into r332;\n    and r332 18446744073709551615u128 into r333;\n    sub.w r290 1u128 into r334;\n    ternary r330 r334 r290 into r335;\n    add r296 r202 into r336;\n    and r336 18446744073709551615u128 into r337;\n    ternary r330 r337 r296 into r338;\n    shr r336 64u8 into r339;\n    ternary r330 r339 0u128 into r340;\n    add r306 r203 into r341;\n    add r341 r340 into r342;\n    and r342 18446744073709551615u128 into r343;\n    ternary r330 r343 r306 into r344;\n    shr r342 64u8 into r345;\n    ternary r330 r345 0u128 into r346;\n    add r316 r204 into r347;\n    add r347 r346 into r348;\n    and r348 18446744073709551615u128 into r349;\n    ternary r330 r349 r316 into r350;\n    shr r348 64u8 into r351;\n    ternary r330 r351 0u128 into r352;\n    add r326 r205 into r353;\n    add r353 r352 into r354;\n    and r354 18446744073709551615u128 into r355;\n    ternary r330 r355 r326 into r356;\n    shr r354 64u8 into r357;\n    ternary r330 r357 0u128 into r358;\n    add r333 r358 into r359;\n    shl r356 64u8 into r360;\n    add r360 r350 into r361;\n    div r361 r205 into r362;\n    gt r362 18446744073709551615u128 into r363;\n    ternary r363 18446744073709551615u128 r362 into r364;\n    mul r364 r205 into r365;\n    sub r361 r365 into r366;\n    lte r366 18446744073709551615u128 into r367;\n    mul r364 r204 into r368;\n    and r366 18446744073709551615u128 into r369;\n    shl r369 64u8 into r370;\n    add r370 r344 into r371;\n    gt r368 r371 into r372;\n    and r367 r372 into r373;\n    sub.w r364 1u128 into r374;\n    ternary r373 r374 r364 into r375;\n    add r366 r205 into r376;\n    ternary r373 r376 r366 into r377;\n    lte r377 18446744073709551615u128 into r378;\n    and r373 r378 into r379;\n    mul r375 r204 into r380;\n    and r377 18446744073709551615u128 into r381;\n    shl r381 64u8 into r382;\n    add r382 r344 into r383;\n    gt r380 r383 into r384;\n    and r379 r384 into r385;\n    sub.w r375 1u128 into r386;\n    ternary r385 r386 r375 into r387;\n    mul r387 r202 into r388;\n    and r388 18446744073709551615u128 into r389;\n    lt r257 r389 into r390;\n    add r257 18446744073709551616u128 into r391;\n    sub r391 r389 into r392;\n    and r392 18446744073709551615u128 into r393;\n    shr r388 64u8 into r394;\n    ternary r390 1u128 0u128 into r395;\n    add r394 r395 into r396;\n    mul r387 r203 into r397;\n    add r397 r396 into r398;\n    and r398 18446744073709551615u128 into r399;\n    lt r338 r399 into r400;\n    add r338 18446744073709551616u128 into r401;\n    sub r401 r399 into r402;\n    and r402 18446744073709551615u128 into r403;\n    shr r398 64u8 into r404;\n    ternary r400 1u128 0u128 into r405;\n    add r404 r405 into r406;\n    mul r387 r204 into r407;\n    add r407 r406 into r408;\n    and r408 18446744073709551615u128 into r409;\n    lt r344 r409 into r410;\n    add r344 18446744073709551616u128 into r411;\n    sub r411 r409 into r412;\n    and r412 18446744073709551615u128 into r413;\n    shr r408 64u8 into r414;\n    ternary r410 1u128 0u128 into r415;\n    add r414 r415 into r416;\n    mul r387 r205 into r417;\n    add r417 r416 into r418;\n    and r418 18446744073709551615u128 into r419;\n    lt r350 r419 into r420;\n    add r350 18446744073709551616u128 into r421;\n    sub r421 r419 into r422;\n    and r422 18446744073709551615u128 into r423;\n    shr r418 64u8 into r424;\n    ternary r420 1u128 0u128 into r425;\n    add r424 r425 into r426;\n    lt r356 r426 into r427;\n    add r356 18446744073709551616u128 into r428;\n    sub r428 r426 into r429;\n    and r429 18446744073709551615u128 into r430;\n    sub.w r387 1u128 into r431;\n    ternary r427 r431 r387 into r432;\n    add r393 r202 into r433;\n    and r433 18446744073709551615u128 into r434;\n    ternary r427 r434 r393 into r435;\n    shr r433 64u8 into r436;\n    ternary r427 r436 0u128 into r437;\n    add r403 r203 into r438;\n    add r438 r437 into r439;\n    and r439 18446744073709551615u128 into r440;\n    ternary r427 r440 r403 into r441;\n    shr r439 64u8 into r442;\n    ternary r427 r442 0u128 into r443;\n    add r413 r204 into r444;\n    add r444 r443 into r445;\n    and r445 18446744073709551615u128 into r446;\n    ternary r427 r446 r413 into r447;\n    shr r445 64u8 into r448;\n    ternary r427 r448 0u128 into r449;\n    add r423 r205 into r450;\n    add r450 r449 into r451;\n    and r451 18446744073709551615u128 into r452;\n    ternary r427 r452 r423 into r453;\n    shr r451 64u8 into r454;\n    ternary r427 r454 0u128 into r455;\n    add r430 r455 into r456;\n    shl r453 64u8 into r457;\n    add r457 r447 into r458;\n    div r458 r205 into r459;\n    gt r459 18446744073709551615u128 into r460;\n    ternary r460 18446744073709551615u128 r459 into r461;\n    mul r461 r205 into r462;\n    sub r458 r462 into r463;\n    lte r463 18446744073709551615u128 into r464;\n    mul r461 r204 into r465;\n    and r463 18446744073709551615u128 into r466;\n    shl r466 64u8 into r467;\n    add r467 r441 into r468;\n    gt r465 r468 into r469;\n    and r464 r469 into r470;\n    sub.w r461 1u128 into r471;\n    ternary r470 r471 r461 into r472;\n    add r463 r205 into r473;\n    ternary r470 r473 r463 into r474;\n    lte r474 18446744073709551615u128 into r475;\n    and r470 r475 into r476;\n    mul r472 r204 into r477;\n    and r474 18446744073709551615u128 into r478;\n    shl r478 64u8 into r479;\n    add r479 r441 into r480;\n    gt r477 r480 into r481;\n    and r476 r481 into r482;\n    sub.w r472 1u128 into r483;\n    ternary r482 r483 r472 into r484;\n    mul r484 r202 into r485;\n    and r485 18446744073709551615u128 into r486;\n    lt r256 r486 into r487;\n    add r256 18446744073709551616u128 into r488;\n    sub r488 r486 into r489;\n    and r489 18446744073709551615u128 into r490;\n    shr r485 64u8 into r491;\n    ternary r487 1u128 0u128 into r492;\n    add r491 r492 into r493;\n    mul r484 r203 into r494;\n    add r494 r493 into r495;\n    and r495 18446744073709551615u128 into r496;\n    lt r435 r496 into r497;\n    add r435 18446744073709551616u128 into r498;\n    sub r498 r496 into r499;\n    and r499 18446744073709551615u128 into r500;\n    shr r495 64u8 into r501;\n    ternary r497 1u128 0u128 into r502;\n    add r501 r502 into r503;\n    mul r484 r204 into r504;\n    add r504 r503 into r505;\n    and r505 18446744073709551615u128 into r506;\n    lt r441 r506 into r507;\n    add r441 18446744073709551616u128 into r508;\n    sub r508 r506 into r509;\n    and r509 18446744073709551615u128 into r510;\n    shr r505 64u8 into r511;\n    ternary r507 1u128 0u128 into r512;\n    add r511 r512 into r513;\n    mul r484 r205 into r514;\n    add r514 r513 into r515;\n    and r515 18446744073709551615u128 into r516;\n    lt r447 r516 into r517;\n    add r447 18446744073709551616u128 into r518;\n    sub r518 r516 into r519;\n    and r519 18446744073709551615u128 into r520;\n    shr r515 64u8 into r521;\n    ternary r517 1u128 0u128 into r522;\n    add r521 r522 into r523;\n    lt r453 r523 into r524;\n    add r453 18446744073709551616u128 into r525;\n    sub r525 r523 into r526;\n    and r526 18446744073709551615u128 into r527;\n    sub.w r484 1u128 into r528;\n    ternary r524 r528 r484 into r529;\n    add r490 r202 into r530;\n    and r530 18446744073709551615u128 into r531;\n    ternary r524 r531 r490 into r532;\n    shr r530 64u8 into r533;\n    ternary r524 r533 0u128 into r534;\n    add r500 r203 into r535;\n    add r535 r534 into r536;\n    and r536 18446744073709551615u128 into r537;\n    ternary r524 r537 r500 into r538;\n    shr r536 64u8 into r539;\n    ternary r524 r539 0u128 into r540;\n    add r510 r204 into r541;\n    add r541 r540 into r542;\n    and r542 18446744073709551615u128 into r543;\n    ternary r524 r543 r510 into r544;\n    shr r542 64u8 into r545;\n    ternary r524 r545 0u128 into r546;\n    add r520 r205 into r547;\n    add r547 r546 into r548;\n    and r548 18446744073709551615u128 into r549;\n    ternary r524 r549 r520 into r550;\n    shr r548 64u8 into r551;\n    ternary r524 r551 0u128 into r552;\n    add r527 r552 into r553;\n    shl r550 64u8 into r554;\n    add r554 r544 into r555;\n    div r555 r205 into r556;\n    gt r556 18446744073709551615u128 into r557;\n    ternary r557 18446744073709551615u128 r556 into r558;\n    mul r558 r205 into r559;\n    sub r555 r559 into r560;\n    lte r560 18446744073709551615u128 into r561;\n    mul r558 r204 into r562;\n    and r560 18446744073709551615u128 into r563;\n    shl r563 64u8 into r564;\n    add r564 r538 into r565;\n    gt r562 r565 into r566;\n    and r561 r566 into r567;\n    sub.w r558 1u128 into r568;\n    ternary r567 r568 r558 into r569;\n    add r560 r205 into r570;\n    ternary r567 r570 r560 into r571;\n    lte r571 18446744073709551615u128 into r572;\n    and r567 r572 into r573;\n    mul r569 r204 into r574;\n    and r571 18446744073709551615u128 into r575;\n    shl r575 64u8 into r576;\n    add r576 r538 into r577;\n    gt r574 r577 into r578;\n    and r573 r578 into r579;\n    sub.w r569 1u128 into r580;\n    ternary r579 r580 r569 into r581;\n    mul r581 r202 into r582;\n    and r582 18446744073709551615u128 into r583;\n    lt r255 r583 into r584;\n    add r255 18446744073709551616u128 into r585;\n    sub r585 r583 into r586;\n    and r586 18446744073709551615u128 into r587;\n    shr r582 64u8 into r588;\n    ternary r584 1u128 0u128 into r589;\n    add r588 r589 into r590;\n    mul r581 r203 into r591;\n    add r591 r590 into r592;\n    and r592 18446744073709551615u128 into r593;\n    lt r532 r593 into r594;\n    add r532 18446744073709551616u128 into r595;\n    sub r595 r593 into r596;\n    and r596 18446744073709551615u128 into r597;\n    shr r592 64u8 into r598;\n    ternary r594 1u128 0u128 into r599;\n    add r598 r599 into r600;\n    mul r581 r204 into r601;\n    add r601 r600 into r602;\n    and r602 18446744073709551615u128 into r603;\n    lt r538 r603 into r604;\n    add r538 18446744073709551616u128 into r605;\n    sub r605 r603 into r606;\n    and r606 18446744073709551615u128 into r607;\n    shr r602 64u8 into r608;\n    ternary r604 1u128 0u128 into r609;\n    add r608 r609 into r610;\n    mul r581 r205 into r611;\n    add r611 r610 into r612;\n    and r612 18446744073709551615u128 into r613;\n    lt r544 r613 into r614;\n    add r544 18446744073709551616u128 into r615;\n    sub r615 r613 into r616;\n    and r616 18446744073709551615u128 into r617;\n    shr r612 64u8 into r618;\n    ternary r614 1u128 0u128 into r619;\n    add r618 r619 into r620;\n    lt r550 r620 into r621;\n    add r550 18446744073709551616u128 into r622;\n    sub r622 r620 into r623;\n    and r623 18446744073709551615u128 into r624;\n    sub.w r581 1u128 into r625;\n    ternary r621 r625 r581 into r626;\n    add r587 r202 into r627;\n    and r627 18446744073709551615u128 into r628;\n    ternary r621 r628 r587 into r629;\n    shr r627 64u8 into r630;\n    ternary r621 r630 0u128 into r631;\n    add r597 r203 into r632;\n    add r632 r631 into r633;\n    and r633 18446744073709551615u128 into r634;\n    ternary r621 r634 r597 into r635;\n    shr r633 64u8 into r636;\n    ternary r621 r636 0u128 into r637;\n    add r607 r204 into r638;\n    add r638 r637 into r639;\n    and r639 18446744073709551615u128 into r640;\n    ternary r621 r640 r607 into r641;\n    shr r639 64u8 into r642;\n    ternary r621 r642 0u128 into r643;\n    add r617 r205 into r644;\n    add r644 r643 into r645;\n    and r645 18446744073709551615u128 into r646;\n    ternary r621 r646 r617 into r647;\n    shr r645 64u8 into r648;\n    ternary r621 r648 0u128 into r649;\n    add r624 r649 into r650;\n    shl r335 64u8 into r651;\n    add r651 r432 into r652;\n    shl r529 64u8 into r653;\n    add r653 r626 into r654;\n    cast r652 r654 into r655 as U256__8JquwLopp8;\n    shl r647 64u8 into r656;\n    add r656 r641 into r657;\n    shl r635 64u8 into r658;\n    add r658 r629 into r659;\n    cast r188 into r660 as u8;\n    is.eq r660 0u8 into r661;\n    sub 128u8 r660 into r662;\n    shl.w r657 r662 into r663;\n    ternary r661 0u128 r663 into r664;\n    shr r659 r660 into r665;\n    or r665 r664 into r666;\n    shr r657 r660 into r667;\n    ternary r198 0u128 r667 into r668;\n    ternary r198 r667 r666 into r669;\n    cast r668 r669 into r670 as U256__8JquwLopp8;\n    is.eq r670.hi 0u128 into r671;\n    is.eq r670.lo 0u128 into r672;\n    and r671 r672 into r673;\n    not r673 into r674;\n    and r3 r674 into r675;\n    is.eq r655.hi 340282366920938463463374607431768211455u128 into r676;\n    is.eq r655.lo 340282366920938463463374607431768211455u128 into r677;\n    and r676 r677 into r678;\n    and r675 r678 into r679;\n    not r679 into r680;\n    assert.eq r680 true;\n    add.w r655.lo 1u128 into r681;\n    lt r681 r655.lo into r682;\n    ternary r682 1u128 0u128 into r683;\n    add.w r655.hi r683 into r684;\n    cast r684 r681 into r685 as U256__8JquwLopp8;\n    ternary r675 r685.hi r655.hi into r686;\n    ternary r675 r685.lo r655.lo into r687;\n    cast r686 r687 into r688 as U256__8JquwLopp8;\n    output r688 as U256__8JquwLopp8.public;\n\nfunction freeze_position:\n    input r0 as field.public;\n    async freeze_position self.caller r0 into r1;\n    output r1 as shield_swap.aleo/freeze_position.future;\n\nfinalize freeze_position:\n    input r0 as address.public;\n    input r1 as field.public;\n    get admin[true] into r2;\n    is.eq r0 r2 into r3;\n    assert.eq r3 true;\n    contains positions[r1] into r4;\n    assert.eq r4 true;\n    contains frozen_position[r1] into r5;\n    not r5 into r6;\n    assert.eq r6 true;\n    get positions[r1] into r7;\n    gt r7.liquidity 0u128 into r8;\n    branch.eq r8 false to end_then_0_0;\n    get positions[r1] into r9;\n    get slots[r9.pool] into r10;\n    call view_sqrt_price_at_tick_x128 r9.tick_lower into r11;\n    call view_sqrt_price_at_tick_x128 r9.tick_upper into r12;\n    lt r11.hi r12.hi into r13;\n    gt r11.hi r12.hi into r14;\n    lt r11.lo r12.lo into r15;\n    ternary r14 false r15 into r16;\n    ternary r13 true r16 into r17;\n    ternary r17 r11.hi r12.hi into r18;\n    ternary r17 r11.lo r12.lo into r19;\n    cast r18 r19 into r20 as U256__8JquwLopp8;\n    lt r11.hi r12.hi into r21;\n    gt r11.hi r12.hi into r22;\n    lt r11.lo r12.lo into r23;\n    ternary r22 false r23 into r24;\n    ternary r21 true r24 into r25;\n    ternary r25 r12.hi r11.hi into r26;\n    ternary r25 r12.lo r11.lo into r27;\n    cast r26 r27 into r28 as U256__8JquwLopp8;\n    lt r20.hi r10.sqrt_price.hi into r29;\n    gt r20.hi r10.sqrt_price.hi into r30;\n    lt r20.lo r10.sqrt_price.lo into r31;\n    ternary r30 false r31 into r32;\n    ternary r29 true r32 into r33;\n    not r33 into r34;\n    not r34 into r35;\n    lt r10.sqrt_price.hi r28.hi into r36;\n    gt r10.sqrt_price.hi r28.hi into r37;\n    lt r10.sqrt_price.lo r28.lo into r38;\n    ternary r37 false r38 into r39;\n    ternary r36 true r39 into r40;\n    and r35 r40 into r41;\n    lt r10.sqrt_price.hi r28.hi into r42;\n    gt r10.sqrt_price.hi r28.hi into r43;\n    lt r10.sqrt_price.lo r28.lo into r44;\n    ternary r43 false r44 into r45;\n    ternary r42 true r45 into r46;\n    not r46 into r47;\n    and r35 r47 into r48;\n    ternary r34 r7.liquidity 0u128 into r49;\n    lt r20.hi r28.hi into r50;\n    gt r20.hi r28.hi into r51;\n    lt r20.lo r28.lo into r52;\n    ternary r51 false r52 into r53;\n    ternary r50 true r53 into r54;\n    ternary r54 r20.hi r28.hi into r55;\n    ternary r54 r20.lo r28.lo into r56;\n    cast r55 r56 into r57 as U256__8JquwLopp8;\n    lt r20.hi r28.hi into r58;\n    gt r20.hi r28.hi into r59;\n    lt r20.lo r28.lo into r60;\n    ternary r59 false r60 into r61;\n    ternary r58 true r61 into r62;\n    ternary r62 r28.hi r20.hi into r63;\n    ternary r62 r28.lo r20.lo into r64;\n    cast r63 r64 into r65 as U256__8JquwLopp8;\n    lt r65.lo r57.lo into r66;\n    ternary r66 1u128 0u128 into r67;\n    sub.w r65.lo r57.lo into r68;\n    sub.w r65.hi r57.hi into r69;\n    sub.w r69 r67 into r70;\n    cast r70 r68 into r71 as U256__8JquwLopp8;\n    cast r49 0u128 into r72 as U256__8JquwLopp8;\n    call view_mul_div r72 r71 r65 false into r73;\n    cast 0u128 1u128 into r74 as U256__8JquwLopp8;\n    call view_mul_div r73 r74 r57 false into r75;\n    is.eq r75.hi 0u128 into r76;\n    assert.eq r76 true;\n    ternary r41 r7.liquidity 0u128 into r77;\n    lt r10.sqrt_price.hi r28.hi into r78;\n    gt r10.sqrt_price.hi r28.hi into r79;\n    lt r10.sqrt_price.lo r28.lo into r80;\n    ternary r79 false r80 into r81;\n    ternary r78 true r81 into r82;\n    ternary r82 r10.sqrt_price.hi r28.hi into r83;\n    ternary r82 r10.sqrt_price.lo r28.lo into r84;\n    cast r83 r84 into r85 as U256__8JquwLopp8;\n    lt r10.sqrt_price.hi r28.hi into r86;\n    gt r10.sqrt_price.hi r28.hi into r87;\n    lt r10.sqrt_price.lo r28.lo into r88;\n    ternary r87 false r88 into r89;\n    ternary r86 true r89 into r90;\n    ternary r90 r28.hi r10.sqrt_price.hi into r91;\n    ternary r90 r28.lo r10.sqrt_price.lo into r92;\n    cast r91 r92 into r93 as U256__8JquwLopp8;\n    lt r93.lo r85.lo into r94;\n    ternary r94 1u128 0u128 into r95;\n    sub.w r93.lo r85.lo into r96;\n    sub.w r93.hi r85.hi into r97;\n    sub.w r97 r95 into r98;\n    cast r98 r96 into r99 as U256__8JquwLopp8;\n    cast r77 0u128 into r100 as U256__8JquwLopp8;\n    call view_mul_div r100 r99 r93 false into r101;\n    cast 0u128 1u128 into r102 as U256__8JquwLopp8;\n    call view_mul_div r101 r102 r85 false into r103;\n    is.eq r103.hi 0u128 into r104;\n    assert.eq r104 true;\n    lt r20.hi r10.sqrt_price.hi into r105;\n    gt r20.hi r10.sqrt_price.hi into r106;\n    lt r20.lo r10.sqrt_price.lo into r107;\n    ternary r106 false r107 into r108;\n    ternary r105 true r108 into r109;\n    ternary r109 r20.hi r10.sqrt_price.hi into r110;\n    ternary r109 r20.lo r10.sqrt_price.lo into r111;\n    cast r110 r111 into r112 as U256__8JquwLopp8;\n    lt r20.hi r10.sqrt_price.hi into r113;\n    gt r20.hi r10.sqrt_price.hi into r114;\n    lt r20.lo r10.sqrt_price.lo into r115;\n    ternary r114 false r115 into r116;\n    ternary r113 true r116 into r117;\n    ternary r117 r10.sqrt_price.hi r20.hi into r118;\n    ternary r117 r10.sqrt_price.lo r20.lo into r119;\n    cast r118 r119 into r120 as U256__8JquwLopp8;\n    lt r120.lo r112.lo into r121;\n    ternary r121 1u128 0u128 into r122;\n    sub.w r120.lo r112.lo into r123;\n    sub.w r120.hi r112.hi into r124;\n    sub.w r124 r122 into r125;\n    cast r125 r123 into r126 as U256__8JquwLopp8;\n    cast 0u128 r77 into r127 as U256__8JquwLopp8;\n    and r127.lo 18446744073709551615u128 into r128;\n    shr r127.lo 64u8 into r129;\n    and r126.lo 18446744073709551615u128 into r130;\n    shr r126.lo 64u8 into r131;\n    mul r128 r130 into r132;\n    mul r128 r131 into r133;\n    mul r129 r130 into r134;\n    mul r129 r131 into r135;\n    and r132 18446744073709551615u128 into r136;\n    shr r132 64u8 into r137;\n    and r133 18446744073709551615u128 into r138;\n    add r137 r138 into r139;\n    and r134 18446744073709551615u128 into r140;\n    add r139 r140 into r141;\n    and r141 18446744073709551615u128 into r142;\n    shr r141 64u8 into r143;\n    shr r133 64u8 into r144;\n    shr r134 64u8 into r145;\n    add r144 r145 into r146;\n    and r135 18446744073709551615u128 into r147;\n    add r146 r147 into r148;\n    add r148 r143 into r149;\n    and r149 18446744073709551615u128 into r150;\n    shr r149 64u8 into r151;\n    shr r135 64u8 into r152;\n    add r152 r151 into r153;\n    shl r153 64u8 into r154;\n    add r154 r150 into r155;\n    shl r142 64u8 into r156;\n    add r156 r136 into r157;\n    and r127.lo 18446744073709551615u128 into r158;\n    shr r127.lo 64u8 into r159;\n    and r126.hi 18446744073709551615u128 into r160;\n    shr r126.hi 64u8 into r161;\n    mul r158 r160 into r162;\n    mul r158 r161 into r163;\n    mul r159 r160 into r164;\n    mul r159 r161 into r165;\n    and r162 18446744073709551615u128 into r166;\n    shr r162 64u8 into r167;\n    and r163 18446744073709551615u128 into r168;\n    add r167 r168 into r169;\n    and r164 18446744073709551615u128 into r170;\n    add r169 r170 into r171;\n    and r171 18446744073709551615u128 into r172;\n    shr r171 64u8 into r173;\n    shr r163 64u8 into r174;\n    shr r164 64u8 into r175;\n    add r174 r175 into r176;\n    and r165 18446744073709551615u128 into r177;\n    add r176 r177 into r178;\n    add r178 r173 into r179;\n    and r179 18446744073709551615u128 into r180;\n    shr r179 64u8 into r181;\n    shr r165 64u8 into r182;\n    add r182 r181 into r183;\n    shl r183 64u8 into r184;\n    add r184 r180 into r185;\n    shl r172 64u8 into r186;\n    add r186 r166 into r187;\n    and r127.hi 18446744073709551615u128 into r188;\n    shr r127.hi 64u8 into r189;\n    and r126.lo 18446744073709551615u128 into r190;\n    shr r126.lo 64u8 into r191;\n    mul r188 r190 into r192;\n    mul r188 r191 into r193;\n    mul r189 r190 into r194;\n    mul r189 r191 into r195;\n    and r192 18446744073709551615u128 into r196;\n    shr r192 64u8 into r197;\n    and r193 18446744073709551615u128 into r198;\n    add r197 r198 into r199;\n    and r194 18446744073709551615u128 into r200;\n    add r199 r200 into r201;\n    and r201 18446744073709551615u128 into r202;\n    shr r201 64u8 into r203;\n    shr r193 64u8 into r204;\n    shr r194 64u8 into r205;\n    add r204 r205 into r206;\n    and r195 18446744073709551615u128 into r207;\n    add r206 r207 into r208;\n    add r208 r203 into r209;\n    and r209 18446744073709551615u128 into r210;\n    shr r209 64u8 into r211;\n    shr r195 64u8 into r212;\n    add r212 r211 into r213;\n    shl r213 64u8 into r214;\n    add r214 r210 into r215;\n    shl r202 64u8 into r216;\n    add r216 r196 into r217;\n    and r127.hi 18446744073709551615u128 into r218;\n    shr r127.hi 64u8 into r219;\n    and r126.hi 18446744073709551615u128 into r220;\n    shr r126.hi 64u8 into r221;\n    mul r218 r220 into r222;\n    mul r218 r221 into r223;\n    mul r219 r220 into r224;\n    mul r219 r221 into r225;\n    and r222 18446744073709551615u128 into r226;\n    shr r222 64u8 into r227;\n    and r223 18446744073709551615u128 into r228;\n    add r227 r228 into r229;\n    and r224 18446744073709551615u128 into r230;\n    add r229 r230 into r231;\n    and r231 18446744073709551615u128 into r232;\n    shr r231 64u8 into r233;\n    shr r223 64u8 into r234;\n    shr r224 64u8 into r235;\n    add r234 r235 into r236;\n    and r225 18446744073709551615u128 into r237;\n    add r236 r237 into r238;\n    add r238 r233 into r239;\n    and r239 18446744073709551615u128 into r240;\n    shr r239 64u8 into r241;\n    shr r225 64u8 into r242;\n    add r242 r241 into r243;\n    shl r243 64u8 into r244;\n    add r244 r240 into r245;\n    shl r232 64u8 into r246;\n    add r246 r226 into r247;\n    add.w r155 r187 into r248;\n    lt r248 r155 into r249;\n    ternary r249 1u128 0u128 into r250;\n    add.w r248 r217 into r251;\n    lt r251 r248 into r252;\n    ternary r252 1u128 0u128 into r253;\n    add r250 r253 into r254;\n    add.w r185 r215 into r255;\n    lt r255 r185 into r256;\n    ternary r256 1u128 0u128 into r257;\n    add.w r255 r247 into r258;\n    lt r258 r255 into r259;\n    ternary r259 1u128 0u128 into r260;\n    add.w r258 r254 into r261;\n    lt r261 r258 into r262;\n    ternary r262 1u128 0u128 into r263;\n    add r257 r260 into r264;\n    add r264 r263 into r265;\n    add.w r245 r265 into r266;\n    cast r266 r261 into r267 as U256__8JquwLopp8;\n    cast r251 r157 into r268 as U256__8JquwLopp8;\n    is.eq r267.hi 0u128 into r269;\n    is.eq r267.lo 0u128 into r270;\n    and r269 r270 into r271;\n    assert.eq r271 true;\n    ternary r48 r7.liquidity 0u128 into r272;\n    lt r20.hi r28.hi into r273;\n    gt r20.hi r28.hi into r274;\n    lt r20.lo r28.lo into r275;\n    ternary r274 false r275 into r276;\n    ternary r273 true r276 into r277;\n    ternary r277 r20.hi r28.hi into r278;\n    ternary r277 r20.lo r28.lo into r279;\n    cast r278 r279 into r280 as U256__8JquwLopp8;\n    lt r20.hi r28.hi into r281;\n    gt r20.hi r28.hi into r282;\n    lt r20.lo r28.lo into r283;\n    ternary r282 false r283 into r284;\n    ternary r281 true r284 into r285;\n    ternary r285 r28.hi r20.hi into r286;\n    ternary r285 r28.lo r20.lo into r287;\n    cast r286 r287 into r288 as U256__8JquwLopp8;\n    lt r288.lo r280.lo into r289;\n    ternary r289 1u128 0u128 into r290;\n    sub.w r288.lo r280.lo into r291;\n    sub.w r288.hi r280.hi into r292;\n    sub.w r292 r290 into r293;\n    cast r293 r291 into r294 as U256__8JquwLopp8;\n    cast 0u128 r272 into r295 as U256__8JquwLopp8;\n    and r295.lo 18446744073709551615u128 into r296;\n    shr r295.lo 64u8 into r297;\n    and r294.lo 18446744073709551615u128 into r298;\n    shr r294.lo 64u8 into r299;\n    mul r296 r298 into r300;\n    mul r296 r299 into r301;\n    mul r297 r298 into r302;\n    mul r297 r299 into r303;\n    and r300 18446744073709551615u128 into r304;\n    shr r300 64u8 into r305;\n    and r301 18446744073709551615u128 into r306;\n    add r305 r306 into r307;\n    and r302 18446744073709551615u128 into r308;\n    add r307 r308 into r309;\n    and r309 18446744073709551615u128 into r310;\n    shr r309 64u8 into r311;\n    shr r301 64u8 into r312;\n    shr r302 64u8 into r313;\n    add r312 r313 into r314;\n    and r303 18446744073709551615u128 into r315;\n    add r314 r315 into r316;\n    add r316 r311 into r317;\n    and r317 18446744073709551615u128 into r318;\n    shr r317 64u8 into r319;\n    shr r303 64u8 into r320;\n    add r320 r319 into r321;\n    shl r321 64u8 into r322;\n    add r322 r318 into r323;\n    shl r310 64u8 into r324;\n    add r324 r304 into r325;\n    and r295.lo 18446744073709551615u128 into r326;\n    shr r295.lo 64u8 into r327;\n    and r294.hi 18446744073709551615u128 into r328;\n    shr r294.hi 64u8 into r329;\n    mul r326 r328 into r330;\n    mul r326 r329 into r331;\n    mul r327 r328 into r332;\n    mul r327 r329 into r333;\n    and r330 18446744073709551615u128 into r334;\n    shr r330 64u8 into r335;\n    and r331 18446744073709551615u128 into r336;\n    add r335 r336 into r337;\n    and r332 18446744073709551615u128 into r338;\n    add r337 r338 into r339;\n    and r339 18446744073709551615u128 into r340;\n    shr r339 64u8 into r341;\n    shr r331 64u8 into r342;\n    shr r332 64u8 into r343;\n    add r342 r343 into r344;\n    and r333 18446744073709551615u128 into r345;\n    add r344 r345 into r346;\n    add r346 r341 into r347;\n    and r347 18446744073709551615u128 into r348;\n    shr r347 64u8 into r349;\n    shr r333 64u8 into r350;\n    add r350 r349 into r351;\n    shl r351 64u8 into r352;\n    add r352 r348 into r353;\n    shl r340 64u8 into r354;\n    add r354 r334 into r355;\n    and r295.hi 18446744073709551615u128 into r356;\n    shr r295.hi 64u8 into r357;\n    and r294.lo 18446744073709551615u128 into r358;\n    shr r294.lo 64u8 into r359;\n    mul r356 r358 into r360;\n    mul r356 r359 into r361;\n    mul r357 r358 into r362;\n    mul r357 r359 into r363;\n    and r360 18446744073709551615u128 into r364;\n    shr r360 64u8 into r365;\n    and r361 18446744073709551615u128 into r366;\n    add r365 r366 into r367;\n    and r362 18446744073709551615u128 into r368;\n    add r367 r368 into r369;\n    and r369 18446744073709551615u128 into r370;\n    shr r369 64u8 into r371;\n    shr r361 64u8 into r372;\n    shr r362 64u8 into r373;\n    add r372 r373 into r374;\n    and r363 18446744073709551615u128 into r375;\n    add r374 r375 into r376;\n    add r376 r371 into r377;\n    and r377 18446744073709551615u128 into r378;\n    shr r377 64u8 into r379;\n    shr r363 64u8 into r380;\n    add r380 r379 into r381;\n    shl r381 64u8 into r382;\n    add r382 r378 into r383;\n    shl r370 64u8 into r384;\n    add r384 r364 into r385;\n    and r295.hi 18446744073709551615u128 into r386;\n    shr r295.hi 64u8 into r387;\n    and r294.hi 18446744073709551615u128 into r388;\n    shr r294.hi 64u8 into r389;\n    mul r386 r388 into r390;\n    mul r386 r389 into r391;\n    mul r387 r388 into r392;\n    mul r387 r389 into r393;\n    and r390 18446744073709551615u128 into r394;\n    shr r390 64u8 into r395;\n    and r391 18446744073709551615u128 into r396;\n    add r395 r396 into r397;\n    and r392 18446744073709551615u128 into r398;\n    add r397 r398 into r399;\n    and r399 18446744073709551615u128 into r400;\n    shr r399 64u8 into r401;\n    shr r391 64u8 into r402;\n    shr r392 64u8 into r403;\n    add r402 r403 into r404;\n    and r393 18446744073709551615u128 into r405;\n    add r404 r405 into r406;\n    add r406 r401 into r407;\n    and r407 18446744073709551615u128 into r408;\n    shr r407 64u8 into r409;\n    shr r393 64u8 into r410;\n    add r410 r409 into r411;\n    shl r411 64u8 into r412;\n    add r412 r408 into r413;\n    shl r400 64u8 into r414;\n    add r414 r394 into r415;\n    add.w r323 r355 into r416;\n    lt r416 r323 into r417;\n    ternary r417 1u128 0u128 into r418;\n    add.w r416 r385 into r419;\n    lt r419 r416 into r420;\n    ternary r420 1u128 0u128 into r421;\n    add r418 r421 into r422;\n    add.w r353 r383 into r423;\n    lt r423 r353 into r424;\n    ternary r424 1u128 0u128 into r425;\n    add.w r423 r415 into r426;\n    lt r426 r423 into r427;\n    ternary r427 1u128 0u128 into r428;\n    add.w r426 r422 into r429;\n    lt r429 r426 into r430;\n    ternary r430 1u128 0u128 into r431;\n    add r425 r428 into r432;\n    add r432 r431 into r433;\n    add.w r413 r433 into r434;\n    cast r434 r429 into r435 as U256__8JquwLopp8;\n    cast r419 r325 into r436 as U256__8JquwLopp8;\n    is.eq r435.hi 0u128 into r437;\n    is.eq r435.lo 0u128 into r438;\n    and r437 r438 into r439;\n    assert.eq r439 true;\n    ternary r41 r103.lo 0u128 into r440;\n    ternary r34 r75.lo r440 into r441;\n    ternary r48 r436.hi 0u128 into r442;\n    ternary r41 r268.hi r442 into r443;\n    cast r9.pool r9.tick_lower into r444 as TickKey;\n    hash.bhp256 r444 into r445 as field;\n    cast r9.pool r9.tick_upper into r446 as TickKey;\n    hash.bhp256 r446 into r447 as field;\n    get ticks[r445] into r448;\n    get ticks[r447] into r449;\n    gt r448.liquidity_gross 0u128 into r450;\n    gt r449.liquidity_gross 0u128 into r451;\n    sub r448.liquidity_gross r7.liquidity into r452;\n    sub r449.liquidity_gross r7.liquidity into r453;\n    is.eq r452 0u128 into r454;\n    and r450 r454 into r455;\n    is.eq r453 0u128 into r456;\n    and r451 r456 into r457;\n    cast r7.liquidity into r458 as i128;\n    sub r448.liquidity_net r458 into r459;\n    cast r448.pool r459 r452 r448.tick r448.fee_growth_outside0_x_128 r448.fee_growth_outside1_x_128 r448.prev r448.next into r460 as Tick;\n    set r460 into ticks[r445];\n    branch.eq r455 false to end_then_1_2;\n    cast r9.pool r448.prev into r461 as TickKey;\n    hash.bhp256 r461 into r462 as field;\n    get ticks[r462] into r463;\n    cast r463.pool r463.liquidity_net r463.liquidity_gross r463.tick r463.fee_growth_outside0_x_128 r463.fee_growth_outside1_x_128 r463.prev r448.next into r464 as Tick;\n    set r464 into ticks[r462];\n    cast r9.pool r448.next into r465 as TickKey;\n    hash.bhp256 r465 into r466 as field;\n    get ticks[r466] into r467;\n    cast r467.pool r467.liquidity_net r467.liquidity_gross r467.tick r467.fee_growth_outside0_x_128 r467.fee_growth_outside1_x_128 r448.prev r467.next into r468 as Tick;\n    set r468 into ticks[r466];\n    branch.eq true true to end_otherwise_1_3;\n    position end_then_1_2;\n    position end_otherwise_1_3;\n    get ticks[r447] into r469;\n    cast r7.liquidity into r470 as i128;\n    add r469.liquidity_net r470 into r471;\n    cast r469.pool r471 r453 r469.tick r469.fee_growth_outside0_x_128 r469.fee_growth_outside1_x_128 r469.prev r469.next into r472 as Tick;\n    set r472 into ticks[r447];\n    branch.eq r457 false to end_then_1_4;\n    cast r9.pool r469.prev into r473 as TickKey;\n    hash.bhp256 r473 into r474 as field;\n    get ticks[r474] into r475;\n    cast r475.pool r475.liquidity_net r475.liquidity_gross r475.tick r475.fee_growth_outside0_x_128 r475.fee_growth_outside1_x_128 r475.prev r469.next into r476 as Tick;\n    set r476 into ticks[r474];\n    cast r9.pool r469.next into r477 as TickKey;\n    hash.bhp256 r477 into r478 as field;\n    get ticks[r478] into r479;\n    cast r479.pool r479.liquidity_net r479.liquidity_gross r479.tick r479.fee_growth_outside0_x_128 r479.fee_growth_outside1_x_128 r469.prev r479.next into r480 as Tick;\n    set r480 into ticks[r478];\n    branch.eq true true to end_otherwise_1_5;\n    position end_then_1_4;\n    position end_otherwise_1_5;\n    get ticks[r445] into r481;\n    get ticks[r447] into r482;\n    gte r10.tick r481.tick into r483;\n    lt r10.fee_growth_global0_x_128.lo r481.fee_growth_outside0_x_128.lo into r484;\n    ternary r484 1u128 0u128 into r485;\n    sub.w r10.fee_growth_global0_x_128.lo r481.fee_growth_outside0_x_128.lo into r486;\n    sub.w r10.fee_growth_global0_x_128.hi r481.fee_growth_outside0_x_128.hi into r487;\n    sub.w r487 r485 into r488;\n    cast r488 r486 into r489 as U256__8JquwLopp8;\n    lt r10.fee_growth_global1_x_128.lo r481.fee_growth_outside1_x_128.lo into r490;\n    ternary r490 1u128 0u128 into r491;\n    sub.w r10.fee_growth_global1_x_128.lo r481.fee_growth_outside1_x_128.lo into r492;\n    sub.w r10.fee_growth_global1_x_128.hi r481.fee_growth_outside1_x_128.hi into r493;\n    sub.w r493 r491 into r494;\n    cast r494 r492 into r495 as U256__8JquwLopp8;\n    ternary r483 r481.fee_growth_outside0_x_128.hi r489.hi into r496;\n    ternary r483 r481.fee_growth_outside0_x_128.lo r489.lo into r497;\n    cast r496 r497 into r498 as U256__8JquwLopp8;\n    ternary r483 r481.fee_growth_outside1_x_128.hi r495.hi into r499;\n    ternary r483 r481.fee_growth_outside1_x_128.lo r495.lo into r500;\n    cast r499 r500 into r501 as U256__8JquwLopp8;\n    lt r10.tick r482.tick into r502;\n    lt r10.fee_growth_global0_x_128.lo r482.fee_growth_outside0_x_128.lo into r503;\n    ternary r503 1u128 0u128 into r504;\n    sub.w r10.fee_growth_global0_x_128.lo r482.fee_growth_outside0_x_128.lo into r505;\n    sub.w r10.fee_growth_global0_x_128.hi r482.fee_growth_outside0_x_128.hi into r506;\n    sub.w r506 r504 into r507;\n    cast r507 r505 into r508 as U256__8JquwLopp8;\n    lt r10.fee_growth_global1_x_128.lo r482.fee_growth_outside1_x_128.lo into r509;\n    ternary r509 1u128 0u128 into r510;\n    sub.w r10.fee_growth_global1_x_128.lo r482.fee_growth_outside1_x_128.lo into r511;\n    sub.w r10.fee_growth_global1_x_128.hi r482.fee_growth_outside1_x_128.hi into r512;\n    sub.w r512 r510 into r513;\n    cast r513 r511 into r514 as U256__8JquwLopp8;\n    ternary r502 r482.fee_growth_outside0_x_128.hi r508.hi into r515;\n    ternary r502 r482.fee_growth_outside0_x_128.lo r508.lo into r516;\n    cast r515 r516 into r517 as U256__8JquwLopp8;\n    ternary r502 r482.fee_growth_outside1_x_128.hi r514.hi into r518;\n    ternary r502 r482.fee_growth_outside1_x_128.lo r514.lo into r519;\n    cast r518 r519 into r520 as U256__8JquwLopp8;\n    lt r10.fee_growth_global0_x_128.lo r498.lo into r521;\n    ternary r521 1u128 0u128 into r522;\n    sub.w r10.fee_growth_global0_x_128.lo r498.lo into r523;\n    sub.w r10.fee_growth_global0_x_128.hi r498.hi into r524;\n    sub.w r524 r522 into r525;\n    cast r525 r523 into r526 as U256__8JquwLopp8;\n    lt r526.lo r517.lo into r527;\n    ternary r527 1u128 0u128 into r528;\n    sub.w r526.lo r517.lo into r529;\n    sub.w r526.hi r517.hi into r530;\n    sub.w r530 r528 into r531;\n    cast r531 r529 into r532 as U256__8JquwLopp8;\n    lt r10.fee_growth_global1_x_128.lo r501.lo into r533;\n    ternary r533 1u128 0u128 into r534;\n    sub.w r10.fee_growth_global1_x_128.lo r501.lo into r535;\n    sub.w r10.fee_growth_global1_x_128.hi r501.hi into r536;\n    sub.w r536 r534 into r537;\n    cast r537 r535 into r538 as U256__8JquwLopp8;\n    lt r538.lo r520.lo into r539;\n    ternary r539 1u128 0u128 into r540;\n    sub.w r538.lo r520.lo into r541;\n    sub.w r538.hi r520.hi into r542;\n    sub.w r542 r540 into r543;\n    cast r543 r541 into r544 as U256__8JquwLopp8;\n    lt r532.lo r9.fee_growth_inside0_last_x_128.lo into r545;\n    ternary r545 1u128 0u128 into r546;\n    sub.w r532.lo r9.fee_growth_inside0_last_x_128.lo into r547;\n    sub.w r532.hi r9.fee_growth_inside0_last_x_128.hi into r548;\n    sub.w r548 r546 into r549;\n    cast r549 r547 into r550 as U256__8JquwLopp8;\n    and r550.hi 18446744073709551615u128 into r551;\n    shr r550.hi 64u8 into r552;\n    and r9.liquidity 18446744073709551615u128 into r553;\n    shr r9.liquidity 64u8 into r554;\n    mul r551 r553 into r555;\n    mul r551 r554 into r556;\n    mul r552 r553 into r557;\n    mul r552 r554 into r558;\n    and r555 18446744073709551615u128 into r559;\n    shr r555 64u8 into r560;\n    and r556 18446744073709551615u128 into r561;\n    add r560 r561 into r562;\n    and r557 18446744073709551615u128 into r563;\n    add r562 r563 into r564;\n    and r564 18446744073709551615u128 into r565;\n    shr r564 64u8 into r566;\n    shr r556 64u8 into r567;\n    shr r557 64u8 into r568;\n    add r567 r568 into r569;\n    and r558 18446744073709551615u128 into r570;\n    add r569 r570 into r571;\n    add r571 r566 into r572;\n    and r572 18446744073709551615u128 into r573;\n    shr r572 64u8 into r574;\n    shr r558 64u8 into r575;\n    add r575 r574 into r576;\n    shl r576 64u8 into r577;\n    add r577 r573 into r578;\n    shl r565 64u8 into r579;\n    add r579 r559 into r580;\n    and r550.lo 18446744073709551615u128 into r581;\n    shr r550.lo 64u8 into r582;\n    mul r581 r553 into r583;\n    mul r581 r554 into r584;\n    mul r582 r553 into r585;\n    mul r582 r554 into r586;\n    and r583 18446744073709551615u128 into r587;\n    shr r583 64u8 into r588;\n    and r584 18446744073709551615u128 into r589;\n    add r588 r589 into r590;\n    and r585 18446744073709551615u128 into r591;\n    add r590 r591 into r592;\n    and r592 18446744073709551615u128 into r593;\n    shr r592 64u8 into r594;\n    shr r584 64u8 into r595;\n    shr r585 64u8 into r596;\n    add r595 r596 into r597;\n    and r586 18446744073709551615u128 into r598;\n    add r597 r598 into r599;\n    add r599 r594 into r600;\n    and r600 18446744073709551615u128 into r601;\n    shr r600 64u8 into r602;\n    shr r586 64u8 into r603;\n    add r603 r602 into r604;\n    shl r604 64u8 into r605;\n    add r605 r601 into r606;\n    shl r593 64u8 into r607;\n    add r607 r587 into r608;\n    sub 340282366920938463463374607431768211455u128 r580 into r609;\n    lte r606 r609 into r610;\n    is.eq r578 0u128 into r611;\n    and r611 r610 into r612;\n    assert.eq r612 true;\n    add r580 r606 into r613;\n    add r9.tokens_owed0 r613 into r614;\n    add r614 r441 into r615;\n    lt r544.lo r9.fee_growth_inside1_last_x_128.lo into r616;\n    ternary r616 1u128 0u128 into r617;\n    sub.w r544.lo r9.fee_growth_inside1_last_x_128.lo into r618;\n    sub.w r544.hi r9.fee_growth_inside1_last_x_128.hi into r619;\n    sub.w r619 r617 into r620;\n    cast r620 r618 into r621 as U256__8JquwLopp8;\n    and r621.hi 18446744073709551615u128 into r622;\n    shr r621.hi 64u8 into r623;\n    and r9.liquidity 18446744073709551615u128 into r624;\n    shr r9.liquidity 64u8 into r625;\n    mul r622 r624 into r626;\n    mul r622 r625 into r627;\n    mul r623 r624 into r628;\n    mul r623 r625 into r629;\n    and r626 18446744073709551615u128 into r630;\n    shr r626 64u8 into r631;\n    and r627 18446744073709551615u128 into r632;\n    add r631 r632 into r633;\n    and r628 18446744073709551615u128 into r634;\n    add r633 r634 into r635;\n    and r635 18446744073709551615u128 into r636;\n    shr r635 64u8 into r637;\n    shr r627 64u8 into r638;\n    shr r628 64u8 into r639;\n    add r638 r639 into r640;\n    and r629 18446744073709551615u128 into r641;\n    add r640 r641 into r642;\n    add r642 r637 into r643;\n    and r643 18446744073709551615u128 into r644;\n    shr r643 64u8 into r645;\n    shr r629 64u8 into r646;\n    add r646 r645 into r647;\n    shl r647 64u8 into r648;\n    add r648 r644 into r649;\n    shl r636 64u8 into r650;\n    add r650 r630 into r651;\n    and r621.lo 18446744073709551615u128 into r652;\n    shr r621.lo 64u8 into r653;\n    mul r652 r624 into r654;\n    mul r652 r625 into r655;\n    mul r653 r624 into r656;\n    mul r653 r625 into r657;\n    and r654 18446744073709551615u128 into r658;\n    shr r654 64u8 into r659;\n    and r655 18446744073709551615u128 into r660;\n    add r659 r660 into r661;\n    and r656 18446744073709551615u128 into r662;\n    add r661 r662 into r663;\n    and r663 18446744073709551615u128 into r664;\n    shr r663 64u8 into r665;\n    shr r655 64u8 into r666;\n    shr r656 64u8 into r667;\n    add r666 r667 into r668;\n    and r657 18446744073709551615u128 into r669;\n    add r668 r669 into r670;\n    add r670 r665 into r671;\n    and r671 18446744073709551615u128 into r672;\n    shr r671 64u8 into r673;\n    shr r657 64u8 into r674;\n    add r674 r673 into r675;\n    shl r675 64u8 into r676;\n    add r676 r672 into r677;\n    shl r664 64u8 into r678;\n    add r678 r658 into r679;\n    sub 340282366920938463463374607431768211455u128 r651 into r680;\n    lte r677 r680 into r681;\n    is.eq r649 0u128 into r682;\n    and r682 r681 into r683;\n    assert.eq r683 true;\n    add r651 r677 into r684;\n    add r9.tokens_owed1 r684 into r685;\n    add r685 r443 into r686;\n    sub r9.liquidity r7.liquidity into r687;\n    cast r1 r9.pool r9.tick_lower r9.tick_upper r687 r532 r544 r615 r686 into r688 as Position;\n    set r688 into positions[r1];\n    is.eq r10.next_init_below r9.tick_lower into r689;\n    and r455 r689 into r690;\n    ternary r690 r448.prev r10.next_init_below into r691;\n    is.eq r10.next_init_above r9.tick_lower into r692;\n    and r455 r692 into r693;\n    ternary r693 r448.next r10.next_init_above into r694;\n    is.eq r691 r9.tick_upper into r695;\n    and r457 r695 into r696;\n    ternary r696 r469.prev r691 into r697;\n    is.eq r694 r9.tick_upper into r698;\n    and r457 r698 into r699;\n    ternary r699 r469.next r694 into r700;\n    gte r10.tick r9.tick_lower into r701;\n    lt r10.tick r9.tick_upper into r702;\n    and r701 r702 into r703;\n    ternary r703 r7.liquidity 0u128 into r704;\n    sub r10.liquidity r704 into r705;\n    cast r10.tick r10.tick_spacing r10.sqrt_price r10.fee_protocol r705 r10.fee_growth_global0_x_128 r10.fee_growth_global1_x_128 r10.max_liquidity_per_tick r10.protocol_fees0 r10.protocol_fees1 r697 r700 into r706 as Slot;\n    set r706 into slots[r9.pool];\n    branch.eq r455 false to end_then_1_6;\n    remove ticks[r445];\n    branch.eq true true to end_otherwise_1_7;\n    position end_then_1_6;\n    position end_otherwise_1_7;\n    branch.eq r457 false to end_then_1_8;\n    remove ticks[r447];\n    branch.eq true true to end_otherwise_1_9;\n    position end_then_1_8;\n    position end_otherwise_1_9;\n    branch.eq true true to end_otherwise_0_1;\n    position end_then_0_0;\n    position end_otherwise_0_1;\n    set block.height into frozen_position[r1];\n\nfunction unfreeze_position:\n    input r0 as field.public;\n    async unfreeze_position self.caller r0 into r1;\n    output r1 as shield_swap.aleo/unfreeze_position.future;\n\nfinalize unfreeze_position:\n    input r0 as address.public;\n    input r1 as field.public;\n    get admin[true] into r2;\n    is.eq r0 r2 into r3;\n    assert.eq r3 true;\n    contains frozen_position[r1] into r4;\n    assert.eq r4 true;\n    remove frozen_position[r1];\n\nfunction set_fee_protocol:\n    input r0 as field.public;\n    input r1 as u8.public;\n    async set_fee_protocol self.caller r0 r1 into r2;\n    output r2 as shield_swap.aleo/set_fee_protocol.future;\n\nfinalize set_fee_protocol:\n    input r0 as address.public;\n    input r1 as field.public;\n    input r2 as u8.public;\n    get admin[true] into r3;\n    is.eq r0 r3 into r4;\n    assert.eq r4 true;\n    is.eq r2 0u8 into r5;\n    gte r2 4u8 into r6;\n    lte r2 10u8 into r7;\n    and r6 r7 into r8;\n    or r5 r8 into r9;\n    assert.eq r9 true;\n    get slots[r1] into r10;\n    cast r10.tick r10.tick_spacing r10.sqrt_price r2 r10.liquidity r10.fee_growth_global0_x_128 r10.fee_growth_global1_x_128 r10.max_liquidity_per_tick r10.protocol_fees0 r10.protocol_fees1 r10.next_init_below r10.next_init_above into r11 as Slot;\n    set r11 into slots[r1];\n\nfunction collect_protocol:\n    input r0 as field.public;\n    input r1 as u128.public;\n    input r2 as u128.public;\n    input r3 as field.public;\n    input r4 as field.public;\n    input r5 as address.public;\n    assert.neq r5 shield_swap.aleo;\n    call.dynamic r3 'aleo' 'transfer_public' with r5 r1 (as address.public u128.public) into r6 (as dynamic.future);\n    call.dynamic r4 'aleo' 'transfer_public' with r5 r2 (as address.public u128.public) into r7 (as dynamic.future);\n    async collect_protocol r6 r7 self.signer r0 r1 r2 r3 r4 self.caller into r8;\n    output r8 as shield_swap.aleo/collect_protocol.future;\n\nfinalize collect_protocol:\n    input r0 as dynamic.future;\n    input r1 as dynamic.future;\n    input r2 as address.public;\n    input r3 as field.public;\n    input r4 as u128.public;\n    input r5 as u128.public;\n    input r6 as field.public;\n    input r7 as field.public;\n    input r8 as address.public;\n    get admin[true] into r9;\n    is.eq r8 r9 into r10;\n    is.eq r2 r9 into r11;\n    or r10 r11 into r12;\n    assert.eq r12 true;\n    is.eq r8 aleo18sekmsl46y6skh3kvkekmw4kqqm7d6rz79akpsg58r7wpp5klyyq0qtzqf into r13;\n    contains from_wrapper_token_id[r6] into r14;\n    contains from_wrapper_token_id[r7] into r15;\n    or r14 r15 into r16;\n    branch.eq r16 false to end_then_0_0;\n    assert.eq r13 true;\n    branch.eq true true to end_otherwise_0_1;\n    position end_then_0_0;\n    position end_otherwise_0_1;\n    get pools[r3] into r17;\n    is.eq r17.token0 r6 into r18;\n    is.eq r17.token1 r7 into r19;\n    and r18 r19 into r20;\n    assert.eq r20 true;\n    get slots[r3] into r21;\n    lte r4 r21.protocol_fees0 into r22;\n    assert.eq r22 true;\n    lte r5 r21.protocol_fees1 into r23;\n    assert.eq r23 true;\n    await r0;\n    await r1;\n    sub r21.protocol_fees0 r4 into r24;\n    sub r21.protocol_fees1 r5 into r25;\n    cast r21.tick r21.tick_spacing r21.sqrt_price r21.fee_protocol r21.liquidity r21.fee_growth_global0_x_128 r21.fee_growth_global1_x_128 r21.max_liquidity_per_tick r24 r25 r21.next_init_below r21.next_init_above into r26 as Slot;\n    set r26 into slots[r3];\n\nfunction create_pool:\n    input r0 as field.public;\n    input r1 as field.public;\n    input r2 as u16.public;\n    input r3 as U256__8JquwLopp8.public;\n    input r4 as u32.public;\n    input r5 as i32.public;\n    lt r0 r1 into r6;\n    ternary r6 r0 r1 into r7;\n    ternary r6 r1 r0 into r8;\n    cast r7 r8 r2 into r9 as PoolKey;\n    hash.bhp256 r9 into r10 as field;\n    async create_pool self.caller r0 r1 r2 r3 r4 r5 into r11;\n    output r10 as field.public;\n    output self.signer as address.public;\n    output r11 as shield_swap.aleo/create_pool.future;\n\nfinalize create_pool:\n    input r0 as address.public;\n    input r1 as field.public;\n    input r2 as field.public;\n    input r3 as u16.public;\n    input r4 as U256__8JquwLopp8.public;\n    input r5 as u32.public;\n    input r6 as i32.public;\n    get.or_use pool_creation_is_open[true] false into r7;\n    get admin[true] into r8;\n    is.eq r0 r8 into r9;\n    or r7 r9 into r10;\n    assert.eq r10 true;\n    get.or_use token_allowed[r1] false into r11;\n    assert.eq r11 true;\n    get.or_use token_allowed[r2] false into r12;\n    assert.eq r12 true;\n    get.or_use global_paused[true] false into r13;\n    not r13 into r14;\n    assert.eq r14 true;\n    lt r1 r2 into r15;\n    ternary r15 r1 r2 into r16;\n    ternary r15 r2 r1 into r17;\n    cast r16 r17 r3 into r18 as PoolKey;\n    hash.bhp256 r18 into r19 as field;\n    cast r16 r17 r3 true into r20 as PoolState;\n    get.or_use token_paused[r16] false into r21;\n    not r21 into r22;\n    assert.eq r22 true;\n    get.or_use token_paused[r17] false into r23;\n    not r23 into r24;\n    assert.eq r24 true;\n    cast r16 r17 into r25 as PairKey;\n    get.or_use pair_paused[r25] false into r26;\n    not r26 into r27;\n    assert.eq r27 true;\n    assert.neq r1 r2;\n    get.or_use initialized_pools[r19] false into r28;\n    not r28 into r29;\n    assert.eq r29 true;\n    get.or_use tick_spacings[r5] false into r30;\n    assert.eq r30 true;\n    get.or_use fee_tiers[r3] false into r31;\n    assert.eq r31 true;\n    get fee_to_tick_spacing[r3] into r32;\n    is.eq r32 r5 into r33;\n    assert.eq r33 true;\n    cast r5 into r34 as i32;\n    rem r6 r34 into r35;\n    is.eq r35 0i32 into r36;\n    assert.eq r36 true;\n    gte r6 -400000i32 into r37;\n    lt r6 400000i32 into r38;\n    and r37 r38 into r39;\n    assert.eq r39 true;\n    call view_sqrt_price_at_tick_x128 r6 into r40;\n    add r6 1i32 into r41;\n    call view_sqrt_price_at_tick_x128 r41 into r42;\n    lt r4.hi r40.hi into r43;\n    gt r4.hi r40.hi into r44;\n    lt r4.lo r40.lo into r45;\n    ternary r44 false r45 into r46;\n    ternary r43 true r46 into r47;\n    not r47 into r48;\n    lt r4.hi r42.hi into r49;\n    gt r4.hi r42.hi into r50;\n    lt r4.lo r42.lo into r51;\n    ternary r50 false r51 into r52;\n    ternary r49 true r52 into r53;\n    and r48 r53 into r54;\n    assert.eq r54 true;\n    cast r5 into r55 as u128;\n    div 800000u128 r55 into r56;\n    div 340282366920938463463374607431768211455u128 r56 into r57;\n    lt r57 702075911466779181339691826086u128 into r58;\n    ternary r58 r57 702075911466779181339691826086u128 into r59;\n    set true into initialized_pools[r19];\n    set r20 into pools[r19];\n    set r0 into pool_creators[r19];\n    cast r19 -400001i32 into r60 as TickKey;\n    hash.bhp256 r60 into r61 as field;\n    cast r19 400001i32 into r62 as TickKey;\n    hash.bhp256 r62 into r63 as field;\n    cast 0u128 0u128 into r64 as U256__8JquwLopp8;\n    cast 0u128 0u128 into r65 as U256__8JquwLopp8;\n    cast r19 0i128 0u128 -400001i32 r64 r65 -400001i32 400001i32 into r66 as Tick;\n    set r66 into ticks[r61];\n    cast 0u128 0u128 into r67 as U256__8JquwLopp8;\n    cast 0u128 0u128 into r68 as U256__8JquwLopp8;\n    cast r19 0i128 0u128 400001i32 r67 r68 -400001i32 400001i32 into r69 as Tick;\n    set r69 into ticks[r63];\n    cast 0u128 0u128 into r70 as U256__8JquwLopp8;\n    cast 0u128 0u128 into r71 as U256__8JquwLopp8;\n    cast r6 r5 r4 5u8 0u128 r70 r71 r59 0u128 0u128 -400001i32 400001i32 into r72 as Slot;\n    set r72 into slots[r19];\n\nclosure assert_valid_position_address:\n    input r0 as address;\n    assert.neq r0 shield_swap.aleo;\n    assert.neq r0 aleo1qqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqq3ljyzc;\n\nfunction mint:\n    input r0 as field.private;\n    input r1 as dynamic.record;\n    input r2 as dynamic.record;\n    input r3 as address.private;\n    input r4 as address.private;\n    input r5 as MintPositionRequest.public;\n    input r6 as field.public;\n    input r7 as field.public;\n    input r8 as [MerkleProof; 2u32].private;\n    input r9 as [MerkleProof; 2u32].private;\n    input r10 as [MerkleProof; 2u32].private;\n    is.eq self.caller aleo18sekmsl46y6skh3kvkekmw4kqqm7d6rz79akpsg58r7wpp5klyyq0qtzqf into r11;\n    call assert_valid_position_address r3;\n    call assert_valid_position_address r4;\n    and r8[0u32].leaf_index 1u32 into r12;\n    is.eq r12 0u32 into r13;\n    cast 1field r8[0u32].siblings[0u32] r8[0u32].siblings[1u32] into r14 as [field; 3u32];\n    cast 1field r8[0u32].siblings[1u32] r8[0u32].siblings[0u32] into r15 as [field; 3u32];\n    ternary r13 r14[0u32] r15[0u32] into r16;\n    ternary r13 r14[1u32] r15[1u32] into r17;\n    ternary r13 r14[2u32] r15[2u32] into r18;\n    cast r16 r17 r18 into r19 as [field; 3u32];\n    hash.psd4 r19 into r20 as field;\n    is.eq r8[0u32].siblings[2u32] 0field into r21;\n    shr r8[0u32].leaf_index 1u8 into r22;\n    and r22 1u32 into r23;\n    is.eq r23 0u32 into r24;\n    cast 0field r20 r8[0u32].siblings[2u32] into r25 as [field; 3u32];\n    cast 0field r8[0u32].siblings[2u32] r20 into r26 as [field; 3u32];\n    ternary r24 r25[0u32] r26[0u32] into r27;\n    ternary r24 r25[1u32] r26[1u32] into r28;\n    ternary r24 r25[2u32] r26[2u32] into r29;\n    cast r27 r28 r29 into r30 as [field; 3u32];\n    hash.psd4 r30 into r31 as field;\n    is.eq r8[0u32].siblings[3u32] 0field into r32;\n    shr r8[0u32].leaf_index 2u8 into r33;\n    and r33 1u32 into r34;\n    is.eq r34 0u32 into r35;\n    cast 0field r31 r8[0u32].siblings[3u32] into r36 as [field; 3u32];\n    cast 0field r8[0u32].siblings[3u32] r31 into r37 as [field; 3u32];\n    ternary r35 r36[0u32] r37[0u32] into r38;\n    ternary r35 r36[1u32] r37[1u32] into r39;\n    ternary r35 r36[2u32] r37[2u32] into r40;\n    cast r38 r39 r40 into r41 as [field; 3u32];\n    hash.psd4 r41 into r42 as field;\n    is.eq r8[0u32].siblings[4u32] 0field into r43;\n    shr r8[0u32].leaf_index 3u8 into r44;\n    and r44 1u32 into r45;\n    is.eq r45 0u32 into r46;\n    cast 0field r42 r8[0u32].siblings[4u32] into r47 as [field; 3u32];\n    cast 0field r8[0u32].siblings[4u32] r42 into r48 as [field; 3u32];\n    ternary r46 r47[0u32] r48[0u32] into r49;\n    ternary r46 r47[1u32] r48[1u32] into r50;\n    ternary r46 r47[2u32] r48[2u32] into r51;\n    cast r49 r50 r51 into r52 as [field; 3u32];\n    hash.psd4 r52 into r53 as field;\n    is.eq r8[0u32].siblings[5u32] 0field into r54;\n    shr r8[0u32].leaf_index 4u8 into r55;\n    and r55 1u32 into r56;\n    is.eq r56 0u32 into r57;\n    cast 0field r53 r8[0u32].siblings[5u32] into r58 as [field; 3u32];\n    cast 0field r8[0u32].siblings[5u32] r53 into r59 as [field; 3u32];\n    ternary r57 r58[0u32] r59[0u32] into r60;\n    ternary r57 r58[1u32] r59[1u32] into r61;\n    ternary r57 r58[2u32] r59[2u32] into r62;\n    cast r60 r61 r62 into r63 as [field; 3u32];\n    hash.psd4 r63 into r64 as field;\n    is.eq r8[0u32].siblings[6u32] 0field into r65;\n    shr r8[0u32].leaf_index 5u8 into r66;\n    and r66 1u32 into r67;\n    is.eq r67 0u32 into r68;\n    cast 0field r64 r8[0u32].siblings[6u32] into r69 as [field; 3u32];\n    cast 0field r8[0u32].siblings[6u32] r64 into r70 as [field; 3u32];\n    ternary r68 r69[0u32] r70[0u32] into r71;\n    ternary r68 r69[1u32] r70[1u32] into r72;\n    ternary r68 r69[2u32] r70[2u32] into r73;\n    cast r71 r72 r73 into r74 as [field; 3u32];\n    hash.psd4 r74 into r75 as field;\n    is.eq r8[0u32].siblings[7u32] 0field into r76;\n    shr r8[0u32].leaf_index 6u8 into r77;\n    and r77 1u32 into r78;\n    is.eq r78 0u32 into r79;\n    cast 0field r75 r8[0u32].siblings[7u32] into r80 as [field; 3u32];\n    cast 0field r8[0u32].siblings[7u32] r75 into r81 as [field; 3u32];\n    ternary r79 r80[0u32] r81[0u32] into r82;\n    ternary r79 r80[1u32] r81[1u32] into r83;\n    ternary r79 r80[2u32] r81[2u32] into r84;\n    cast r82 r83 r84 into r85 as [field; 3u32];\n    hash.psd4 r85 into r86 as field;\n    is.eq r8[0u32].siblings[8u32] 0field into r87;\n    shr r8[0u32].leaf_index 7u8 into r88;\n    and r88 1u32 into r89;\n    is.eq r89 0u32 into r90;\n    cast 0field r86 r8[0u32].siblings[8u32] into r91 as [field; 3u32];\n    cast 0field r8[0u32].siblings[8u32] r86 into r92 as [field; 3u32];\n    ternary r90 r91[0u32] r92[0u32] into r93;\n    ternary r90 r91[1u32] r92[1u32] into r94;\n    ternary r90 r91[2u32] r92[2u32] into r95;\n    cast r93 r94 r95 into r96 as [field; 3u32];\n    hash.psd4 r96 into r97 as field;\n    is.eq r8[0u32].siblings[9u32] 0field into r98;\n    shr r8[0u32].leaf_index 8u8 into r99;\n    and r99 1u32 into r100;\n    is.eq r100 0u32 into r101;\n    cast 0field r97 r8[0u32].siblings[9u32] into r102 as [field; 3u32];\n    cast 0field r8[0u32].siblings[9u32] r97 into r103 as [field; 3u32];\n    ternary r101 r102[0u32] r103[0u32] into r104;\n    ternary r101 r102[1u32] r103[1u32] into r105;\n    ternary r101 r102[2u32] r103[2u32] into r106;\n    cast r104 r105 r106 into r107 as [field; 3u32];\n    hash.psd4 r107 into r108 as field;\n    is.eq r8[0u32].siblings[10u32] 0field into r109;\n    shr r8[0u32].leaf_index 9u8 into r110;\n    and r110 1u32 into r111;\n    is.eq r111 0u32 into r112;\n    cast 0field r108 r8[0u32].siblings[10u32] into r113 as [field; 3u32];\n    cast 0field r8[0u32].siblings[10u32] r108 into r114 as [field; 3u32];\n    ternary r112 r113[0u32] r114[0u32] into r115;\n    ternary r112 r113[1u32] r114[1u32] into r116;\n    ternary r112 r113[2u32] r114[2u32] into r117;\n    cast r115 r116 r117 into r118 as [field; 3u32];\n    hash.psd4 r118 into r119 as field;\n    is.eq r8[0u32].siblings[11u32] 0field into r120;\n    shr r8[0u32].leaf_index 10u8 into r121;\n    and r121 1u32 into r122;\n    is.eq r122 0u32 into r123;\n    cast 0field r119 r8[0u32].siblings[11u32] into r124 as [field; 3u32];\n    cast 0field r8[0u32].siblings[11u32] r119 into r125 as [field; 3u32];\n    ternary r123 r124[0u32] r125[0u32] into r126;\n    ternary r123 r124[1u32] r125[1u32] into r127;\n    ternary r123 r124[2u32] r125[2u32] into r128;\n    cast r126 r127 r128 into r129 as [field; 3u32];\n    hash.psd4 r129 into r130 as field;\n    is.eq r8[0u32].siblings[12u32] 0field into r131;\n    shr r8[0u32].leaf_index 11u8 into r132;\n    and r132 1u32 into r133;\n    is.eq r133 0u32 into r134;\n    cast 0field r130 r8[0u32].siblings[12u32] into r135 as [field; 3u32];\n    cast 0field r8[0u32].siblings[12u32] r130 into r136 as [field; 3u32];\n    ternary r134 r135[0u32] r136[0u32] into r137;\n    ternary r134 r135[1u32] r136[1u32] into r138;\n    ternary r134 r135[2u32] r136[2u32] into r139;\n    cast r137 r138 r139 into r140 as [field; 3u32];\n    hash.psd4 r140 into r141 as field;\n    is.eq r8[0u32].siblings[13u32] 0field into r142;\n    shr r8[0u32].leaf_index 12u8 into r143;\n    and r143 1u32 into r144;\n    is.eq r144 0u32 into r145;\n    cast 0field r141 r8[0u32].siblings[13u32] into r146 as [field; 3u32];\n    cast 0field r8[0u32].siblings[13u32] r141 into r147 as [field; 3u32];\n    ternary r145 r146[0u32] r147[0u32] into r148;\n    ternary r145 r146[1u32] r147[1u32] into r149;\n    ternary r145 r146[2u32] r147[2u32] into r150;\n    cast r148 r149 r150 into r151 as [field; 3u32];\n    hash.psd4 r151 into r152 as field;\n    is.eq r8[0u32].siblings[14u32] 0field into r153;\n    shr r8[0u32].leaf_index 13u8 into r154;\n    and r154 1u32 into r155;\n    is.eq r155 0u32 into r156;\n    cast 0field r152 r8[0u32].siblings[14u32] into r157 as [field; 3u32];\n    cast 0field r8[0u32].siblings[14u32] r152 into r158 as [field; 3u32];\n    ternary r156 r157[0u32] r158[0u32] into r159;\n    ternary r156 r157[1u32] r158[1u32] into r160;\n    ternary r156 r157[2u32] r158[2u32] into r161;\n    cast r159 r160 r161 into r162 as [field; 3u32];\n    hash.psd4 r162 into r163 as field;\n    is.eq r8[0u32].siblings[15u32] 0field into r164;\n    shr r8[0u32].leaf_index 14u8 into r165;\n    and r165 1u32 into r166;\n    is.eq r166 0u32 into r167;\n    cast 0field r163 r8[0u32].siblings[15u32] into r168 as [field; 3u32];\n    cast 0field r8[0u32].siblings[15u32] r163 into r169 as [field; 3u32];\n    ternary r167 r168[0u32] r169[0u32] into r170;\n    ternary r167 r168[1u32] r169[1u32] into r171;\n    ternary r167 r168[2u32] r169[2u32] into r172;\n    cast r170 r171 r172 into r173 as [field; 3u32];\n    hash.psd4 r173 into r174 as field;\n    ternary r164 r163 r174 into r175;\n    ternary r164 14u8 15u8 into r176;\n    ternary r153 r152 r175 into r177;\n    ternary r153 13u8 r176 into r178;\n    ternary r142 r141 r177 into r179;\n    ternary r142 12u8 r178 into r180;\n    ternary r131 r130 r179 into r181;\n    ternary r131 11u8 r180 into r182;\n    ternary r120 r119 r181 into r183;\n    ternary r120 10u8 r182 into r184;\n    ternary r109 r108 r183 into r185;\n    ternary r109 9u8 r184 into r186;\n    ternary r98 r97 r185 into r187;\n    ternary r98 8u8 r186 into r188;\n    ternary r87 r86 r187 into r189;\n    ternary r87 7u8 r188 into r190;\n    ternary r76 r75 r189 into r191;\n    ternary r76 6u8 r190 into r192;\n    ternary r65 r64 r191 into r193;\n    ternary r65 5u8 r192 into r194;\n    ternary r54 r53 r193 into r195;\n    ternary r54 4u8 r194 into r196;\n    ternary r43 r42 r195 into r197;\n    ternary r43 3u8 r196 into r198;\n    ternary r32 r31 r197 into r199;\n    ternary r32 2u8 r198 into r200;\n    ternary r21 r20 r199 into r201;\n    ternary r21 1u8 r200 into r202;\n    and r8[1u32].leaf_index 1u32 into r203;\n    is.eq r203 0u32 into r204;\n    cast 1field r8[1u32].siblings[0u32] r8[1u32].siblings[1u32] into r205 as [field; 3u32];\n    cast 1field r8[1u32].siblings[1u32] r8[1u32].siblings[0u32] into r206 as [field; 3u32];\n    ternary r204 r205[0u32] r206[0u32] into r207;\n    ternary r204 r205[1u32] r206[1u32] into r208;\n    ternary r204 r205[2u32] r206[2u32] into r209;\n    cast r207 r208 r209 into r210 as [field; 3u32];\n    hash.psd4 r210 into r211 as field;\n    is.eq r8[1u32].siblings[2u32] 0field into r212;\n    shr r8[1u32].leaf_index 1u8 into r213;\n    and r213 1u32 into r214;\n    is.eq r214 0u32 into r215;\n    cast 0field r211 r8[1u32].siblings[2u32] into r216 as [field; 3u32];\n    cast 0field r8[1u32].siblings[2u32] r211 into r217 as [field; 3u32];\n    ternary r215 r216[0u32] r217[0u32] into r218;\n    ternary r215 r216[1u32] r217[1u32] into r219;\n    ternary r215 r216[2u32] r217[2u32] into r220;\n    cast r218 r219 r220 into r221 as [field; 3u32];\n    hash.psd4 r221 into r222 as field;\n    is.eq r8[1u32].siblings[3u32] 0field into r223;\n    shr r8[1u32].leaf_index 2u8 into r224;\n    and r224 1u32 into r225;\n    is.eq r225 0u32 into r226;\n    cast 0field r222 r8[1u32].siblings[3u32] into r227 as [field; 3u32];\n    cast 0field r8[1u32].siblings[3u32] r222 into r228 as [field; 3u32];\n    ternary r226 r227[0u32] r228[0u32] into r229;\n    ternary r226 r227[1u32] r228[1u32] into r230;\n    ternary r226 r227[2u32] r228[2u32] into r231;\n    cast r229 r230 r231 into r232 as [field; 3u32];\n    hash.psd4 r232 into r233 as field;\n    is.eq r8[1u32].siblings[4u32] 0field into r234;\n    shr r8[1u32].leaf_index 3u8 into r235;\n    and r235 1u32 into r236;\n    is.eq r236 0u32 into r237;\n    cast 0field r233 r8[1u32].siblings[4u32] into r238 as [field; 3u32];\n    cast 0field r8[1u32].siblings[4u32] r233 into r239 as [field; 3u32];\n    ternary r237 r238[0u32] r239[0u32] into r240;\n    ternary r237 r238[1u32] r239[1u32] into r241;\n    ternary r237 r238[2u32] r239[2u32] into r242;\n    cast r240 r241 r242 into r243 as [field; 3u32];\n    hash.psd4 r243 into r244 as field;\n    is.eq r8[1u32].siblings[5u32] 0field into r245;\n    shr r8[1u32].leaf_index 4u8 into r246;\n    and r246 1u32 into r247;\n    is.eq r247 0u32 into r248;\n    cast 0field r244 r8[1u32].siblings[5u32] into r249 as [field; 3u32];\n    cast 0field r8[1u32].siblings[5u32] r244 into r250 as [field; 3u32];\n    ternary r248 r249[0u32] r250[0u32] into r251;\n    ternary r248 r249[1u32] r250[1u32] into r252;\n    ternary r248 r249[2u32] r250[2u32] into r253;\n    cast r251 r252 r253 into r254 as [field; 3u32];\n    hash.psd4 r254 into r255 as field;\n    is.eq r8[1u32].siblings[6u32] 0field into r256;\n    shr r8[1u32].leaf_index 5u8 into r257;\n    and r257 1u32 into r258;\n    is.eq r258 0u32 into r259;\n    cast 0field r255 r8[1u32].siblings[6u32] into r260 as [field; 3u32];\n    cast 0field r8[1u32].siblings[6u32] r255 into r261 as [field; 3u32];\n    ternary r259 r260[0u32] r261[0u32] into r262;\n    ternary r259 r260[1u32] r261[1u32] into r263;\n    ternary r259 r260[2u32] r261[2u32] into r264;\n    cast r262 r263 r264 into r265 as [field; 3u32];\n    hash.psd4 r265 into r266 as field;\n    is.eq r8[1u32].siblings[7u32] 0field into r267;\n    shr r8[1u32].leaf_index 6u8 into r268;\n    and r268 1u32 into r269;\n    is.eq r269 0u32 into r270;\n    cast 0field r266 r8[1u32].siblings[7u32] into r271 as [field; 3u32];\n    cast 0field r8[1u32].siblings[7u32] r266 into r272 as [field; 3u32];\n    ternary r270 r271[0u32] r272[0u32] into r273;\n    ternary r270 r271[1u32] r272[1u32] into r274;\n    ternary r270 r271[2u32] r272[2u32] into r275;\n    cast r273 r274 r275 into r276 as [field; 3u32];\n    hash.psd4 r276 into r277 as field;\n    is.eq r8[1u32].siblings[8u32] 0field into r278;\n    shr r8[1u32].leaf_index 7u8 into r279;\n    and r279 1u32 into r280;\n    is.eq r280 0u32 into r281;\n    cast 0field r277 r8[1u32].siblings[8u32] into r282 as [field; 3u32];\n    cast 0field r8[1u32].siblings[8u32] r277 into r283 as [field; 3u32];\n    ternary r281 r282[0u32] r283[0u32] into r284;\n    ternary r281 r282[1u32] r283[1u32] into r285;\n    ternary r281 r282[2u32] r283[2u32] into r286;\n    cast r284 r285 r286 into r287 as [field; 3u32];\n    hash.psd4 r287 into r288 as field;\n    is.eq r8[1u32].siblings[9u32] 0field into r289;\n    shr r8[1u32].leaf_index 8u8 into r290;\n    and r290 1u32 into r291;\n    is.eq r291 0u32 into r292;\n    cast 0field r288 r8[1u32].siblings[9u32] into r293 as [field; 3u32];\n    cast 0field r8[1u32].siblings[9u32] r288 into r294 as [field; 3u32];\n    ternary r292 r293[0u32] r294[0u32] into r295;\n    ternary r292 r293[1u32] r294[1u32] into r296;\n    ternary r292 r293[2u32] r294[2u32] into r297;\n    cast r295 r296 r297 into r298 as [field; 3u32];\n    hash.psd4 r298 into r299 as field;\n    is.eq r8[1u32].siblings[10u32] 0field into r300;\n    shr r8[1u32].leaf_index 9u8 into r301;\n    and r301 1u32 into r302;\n    is.eq r302 0u32 into r303;\n    cast 0field r299 r8[1u32].siblings[10u32] into r304 as [field; 3u32];\n    cast 0field r8[1u32].siblings[10u32] r299 into r305 as [field; 3u32];\n    ternary r303 r304[0u32] r305[0u32] into r306;\n    ternary r303 r304[1u32] r305[1u32] into r307;\n    ternary r303 r304[2u32] r305[2u32] into r308;\n    cast r306 r307 r308 into r309 as [field; 3u32];\n    hash.psd4 r309 into r310 as field;\n    is.eq r8[1u32].siblings[11u32] 0field into r311;\n    shr r8[1u32].leaf_index 10u8 into r312;\n    and r312 1u32 into r313;\n    is.eq r313 0u32 into r314;\n    cast 0field r310 r8[1u32].siblings[11u32] into r315 as [field; 3u32];\n    cast 0field r8[1u32].siblings[11u32] r310 into r316 as [field; 3u32];\n    ternary r314 r315[0u32] r316[0u32] into r317;\n    ternary r314 r315[1u32] r316[1u32] into r318;\n    ternary r314 r315[2u32] r316[2u32] into r319;\n    cast r317 r318 r319 into r320 as [field; 3u32];\n    hash.psd4 r320 into r321 as field;\n    is.eq r8[1u32].siblings[12u32] 0field into r322;\n    shr r8[1u32].leaf_index 11u8 into r323;\n    and r323 1u32 into r324;\n    is.eq r324 0u32 into r325;\n    cast 0field r321 r8[1u32].siblings[12u32] into r326 as [field; 3u32];\n    cast 0field r8[1u32].siblings[12u32] r321 into r327 as [field; 3u32];\n    ternary r325 r326[0u32] r327[0u32] into r328;\n    ternary r325 r326[1u32] r327[1u32] into r329;\n    ternary r325 r326[2u32] r327[2u32] into r330;\n    cast r328 r329 r330 into r331 as [field; 3u32];\n    hash.psd4 r331 into r332 as field;\n    is.eq r8[1u32].siblings[13u32] 0field into r333;\n    shr r8[1u32].leaf_index 12u8 into r334;\n    and r334 1u32 into r335;\n    is.eq r335 0u32 into r336;\n    cast 0field r332 r8[1u32].siblings[13u32] into r337 as [field; 3u32];\n    cast 0field r8[1u32].siblings[13u32] r332 into r338 as [field; 3u32];\n    ternary r336 r337[0u32] r338[0u32] into r339;\n    ternary r336 r337[1u32] r338[1u32] into r340;\n    ternary r336 r337[2u32] r338[2u32] into r341;\n    cast r339 r340 r341 into r342 as [field; 3u32];\n    hash.psd4 r342 into r343 as field;\n    is.eq r8[1u32].siblings[14u32] 0field into r344;\n    shr r8[1u32].leaf_index 13u8 into r345;\n    and r345 1u32 into r346;\n    is.eq r346 0u32 into r347;\n    cast 0field r343 r8[1u32].siblings[14u32] into r348 as [field; 3u32];\n    cast 0field r8[1u32].siblings[14u32] r343 into r349 as [field; 3u32];\n    ternary r347 r348[0u32] r349[0u32] into r350;\n    ternary r347 r348[1u32] r349[1u32] into r351;\n    ternary r347 r348[2u32] r349[2u32] into r352;\n    cast r350 r351 r352 into r353 as [field; 3u32];\n    hash.psd4 r353 into r354 as field;\n    is.eq r8[1u32].siblings[15u32] 0field into r355;\n    shr r8[1u32].leaf_index 14u8 into r356;\n    and r356 1u32 into r357;\n    is.eq r357 0u32 into r358;\n    cast 0field r354 r8[1u32].siblings[15u32] into r359 as [field; 3u32];\n    cast 0field r8[1u32].siblings[15u32] r354 into r360 as [field; 3u32];\n    ternary r358 r359[0u32] r360[0u32] into r361;\n    ternary r358 r359[1u32] r360[1u32] into r362;\n    ternary r358 r359[2u32] r360[2u32] into r363;\n    cast r361 r362 r363 into r364 as [field; 3u32];\n    hash.psd4 r364 into r365 as field;\n    ternary r355 r354 r365 into r366;\n    ternary r355 14u8 15u8 into r367;\n    ternary r344 r343 r366 into r368;\n    ternary r344 13u8 r367 into r369;\n    ternary r333 r332 r368 into r370;\n    ternary r333 12u8 r369 into r371;\n    ternary r322 r321 r370 into r372;\n    ternary r322 11u8 r371 into r373;\n    ternary r311 r310 r372 into r374;\n    ternary r311 10u8 r373 into r375;\n    ternary r300 r299 r374 into r376;\n    ternary r300 9u8 r375 into r377;\n    ternary r289 r288 r376 into r378;\n    ternary r289 8u8 r377 into r379;\n    ternary r278 r277 r378 into r380;\n    ternary r278 7u8 r379 into r381;\n    ternary r267 r266 r380 into r382;\n    ternary r267 6u8 r381 into r383;\n    ternary r256 r255 r382 into r384;\n    ternary r256 5u8 r383 into r385;\n    ternary r245 r244 r384 into r386;\n    ternary r245 4u8 r385 into r387;\n    ternary r234 r233 r386 into r388;\n    ternary r234 3u8 r387 into r389;\n    ternary r223 r222 r388 into r390;\n    ternary r223 2u8 r389 into r391;\n    ternary r212 r211 r390 into r392;\n    ternary r212 1u8 r391 into r393;\n    assert.eq r201 r392;\n    assert.eq r202 r393;\n    cast self.signer into r394 as field;\n    lt r394 r8[0u32].siblings[0u32] into r395;\n    is.eq r394 r8[0u32].siblings[0u32] into r396;\n    nor r395 r396 into r397;\n    is.eq r8[0u32].leaf_index r8[1u32].leaf_index into r398;\n    is.eq r8[0u32].leaf_index 0u32 into r399;\n    and r398 r399 into r400;\n    not r400 into r401;\n    or r395 r401 into r402;\n    assert.eq r402 true;\n    not r399 into r403;\n    shl 1u32 r202 into r404;\n    sub r404 1u32 into r405;\n    and r398 r403 into r406;\n    not r406 into r407;\n    is.eq r8[0u32].leaf_index r405 into r408;\n    or r408 r407 into r409;\n    assert.eq r409 true;\n    or r397 r407 into r410;\n    assert.eq r410 true;\n    not r398 into r411;\n    not r411 into r412;\n    or r397 r412 into r413;\n    assert.eq r413 true;\n    lt r394 r8[1u32].siblings[0u32] into r414;\n    or r414 r412 into r415;\n    assert.eq r415 true;\n    lte r8[1u32].leaf_index r405 into r416;\n    or r416 r412 into r417;\n    assert.eq r417 true;\n    add r8[0u32].leaf_index 1u32 into r418;\n    is.eq r418 r8[1u32].leaf_index into r419;\n    or r419 r412 into r420;\n    assert.eq r420 true;\n    and r9[0u32].leaf_index 1u32 into r421;\n    is.eq r421 0u32 into r422;\n    cast 1field r9[0u32].siblings[0u32] r9[0u32].siblings[1u32] into r423 as [field; 3u32];\n    cast 1field r9[0u32].siblings[1u32] r9[0u32].siblings[0u32] into r424 as [field; 3u32];\n    ternary r422 r423[0u32] r424[0u32] into r425;\n    ternary r422 r423[1u32] r424[1u32] into r426;\n    ternary r422 r423[2u32] r424[2u32] into r427;\n    cast r425 r426 r427 into r428 as [field; 3u32];\n    hash.psd4 r428 into r429 as field;\n    is.eq r9[0u32].siblings[2u32] 0field into r430;\n    shr r9[0u32].leaf_index 1u8 into r431;\n    and r431 1u32 into r432;\n    is.eq r432 0u32 into r433;\n    cast 0field r429 r9[0u32].siblings[2u32] into r434 as [field; 3u32];\n    cast 0field r9[0u32].siblings[2u32] r429 into r435 as [field; 3u32];\n    ternary r433 r434[0u32] r435[0u32] into r436;\n    ternary r433 r434[1u32] r435[1u32] into r437;\n    ternary r433 r434[2u32] r435[2u32] into r438;\n    cast r436 r437 r438 into r439 as [field; 3u32];\n    hash.psd4 r439 into r440 as field;\n    is.eq r9[0u32].siblings[3u32] 0field into r441;\n    shr r9[0u32].leaf_index 2u8 into r442;\n    and r442 1u32 into r443;\n    is.eq r443 0u32 into r444;\n    cast 0field r440 r9[0u32].siblings[3u32] into r445 as [field; 3u32];\n    cast 0field r9[0u32].siblings[3u32] r440 into r446 as [field; 3u32];\n    ternary r444 r445[0u32] r446[0u32] into r447;\n    ternary r444 r445[1u32] r446[1u32] into r448;\n    ternary r444 r445[2u32] r446[2u32] into r449;\n    cast r447 r448 r449 into r450 as [field; 3u32];\n    hash.psd4 r450 into r451 as field;\n    is.eq r9[0u32].siblings[4u32] 0field into r452;\n    shr r9[0u32].leaf_index 3u8 into r453;\n    and r453 1u32 into r454;\n    is.eq r454 0u32 into r455;\n    cast 0field r451 r9[0u32].siblings[4u32] into r456 as [field; 3u32];\n    cast 0field r9[0u32].siblings[4u32] r451 into r457 as [field; 3u32];\n    ternary r455 r456[0u32] r457[0u32] into r458;\n    ternary r455 r456[1u32] r457[1u32] into r459;\n    ternary r455 r456[2u32] r457[2u32] into r460;\n    cast r458 r459 r460 into r461 as [field; 3u32];\n    hash.psd4 r461 into r462 as field;\n    is.eq r9[0u32].siblings[5u32] 0field into r463;\n    shr r9[0u32].leaf_index 4u8 into r464;\n    and r464 1u32 into r465;\n    is.eq r465 0u32 into r466;\n    cast 0field r462 r9[0u32].siblings[5u32] into r467 as [field; 3u32];\n    cast 0field r9[0u32].siblings[5u32] r462 into r468 as [field; 3u32];\n    ternary r466 r467[0u32] r468[0u32] into r469;\n    ternary r466 r467[1u32] r468[1u32] into r470;\n    ternary r466 r467[2u32] r468[2u32] into r471;\n    cast r469 r470 r471 into r472 as [field; 3u32];\n    hash.psd4 r472 into r473 as field;\n    is.eq r9[0u32].siblings[6u32] 0field into r474;\n    shr r9[0u32].leaf_index 5u8 into r475;\n    and r475 1u32 into r476;\n    is.eq r476 0u32 into r477;\n    cast 0field r473 r9[0u32].siblings[6u32] into r478 as [field; 3u32];\n    cast 0field r9[0u32].siblings[6u32] r473 into r479 as [field; 3u32];\n    ternary r477 r478[0u32] r479[0u32] into r480;\n    ternary r477 r478[1u32] r479[1u32] into r481;\n    ternary r477 r478[2u32] r479[2u32] into r482;\n    cast r480 r481 r482 into r483 as [field; 3u32];\n    hash.psd4 r483 into r484 as field;\n    is.eq r9[0u32].siblings[7u32] 0field into r485;\n    shr r9[0u32].leaf_index 6u8 into r486;\n    and r486 1u32 into r487;\n    is.eq r487 0u32 into r488;\n    cast 0field r484 r9[0u32].siblings[7u32] into r489 as [field; 3u32];\n    cast 0field r9[0u32].siblings[7u32] r484 into r490 as [field; 3u32];\n    ternary r488 r489[0u32] r490[0u32] into r491;\n    ternary r488 r489[1u32] r490[1u32] into r492;\n    ternary r488 r489[2u32] r490[2u32] into r493;\n    cast r491 r492 r493 into r494 as [field; 3u32];\n    hash.psd4 r494 into r495 as field;\n    is.eq r9[0u32].siblings[8u32] 0field into r496;\n    shr r9[0u32].leaf_index 7u8 into r497;\n    and r497 1u32 into r498;\n    is.eq r498 0u32 into r499;\n    cast 0field r495 r9[0u32].siblings[8u32] into r500 as [field; 3u32];\n    cast 0field r9[0u32].siblings[8u32] r495 into r501 as [field; 3u32];\n    ternary r499 r500[0u32] r501[0u32] into r502;\n    ternary r499 r500[1u32] r501[1u32] into r503;\n    ternary r499 r500[2u32] r501[2u32] into r504;\n    cast r502 r503 r504 into r505 as [field; 3u32];\n    hash.psd4 r505 into r506 as field;\n    is.eq r9[0u32].siblings[9u32] 0field into r507;\n    shr r9[0u32].leaf_index 8u8 into r508;\n    and r508 1u32 into r509;\n    is.eq r509 0u32 into r510;\n    cast 0field r506 r9[0u32].siblings[9u32] into r511 as [field; 3u32];\n    cast 0field r9[0u32].siblings[9u32] r506 into r512 as [field; 3u32];\n    ternary r510 r511[0u32] r512[0u32] into r513;\n    ternary r510 r511[1u32] r512[1u32] into r514;\n    ternary r510 r511[2u32] r512[2u32] into r515;\n    cast r513 r514 r515 into r516 as [field; 3u32];\n    hash.psd4 r516 into r517 as field;\n    is.eq r9[0u32].siblings[10u32] 0field into r518;\n    shr r9[0u32].leaf_index 9u8 into r519;\n    and r519 1u32 into r520;\n    is.eq r520 0u32 into r521;\n    cast 0field r517 r9[0u32].siblings[10u32] into r522 as [field; 3u32];\n    cast 0field r9[0u32].siblings[10u32] r517 into r523 as [field; 3u32];\n    ternary r521 r522[0u32] r523[0u32] into r524;\n    ternary r521 r522[1u32] r523[1u32] into r525;\n    ternary r521 r522[2u32] r523[2u32] into r526;\n    cast r524 r525 r526 into r527 as [field; 3u32];\n    hash.psd4 r527 into r528 as field;\n    is.eq r9[0u32].siblings[11u32] 0field into r529;\n    shr r9[0u32].leaf_index 10u8 into r530;\n    and r530 1u32 into r531;\n    is.eq r531 0u32 into r532;\n    cast 0field r528 r9[0u32].siblings[11u32] into r533 as [field; 3u32];\n    cast 0field r9[0u32].siblings[11u32] r528 into r534 as [field; 3u32];\n    ternary r532 r533[0u32] r534[0u32] into r535;\n    ternary r532 r533[1u32] r534[1u32] into r536;\n    ternary r532 r533[2u32] r534[2u32] into r537;\n    cast r535 r536 r537 into r538 as [field; 3u32];\n    hash.psd4 r538 into r539 as field;\n    is.eq r9[0u32].siblings[12u32] 0field into r540;\n    shr r9[0u32].leaf_index 11u8 into r541;\n    and r541 1u32 into r542;\n    is.eq r542 0u32 into r543;\n    cast 0field r539 r9[0u32].siblings[12u32] into r544 as [field; 3u32];\n    cast 0field r9[0u32].siblings[12u32] r539 into r545 as [field; 3u32];\n    ternary r543 r544[0u32] r545[0u32] into r546;\n    ternary r543 r544[1u32] r545[1u32] into r547;\n    ternary r543 r544[2u32] r545[2u32] into r548;\n    cast r546 r547 r548 into r549 as [field; 3u32];\n    hash.psd4 r549 into r550 as field;\n    is.eq r9[0u32].siblings[13u32] 0field into r551;\n    shr r9[0u32].leaf_index 12u8 into r552;\n    and r552 1u32 into r553;\n    is.eq r553 0u32 into r554;\n    cast 0field r550 r9[0u32].siblings[13u32] into r555 as [field; 3u32];\n    cast 0field r9[0u32].siblings[13u32] r550 into r556 as [field; 3u32];\n    ternary r554 r555[0u32] r556[0u32] into r557;\n    ternary r554 r555[1u32] r556[1u32] into r558;\n    ternary r554 r555[2u32] r556[2u32] into r559;\n    cast r557 r558 r559 into r560 as [field; 3u32];\n    hash.psd4 r560 into r561 as field;\n    is.eq r9[0u32].siblings[14u32] 0field into r562;\n    shr r9[0u32].leaf_index 13u8 into r563;\n    and r563 1u32 into r564;\n    is.eq r564 0u32 into r565;\n    cast 0field r561 r9[0u32].siblings[14u32] into r566 as [field; 3u32];\n    cast 0field r9[0u32].siblings[14u32] r561 into r567 as [field; 3u32];\n    ternary r565 r566[0u32] r567[0u32] into r568;\n    ternary r565 r566[1u32] r567[1u32] into r569;\n    ternary r565 r566[2u32] r567[2u32] into r570;\n    cast r568 r569 r570 into r571 as [field; 3u32];\n    hash.psd4 r571 into r572 as field;\n    is.eq r9[0u32].siblings[15u32] 0field into r573;\n    shr r9[0u32].leaf_index 14u8 into r574;\n    and r574 1u32 into r575;\n    is.eq r575 0u32 into r576;\n    cast 0field r572 r9[0u32].siblings[15u32] into r577 as [field; 3u32];\n    cast 0field r9[0u32].siblings[15u32] r572 into r578 as [field; 3u32];\n    ternary r576 r577[0u32] r578[0u32] into r579;\n    ternary r576 r577[1u32] r578[1u32] into r580;\n    ternary r576 r577[2u32] r578[2u32] into r581;\n    cast r579 r580 r581 into r582 as [field; 3u32];\n    hash.psd4 r582 into r583 as field;\n    ternary r573 r572 r583 into r584;\n    ternary r573 14u8 15u8 into r585;\n    ternary r562 r561 r584 into r586;\n    ternary r562 13u8 r585 into r587;\n    ternary r551 r550 r586 into r588;\n    ternary r551 12u8 r587 into r589;\n    ternary r540 r539 r588 into r590;\n    ternary r540 11u8 r589 into r591;\n    ternary r529 r528 r590 into r592;\n    ternary r529 10u8 r591 into r593;\n    ternary r518 r517 r592 into r594;\n    ternary r518 9u8 r593 into r595;\n    ternary r507 r506 r594 into r596;\n    ternary r507 8u8 r595 into r597;\n    ternary r496 r495 r596 into r598;\n    ternary r496 7u8 r597 into r599;\n    ternary r485 r484 r598 into r600;\n    ternary r485 6u8 r599 into r601;\n    ternary r474 r473 r600 into r602;\n    ternary r474 5u8 r601 into r603;\n    ternary r463 r462 r602 into r604;\n    ternary r463 4u8 r603 into r605;\n    ternary r452 r451 r604 into r606;\n    ternary r452 3u8 r605 into r607;\n    ternary r441 r440 r606 into r608;\n    ternary r441 2u8 r607 into r609;\n    ternary r430 r429 r608 into r610;\n    ternary r430 1u8 r609 into r611;\n    and r9[1u32].leaf_index 1u32 into r612;\n    is.eq r612 0u32 into r613;\n    cast 1field r9[1u32].siblings[0u32] r9[1u32].siblings[1u32] into r614 as [field; 3u32];\n    cast 1field r9[1u32].siblings[1u32] r9[1u32].siblings[0u32] into r615 as [field; 3u32];\n    ternary r613 r614[0u32] r615[0u32] into r616;\n    ternary r613 r614[1u32] r615[1u32] into r617;\n    ternary r613 r614[2u32] r615[2u32] into r618;\n    cast r616 r617 r618 into r619 as [field; 3u32];\n    hash.psd4 r619 into r620 as field;\n    is.eq r9[1u32].siblings[2u32] 0field into r621;\n    shr r9[1u32].leaf_index 1u8 into r622;\n    and r622 1u32 into r623;\n    is.eq r623 0u32 into r624;\n    cast 0field r620 r9[1u32].siblings[2u32] into r625 as [field; 3u32];\n    cast 0field r9[1u32].siblings[2u32] r620 into r626 as [field; 3u32];\n    ternary r624 r625[0u32] r626[0u32] into r627;\n    ternary r624 r625[1u32] r626[1u32] into r628;\n    ternary r624 r625[2u32] r626[2u32] into r629;\n    cast r627 r628 r629 into r630 as [field; 3u32];\n    hash.psd4 r630 into r631 as field;\n    is.eq r9[1u32].siblings[3u32] 0field into r632;\n    shr r9[1u32].leaf_index 2u8 into r633;\n    and r633 1u32 into r634;\n    is.eq r634 0u32 into r635;\n    cast 0field r631 r9[1u32].siblings[3u32] into r636 as [field; 3u32];\n    cast 0field r9[1u32].siblings[3u32] r631 into r637 as [field; 3u32];\n    ternary r635 r636[0u32] r637[0u32] into r638;\n    ternary r635 r636[1u32] r637[1u32] into r639;\n    ternary r635 r636[2u32] r637[2u32] into r640;\n    cast r638 r639 r640 into r641 as [field; 3u32];\n    hash.psd4 r641 into r642 as field;\n    is.eq r9[1u32].siblings[4u32] 0field into r643;\n    shr r9[1u32].leaf_index 3u8 into r644;\n    and r644 1u32 into r645;\n    is.eq r645 0u32 into r646;\n    cast 0field r642 r9[1u32].siblings[4u32] into r647 as [field; 3u32];\n    cast 0field r9[1u32].siblings[4u32] r642 into r648 as [field; 3u32];\n    ternary r646 r647[0u32] r648[0u32] into r649;\n    ternary r646 r647[1u32] r648[1u32] into r650;\n    ternary r646 r647[2u32] r648[2u32] into r651;\n    cast r649 r650 r651 into r652 as [field; 3u32];\n    hash.psd4 r652 into r653 as field;\n    is.eq r9[1u32].siblings[5u32] 0field into r654;\n    shr r9[1u32].leaf_index 4u8 into r655;\n    and r655 1u32 into r656;\n    is.eq r656 0u32 into r657;\n    cast 0field r653 r9[1u32].siblings[5u32] into r658 as [field; 3u32];\n    cast 0field r9[1u32].siblings[5u32] r653 into r659 as [field; 3u32];\n    ternary r657 r658[0u32] r659[0u32] into r660;\n    ternary r657 r658[1u32] r659[1u32] into r661;\n    ternary r657 r658[2u32] r659[2u32] into r662;\n    cast r660 r661 r662 into r663 as [field; 3u32];\n    hash.psd4 r663 into r664 as field;\n    is.eq r9[1u32].siblings[6u32] 0field into r665;\n    shr r9[1u32].leaf_index 5u8 into r666;\n    and r666 1u32 into r667;\n    is.eq r667 0u32 into r668;\n    cast 0field r664 r9[1u32].siblings[6u32] into r669 as [field; 3u32];\n    cast 0field r9[1u32].siblings[6u32] r664 into r670 as [field; 3u32];\n    ternary r668 r669[0u32] r670[0u32] into r671;\n    ternary r668 r669[1u32] r670[1u32] into r672;\n    ternary r668 r669[2u32] r670[2u32] into r673;\n    cast r671 r672 r673 into r674 as [field; 3u32];\n    hash.psd4 r674 into r675 as field;\n    is.eq r9[1u32].siblings[7u32] 0field into r676;\n    shr r9[1u32].leaf_index 6u8 into r677;\n    and r677 1u32 into r678;\n    is.eq r678 0u32 into r679;\n    cast 0field r675 r9[1u32].siblings[7u32] into r680 as [field; 3u32];\n    cast 0field r9[1u32].siblings[7u32] r675 into r681 as [field; 3u32];\n    ternary r679 r680[0u32] r681[0u32] into r682;\n    ternary r679 r680[1u32] r681[1u32] into r683;\n    ternary r679 r680[2u32] r681[2u32] into r684;\n    cast r682 r683 r684 into r685 as [field; 3u32];\n    hash.psd4 r685 into r686 as field;\n    is.eq r9[1u32].siblings[8u32] 0field into r687;\n    shr r9[1u32].leaf_index 7u8 into r688;\n    and r688 1u32 into r689;\n    is.eq r689 0u32 into r690;\n    cast 0field r686 r9[1u32].siblings[8u32] into r691 as [field; 3u32];\n    cast 0field r9[1u32].siblings[8u32] r686 into r692 as [field; 3u32];\n    ternary r690 r691[0u32] r692[0u32] into r693;\n    ternary r690 r691[1u32] r692[1u32] into r694;\n    ternary r690 r691[2u32] r692[2u32] into r695;\n    cast r693 r694 r695 into r696 as [field; 3u32];\n    hash.psd4 r696 into r697 as field;\n    is.eq r9[1u32].siblings[9u32] 0field into r698;\n    shr r9[1u32].leaf_index 8u8 into r699;\n    and r699 1u32 into r700;\n    is.eq r700 0u32 into r701;\n    cast 0field r697 r9[1u32].siblings[9u32] into r702 as [field; 3u32];\n    cast 0field r9[1u32].siblings[9u32] r697 into r703 as [field; 3u32];\n    ternary r701 r702[0u32] r703[0u32] into r704;\n    ternary r701 r702[1u32] r703[1u32] into r705;\n    ternary r701 r702[2u32] r703[2u32] into r706;\n    cast r704 r705 r706 into r707 as [field; 3u32];\n    hash.psd4 r707 into r708 as field;\n    is.eq r9[1u32].siblings[10u32] 0field into r709;\n    shr r9[1u32].leaf_index 9u8 into r710;\n    and r710 1u32 into r711;\n    is.eq r711 0u32 into r712;\n    cast 0field r708 r9[1u32].siblings[10u32] into r713 as [field; 3u32];\n    cast 0field r9[1u32].siblings[10u32] r708 into r714 as [field; 3u32];\n    ternary r712 r713[0u32] r714[0u32] into r715;\n    ternary r712 r713[1u32] r714[1u32] into r716;\n    ternary r712 r713[2u32] r714[2u32] into r717;\n    cast r715 r716 r717 into r718 as [field; 3u32];\n    hash.psd4 r718 into r719 as field;\n    is.eq r9[1u32].siblings[11u32] 0field into r720;\n    shr r9[1u32].leaf_index 10u8 into r721;\n    and r721 1u32 into r722;\n    is.eq r722 0u32 into r723;\n    cast 0field r719 r9[1u32].siblings[11u32] into r724 as [field; 3u32];\n    cast 0field r9[1u32].siblings[11u32] r719 into r725 as [field; 3u32];\n    ternary r723 r724[0u32] r725[0u32] into r726;\n    ternary r723 r724[1u32] r725[1u32] into r727;\n    ternary r723 r724[2u32] r725[2u32] into r728;\n    cast r726 r727 r728 into r729 as [field; 3u32];\n    hash.psd4 r729 into r730 as field;\n    is.eq r9[1u32].siblings[12u32] 0field into r731;\n    shr r9[1u32].leaf_index 11u8 into r732;\n    and r732 1u32 into r733;\n    is.eq r733 0u32 into r734;\n    cast 0field r730 r9[1u32].siblings[12u32] into r735 as [field; 3u32];\n    cast 0field r9[1u32].siblings[12u32] r730 into r736 as [field; 3u32];\n    ternary r734 r735[0u32] r736[0u32] into r737;\n    ternary r734 r735[1u32] r736[1u32] into r738;\n    ternary r734 r735[2u32] r736[2u32] into r739;\n    cast r737 r738 r739 into r740 as [field; 3u32];\n    hash.psd4 r740 into r741 as field;\n    is.eq r9[1u32].siblings[13u32] 0field into r742;\n    shr r9[1u32].leaf_index 12u8 into r743;\n    and r743 1u32 into r744;\n    is.eq r744 0u32 into r745;\n    cast 0field r741 r9[1u32].siblings[13u32] into r746 as [field; 3u32];\n    cast 0field r9[1u32].siblings[13u32] r741 into r747 as [field; 3u32];\n    ternary r745 r746[0u32] r747[0u32] into r748;\n    ternary r745 r746[1u32] r747[1u32] into r749;\n    ternary r745 r746[2u32] r747[2u32] into r750;\n    cast r748 r749 r750 into r751 as [field; 3u32];\n    hash.psd4 r751 into r752 as field;\n    is.eq r9[1u32].siblings[14u32] 0field into r753;\n    shr r9[1u32].leaf_index 13u8 into r754;\n    and r754 1u32 into r755;\n    is.eq r755 0u32 into r756;\n    cast 0field r752 r9[1u32].siblings[14u32] into r757 as [field; 3u32];\n    cast 0field r9[1u32].siblings[14u32] r752 into r758 as [field; 3u32];\n    ternary r756 r757[0u32] r758[0u32] into r759;\n    ternary r756 r757[1u32] r758[1u32] into r760;\n    ternary r756 r757[2u32] r758[2u32] into r761;\n    cast r759 r760 r761 into r762 as [field; 3u32];\n    hash.psd4 r762 into r763 as field;\n    is.eq r9[1u32].siblings[15u32] 0field into r764;\n    shr r9[1u32].leaf_index 14u8 into r765;\n    and r765 1u32 into r766;\n    is.eq r766 0u32 into r767;\n    cast 0field r763 r9[1u32].siblings[15u32] into r768 as [field; 3u32];\n    cast 0field r9[1u32].siblings[15u32] r763 into r769 as [field; 3u32];\n    ternary r767 r768[0u32] r769[0u32] into r770;\n    ternary r767 r768[1u32] r769[1u32] into r771;\n    ternary r767 r768[2u32] r769[2u32] into r772;\n    cast r770 r771 r772 into r773 as [field; 3u32];\n    hash.psd4 r773 into r774 as field;\n    ternary r764 r763 r774 into r775;\n    ternary r764 14u8 15u8 into r776;\n    ternary r753 r752 r775 into r777;\n    ternary r753 13u8 r776 into r778;\n    ternary r742 r741 r777 into r779;\n    ternary r742 12u8 r778 into r780;\n    ternary r731 r730 r779 into r781;\n    ternary r731 11u8 r780 into r782;\n    ternary r720 r719 r781 into r783;\n    ternary r720 10u8 r782 into r784;\n    ternary r709 r708 r783 into r785;\n    ternary r709 9u8 r784 into r786;\n    ternary r698 r697 r785 into r787;\n    ternary r698 8u8 r786 into r788;\n    ternary r687 r686 r787 into r789;\n    ternary r687 7u8 r788 into r790;\n    ternary r676 r675 r789 into r791;\n    ternary r676 6u8 r790 into r792;\n    ternary r665 r664 r791 into r793;\n    ternary r665 5u8 r792 into r794;\n    ternary r654 r653 r793 into r795;\n    ternary r654 4u8 r794 into r796;\n    ternary r643 r642 r795 into r797;\n    ternary r643 3u8 r796 into r798;\n    ternary r632 r631 r797 into r799;\n    ternary r632 2u8 r798 into r800;\n    ternary r621 r620 r799 into r801;\n    ternary r621 1u8 r800 into r802;\n    assert.eq r610 r801;\n    assert.eq r611 r802;\n    cast r3 into r803 as field;\n    lt r803 r9[0u32].siblings[0u32] into r804;\n    is.eq r803 r9[0u32].siblings[0u32] into r805;\n    nor r804 r805 into r806;\n    is.eq r9[0u32].leaf_index r9[1u32].leaf_index into r807;\n    is.eq r9[0u32].leaf_index 0u32 into r808;\n    and r807 r808 into r809;\n    not r809 into r810;\n    or r804 r810 into r811;\n    assert.eq r811 true;\n    not r808 into r812;\n    shl 1u32 r611 into r813;\n    sub r813 1u32 into r814;\n    and r807 r812 into r815;\n    not r815 into r816;\n    is.eq r9[0u32].leaf_index r814 into r817;\n    or r817 r816 into r818;\n    assert.eq r818 true;\n    or r806 r816 into r819;\n    assert.eq r819 true;\n    not r807 into r820;\n    not r820 into r821;\n    or r806 r821 into r822;\n    assert.eq r822 true;\n    lt r803 r9[1u32].siblings[0u32] into r823;\n    or r823 r821 into r824;\n    assert.eq r824 true;\n    lte r9[1u32].leaf_index r814 into r825;\n    or r825 r821 into r826;\n    assert.eq r826 true;\n    add r9[0u32].leaf_index 1u32 into r827;\n    is.eq r827 r9[1u32].leaf_index into r828;\n    or r828 r821 into r829;\n    assert.eq r829 true;\n    and r10[0u32].leaf_index 1u32 into r830;\n    is.eq r830 0u32 into r831;\n    cast 1field r10[0u32].siblings[0u32] r10[0u32].siblings[1u32] into r832 as [field; 3u32];\n    cast 1field r10[0u32].siblings[1u32] r10[0u32].siblings[0u32] into r833 as [field; 3u32];\n    ternary r831 r832[0u32] r833[0u32] into r834;\n    ternary r831 r832[1u32] r833[1u32] into r835;\n    ternary r831 r832[2u32] r833[2u32] into r836;\n    cast r834 r835 r836 into r837 as [field; 3u32];\n    hash.psd4 r837 into r838 as field;\n    is.eq r10[0u32].siblings[2u32] 0field into r839;\n    shr r10[0u32].leaf_index 1u8 into r840;\n    and r840 1u32 into r841;\n    is.eq r841 0u32 into r842;\n    cast 0field r838 r10[0u32].siblings[2u32] into r843 as [field; 3u32];\n    cast 0field r10[0u32].siblings[2u32] r838 into r844 as [field; 3u32];\n    ternary r842 r843[0u32] r844[0u32] into r845;\n    ternary r842 r843[1u32] r844[1u32] into r846;\n    ternary r842 r843[2u32] r844[2u32] into r847;\n    cast r845 r846 r847 into r848 as [field; 3u32];\n    hash.psd4 r848 into r849 as field;\n    is.eq r10[0u32].siblings[3u32] 0field into r850;\n    shr r10[0u32].leaf_index 2u8 into r851;\n    and r851 1u32 into r852;\n    is.eq r852 0u32 into r853;\n    cast 0field r849 r10[0u32].siblings[3u32] into r854 as [field; 3u32];\n    cast 0field r10[0u32].siblings[3u32] r849 into r855 as [field; 3u32];\n    ternary r853 r854[0u32] r855[0u32] into r856;\n    ternary r853 r854[1u32] r855[1u32] into r857;\n    ternary r853 r854[2u32] r855[2u32] into r858;\n    cast r856 r857 r858 into r859 as [field; 3u32];\n    hash.psd4 r859 into r860 as field;\n    is.eq r10[0u32].siblings[4u32] 0field into r861;\n    shr r10[0u32].leaf_index 3u8 into r862;\n    and r862 1u32 into r863;\n    is.eq r863 0u32 into r864;\n    cast 0field r860 r10[0u32].siblings[4u32] into r865 as [field; 3u32];\n    cast 0field r10[0u32].siblings[4u32] r860 into r866 as [field; 3u32];\n    ternary r864 r865[0u32] r866[0u32] into r867;\n    ternary r864 r865[1u32] r866[1u32] into r868;\n    ternary r864 r865[2u32] r866[2u32] into r869;\n    cast r867 r868 r869 into r870 as [field; 3u32];\n    hash.psd4 r870 into r871 as field;\n    is.eq r10[0u32].siblings[5u32] 0field into r872;\n    shr r10[0u32].leaf_index 4u8 into r873;\n    and r873 1u32 into r874;\n    is.eq r874 0u32 into r875;\n    cast 0field r871 r10[0u32].siblings[5u32] into r876 as [field; 3u32];\n    cast 0field r10[0u32].siblings[5u32] r871 into r877 as [field; 3u32];\n    ternary r875 r876[0u32] r877[0u32] into r878;\n    ternary r875 r876[1u32] r877[1u32] into r879;\n    ternary r875 r876[2u32] r877[2u32] into r880;\n    cast r878 r879 r880 into r881 as [field; 3u32];\n    hash.psd4 r881 into r882 as field;\n    is.eq r10[0u32].siblings[6u32] 0field into r883;\n    shr r10[0u32].leaf_index 5u8 into r884;\n    and r884 1u32 into r885;\n    is.eq r885 0u32 into r886;\n    cast 0field r882 r10[0u32].siblings[6u32] into r887 as [field; 3u32];\n    cast 0field r10[0u32].siblings[6u32] r882 into r888 as [field; 3u32];\n    ternary r886 r887[0u32] r888[0u32] into r889;\n    ternary r886 r887[1u32] r888[1u32] into r890;\n    ternary r886 r887[2u32] r888[2u32] into r891;\n    cast r889 r890 r891 into r892 as [field; 3u32];\n    hash.psd4 r892 into r893 as field;\n    is.eq r10[0u32].siblings[7u32] 0field into r894;\n    shr r10[0u32].leaf_index 6u8 into r895;\n    and r895 1u32 into r896;\n    is.eq r896 0u32 into r897;\n    cast 0field r893 r10[0u32].siblings[7u32] into r898 as [field; 3u32];\n    cast 0field r10[0u32].siblings[7u32] r893 into r899 as [field; 3u32];\n    ternary r897 r898[0u32] r899[0u32] into r900;\n    ternary r897 r898[1u32] r899[1u32] into r901;\n    ternary r897 r898[2u32] r899[2u32] into r902;\n    cast r900 r901 r902 into r903 as [field; 3u32];\n    hash.psd4 r903 into r904 as field;\n    is.eq r10[0u32].siblings[8u32] 0field into r905;\n    shr r10[0u32].leaf_index 7u8 into r906;\n    and r906 1u32 into r907;\n    is.eq r907 0u32 into r908;\n    cast 0field r904 r10[0u32].siblings[8u32] into r909 as [field; 3u32];\n    cast 0field r10[0u32].siblings[8u32] r904 into r910 as [field; 3u32];\n    ternary r908 r909[0u32] r910[0u32] into r911;\n    ternary r908 r909[1u32] r910[1u32] into r912;\n    ternary r908 r909[2u32] r910[2u32] into r913;\n    cast r911 r912 r913 into r914 as [field; 3u32];\n    hash.psd4 r914 into r915 as field;\n    is.eq r10[0u32].siblings[9u32] 0field into r916;\n    shr r10[0u32].leaf_index 8u8 into r917;\n    and r917 1u32 into r918;\n    is.eq r918 0u32 into r919;\n    cast 0field r915 r10[0u32].siblings[9u32] into r920 as [field; 3u32];\n    cast 0field r10[0u32].siblings[9u32] r915 into r921 as [field; 3u32];\n    ternary r919 r920[0u32] r921[0u32] into r922;\n    ternary r919 r920[1u32] r921[1u32] into r923;\n    ternary r919 r920[2u32] r921[2u32] into r924;\n    cast r922 r923 r924 into r925 as [field; 3u32];\n    hash.psd4 r925 into r926 as field;\n    is.eq r10[0u32].siblings[10u32] 0field into r927;\n    shr r10[0u32].leaf_index 9u8 into r928;\n    and r928 1u32 into r929;\n    is.eq r929 0u32 into r930;\n    cast 0field r926 r10[0u32].siblings[10u32] into r931 as [field; 3u32];\n    cast 0field r10[0u32].siblings[10u32] r926 into r932 as [field; 3u32];\n    ternary r930 r931[0u32] r932[0u32] into r933;\n    ternary r930 r931[1u32] r932[1u32] into r934;\n    ternary r930 r931[2u32] r932[2u32] into r935;\n    cast r933 r934 r935 into r936 as [field; 3u32];\n    hash.psd4 r936 into r937 as field;\n    is.eq r10[0u32].siblings[11u32] 0field into r938;\n    shr r10[0u32].leaf_index 10u8 into r939;\n    and r939 1u32 into r940;\n    is.eq r940 0u32 into r941;\n    cast 0field r937 r10[0u32].siblings[11u32] into r942 as [field; 3u32];\n    cast 0field r10[0u32].siblings[11u32] r937 into r943 as [field; 3u32];\n    ternary r941 r942[0u32] r943[0u32] into r944;\n    ternary r941 r942[1u32] r943[1u32] into r945;\n    ternary r941 r942[2u32] r943[2u32] into r946;\n    cast r944 r945 r946 into r947 as [field; 3u32];\n    hash.psd4 r947 into r948 as field;\n    is.eq r10[0u32].siblings[12u32] 0field into r949;\n    shr r10[0u32].leaf_index 11u8 into r950;\n    and r950 1u32 into r951;\n    is.eq r951 0u32 into r952;\n    cast 0field r948 r10[0u32].siblings[12u32] into r953 as [field; 3u32];\n    cast 0field r10[0u32].siblings[12u32] r948 into r954 as [field; 3u32];\n    ternary r952 r953[0u32] r954[0u32] into r955;\n    ternary r952 r953[1u32] r954[1u32] into r956;\n    ternary r952 r953[2u32] r954[2u32] into r957;\n    cast r955 r956 r957 into r958 as [field; 3u32];\n    hash.psd4 r958 into r959 as field;\n    is.eq r10[0u32].siblings[13u32] 0field into r960;\n    shr r10[0u32].leaf_index 12u8 into r961;\n    and r961 1u32 into r962;\n    is.eq r962 0u32 into r963;\n    cast 0field r959 r10[0u32].siblings[13u32] into r964 as [field; 3u32];\n    cast 0field r10[0u32].siblings[13u32] r959 into r965 as [field; 3u32];\n    ternary r963 r964[0u32] r965[0u32] into r966;\n    ternary r963 r964[1u32] r965[1u32] into r967;\n    ternary r963 r964[2u32] r965[2u32] into r968;\n    cast r966 r967 r968 into r969 as [field; 3u32];\n    hash.psd4 r969 into r970 as field;\n    is.eq r10[0u32].siblings[14u32] 0field into r971;\n    shr r10[0u32].leaf_index 13u8 into r972;\n    and r972 1u32 into r973;\n    is.eq r973 0u32 into r974;\n    cast 0field r970 r10[0u32].siblings[14u32] into r975 as [field; 3u32];\n    cast 0field r10[0u32].siblings[14u32] r970 into r976 as [field; 3u32];\n    ternary r974 r975[0u32] r976[0u32] into r977;\n    ternary r974 r975[1u32] r976[1u32] into r978;\n    ternary r974 r975[2u32] r976[2u32] into r979;\n    cast r977 r978 r979 into r980 as [field; 3u32];\n    hash.psd4 r980 into r981 as field;\n    is.eq r10[0u32].siblings[15u32] 0field into r982;\n    shr r10[0u32].leaf_index 14u8 into r983;\n    and r983 1u32 into r984;\n    is.eq r984 0u32 into r985;\n    cast 0field r981 r10[0u32].siblings[15u32] into r986 as [field; 3u32];\n    cast 0field r10[0u32].siblings[15u32] r981 into r987 as [field; 3u32];\n    ternary r985 r986[0u32] r987[0u32] into r988;\n    ternary r985 r986[1u32] r987[1u32] into r989;\n    ternary r985 r986[2u32] r987[2u32] into r990;\n    cast r988 r989 r990 into r991 as [field; 3u32];\n    hash.psd4 r991 into r992 as field;\n    ternary r982 r981 r992 into r993;\n    ternary r982 14u8 15u8 into r994;\n    ternary r971 r970 r993 into r995;\n    ternary r971 13u8 r994 into r996;\n    ternary r960 r959 r995 into r997;\n    ternary r960 12u8 r996 into r998;\n    ternary r949 r948 r997 into r999;\n    ternary r949 11u8 r998 into r1000;\n    ternary r938 r937 r999 into r1001;\n    ternary r938 10u8 r1000 into r1002;\n    ternary r927 r926 r1001 into r1003;\n    ternary r927 9u8 r1002 into r1004;\n    ternary r916 r915 r1003 into r1005;\n    ternary r916 8u8 r1004 into r1006;\n    ternary r905 r904 r1005 into r1007;\n    ternary r905 7u8 r1006 into r1008;\n    ternary r894 r893 r1007 into r1009;\n    ternary r894 6u8 r1008 into r1010;\n    ternary r883 r882 r1009 into r1011;\n    ternary r883 5u8 r1010 into r1012;\n    ternary r872 r871 r1011 into r1013;\n    ternary r872 4u8 r1012 into r1014;\n    ternary r861 r860 r1013 into r1015;\n    ternary r861 3u8 r1014 into r1016;\n    ternary r850 r849 r1015 into r1017;\n    ternary r850 2u8 r1016 into r1018;\n    ternary r839 r838 r1017 into r1019;\n    ternary r839 1u8 r1018 into r1020;\n    and r10[1u32].leaf_index 1u32 into r1021;\n    is.eq r1021 0u32 into r1022;\n    cast 1field r10[1u32].siblings[0u32] r10[1u32].siblings[1u32] into r1023 as [field; 3u32];\n    cast 1field r10[1u32].siblings[1u32] r10[1u32].siblings[0u32] into r1024 as [field; 3u32];\n    ternary r1022 r1023[0u32] r1024[0u32] into r1025;\n    ternary r1022 r1023[1u32] r1024[1u32] into r1026;\n    ternary r1022 r1023[2u32] r1024[2u32] into r1027;\n    cast r1025 r1026 r1027 into r1028 as [field; 3u32];\n    hash.psd4 r1028 into r1029 as field;\n    is.eq r10[1u32].siblings[2u32] 0field into r1030;\n    shr r10[1u32].leaf_index 1u8 into r1031;\n    and r1031 1u32 into r1032;\n    is.eq r1032 0u32 into r1033;\n    cast 0field r1029 r10[1u32].siblings[2u32] into r1034 as [field; 3u32];\n    cast 0field r10[1u32].siblings[2u32] r1029 into r1035 as [field; 3u32];\n    ternary r1033 r1034[0u32] r1035[0u32] into r1036;\n    ternary r1033 r1034[1u32] r1035[1u32] into r1037;\n    ternary r1033 r1034[2u32] r1035[2u32] into r1038;\n    cast r1036 r1037 r1038 into r1039 as [field; 3u32];\n    hash.psd4 r1039 into r1040 as field;\n    is.eq r10[1u32].siblings[3u32] 0field into r1041;\n    shr r10[1u32].leaf_index 2u8 into r1042;\n    and r1042 1u32 into r1043;\n    is.eq r1043 0u32 into r1044;\n    cast 0field r1040 r10[1u32].siblings[3u32] into r1045 as [field; 3u32];\n    cast 0field r10[1u32].siblings[3u32] r1040 into r1046 as [field; 3u32];\n    ternary r1044 r1045[0u32] r1046[0u32] into r1047;\n    ternary r1044 r1045[1u32] r1046[1u32] into r1048;\n    ternary r1044 r1045[2u32] r1046[2u32] into r1049;\n    cast r1047 r1048 r1049 into r1050 as [field; 3u32];\n    hash.psd4 r1050 into r1051 as field;\n    is.eq r10[1u32].siblings[4u32] 0field into r1052;\n    shr r10[1u32].leaf_index 3u8 into r1053;\n    and r1053 1u32 into r1054;\n    is.eq r1054 0u32 into r1055;\n    cast 0field r1051 r10[1u32].siblings[4u32] into r1056 as [field; 3u32];\n    cast 0field r10[1u32].siblings[4u32] r1051 into r1057 as [field; 3u32];\n    ternary r1055 r1056[0u32] r1057[0u32] into r1058;\n    ternary r1055 r1056[1u32] r1057[1u32] into r1059;\n    ternary r1055 r1056[2u32] r1057[2u32] into r1060;\n    cast r1058 r1059 r1060 into r1061 as [field; 3u32];\n    hash.psd4 r1061 into r1062 as field;\n    is.eq r10[1u32].siblings[5u32] 0field into r1063;\n    shr r10[1u32].leaf_index 4u8 into r1064;\n    and r1064 1u32 into r1065;\n    is.eq r1065 0u32 into r1066;\n    cast 0field r1062 r10[1u32].siblings[5u32] into r1067 as [field; 3u32];\n    cast 0field r10[1u32].siblings[5u32] r1062 into r1068 as [field; 3u32];\n    ternary r1066 r1067[0u32] r1068[0u32] into r1069;\n    ternary r1066 r1067[1u32] r1068[1u32] into r1070;\n    ternary r1066 r1067[2u32] r1068[2u32] into r1071;\n    cast r1069 r1070 r1071 into r1072 as [field; 3u32];\n    hash.psd4 r1072 into r1073 as field;\n    is.eq r10[1u32].siblings[6u32] 0field into r1074;\n    shr r10[1u32].leaf_index 5u8 into r1075;\n    and r1075 1u32 into r1076;\n    is.eq r1076 0u32 into r1077;\n    cast 0field r1073 r10[1u32].siblings[6u32] into r1078 as [field; 3u32];\n    cast 0field r10[1u32].siblings[6u32] r1073 into r1079 as [field; 3u32];\n    ternary r1077 r1078[0u32] r1079[0u32] into r1080;\n    ternary r1077 r1078[1u32] r1079[1u32] into r1081;\n    ternary r1077 r1078[2u32] r1079[2u32] into r1082;\n    cast r1080 r1081 r1082 into r1083 as [field; 3u32];\n    hash.psd4 r1083 into r1084 as field;\n    is.eq r10[1u32].siblings[7u32] 0field into r1085;\n    shr r10[1u32].leaf_index 6u8 into r1086;\n    and r1086 1u32 into r1087;\n    is.eq r1087 0u32 into r1088;\n    cast 0field r1084 r10[1u32].siblings[7u32] into r1089 as [field; 3u32];\n    cast 0field r10[1u32].siblings[7u32] r1084 into r1090 as [field; 3u32];\n    ternary r1088 r1089[0u32] r1090[0u32] into r1091;\n    ternary r1088 r1089[1u32] r1090[1u32] into r1092;\n    ternary r1088 r1089[2u32] r1090[2u32] into r1093;\n    cast r1091 r1092 r1093 into r1094 as [field; 3u32];\n    hash.psd4 r1094 into r1095 as field;\n    is.eq r10[1u32].siblings[8u32] 0field into r1096;\n    shr r10[1u32].leaf_index 7u8 into r1097;\n    and r1097 1u32 into r1098;\n    is.eq r1098 0u32 into r1099;\n    cast 0field r1095 r10[1u32].siblings[8u32] into r1100 as [field; 3u32];\n    cast 0field r10[1u32].siblings[8u32] r1095 into r1101 as [field; 3u32];\n    ternary r1099 r1100[0u32] r1101[0u32] into r1102;\n    ternary r1099 r1100[1u32] r1101[1u32] into r1103;\n    ternary r1099 r1100[2u32] r1101[2u32] into r1104;\n    cast r1102 r1103 r1104 into r1105 as [field; 3u32];\n    hash.psd4 r1105 into r1106 as field;\n    is.eq r10[1u32].siblings[9u32] 0field into r1107;\n    shr r10[1u32].leaf_index 8u8 into r1108;\n    and r1108 1u32 into r1109;\n    is.eq r1109 0u32 into r1110;\n    cast 0field r1106 r10[1u32].siblings[9u32] into r1111 as [field; 3u32];\n    cast 0field r10[1u32].siblings[9u32] r1106 into r1112 as [field; 3u32];\n    ternary r1110 r1111[0u32] r1112[0u32] into r1113;\n    ternary r1110 r1111[1u32] r1112[1u32] into r1114;\n    ternary r1110 r1111[2u32] r1112[2u32] into r1115;\n    cast r1113 r1114 r1115 into r1116 as [field; 3u32];\n    hash.psd4 r1116 into r1117 as field;\n    is.eq r10[1u32].siblings[10u32] 0field into r1118;\n    shr r10[1u32].leaf_index 9u8 into r1119;\n    and r1119 1u32 into r1120;\n    is.eq r1120 0u32 into r1121;\n    cast 0field r1117 r10[1u32].siblings[10u32] into r1122 as [field; 3u32];\n    cast 0field r10[1u32].siblings[10u32] r1117 into r1123 as [field; 3u32];\n    ternary r1121 r1122[0u32] r1123[0u32] into r1124;\n    ternary r1121 r1122[1u32] r1123[1u32] into r1125;\n    ternary r1121 r1122[2u32] r1123[2u32] into r1126;\n    cast r1124 r1125 r1126 into r1127 as [field; 3u32];\n    hash.psd4 r1127 into r1128 as field;\n    is.eq r10[1u32].siblings[11u32] 0field into r1129;\n    shr r10[1u32].leaf_index 10u8 into r1130;\n    and r1130 1u32 into r1131;\n    is.eq r1131 0u32 into r1132;\n    cast 0field r1128 r10[1u32].siblings[11u32] into r1133 as [field; 3u32];\n    cast 0field r10[1u32].siblings[11u32] r1128 into r1134 as [field; 3u32];\n    ternary r1132 r1133[0u32] r1134[0u32] into r1135;\n    ternary r1132 r1133[1u32] r1134[1u32] into r1136;\n    ternary r1132 r1133[2u32] r1134[2u32] into r1137;\n    cast r1135 r1136 r1137 into r1138 as [field; 3u32];\n    hash.psd4 r1138 into r1139 as field;\n    is.eq r10[1u32].siblings[12u32] 0field into r1140;\n    shr r10[1u32].leaf_index 11u8 into r1141;\n    and r1141 1u32 into r1142;\n    is.eq r1142 0u32 into r1143;\n    cast 0field r1139 r10[1u32].siblings[12u32] into r1144 as [field; 3u32];\n    cast 0field r10[1u32].siblings[12u32] r1139 into r1145 as [field; 3u32];\n    ternary r1143 r1144[0u32] r1145[0u32] into r1146;\n    ternary r1143 r1144[1u32] r1145[1u32] into r1147;\n    ternary r1143 r1144[2u32] r1145[2u32] into r1148;\n    cast r1146 r1147 r1148 into r1149 as [field; 3u32];\n    hash.psd4 r1149 into r1150 as field;\n    is.eq r10[1u32].siblings[13u32] 0field into r1151;\n    shr r10[1u32].leaf_index 12u8 into r1152;\n    and r1152 1u32 into r1153;\n    is.eq r1153 0u32 into r1154;\n    cast 0field r1150 r10[1u32].siblings[13u32] into r1155 as [field; 3u32];\n    cast 0field r10[1u32].siblings[13u32] r1150 into r1156 as [field; 3u32];\n    ternary r1154 r1155[0u32] r1156[0u32] into r1157;\n    ternary r1154 r1155[1u32] r1156[1u32] into r1158;\n    ternary r1154 r1155[2u32] r1156[2u32] into r1159;\n    cast r1157 r1158 r1159 into r1160 as [field; 3u32];\n    hash.psd4 r1160 into r1161 as field;\n    is.eq r10[1u32].siblings[14u32] 0field into r1162;\n    shr r10[1u32].leaf_index 13u8 into r1163;\n    and r1163 1u32 into r1164;\n    is.eq r1164 0u32 into r1165;\n    cast 0field r1161 r10[1u32].siblings[14u32] into r1166 as [field; 3u32];\n    cast 0field r10[1u32].siblings[14u32] r1161 into r1167 as [field; 3u32];\n    ternary r1165 r1166[0u32] r1167[0u32] into r1168;\n    ternary r1165 r1166[1u32] r1167[1u32] into r1169;\n    ternary r1165 r1166[2u32] r1167[2u32] into r1170;\n    cast r1168 r1169 r1170 into r1171 as [field; 3u32];\n    hash.psd4 r1171 into r1172 as field;\n    is.eq r10[1u32].siblings[15u32] 0field into r1173;\n    shr r10[1u32].leaf_index 14u8 into r1174;\n    and r1174 1u32 into r1175;\n    is.eq r1175 0u32 into r1176;\n    cast 0field r1172 r10[1u32].siblings[15u32] into r1177 as [field; 3u32];\n    cast 0field r10[1u32].siblings[15u32] r1172 into r1178 as [field; 3u32];\n    ternary r1176 r1177[0u32] r1178[0u32] into r1179;\n    ternary r1176 r1177[1u32] r1178[1u32] into r1180;\n    ternary r1176 r1177[2u32] r1178[2u32] into r1181;\n    cast r1179 r1180 r1181 into r1182 as [field; 3u32];\n    hash.psd4 r1182 into r1183 as field;\n    ternary r1173 r1172 r1183 into r1184;\n    ternary r1173 14u8 15u8 into r1185;\n    ternary r1162 r1161 r1184 into r1186;\n    ternary r1162 13u8 r1185 into r1187;\n    ternary r1151 r1150 r1186 into r1188;\n    ternary r1151 12u8 r1187 into r1189;\n    ternary r1140 r1139 r1188 into r1190;\n    ternary r1140 11u8 r1189 into r1191;\n    ternary r1129 r1128 r1190 into r1192;\n    ternary r1129 10u8 r1191 into r1193;\n    ternary r1118 r1117 r1192 into r1194;\n    ternary r1118 9u8 r1193 into r1195;\n    ternary r1107 r1106 r1194 into r1196;\n    ternary r1107 8u8 r1195 into r1197;\n    ternary r1096 r1095 r1196 into r1198;\n    ternary r1096 7u8 r1197 into r1199;\n    ternary r1085 r1084 r1198 into r1200;\n    ternary r1085 6u8 r1199 into r1201;\n    ternary r1074 r1073 r1200 into r1202;\n    ternary r1074 5u8 r1201 into r1203;\n    ternary r1063 r1062 r1202 into r1204;\n    ternary r1063 4u8 r1203 into r1205;\n    ternary r1052 r1051 r1204 into r1206;\n    ternary r1052 3u8 r1205 into r1207;\n    ternary r1041 r1040 r1206 into r1208;\n    ternary r1041 2u8 r1207 into r1209;\n    ternary r1030 r1029 r1208 into r1210;\n    ternary r1030 1u8 r1209 into r1211;\n    assert.eq r1019 r1210;\n    assert.eq r1020 r1211;\n    cast r4 into r1212 as field;\n    lt r1212 r10[0u32].siblings[0u32] into r1213;\n    is.eq r1212 r10[0u32].siblings[0u32] into r1214;\n    nor r1213 r1214 into r1215;\n    is.eq r10[0u32].leaf_index r10[1u32].leaf_index into r1216;\n    is.eq r10[0u32].leaf_index 0u32 into r1217;\n    and r1216 r1217 into r1218;\n    not r1218 into r1219;\n    or r1213 r1219 into r1220;\n    assert.eq r1220 true;\n    not r1217 into r1221;\n    shl 1u32 r1020 into r1222;\n    sub r1222 1u32 into r1223;\n    and r1216 r1221 into r1224;\n    not r1224 into r1225;\n    is.eq r10[0u32].leaf_index r1223 into r1226;\n    or r1226 r1225 into r1227;\n    assert.eq r1227 true;\n    or r1215 r1225 into r1228;\n    assert.eq r1228 true;\n    not r1216 into r1229;\n    not r1229 into r1230;\n    or r1215 r1230 into r1231;\n    assert.eq r1231 true;\n    lt r1212 r10[1u32].siblings[0u32] into r1232;\n    or r1232 r1230 into r1233;\n    assert.eq r1233 true;\n    lte r10[1u32].leaf_index r1223 into r1234;\n    or r1234 r1230 into r1235;\n    assert.eq r1235 true;\n    add r10[0u32].leaf_index 1u32 into r1236;\n    is.eq r1236 r10[1u32].leaf_index into r1237;\n    or r1237 r1230 into r1238;\n    assert.eq r1238 true;\n    assert.eq r201 r610;\n    assert.eq r201 r1019;\n    cast r5 r3 r0 into r1239 as TokenIDPreimage;\n    hash.bhp256 r1239 into r1240 as field;\n    cast aleo1w0zm05xf0hleydv5w4mj8w4u5matr4q2gmddgj4hucj5yszcn5rqdgd3cj r1240 r6 r7 r0 r5 self.caller self.signer r3 r4 into r1241 as MintComplianceRecord.record;\n    cast r3 r4 r1240 r6 r7 r5.pool r5.tick_lower r5.tick_upper into r1242 as PositionNFT.record;\n    call.dynamic r6 'aleo' 'transfer_private_to_public' with r1 shield_swap.aleo r5.amount0_desired (as dynamic.record address.public u128.public) into r1243 r1244 (as dynamic.record dynamic.future);\n    call.dynamic r7 'aleo' 'transfer_private_to_public' with r2 shield_swap.aleo r5.amount1_desired (as dynamic.record address.public u128.public) into r1245 r1246 (as dynamic.record dynamic.future);\n    async mint r1244 r1246 r5 r1240 r6 r7 r201 r11 into r1247;\n    output r1240 as field.public;\n    output r1242 as PositionNFT.record;\n    output r1243 as dynamic.record;\n    output r1245 as dynamic.record;\n    output r1241 as MintComplianceRecord.record;\n    output r1247 as shield_swap.aleo/mint.future;\n\nfinalize mint:\n    input r0 as dynamic.future;\n    input r1 as dynamic.future;\n    input r2 as MintPositionRequest.public;\n    input r3 as field.public;\n    input r4 as field.public;\n    input r5 as field.public;\n    input r6 as field.public;\n    input r7 as boolean.public;\n    get shield_swap_freezelist.aleo/freeze_list_root[1u8] into r8;\n    is.neq r8 r6 into r9;\n    branch.eq r9 false to end_then_0_0;\n    get shield_swap_freezelist.aleo/freeze_list_root[2u8] into r10;\n    get shield_swap_freezelist.aleo/root_updated_height[true] into r11;\n    get shield_swap_freezelist.aleo/previous_root_window[true] into r12;\n    is.eq r6 r8 into r13;\n    is.eq r6 r10 into r14;\n    sub block.height r11 into r15;\n    lt r15 r12 into r16;\n    and r14 r16 into r17;\n    or r13 r17 into r18;\n    assert.eq r18 true;\n    branch.eq true true to end_otherwise_0_1;\n    position end_then_0_0;\n    position end_otherwise_0_1;\n    contains from_wrapper_token_id[r4] into r19;\n    contains from_wrapper_token_id[r5] into r20;\n    or r19 r20 into r21;\n    branch.eq r21 false to end_then_0_2;\n    assert.eq r7 true;\n    branch.eq true true to end_otherwise_0_3;\n    position end_then_0_2;\n    position end_otherwise_0_3;\n    await r0;\n    await r1;\n    get.or_use global_paused[true] false into r22;\n    not r22 into r23;\n    assert.eq r23 true;\n    get pools[r2.pool] into r24;\n    assert.eq r24.enabled true;\n    get.or_use token_paused[r24.token0] false into r25;\n    not r25 into r26;\n    assert.eq r26 true;\n    get.or_use token_paused[r24.token1] false into r27;\n    not r27 into r28;\n    assert.eq r28 true;\n    cast r24.token0 r24.token1 into r29 as PairKey;\n    get.or_use pair_paused[r29] false into r30;\n    not r30 into r31;\n    assert.eq r31 true;\n    is.eq r24.token0 r4 into r32;\n    assert.eq r32 true;\n    is.eq r24.token1 r5 into r33;\n    assert.eq r33 true;\n    get slots[r2.pool] into r34;\n    cast r34.tick_spacing into r35 as i32;\n    rem r2.tick_lower r35 into r36;\n    is.eq r36 0i32 into r37;\n    assert.eq r37 true;\n    cast r34.tick_spacing into r38 as i32;\n    rem r2.tick_upper r38 into r39;\n    is.eq r39 0i32 into r40;\n    assert.eq r40 true;\n    lt r2.tick_lower r2.tick_upper into r41;\n    assert.eq r41 true;\n    gte r2.tick_lower -400000i32 into r42;\n    assert.eq r42 true;\n    lte r2.tick_upper 400000i32 into r43;\n    assert.eq r43 true;\n    call view_sqrt_price_at_tick_x128 r2.tick_lower into r44;\n    call view_sqrt_price_at_tick_x128 r2.tick_upper into r45;\n    lt r44.hi r45.hi into r46;\n    gt r44.hi r45.hi into r47;\n    lt r44.lo r45.lo into r48;\n    ternary r47 false r48 into r49;\n    ternary r46 true r49 into r50;\n    ternary r50 r44.hi r45.hi into r51;\n    ternary r50 r44.lo r45.lo into r52;\n    cast r51 r52 into r53 as U256__8JquwLopp8;\n    lt r44.hi r45.hi into r54;\n    gt r44.hi r45.hi into r55;\n    lt r44.lo r45.lo into r56;\n    ternary r55 false r56 into r57;\n    ternary r54 true r57 into r58;\n    ternary r58 r45.hi r44.hi into r59;\n    ternary r58 r45.lo r44.lo into r60;\n    cast r59 r60 into r61 as U256__8JquwLopp8;\n    lt r53.hi r34.sqrt_price.hi into r62;\n    gt r53.hi r34.sqrt_price.hi into r63;\n    lt r53.lo r34.sqrt_price.lo into r64;\n    ternary r63 false r64 into r65;\n    ternary r62 true r65 into r66;\n    not r66 into r67;\n    not r67 into r68;\n    lt r34.sqrt_price.hi r61.hi into r69;\n    gt r34.sqrt_price.hi r61.hi into r70;\n    lt r34.sqrt_price.lo r61.lo into r71;\n    ternary r70 false r71 into r72;\n    ternary r69 true r72 into r73;\n    and r68 r73 into r74;\n    lt r34.sqrt_price.hi r61.hi into r75;\n    gt r34.sqrt_price.hi r61.hi into r76;\n    lt r34.sqrt_price.lo r61.lo into r77;\n    ternary r76 false r77 into r78;\n    ternary r75 true r78 into r79;\n    not r79 into r80;\n    and r68 r80 into r81;\n    ternary r67 r2.amount0_desired 0u128 into r82;\n    lt r53.hi r61.hi into r83;\n    gt r53.hi r61.hi into r84;\n    lt r53.lo r61.lo into r85;\n    ternary r84 false r85 into r86;\n    ternary r83 true r86 into r87;\n    ternary r87 r53.hi r61.hi into r88;\n    ternary r87 r53.lo r61.lo into r89;\n    cast r88 r89 into r90 as U256__8JquwLopp8;\n    lt r53.hi r61.hi into r91;\n    gt r53.hi r61.hi into r92;\n    lt r53.lo r61.lo into r93;\n    ternary r92 false r93 into r94;\n    ternary r91 true r94 into r95;\n    ternary r95 r61.hi r53.hi into r96;\n    ternary r95 r61.lo r53.lo into r97;\n    cast r96 r97 into r98 as U256__8JquwLopp8;\n    lt r98.lo r90.lo into r99;\n    ternary r99 1u128 0u128 into r100;\n    sub.w r98.lo r90.lo into r101;\n    sub.w r98.hi r90.hi into r102;\n    sub.w r102 r100 into r103;\n    cast r103 r101 into r104 as U256__8JquwLopp8;\n    is.eq r104.hi 0u128 into r105;\n    is.eq r104.lo 0u128 into r106;\n    and r105 r106 into r107;\n    ternary r107 0u128 r104.hi into r108;\n    ternary r107 1u128 r104.lo into r109;\n    cast r108 r109 into r110 as U256__8JquwLopp8;\n    is.eq r104.hi 0u128 into r111;\n    is.eq r104.lo 0u128 into r112;\n    and r111 r112 into r113;\n    ternary r113 0u128 r82 into r114;\n    cast 1u128 0u128 into r115 as U256__8JquwLopp8;\n    call view_mul_div r90 r98 r115 false into r116;\n    cast 0u128 r114 into r117 as U256__8JquwLopp8;\n    call view_mul_div r117 r116 r110 false into r118;\n    is.eq r118.hi 0u128 into r119;\n    assert.eq r119 true;\n    ternary r74 r2.amount0_desired 0u128 into r120;\n    lt r34.sqrt_price.hi r61.hi into r121;\n    gt r34.sqrt_price.hi r61.hi into r122;\n    lt r34.sqrt_price.lo r61.lo into r123;\n    ternary r122 false r123 into r124;\n    ternary r121 true r124 into r125;\n    ternary r125 r34.sqrt_price.hi r61.hi into r126;\n    ternary r125 r34.sqrt_price.lo r61.lo into r127;\n    cast r126 r127 into r128 as U256__8JquwLopp8;\n    lt r34.sqrt_price.hi r61.hi into r129;\n    gt r34.sqrt_price.hi r61.hi into r130;\n    lt r34.sqrt_price.lo r61.lo into r131;\n    ternary r130 false r131 into r132;\n    ternary r129 true r132 into r133;\n    ternary r133 r61.hi r34.sqrt_price.hi into r134;\n    ternary r133 r61.lo r34.sqrt_price.lo into r135;\n    cast r134 r135 into r136 as U256__8JquwLopp8;\n    lt r136.lo r128.lo into r137;\n    ternary r137 1u128 0u128 into r138;\n    sub.w r136.lo r128.lo into r139;\n    sub.w r136.hi r128.hi into r140;\n    sub.w r140 r138 into r141;\n    cast r141 r139 into r142 as U256__8JquwLopp8;\n    is.eq r142.hi 0u128 into r143;\n    is.eq r142.lo 0u128 into r144;\n    and r143 r144 into r145;\n    ternary r145 0u128 r142.hi into r146;\n    ternary r145 1u128 r142.lo into r147;\n    cast r146 r147 into r148 as U256__8JquwLopp8;\n    is.eq r142.hi 0u128 into r149;\n    is.eq r142.lo 0u128 into r150;\n    and r149 r150 into r151;\n    ternary r151 0u128 r120 into r152;\n    cast 1u128 0u128 into r153 as U256__8JquwLopp8;\n    call view_mul_div r128 r136 r153 false into r154;\n    cast 0u128 r152 into r155 as U256__8JquwLopp8;\n    call view_mul_div r155 r154 r148 false into r156;\n    is.eq r156.hi 0u128 into r157;\n    assert.eq r157 true;\n    ternary r74 r2.amount1_desired 0u128 into r158;\n    lt r53.hi r34.sqrt_price.hi into r159;\n    gt r53.hi r34.sqrt_price.hi into r160;\n    lt r53.lo r34.sqrt_price.lo into r161;\n    ternary r160 false r161 into r162;\n    ternary r159 true r162 into r163;\n    ternary r163 r53.hi r34.sqrt_price.hi into r164;\n    ternary r163 r53.lo r34.sqrt_price.lo into r165;\n    cast r164 r165 into r166 as U256__8JquwLopp8;\n    lt r53.hi r34.sqrt_price.hi into r167;\n    gt r53.hi r34.sqrt_price.hi into r168;\n    lt r53.lo r34.sqrt_price.lo into r169;\n    ternary r168 false r169 into r170;\n    ternary r167 true r170 into r171;\n    ternary r171 r34.sqrt_price.hi r53.hi into r172;\n    ternary r171 r34.sqrt_price.lo r53.lo into r173;\n    cast r172 r173 into r174 as U256__8JquwLopp8;\n    lt r174.lo r166.lo into r175;\n    ternary r175 1u128 0u128 into r176;\n    sub.w r174.lo r166.lo into r177;\n    sub.w r174.hi r166.hi into r178;\n    sub.w r178 r176 into r179;\n    cast r179 r177 into r180 as U256__8JquwLopp8;\n    is.eq r180.hi 0u128 into r181;\n    is.eq r180.lo 0u128 into r182;\n    and r181 r182 into r183;\n    ternary r183 0u128 r180.hi into r184;\n    ternary r183 1u128 r180.lo into r185;\n    cast r184 r185 into r186 as U256__8JquwLopp8;\n    is.eq r180.hi 0u128 into r187;\n    is.eq r180.lo 0u128 into r188;\n    and r187 r188 into r189;\n    ternary r189 0u128 r158 into r190;\n    cast r190 0u128 into r191 as U256__8JquwLopp8;\n    cast 0u128 1u128 into r192 as U256__8JquwLopp8;\n    call view_mul_div r191 r192 r186 false into r193;\n    is.eq r193.hi 0u128 into r194;\n    assert.eq r194 true;\n    ternary r81 r2.amount1_desired 0u128 into r195;\n    lt r53.hi r61.hi into r196;\n    gt r53.hi r61.hi into r197;\n    lt r53.lo r61.lo into r198;\n    ternary r197 false r198 into r199;\n    ternary r196 true r199 into r200;\n    ternary r200 r53.hi r61.hi into r201;\n    ternary r200 r53.lo r61.lo into r202;\n    cast r201 r202 into r203 as U256__8JquwLopp8;\n    lt r53.hi r61.hi into r204;\n    gt r53.hi r61.hi into r205;\n    lt r53.lo r61.lo into r206;\n    ternary r205 false r206 into r207;\n    ternary r204 true r207 into r208;\n    ternary r208 r61.hi r53.hi into r209;\n    ternary r208 r61.lo r53.lo into r210;\n    cast r209 r210 into r211 as U256__8JquwLopp8;\n    lt r211.lo r203.lo into r212;\n    ternary r212 1u128 0u128 into r213;\n    sub.w r211.lo r203.lo into r214;\n    sub.w r211.hi r203.hi into r215;\n    sub.w r215 r213 into r216;\n    cast r216 r214 into r217 as U256__8JquwLopp8;\n    is.eq r217.hi 0u128 into r218;\n    is.eq r217.lo 0u128 into r219;\n    and r218 r219 into r220;\n    ternary r220 0u128 r217.hi into r221;\n    ternary r220 1u128 r217.lo into r222;\n    cast r221 r222 into r223 as U256__8JquwLopp8;\n    is.eq r217.hi 0u128 into r224;\n    is.eq r217.lo 0u128 into r225;\n    and r224 r225 into r226;\n    ternary r226 0u128 r195 into r227;\n    cast r227 0u128 into r228 as U256__8JquwLopp8;\n    cast 0u128 1u128 into r229 as U256__8JquwLopp8;\n    call view_mul_div r228 r229 r223 false into r230;\n    is.eq r230.hi 0u128 into r231;\n    assert.eq r231 true;\n    lt r156.lo r193.lo into r232;\n    ternary r232 r156.lo r193.lo into r233;\n    ternary r74 r233 r230.lo into r234;\n    ternary r67 r118.lo r234 into r235;\n    gt r235 0u128 into r236;\n    assert.eq r236 true;\n    lt r44.hi r45.hi into r237;\n    gt r44.hi r45.hi into r238;\n    lt r44.lo r45.lo into r239;\n    ternary r238 false r239 into r240;\n    ternary r237 true r240 into r241;\n    ternary r241 r44.hi r45.hi into r242;\n    ternary r241 r44.lo r45.lo into r243;\n    cast r242 r243 into r244 as U256__8JquwLopp8;\n    lt r44.hi r45.hi into r245;\n    gt r44.hi r45.hi into r246;\n    lt r44.lo r45.lo into r247;\n    ternary r246 false r247 into r248;\n    ternary r245 true r248 into r249;\n    ternary r249 r45.hi r44.hi into r250;\n    ternary r249 r45.lo r44.lo into r251;\n    cast r250 r251 into r252 as U256__8JquwLopp8;\n    lt r244.hi r34.sqrt_price.hi into r253;\n    gt r244.hi r34.sqrt_price.hi into r254;\n    lt r244.lo r34.sqrt_price.lo into r255;\n    ternary r254 false r255 into r256;\n    ternary r253 true r256 into r257;\n    not r257 into r258;\n    not r258 into r259;\n    lt r34.sqrt_price.hi r252.hi into r260;\n    gt r34.sqrt_price.hi r252.hi into r261;\n    lt r34.sqrt_price.lo r252.lo into r262;\n    ternary r261 false r262 into r263;\n    ternary r260 true r263 into r264;\n    and r259 r264 into r265;\n    lt r34.sqrt_price.hi r252.hi into r266;\n    gt r34.sqrt_price.hi r252.hi into r267;\n    lt r34.sqrt_price.lo r252.lo into r268;\n    ternary r267 false r268 into r269;\n    ternary r266 true r269 into r270;\n    not r270 into r271;\n    and r259 r271 into r272;\n    ternary r258 r235 0u128 into r273;\n    lt r244.hi r252.hi into r274;\n    gt r244.hi r252.hi into r275;\n    lt r244.lo r252.lo into r276;\n    ternary r275 false r276 into r277;\n    ternary r274 true r277 into r278;\n    ternary r278 r244.hi r252.hi into r279;\n    ternary r278 r244.lo r252.lo into r280;\n    cast r279 r280 into r281 as U256__8JquwLopp8;\n    lt r244.hi r252.hi into r282;\n    gt r244.hi r252.hi into r283;\n    lt r244.lo r252.lo into r284;\n    ternary r283 false r284 into r285;\n    ternary r282 true r285 into r286;\n    ternary r286 r252.hi r244.hi into r287;\n    ternary r286 r252.lo r244.lo into r288;\n    cast r287 r288 into r289 as U256__8JquwLopp8;\n    lt r289.lo r281.lo into r290;\n    ternary r290 1u128 0u128 into r291;\n    sub.w r289.lo r281.lo into r292;\n    sub.w r289.hi r281.hi into r293;\n    sub.w r293 r291 into r294;\n    cast r294 r292 into r295 as U256__8JquwLopp8;\n    cast r273 0u128 into r296 as U256__8JquwLopp8;\n    call view_mul_div r296 r295 r289 true into r297;\n    cast 0u128 1u128 into r298 as U256__8JquwLopp8;\n    call view_mul_div r297 r298 r281 true into r299;\n    is.eq r299.hi 0u128 into r300;\n    assert.eq r300 true;\n    ternary r265 r235 0u128 into r301;\n    lt r34.sqrt_price.hi r252.hi into r302;\n    gt r34.sqrt_price.hi r252.hi into r303;\n    lt r34.sqrt_price.lo r252.lo into r304;\n    ternary r303 false r304 into r305;\n    ternary r302 true r305 into r306;\n    ternary r306 r34.sqrt_price.hi r252.hi into r307;\n    ternary r306 r34.sqrt_price.lo r252.lo into r308;\n    cast r307 r308 into r309 as U256__8JquwLopp8;\n    lt r34.sqrt_price.hi r252.hi into r310;\n    gt r34.sqrt_price.hi r252.hi into r311;\n    lt r34.sqrt_price.lo r252.lo into r312;\n    ternary r311 false r312 into r313;\n    ternary r310 true r313 into r314;\n    ternary r314 r252.hi r34.sqrt_price.hi into r315;\n    ternary r314 r252.lo r34.sqrt_price.lo into r316;\n    cast r315 r316 into r317 as U256__8JquwLopp8;\n    lt r317.lo r309.lo into r318;\n    ternary r318 1u128 0u128 into r319;\n    sub.w r317.lo r309.lo into r320;\n    sub.w r317.hi r309.hi into r321;\n    sub.w r321 r319 into r322;\n    cast r322 r320 into r323 as U256__8JquwLopp8;\n    cast r301 0u128 into r324 as U256__8JquwLopp8;\n    call view_mul_div r324 r323 r317 true into r325;\n    cast 0u128 1u128 into r326 as U256__8JquwLopp8;\n    call view_mul_div r325 r326 r309 true into r327;\n    is.eq r327.hi 0u128 into r328;\n    assert.eq r328 true;\n    lt r244.hi r34.sqrt_price.hi into r329;\n    gt r244.hi r34.sqrt_price.hi into r330;\n    lt r244.lo r34.sqrt_price.lo into r331;\n    ternary r330 false r331 into r332;\n    ternary r329 true r332 into r333;\n    ternary r333 r244.hi r34.sqrt_price.hi into r334;\n    ternary r333 r244.lo r34.sqrt_price.lo into r335;\n    cast r334 r335 into r336 as U256__8JquwLopp8;\n    lt r244.hi r34.sqrt_price.hi into r337;\n    gt r244.hi r34.sqrt_price.hi into r338;\n    lt r244.lo r34.sqrt_price.lo into r339;\n    ternary r338 false r339 into r340;\n    ternary r337 true r340 into r341;\n    ternary r341 r34.sqrt_price.hi r244.hi into r342;\n    ternary r341 r34.sqrt_price.lo r244.lo into r343;\n    cast r342 r343 into r344 as U256__8JquwLopp8;\n    lt r344.lo r336.lo into r345;\n    ternary r345 1u128 0u128 into r346;\n    sub.w r344.lo r336.lo into r347;\n    sub.w r344.hi r336.hi into r348;\n    sub.w r348 r346 into r349;\n    cast r349 r347 into r350 as U256__8JquwLopp8;\n    cast 0u128 r301 into r351 as U256__8JquwLopp8;\n    and r351.lo 18446744073709551615u128 into r352;\n    shr r351.lo 64u8 into r353;\n    and r350.lo 18446744073709551615u128 into r354;\n    shr r350.lo 64u8 into r355;\n    mul r352 r354 into r356;\n    mul r352 r355 into r357;\n    mul r353 r354 into r358;\n    mul r353 r355 into r359;\n    and r356 18446744073709551615u128 into r360;\n    shr r356 64u8 into r361;\n    and r357 18446744073709551615u128 into r362;\n    add r361 r362 into r363;\n    and r358 18446744073709551615u128 into r364;\n    add r363 r364 into r365;\n    and r365 18446744073709551615u128 into r366;\n    shr r365 64u8 into r367;\n    shr r357 64u8 into r368;\n    shr r358 64u8 into r369;\n    add r368 r369 into r370;\n    and r359 18446744073709551615u128 into r371;\n    add r370 r371 into r372;\n    add r372 r367 into r373;\n    and r373 18446744073709551615u128 into r374;\n    shr r373 64u8 into r375;\n    shr r359 64u8 into r376;\n    add r376 r375 into r377;\n    shl r377 64u8 into r378;\n    add r378 r374 into r379;\n    shl r366 64u8 into r380;\n    add r380 r360 into r381;\n    and r351.lo 18446744073709551615u128 into r382;\n    shr r351.lo 64u8 into r383;\n    and r350.hi 18446744073709551615u128 into r384;\n    shr r350.hi 64u8 into r385;\n    mul r382 r384 into r386;\n    mul r382 r385 into r387;\n    mul r383 r384 into r388;\n    mul r383 r385 into r389;\n    and r386 18446744073709551615u128 into r390;\n    shr r386 64u8 into r391;\n    and r387 18446744073709551615u128 into r392;\n    add r391 r392 into r393;\n    and r388 18446744073709551615u128 into r394;\n    add r393 r394 into r395;\n    and r395 18446744073709551615u128 into r396;\n    shr r395 64u8 into r397;\n    shr r387 64u8 into r398;\n    shr r388 64u8 into r399;\n    add r398 r399 into r400;\n    and r389 18446744073709551615u128 into r401;\n    add r400 r401 into r402;\n    add r402 r397 into r403;\n    and r403 18446744073709551615u128 into r404;\n    shr r403 64u8 into r405;\n    shr r389 64u8 into r406;\n    add r406 r405 into r407;\n    shl r407 64u8 into r408;\n    add r408 r404 into r409;\n    shl r396 64u8 into r410;\n    add r410 r390 into r411;\n    and r351.hi 18446744073709551615u128 into r412;\n    shr r351.hi 64u8 into r413;\n    and r350.lo 18446744073709551615u128 into r414;\n    shr r350.lo 64u8 into r415;\n    mul r412 r414 into r416;\n    mul r412 r415 into r417;\n    mul r413 r414 into r418;\n    mul r413 r415 into r419;\n    and r416 18446744073709551615u128 into r420;\n    shr r416 64u8 into r421;\n    and r417 18446744073709551615u128 into r422;\n    add r421 r422 into r423;\n    and r418 18446744073709551615u128 into r424;\n    add r423 r424 into r425;\n    and r425 18446744073709551615u128 into r426;\n    shr r425 64u8 into r427;\n    shr r417 64u8 into r428;\n    shr r418 64u8 into r429;\n    add r428 r429 into r430;\n    and r419 18446744073709551615u128 into r431;\n    add r430 r431 into r432;\n    add r432 r427 into r433;\n    and r433 18446744073709551615u128 into r434;\n    shr r433 64u8 into r435;\n    shr r419 64u8 into r436;\n    add r436 r435 into r437;\n    shl r437 64u8 into r438;\n    add r438 r434 into r439;\n    shl r426 64u8 into r440;\n    add r440 r420 into r441;\n    and r351.hi 18446744073709551615u128 into r442;\n    shr r351.hi 64u8 into r443;\n    and r350.hi 18446744073709551615u128 into r444;\n    shr r350.hi 64u8 into r445;\n    mul r442 r444 into r446;\n    mul r442 r445 into r447;\n    mul r443 r444 into r448;\n    mul r443 r445 into r449;\n    and r446 18446744073709551615u128 into r450;\n    shr r446 64u8 into r451;\n    and r447 18446744073709551615u128 into r452;\n    add r451 r452 into r453;\n    and r448 18446744073709551615u128 into r454;\n    add r453 r454 into r455;\n    and r455 18446744073709551615u128 into r456;\n    shr r455 64u8 into r457;\n    shr r447 64u8 into r458;\n    shr r448 64u8 into r459;\n    add r458 r459 into r460;\n    and r449 18446744073709551615u128 into r461;\n    add r460 r461 into r462;\n    add r462 r457 into r463;\n    and r463 18446744073709551615u128 into r464;\n    shr r463 64u8 into r465;\n    shr r449 64u8 into r466;\n    add r466 r465 into r467;\n    shl r467 64u8 into r468;\n    add r468 r464 into r469;\n    shl r456 64u8 into r470;\n    add r470 r450 into r471;\n    add.w r379 r411 into r472;\n    lt r472 r379 into r473;\n    ternary r473 1u128 0u128 into r474;\n    add.w r472 r441 into r475;\n    lt r475 r472 into r476;\n    ternary r476 1u128 0u128 into r477;\n    add r474 r477 into r478;\n    add.w r409 r439 into r479;\n    lt r479 r409 into r480;\n    ternary r480 1u128 0u128 into r481;\n    add.w r479 r471 into r482;\n    lt r482 r479 into r483;\n    ternary r483 1u128 0u128 into r484;\n    add.w r482 r478 into r485;\n    lt r485 r482 into r486;\n    ternary r486 1u128 0u128 into r487;\n    add r481 r484 into r488;\n    add r488 r487 into r489;\n    add.w r469 r489 into r490;\n    cast r490 r485 into r491 as U256__8JquwLopp8;\n    cast r475 r381 into r492 as U256__8JquwLopp8;\n    is.eq r491.hi 0u128 into r493;\n    is.eq r491.lo 0u128 into r494;\n    and r493 r494 into r495;\n    assert.eq r495 true;\n    gt r492.lo 0u128 into r496;\n    ternary r496 1u128 0u128 into r497;\n    add r492.hi r497 into r498;\n    ternary r272 r235 0u128 into r499;\n    lt r244.hi r252.hi into r500;\n    gt r244.hi r252.hi into r501;\n    lt r244.lo r252.lo into r502;\n    ternary r501 false r502 into r503;\n    ternary r500 true r503 into r504;\n    ternary r504 r244.hi r252.hi into r505;\n    ternary r504 r244.lo r252.lo into r506;\n    cast r505 r506 into r507 as U256__8JquwLopp8;\n    lt r244.hi r252.hi into r508;\n    gt r244.hi r252.hi into r509;\n    lt r244.lo r252.lo into r510;\n    ternary r509 false r510 into r511;\n    ternary r508 true r511 into r512;\n    ternary r512 r252.hi r244.hi into r513;\n    ternary r512 r252.lo r244.lo into r514;\n    cast r513 r514 into r515 as U256__8JquwLopp8;\n    lt r515.lo r507.lo into r516;\n    ternary r516 1u128 0u128 into r517;\n    sub.w r515.lo r507.lo into r518;\n    sub.w r515.hi r507.hi into r519;\n    sub.w r519 r517 into r520;\n    cast r520 r518 into r521 as U256__8JquwLopp8;\n    cast 0u128 r499 into r522 as U256__8JquwLopp8;\n    and r522.lo 18446744073709551615u128 into r523;\n    shr r522.lo 64u8 into r524;\n    and r521.lo 18446744073709551615u128 into r525;\n    shr r521.lo 64u8 into r526;\n    mul r523 r525 into r527;\n    mul r523 r526 into r528;\n    mul r524 r525 into r529;\n    mul r524 r526 into r530;\n    and r527 18446744073709551615u128 into r531;\n    shr r527 64u8 into r532;\n    and r528 18446744073709551615u128 into r533;\n    add r532 r533 into r534;\n    and r529 18446744073709551615u128 into r535;\n    add r534 r535 into r536;\n    and r536 18446744073709551615u128 into r537;\n    shr r536 64u8 into r538;\n    shr r528 64u8 into r539;\n    shr r529 64u8 into r540;\n    add r539 r540 into r541;\n    and r530 18446744073709551615u128 into r542;\n    add r541 r542 into r543;\n    add r543 r538 into r544;\n    and r544 18446744073709551615u128 into r545;\n    shr r544 64u8 into r546;\n    shr r530 64u8 into r547;\n    add r547 r546 into r548;\n    shl r548 64u8 into r549;\n    add r549 r545 into r550;\n    shl r537 64u8 into r551;\n    add r551 r531 into r552;\n    and r522.lo 18446744073709551615u128 into r553;\n    shr r522.lo 64u8 into r554;\n    and r521.hi 18446744073709551615u128 into r555;\n    shr r521.hi 64u8 into r556;\n    mul r553 r555 into r557;\n    mul r553 r556 into r558;\n    mul r554 r555 into r559;\n    mul r554 r556 into r560;\n    and r557 18446744073709551615u128 into r561;\n    shr r557 64u8 into r562;\n    and r558 18446744073709551615u128 into r563;\n    add r562 r563 into r564;\n    and r559 18446744073709551615u128 into r565;\n    add r564 r565 into r566;\n    and r566 18446744073709551615u128 into r567;\n    shr r566 64u8 into r568;\n    shr r558 64u8 into r569;\n    shr r559 64u8 into r570;\n    add r569 r570 into r571;\n    and r560 18446744073709551615u128 into r572;\n    add r571 r572 into r573;\n    add r573 r568 into r574;\n    and r574 18446744073709551615u128 into r575;\n    shr r574 64u8 into r576;\n    shr r560 64u8 into r577;\n    add r577 r576 into r578;\n    shl r578 64u8 into r579;\n    add r579 r575 into r580;\n    shl r567 64u8 into r581;\n    add r581 r561 into r582;\n    and r522.hi 18446744073709551615u128 into r583;\n    shr r522.hi 64u8 into r584;\n    and r521.lo 18446744073709551615u128 into r585;\n    shr r521.lo 64u8 into r586;\n    mul r583 r585 into r587;\n    mul r583 r586 into r588;\n    mul r584 r585 into r589;\n    mul r584 r586 into r590;\n    and r587 18446744073709551615u128 into r591;\n    shr r587 64u8 into r592;\n    and r588 18446744073709551615u128 into r593;\n    add r592 r593 into r594;\n    and r589 18446744073709551615u128 into r595;\n    add r594 r595 into r596;\n    and r596 18446744073709551615u128 into r597;\n    shr r596 64u8 into r598;\n    shr r588 64u8 into r599;\n    shr r589 64u8 into r600;\n    add r599 r600 into r601;\n    and r590 18446744073709551615u128 into r602;\n    add r601 r602 into r603;\n    add r603 r598 into r604;\n    and r604 18446744073709551615u128 into r605;\n    shr r604 64u8 into r606;\n    shr r590 64u8 into r607;\n    add r607 r606 into r608;\n    shl r608 64u8 into r609;\n    add r609 r605 into r610;\n    shl r597 64u8 into r611;\n    add r611 r591 into r612;\n    and r522.hi 18446744073709551615u128 into r613;\n    shr r522.hi 64u8 into r614;\n    and r521.hi 18446744073709551615u128 into r615;\n    shr r521.hi 64u8 into r616;\n    mul r613 r615 into r617;\n    mul r613 r616 into r618;\n    mul r614 r615 into r619;\n    mul r614 r616 into r620;\n    and r617 18446744073709551615u128 into r621;\n    shr r617 64u8 into r622;\n    and r618 18446744073709551615u128 into r623;\n    add r622 r623 into r624;\n    and r619 18446744073709551615u128 into r625;\n    add r624 r625 into r626;\n    and r626 18446744073709551615u128 into r627;\n    shr r626 64u8 into r628;\n    shr r618 64u8 into r629;\n    shr r619 64u8 into r630;\n    add r629 r630 into r631;\n    and r620 18446744073709551615u128 into r632;\n    add r631 r632 into r633;\n    add r633 r628 into r634;\n    and r634 18446744073709551615u128 into r635;\n    shr r634 64u8 into r636;\n    shr r620 64u8 into r637;\n    add r637 r636 into r638;\n    shl r638 64u8 into r639;\n    add r639 r635 into r640;\n    shl r627 64u8 into r641;\n    add r641 r621 into r642;\n    add.w r550 r582 into r643;\n    lt r643 r550 into r644;\n    ternary r644 1u128 0u128 into r645;\n    add.w r643 r612 into r646;\n    lt r646 r643 into r647;\n    ternary r647 1u128 0u128 into r648;\n    add r645 r648 into r649;\n    add.w r580 r610 into r650;\n    lt r650 r580 into r651;\n    ternary r651 1u128 0u128 into r652;\n    add.w r650 r642 into r653;\n    lt r653 r650 into r654;\n    ternary r654 1u128 0u128 into r655;\n    add.w r653 r649 into r656;\n    lt r656 r653 into r657;\n    ternary r657 1u128 0u128 into r658;\n    add r652 r655 into r659;\n    add r659 r658 into r660;\n    add.w r640 r660 into r661;\n    cast r661 r656 into r662 as U256__8JquwLopp8;\n    cast r646 r552 into r663 as U256__8JquwLopp8;\n    is.eq r662.hi 0u128 into r664;\n    is.eq r662.lo 0u128 into r665;\n    and r664 r665 into r666;\n    assert.eq r666 true;\n    gt r663.lo 0u128 into r667;\n    ternary r667 1u128 0u128 into r668;\n    add r663.hi r668 into r669;\n    ternary r265 r327.lo 0u128 into r670;\n    ternary r258 r299.lo r670 into r671;\n    ternary r272 r669 0u128 into r672;\n    ternary r265 r498 r672 into r673;\n    lte r671 r2.amount0_desired into r674;\n    lte r673 r2.amount1_desired into r675;\n    and r674 r675 into r676;\n    assert.eq r676 true;\n    gte r671 r2.amount0_min into r677;\n    gte r673 r2.amount1_min into r678;\n    and r677 r678 into r679;\n    assert.eq r679 true;\n    lt r34.sqrt_price.hi r45.hi into r680;\n    gt r34.sqrt_price.hi r45.hi into r681;\n    lt r34.sqrt_price.lo r45.lo into r682;\n    ternary r681 false r682 into r683;\n    ternary r680 true r683 into r684;\n    branch.eq r684 false to end_then_0_4;\n    gt r671 0u128 into r685;\n    assert.eq r685 true;\n    branch.eq true true to end_otherwise_0_5;\n    position end_then_0_4;\n    position end_otherwise_0_5;\n    lt r44.hi r34.sqrt_price.hi into r686;\n    gt r44.hi r34.sqrt_price.hi into r687;\n    lt r44.lo r34.sqrt_price.lo into r688;\n    ternary r687 false r688 into r689;\n    ternary r686 true r689 into r690;\n    branch.eq r690 false to end_then_0_6;\n    gt r673 0u128 into r691;\n    assert.eq r691 true;\n    branch.eq true true to end_otherwise_0_7;\n    position end_then_0_6;\n    position end_otherwise_0_7;\n    cast r2.pool r2.tick_lower into r692 as TickKey;\n    hash.bhp256 r692 into r693 as field;\n    cast r2.pool r2.tick_upper into r694 as TickKey;\n    hash.bhp256 r694 into r695 as field;\n    cast 0u128 0u128 into r696 as U256__8JquwLopp8;\n    cast 0u128 0u128 into r697 as U256__8JquwLopp8;\n    cast r2.pool 0i128 0u128 r2.tick_lower r696 r697 0i32 0i32 into r698 as Tick;\n    cast 0u128 0u128 into r699 as U256__8JquwLopp8;\n    cast 0u128 0u128 into r700 as U256__8JquwLopp8;\n    cast r2.pool 0i128 0u128 r2.tick_upper r699 r700 0i32 0i32 into r701 as Tick;\n    get.or_use ticks[r693] r698 into r702;\n    get.or_use ticks[r695] r701 into r703;\n    gt r702.liquidity_gross 0u128 into r704;\n    gt r703.liquidity_gross 0u128 into r705;\n    not r704 into r706;\n    lte r2.tick_lower r34.tick into r707;\n    and r706 r707 into r708;\n    ternary r708 r34.fee_growth_global0_x_128.hi r702.fee_growth_outside0_x_128.hi into r709;\n    ternary r708 r34.fee_growth_global0_x_128.lo r702.fee_growth_outside0_x_128.lo into r710;\n    cast r709 r710 into r711 as U256__8JquwLopp8;\n    lte r2.tick_lower r34.tick into r712;\n    and r706 r712 into r713;\n    ternary r713 r34.fee_growth_global1_x_128.hi r702.fee_growth_outside1_x_128.hi into r714;\n    ternary r713 r34.fee_growth_global1_x_128.lo r702.fee_growth_outside1_x_128.lo into r715;\n    cast r714 r715 into r716 as U256__8JquwLopp8;\n    not r705 into r717;\n    lte r2.tick_upper r34.tick into r718;\n    and r717 r718 into r719;\n    ternary r719 r34.fee_growth_global0_x_128.hi r703.fee_growth_outside0_x_128.hi into r720;\n    ternary r719 r34.fee_growth_global0_x_128.lo r703.fee_growth_outside0_x_128.lo into r721;\n    cast r720 r721 into r722 as U256__8JquwLopp8;\n    lte r2.tick_upper r34.tick into r723;\n    and r717 r723 into r724;\n    ternary r724 r34.fee_growth_global1_x_128.hi r703.fee_growth_outside1_x_128.hi into r725;\n    ternary r724 r34.fee_growth_global1_x_128.lo r703.fee_growth_outside1_x_128.lo into r726;\n    cast r725 r726 into r727 as U256__8JquwLopp8;\n    add r702.liquidity_gross r235 into r728;\n    add r703.liquidity_gross r235 into r729;\n    lte r728 r34.max_liquidity_per_tick into r730;\n    assert.eq r730 true;\n    lte r729 r34.max_liquidity_per_tick into r731;\n    assert.eq r731 true;\n    ternary r704 -400001i32 r2.tick_lower_hint into r732;\n    cast r2.pool r732 into r733 as TickKey;\n    hash.bhp256 r733 into r734 as field;\n    get ticks[r734] into r735;\n    branch.eq r706 false to end_then_0_8;\n    is.eq r735.pool r2.pool into r736;\n    assert.eq r736 true;\n    is.eq r735.tick r2.tick_lower_hint into r737;\n    assert.eq r737 true;\n    is.eq r2.tick_lower_hint -400001i32 into r738;\n    gt r735.liquidity_gross 0u128 into r739;\n    or r738 r739 into r740;\n    assert.eq r740 true;\n    lt r735.tick r2.tick_lower into r741;\n    assert.eq r741 true;\n    gt r735.next r2.tick_lower into r742;\n    assert.eq r742 true;\n    branch.eq true true to end_otherwise_0_9;\n    position end_then_0_8;\n    position end_otherwise_0_9;\n    ternary r704 r702.prev r2.tick_lower_hint into r743;\n    ternary r704 r702.next r735.next into r744;\n    cast r235 into r745 as i128;\n    add r702.liquidity_net r745 into r746;\n    cast r2.pool r746 r728 r2.tick_lower r711 r716 r743 r744 into r747 as Tick;\n    set r747 into ticks[r693];\n    branch.eq r706 false to end_then_0_10;\n    cast r735.pool r735.liquidity_net r735.liquidity_gross r735.tick r735.fee_growth_outside0_x_128 r735.fee_growth_outside1_x_128 r735.prev r2.tick_lower into r748 as Tick;\n    set r748 into ticks[r734];\n    cast r2.pool r744 into r749 as TickKey;\n    hash.bhp256 r749 into r750 as field;\n    get ticks[r750] into r751;\n    cast r751.pool r751.liquidity_net r751.liquidity_gross r751.tick r751.fee_growth_outside0_x_128 r751.fee_growth_outside1_x_128 r2.tick_lower r751.next into r752 as Tick;\n    set r752 into ticks[r750];\n    branch.eq true true to end_otherwise_0_11;\n    position end_then_0_10;\n    position end_otherwise_0_11;\n    get.or_use ticks[r695] r701 into r753;\n    ternary r705 -400001i32 r2.tick_upper_hint into r754;\n    cast r2.pool r754 into r755 as TickKey;\n    hash.bhp256 r755 into r756 as field;\n    get ticks[r756] into r757;\n    branch.eq r717 false to end_then_0_12;\n    is.eq r757.pool r2.pool into r758;\n    assert.eq r758 true;\n    is.eq r757.tick r2.tick_upper_hint into r759;\n    assert.eq r759 true;\n    is.eq r2.tick_upper_hint -400001i32 into r760;\n    gt r757.liquidity_gross 0u128 into r761;\n    or r760 r761 into r762;\n    assert.eq r762 true;\n    lt r757.tick r2.tick_upper into r763;\n    assert.eq r763 true;\n    gt r757.next r2.tick_upper into r764;\n    assert.eq r764 true;\n    branch.eq true true to end_otherwise_0_13;\n    position end_then_0_12;\n    position end_otherwise_0_13;\n    ternary r705 r753.prev r2.tick_upper_hint into r765;\n    ternary r705 r753.next r757.next into r766;\n    cast r235 into r767 as i128;\n    sub r753.liquidity_net r767 into r768;\n    cast r2.pool r768 r729 r2.tick_upper r722 r727 r765 r766 into r769 as Tick;\n    set r769 into ticks[r695];\n    branch.eq r717 false to end_then_0_14;\n    get ticks[r756] into r770;\n    cast r770.pool r770.liquidity_net r770.liquidity_gross r770.tick r770.fee_growth_outside0_x_128 r770.fee_growth_outside1_x_128 r770.prev r2.tick_upper into r771 as Tick;\n    set r771 into ticks[r756];\n    cast r2.pool r766 into r772 as TickKey;\n    hash.bhp256 r772 into r773 as field;\n    get ticks[r773] into r774;\n    cast r774.pool r774.liquidity_net r774.liquidity_gross r774.tick r774.fee_growth_outside0_x_128 r774.fee_growth_outside1_x_128 r2.tick_upper r774.next into r775 as Tick;\n    set r775 into ticks[r773];\n    branch.eq true true to end_otherwise_0_15;\n    position end_then_0_14;\n    position end_otherwise_0_15;\n    get ticks[r693] into r776;\n    get ticks[r695] into r777;\n    gte r34.tick r776.tick into r778;\n    lt r34.fee_growth_global0_x_128.lo r776.fee_growth_outside0_x_128.lo into r779;\n    ternary r779 1u128 0u128 into r780;\n    sub.w r34.fee_growth_global0_x_128.lo r776.fee_growth_outside0_x_128.lo into r781;\n    sub.w r34.fee_growth_global0_x_128.hi r776.fee_growth_outside0_x_128.hi into r782;\n    sub.w r782 r780 into r783;\n    cast r783 r781 into r784 as U256__8JquwLopp8;\n    lt r34.fee_growth_global1_x_128.lo r776.fee_growth_outside1_x_128.lo into r785;\n    ternary r785 1u128 0u128 into r786;\n    sub.w r34.fee_growth_global1_x_128.lo r776.fee_growth_outside1_x_128.lo into r787;\n    sub.w r34.fee_growth_global1_x_128.hi r776.fee_growth_outside1_x_128.hi into r788;\n    sub.w r788 r786 into r789;\n    cast r789 r787 into r790 as U256__8JquwLopp8;\n    ternary r778 r776.fee_growth_outside0_x_128.hi r784.hi into r791;\n    ternary r778 r776.fee_growth_outside0_x_128.lo r784.lo into r792;\n    cast r791 r792 into r793 as U256__8JquwLopp8;\n    ternary r778 r776.fee_growth_outside1_x_128.hi r790.hi into r794;\n    ternary r778 r776.fee_growth_outside1_x_128.lo r790.lo into r795;\n    cast r794 r795 into r796 as U256__8JquwLopp8;\n    lt r34.tick r777.tick into r797;\n    lt r34.fee_growth_global0_x_128.lo r777.fee_growth_outside0_x_128.lo into r798;\n    ternary r798 1u128 0u128 into r799;\n    sub.w r34.fee_growth_global0_x_128.lo r777.fee_growth_outside0_x_128.lo into r800;\n    sub.w r34.fee_growth_global0_x_128.hi r777.fee_growth_outside0_x_128.hi into r801;\n    sub.w r801 r799 into r802;\n    cast r802 r800 into r803 as U256__8JquwLopp8;\n    lt r34.fee_growth_global1_x_128.lo r777.fee_growth_outside1_x_128.lo into r804;\n    ternary r804 1u128 0u128 into r805;\n    sub.w r34.fee_growth_global1_x_128.lo r777.fee_growth_outside1_x_128.lo into r806;\n    sub.w r34.fee_growth_global1_x_128.hi r777.fee_growth_outside1_x_128.hi into r807;\n    sub.w r807 r805 into r808;\n    cast r808 r806 into r809 as U256__8JquwLopp8;\n    ternary r797 r777.fee_growth_outside0_x_128.hi r803.hi into r810;\n    ternary r797 r777.fee_growth_outside0_x_128.lo r803.lo into r811;\n    cast r810 r811 into r812 as U256__8JquwLopp8;\n    ternary r797 r777.fee_growth_outside1_x_128.hi r809.hi into r813;\n    ternary r797 r777.fee_growth_outside1_x_128.lo r809.lo into r814;\n    cast r813 r814 into r815 as U256__8JquwLopp8;\n    lt r34.fee_growth_global0_x_128.lo r793.lo into r816;\n    ternary r816 1u128 0u128 into r817;\n    sub.w r34.fee_growth_global0_x_128.lo r793.lo into r818;\n    sub.w r34.fee_growth_global0_x_128.hi r793.hi into r819;\n    sub.w r819 r817 into r820;\n    cast r820 r818 into r821 as U256__8JquwLopp8;\n    lt r821.lo r812.lo into r822;\n    ternary r822 1u128 0u128 into r823;\n    sub.w r821.lo r812.lo into r824;\n    sub.w r821.hi r812.hi into r825;\n    sub.w r825 r823 into r826;\n    cast r826 r824 into r827 as U256__8JquwLopp8;\n    lt r34.fee_growth_global1_x_128.lo r796.lo into r828;\n    ternary r828 1u128 0u128 into r829;\n    sub.w r34.fee_growth_global1_x_128.lo r796.lo into r830;\n    sub.w r34.fee_growth_global1_x_128.hi r796.hi into r831;\n    sub.w r831 r829 into r832;\n    cast r832 r830 into r833 as U256__8JquwLopp8;\n    lt r833.lo r815.lo into r834;\n    ternary r834 1u128 0u128 into r835;\n    sub.w r833.lo r815.lo into r836;\n    sub.w r833.hi r815.hi into r837;\n    sub.w r837 r835 into r838;\n    cast r838 r836 into r839 as U256__8JquwLopp8;\n    contains positions[r3] into r840;\n    not r840 into r841;\n    assert.eq r841 true;\n    sub r2.amount0_desired r671 into r842;\n    sub r2.amount1_desired r673 into r843;\n    cast r3 r2.pool r2.tick_lower r2.tick_upper r235 r827 r839 r842 r843 into r844 as Position;\n    set r844 into positions[r3];\n    lte r2.tick_lower r34.tick into r845;\n    and r706 r845 into r846;\n    gt r2.tick_lower r34.next_init_below into r847;\n    and r846 r847 into r848;\n    ternary r848 r2.tick_lower r34.next_init_below into r849;\n    gt r2.tick_lower r34.tick into r850;\n    and r706 r850 into r851;\n    lt r2.tick_lower r34.next_init_above into r852;\n    and r851 r852 into r853;\n    ternary r853 r2.tick_lower r34.next_init_above into r854;\n    lte r2.tick_upper r34.tick into r855;\n    and r717 r855 into r856;\n    gt r2.tick_upper r849 into r857;\n    and r856 r857 into r858;\n    ternary r858 r2.tick_upper r849 into r859;\n    gt r2.tick_upper r34.tick into r860;\n    and r717 r860 into r861;\n    lt r2.tick_upper r854 into r862;\n    and r861 r862 into r863;\n    ternary r863 r2.tick_upper r854 into r864;\n    gte r34.tick r2.tick_lower into r865;\n    lt r34.tick r2.tick_upper into r866;\n    and r865 r866 into r867;\n    add r34.liquidity r235 into r868;\n    ternary r867 r868 r34.liquidity into r869;\n    cast r34.tick r34.tick_spacing r34.sqrt_price r34.fee_protocol r869 r34.fee_growth_global0_x_128 r34.fee_growth_global1_x_128 r34.max_liquidity_per_tick r34.protocol_fees0 r34.protocol_fees1 r859 r864 into r870 as Slot;\n    set r870 into slots[r2.pool];\n\nfunction decrease_liquidity:\n    input r0 as PositionNFT.record;\n    input r1 as u128.public;\n    input r2 as u128.public;\n    input r3 as u128.public;\n    cast r0.owner r0.withdrawal r0.token_id r0.token0_id r0.token1_id r0.pool r0.tick_lower r0.tick_upper into r4 as PositionNFT.record;\n    async decrease_liquidity r0.token_id r0.pool r0.tick_lower r0.tick_upper r1 r2 r3 into r5;\n    output r0.token_id as field.public;\n    output r4 as PositionNFT.record;\n    output r5 as shield_swap.aleo/decrease_liquidity.future;\n\nfinalize decrease_liquidity:\n    input r0 as field.public;\n    input r1 as field.public;\n    input r2 as i32.public;\n    input r3 as i32.public;\n    input r4 as u128.public;\n    input r5 as u128.public;\n    input r6 as u128.public;\n    get positions[r0] into r7;\n    contains frozen_position[r0] into r8;\n    not r8 into r9;\n    assert.eq r9 true;\n    is.eq r7.pool r1 into r10;\n    is.eq r7.tick_lower r2 into r11;\n    and r10 r11 into r12;\n    is.eq r7.tick_upper r3 into r13;\n    and r12 r13 into r14;\n    assert.eq r14 true;\n    lte r4 r7.liquidity into r15;\n    assert.eq r15 true;\n    get positions[r0] into r16;\n    get slots[r16.pool] into r17;\n    call view_sqrt_price_at_tick_x128 r16.tick_lower into r18;\n    call view_sqrt_price_at_tick_x128 r16.tick_upper into r19;\n    lt r18.hi r19.hi into r20;\n    gt r18.hi r19.hi into r21;\n    lt r18.lo r19.lo into r22;\n    ternary r21 false r22 into r23;\n    ternary r20 true r23 into r24;\n    ternary r24 r18.hi r19.hi into r25;\n    ternary r24 r18.lo r19.lo into r26;\n    cast r25 r26 into r27 as U256__8JquwLopp8;\n    lt r18.hi r19.hi into r28;\n    gt r18.hi r19.hi into r29;\n    lt r18.lo r19.lo into r30;\n    ternary r29 false r30 into r31;\n    ternary r28 true r31 into r32;\n    ternary r32 r19.hi r18.hi into r33;\n    ternary r32 r19.lo r18.lo into r34;\n    cast r33 r34 into r35 as U256__8JquwLopp8;\n    lt r27.hi r17.sqrt_price.hi into r36;\n    gt r27.hi r17.sqrt_price.hi into r37;\n    lt r27.lo r17.sqrt_price.lo into r38;\n    ternary r37 false r38 into r39;\n    ternary r36 true r39 into r40;\n    not r40 into r41;\n    not r41 into r42;\n    lt r17.sqrt_price.hi r35.hi into r43;\n    gt r17.sqrt_price.hi r35.hi into r44;\n    lt r17.sqrt_price.lo r35.lo into r45;\n    ternary r44 false r45 into r46;\n    ternary r43 true r46 into r47;\n    and r42 r47 into r48;\n    lt r17.sqrt_price.hi r35.hi into r49;\n    gt r17.sqrt_price.hi r35.hi into r50;\n    lt r17.sqrt_price.lo r35.lo into r51;\n    ternary r50 false r51 into r52;\n    ternary r49 true r52 into r53;\n    not r53 into r54;\n    and r42 r54 into r55;\n    ternary r41 r4 0u128 into r56;\n    lt r27.hi r35.hi into r57;\n    gt r27.hi r35.hi into r58;\n    lt r27.lo r35.lo into r59;\n    ternary r58 false r59 into r60;\n    ternary r57 true r60 into r61;\n    ternary r61 r27.hi r35.hi into r62;\n    ternary r61 r27.lo r35.lo into r63;\n    cast r62 r63 into r64 as U256__8JquwLopp8;\n    lt r27.hi r35.hi into r65;\n    gt r27.hi r35.hi into r66;\n    lt r27.lo r35.lo into r67;\n    ternary r66 false r67 into r68;\n    ternary r65 true r68 into r69;\n    ternary r69 r35.hi r27.hi into r70;\n    ternary r69 r35.lo r27.lo into r71;\n    cast r70 r71 into r72 as U256__8JquwLopp8;\n    lt r72.lo r64.lo into r73;\n    ternary r73 1u128 0u128 into r74;\n    sub.w r72.lo r64.lo into r75;\n    sub.w r72.hi r64.hi into r76;\n    sub.w r76 r74 into r77;\n    cast r77 r75 into r78 as U256__8JquwLopp8;\n    cast r56 0u128 into r79 as U256__8JquwLopp8;\n    call view_mul_div r79 r78 r72 false into r80;\n    cast 0u128 1u128 into r81 as U256__8JquwLopp8;\n    call view_mul_div r80 r81 r64 false into r82;\n    is.eq r82.hi 0u128 into r83;\n    assert.eq r83 true;\n    ternary r48 r4 0u128 into r84;\n    lt r17.sqrt_price.hi r35.hi into r85;\n    gt r17.sqrt_price.hi r35.hi into r86;\n    lt r17.sqrt_price.lo r35.lo into r87;\n    ternary r86 false r87 into r88;\n    ternary r85 true r88 into r89;\n    ternary r89 r17.sqrt_price.hi r35.hi into r90;\n    ternary r89 r17.sqrt_price.lo r35.lo into r91;\n    cast r90 r91 into r92 as U256__8JquwLopp8;\n    lt r17.sqrt_price.hi r35.hi into r93;\n    gt r17.sqrt_price.hi r35.hi into r94;\n    lt r17.sqrt_price.lo r35.lo into r95;\n    ternary r94 false r95 into r96;\n    ternary r93 true r96 into r97;\n    ternary r97 r35.hi r17.sqrt_price.hi into r98;\n    ternary r97 r35.lo r17.sqrt_price.lo into r99;\n    cast r98 r99 into r100 as U256__8JquwLopp8;\n    lt r100.lo r92.lo into r101;\n    ternary r101 1u128 0u128 into r102;\n    sub.w r100.lo r92.lo into r103;\n    sub.w r100.hi r92.hi into r104;\n    sub.w r104 r102 into r105;\n    cast r105 r103 into r106 as U256__8JquwLopp8;\n    cast r84 0u128 into r107 as U256__8JquwLopp8;\n    call view_mul_div r107 r106 r100 false into r108;\n    cast 0u128 1u128 into r109 as U256__8JquwLopp8;\n    call view_mul_div r108 r109 r92 false into r110;\n    is.eq r110.hi 0u128 into r111;\n    assert.eq r111 true;\n    lt r27.hi r17.sqrt_price.hi into r112;\n    gt r27.hi r17.sqrt_price.hi into r113;\n    lt r27.lo r17.sqrt_price.lo into r114;\n    ternary r113 false r114 into r115;\n    ternary r112 true r115 into r116;\n    ternary r116 r27.hi r17.sqrt_price.hi into r117;\n    ternary r116 r27.lo r17.sqrt_price.lo into r118;\n    cast r117 r118 into r119 as U256__8JquwLopp8;\n    lt r27.hi r17.sqrt_price.hi into r120;\n    gt r27.hi r17.sqrt_price.hi into r121;\n    lt r27.lo r17.sqrt_price.lo into r122;\n    ternary r121 false r122 into r123;\n    ternary r120 true r123 into r124;\n    ternary r124 r17.sqrt_price.hi r27.hi into r125;\n    ternary r124 r17.sqrt_price.lo r27.lo into r126;\n    cast r125 r126 into r127 as U256__8JquwLopp8;\n    lt r127.lo r119.lo into r128;\n    ternary r128 1u128 0u128 into r129;\n    sub.w r127.lo r119.lo into r130;\n    sub.w r127.hi r119.hi into r131;\n    sub.w r131 r129 into r132;\n    cast r132 r130 into r133 as U256__8JquwLopp8;\n    cast 0u128 r84 into r134 as U256__8JquwLopp8;\n    and r134.lo 18446744073709551615u128 into r135;\n    shr r134.lo 64u8 into r136;\n    and r133.lo 18446744073709551615u128 into r137;\n    shr r133.lo 64u8 into r138;\n    mul r135 r137 into r139;\n    mul r135 r138 into r140;\n    mul r136 r137 into r141;\n    mul r136 r138 into r142;\n    and r139 18446744073709551615u128 into r143;\n    shr r139 64u8 into r144;\n    and r140 18446744073709551615u128 into r145;\n    add r144 r145 into r146;\n    and r141 18446744073709551615u128 into r147;\n    add r146 r147 into r148;\n    and r148 18446744073709551615u128 into r149;\n    shr r148 64u8 into r150;\n    shr r140 64u8 into r151;\n    shr r141 64u8 into r152;\n    add r151 r152 into r153;\n    and r142 18446744073709551615u128 into r154;\n    add r153 r154 into r155;\n    add r155 r150 into r156;\n    and r156 18446744073709551615u128 into r157;\n    shr r156 64u8 into r158;\n    shr r142 64u8 into r159;\n    add r159 r158 into r160;\n    shl r160 64u8 into r161;\n    add r161 r157 into r162;\n    shl r149 64u8 into r163;\n    add r163 r143 into r164;\n    and r134.lo 18446744073709551615u128 into r165;\n    shr r134.lo 64u8 into r166;\n    and r133.hi 18446744073709551615u128 into r167;\n    shr r133.hi 64u8 into r168;\n    mul r165 r167 into r169;\n    mul r165 r168 into r170;\n    mul r166 r167 into r171;\n    mul r166 r168 into r172;\n    and r169 18446744073709551615u128 into r173;\n    shr r169 64u8 into r174;\n    and r170 18446744073709551615u128 into r175;\n    add r174 r175 into r176;\n    and r171 18446744073709551615u128 into r177;\n    add r176 r177 into r178;\n    and r178 18446744073709551615u128 into r179;\n    shr r178 64u8 into r180;\n    shr r170 64u8 into r181;\n    shr r171 64u8 into r182;\n    add r181 r182 into r183;\n    and r172 18446744073709551615u128 into r184;\n    add r183 r184 into r185;\n    add r185 r180 into r186;\n    and r186 18446744073709551615u128 into r187;\n    shr r186 64u8 into r188;\n    shr r172 64u8 into r189;\n    add r189 r188 into r190;\n    shl r190 64u8 into r191;\n    add r191 r187 into r192;\n    shl r179 64u8 into r193;\n    add r193 r173 into r194;\n    and r134.hi 18446744073709551615u128 into r195;\n    shr r134.hi 64u8 into r196;\n    and r133.lo 18446744073709551615u128 into r197;\n    shr r133.lo 64u8 into r198;\n    mul r195 r197 into r199;\n    mul r195 r198 into r200;\n    mul r196 r197 into r201;\n    mul r196 r198 into r202;\n    and r199 18446744073709551615u128 into r203;\n    shr r199 64u8 into r204;\n    and r200 18446744073709551615u128 into r205;\n    add r204 r205 into r206;\n    and r201 18446744073709551615u128 into r207;\n    add r206 r207 into r208;\n    and r208 18446744073709551615u128 into r209;\n    shr r208 64u8 into r210;\n    shr r200 64u8 into r211;\n    shr r201 64u8 into r212;\n    add r211 r212 into r213;\n    and r202 18446744073709551615u128 into r214;\n    add r213 r214 into r215;\n    add r215 r210 into r216;\n    and r216 18446744073709551615u128 into r217;\n    shr r216 64u8 into r218;\n    shr r202 64u8 into r219;\n    add r219 r218 into r220;\n    shl r220 64u8 into r221;\n    add r221 r217 into r222;\n    shl r209 64u8 into r223;\n    add r223 r203 into r224;\n    and r134.hi 18446744073709551615u128 into r225;\n    shr r134.hi 64u8 into r226;\n    and r133.hi 18446744073709551615u128 into r227;\n    shr r133.hi 64u8 into r228;\n    mul r225 r227 into r229;\n    mul r225 r228 into r230;\n    mul r226 r227 into r231;\n    mul r226 r228 into r232;\n    and r229 18446744073709551615u128 into r233;\n    shr r229 64u8 into r234;\n    and r230 18446744073709551615u128 into r235;\n    add r234 r235 into r236;\n    and r231 18446744073709551615u128 into r237;\n    add r236 r237 into r238;\n    and r238 18446744073709551615u128 into r239;\n    shr r238 64u8 into r240;\n    shr r230 64u8 into r241;\n    shr r231 64u8 into r242;\n    add r241 r242 into r243;\n    and r232 18446744073709551615u128 into r244;\n    add r243 r244 into r245;\n    add r245 r240 into r246;\n    and r246 18446744073709551615u128 into r247;\n    shr r246 64u8 into r248;\n    shr r232 64u8 into r249;\n    add r249 r248 into r250;\n    shl r250 64u8 into r251;\n    add r251 r247 into r252;\n    shl r239 64u8 into r253;\n    add r253 r233 into r254;\n    add.w r162 r194 into r255;\n    lt r255 r162 into r256;\n    ternary r256 1u128 0u128 into r257;\n    add.w r255 r224 into r258;\n    lt r258 r255 into r259;\n    ternary r259 1u128 0u128 into r260;\n    add r257 r260 into r261;\n    add.w r192 r222 into r262;\n    lt r262 r192 into r263;\n    ternary r263 1u128 0u128 into r264;\n    add.w r262 r254 into r265;\n    lt r265 r262 into r266;\n    ternary r266 1u128 0u128 into r267;\n    add.w r265 r261 into r268;\n    lt r268 r265 into r269;\n    ternary r269 1u128 0u128 into r270;\n    add r264 r267 into r271;\n    add r271 r270 into r272;\n    add.w r252 r272 into r273;\n    cast r273 r268 into r274 as U256__8JquwLopp8;\n    cast r258 r164 into r275 as U256__8JquwLopp8;\n    is.eq r274.hi 0u128 into r276;\n    is.eq r274.lo 0u128 into r277;\n    and r276 r277 into r278;\n    assert.eq r278 true;\n    ternary r55 r4 0u128 into r279;\n    lt r27.hi r35.hi into r280;\n    gt r27.hi r35.hi into r281;\n    lt r27.lo r35.lo into r282;\n    ternary r281 false r282 into r283;\n    ternary r280 true r283 into r284;\n    ternary r284 r27.hi r35.hi into r285;\n    ternary r284 r27.lo r35.lo into r286;\n    cast r285 r286 into r287 as U256__8JquwLopp8;\n    lt r27.hi r35.hi into r288;\n    gt r27.hi r35.hi into r289;\n    lt r27.lo r35.lo into r290;\n    ternary r289 false r290 into r291;\n    ternary r288 true r291 into r292;\n    ternary r292 r35.hi r27.hi into r293;\n    ternary r292 r35.lo r27.lo into r294;\n    cast r293 r294 into r295 as U256__8JquwLopp8;\n    lt r295.lo r287.lo into r296;\n    ternary r296 1u128 0u128 into r297;\n    sub.w r295.lo r287.lo into r298;\n    sub.w r295.hi r287.hi into r299;\n    sub.w r299 r297 into r300;\n    cast r300 r298 into r301 as U256__8JquwLopp8;\n    cast 0u128 r279 into r302 as U256__8JquwLopp8;\n    and r302.lo 18446744073709551615u128 into r303;\n    shr r302.lo 64u8 into r304;\n    and r301.lo 18446744073709551615u128 into r305;\n    shr r301.lo 64u8 into r306;\n    mul r303 r305 into r307;\n    mul r303 r306 into r308;\n    mul r304 r305 into r309;\n    mul r304 r306 into r310;\n    and r307 18446744073709551615u128 into r311;\n    shr r307 64u8 into r312;\n    and r308 18446744073709551615u128 into r313;\n    add r312 r313 into r314;\n    and r309 18446744073709551615u128 into r315;\n    add r314 r315 into r316;\n    and r316 18446744073709551615u128 into r317;\n    shr r316 64u8 into r318;\n    shr r308 64u8 into r319;\n    shr r309 64u8 into r320;\n    add r319 r320 into r321;\n    and r310 18446744073709551615u128 into r322;\n    add r321 r322 into r323;\n    add r323 r318 into r324;\n    and r324 18446744073709551615u128 into r325;\n    shr r324 64u8 into r326;\n    shr r310 64u8 into r327;\n    add r327 r326 into r328;\n    shl r328 64u8 into r329;\n    add r329 r325 into r330;\n    shl r317 64u8 into r331;\n    add r331 r311 into r332;\n    and r302.lo 18446744073709551615u128 into r333;\n    shr r302.lo 64u8 into r334;\n    and r301.hi 18446744073709551615u128 into r335;\n    shr r301.hi 64u8 into r336;\n    mul r333 r335 into r337;\n    mul r333 r336 into r338;\n    mul r334 r335 into r339;\n    mul r334 r336 into r340;\n    and r337 18446744073709551615u128 into r341;\n    shr r337 64u8 into r342;\n    and r338 18446744073709551615u128 into r343;\n    add r342 r343 into r344;\n    and r339 18446744073709551615u128 into r345;\n    add r344 r345 into r346;\n    and r346 18446744073709551615u128 into r347;\n    shr r346 64u8 into r348;\n    shr r338 64u8 into r349;\n    shr r339 64u8 into r350;\n    add r349 r350 into r351;\n    and r340 18446744073709551615u128 into r352;\n    add r351 r352 into r353;\n    add r353 r348 into r354;\n    and r354 18446744073709551615u128 into r355;\n    shr r354 64u8 into r356;\n    shr r340 64u8 into r357;\n    add r357 r356 into r358;\n    shl r358 64u8 into r359;\n    add r359 r355 into r360;\n    shl r347 64u8 into r361;\n    add r361 r341 into r362;\n    and r302.hi 18446744073709551615u128 into r363;\n    shr r302.hi 64u8 into r364;\n    and r301.lo 18446744073709551615u128 into r365;\n    shr r301.lo 64u8 into r366;\n    mul r363 r365 into r367;\n    mul r363 r366 into r368;\n    mul r364 r365 into r369;\n    mul r364 r366 into r370;\n    and r367 18446744073709551615u128 into r371;\n    shr r367 64u8 into r372;\n    and r368 18446744073709551615u128 into r373;\n    add r372 r373 into r374;\n    and r369 18446744073709551615u128 into r375;\n    add r374 r375 into r376;\n    and r376 18446744073709551615u128 into r377;\n    shr r376 64u8 into r378;\n    shr r368 64u8 into r379;\n    shr r369 64u8 into r380;\n    add r379 r380 into r381;\n    and r370 18446744073709551615u128 into r382;\n    add r381 r382 into r383;\n    add r383 r378 into r384;\n    and r384 18446744073709551615u128 into r385;\n    shr r384 64u8 into r386;\n    shr r370 64u8 into r387;\n    add r387 r386 into r388;\n    shl r388 64u8 into r389;\n    add r389 r385 into r390;\n    shl r377 64u8 into r391;\n    add r391 r371 into r392;\n    and r302.hi 18446744073709551615u128 into r393;\n    shr r302.hi 64u8 into r394;\n    and r301.hi 18446744073709551615u128 into r395;\n    shr r301.hi 64u8 into r396;\n    mul r393 r395 into r397;\n    mul r393 r396 into r398;\n    mul r394 r395 into r399;\n    mul r394 r396 into r400;\n    and r397 18446744073709551615u128 into r401;\n    shr r397 64u8 into r402;\n    and r398 18446744073709551615u128 into r403;\n    add r402 r403 into r404;\n    and r399 18446744073709551615u128 into r405;\n    add r404 r405 into r406;\n    and r406 18446744073709551615u128 into r407;\n    shr r406 64u8 into r408;\n    shr r398 64u8 into r409;\n    shr r399 64u8 into r410;\n    add r409 r410 into r411;\n    and r400 18446744073709551615u128 into r412;\n    add r411 r412 into r413;\n    add r413 r408 into r414;\n    and r414 18446744073709551615u128 into r415;\n    shr r414 64u8 into r416;\n    shr r400 64u8 into r417;\n    add r417 r416 into r418;\n    shl r418 64u8 into r419;\n    add r419 r415 into r420;\n    shl r407 64u8 into r421;\n    add r421 r401 into r422;\n    add.w r330 r362 into r423;\n    lt r423 r330 into r424;\n    ternary r424 1u128 0u128 into r425;\n    add.w r423 r392 into r426;\n    lt r426 r423 into r427;\n    ternary r427 1u128 0u128 into r428;\n    add r425 r428 into r429;\n    add.w r360 r390 into r430;\n    lt r430 r360 into r431;\n    ternary r431 1u128 0u128 into r432;\n    add.w r430 r422 into r433;\n    lt r433 r430 into r434;\n    ternary r434 1u128 0u128 into r435;\n    add.w r433 r429 into r436;\n    lt r436 r433 into r437;\n    ternary r437 1u128 0u128 into r438;\n    add r432 r435 into r439;\n    add r439 r438 into r440;\n    add.w r420 r440 into r441;\n    cast r441 r436 into r442 as U256__8JquwLopp8;\n    cast r426 r332 into r443 as U256__8JquwLopp8;\n    is.eq r442.hi 0u128 into r444;\n    is.eq r442.lo 0u128 into r445;\n    and r444 r445 into r446;\n    assert.eq r446 true;\n    ternary r48 r110.lo 0u128 into r447;\n    ternary r41 r82.lo r447 into r448;\n    ternary r55 r443.hi 0u128 into r449;\n    ternary r48 r275.hi r449 into r450;\n    cast r16.pool r16.tick_lower into r451 as TickKey;\n    hash.bhp256 r451 into r452 as field;\n    cast r16.pool r16.tick_upper into r453 as TickKey;\n    hash.bhp256 r453 into r454 as field;\n    get ticks[r452] into r455;\n    get ticks[r454] into r456;\n    gt r455.liquidity_gross 0u128 into r457;\n    gt r456.liquidity_gross 0u128 into r458;\n    sub r455.liquidity_gross r4 into r459;\n    sub r456.liquidity_gross r4 into r460;\n    is.eq r459 0u128 into r461;\n    and r457 r461 into r462;\n    is.eq r460 0u128 into r463;\n    and r458 r463 into r464;\n    cast r4 into r465 as i128;\n    sub r455.liquidity_net r465 into r466;\n    cast r455.pool r466 r459 r455.tick r455.fee_growth_outside0_x_128 r455.fee_growth_outside1_x_128 r455.prev r455.next into r467 as Tick;\n    set r467 into ticks[r452];\n    branch.eq r462 false to end_then_0_0;\n    cast r16.pool r455.prev into r468 as TickKey;\n    hash.bhp256 r468 into r469 as field;\n    get ticks[r469] into r470;\n    cast r470.pool r470.liquidity_net r470.liquidity_gross r470.tick r470.fee_growth_outside0_x_128 r470.fee_growth_outside1_x_128 r470.prev r455.next into r471 as Tick;\n    set r471 into ticks[r469];\n    cast r16.pool r455.next into r472 as TickKey;\n    hash.bhp256 r472 into r473 as field;\n    get ticks[r473] into r474;\n    cast r474.pool r474.liquidity_net r474.liquidity_gross r474.tick r474.fee_growth_outside0_x_128 r474.fee_growth_outside1_x_128 r455.prev r474.next into r475 as Tick;\n    set r475 into ticks[r473];\n    branch.eq true true to end_otherwise_0_1;\n    position end_then_0_0;\n    position end_otherwise_0_1;\n    get ticks[r454] into r476;\n    cast r4 into r477 as i128;\n    add r476.liquidity_net r477 into r478;\n    cast r476.pool r478 r460 r476.tick r476.fee_growth_outside0_x_128 r476.fee_growth_outside1_x_128 r476.prev r476.next into r479 as Tick;\n    set r479 into ticks[r454];\n    branch.eq r464 false to end_then_0_2;\n    cast r16.pool r476.prev into r480 as TickKey;\n    hash.bhp256 r480 into r481 as field;\n    get ticks[r481] into r482;\n    cast r482.pool r482.liquidity_net r482.liquidity_gross r482.tick r482.fee_growth_outside0_x_128 r482.fee_growth_outside1_x_128 r482.prev r476.next into r483 as Tick;\n    set r483 into ticks[r481];\n    cast r16.pool r476.next into r484 as TickKey;\n    hash.bhp256 r484 into r485 as field;\n    get ticks[r485] into r486;\n    cast r486.pool r486.liquidity_net r486.liquidity_gross r486.tick r486.fee_growth_outside0_x_128 r486.fee_growth_outside1_x_128 r476.prev r486.next into r487 as Tick;\n    set r487 into ticks[r485];\n    branch.eq true true to end_otherwise_0_3;\n    position end_then_0_2;\n    position end_otherwise_0_3;\n    get ticks[r452] into r488;\n    get ticks[r454] into r489;\n    gte r17.tick r488.tick into r490;\n    lt r17.fee_growth_global0_x_128.lo r488.fee_growth_outside0_x_128.lo into r491;\n    ternary r491 1u128 0u128 into r492;\n    sub.w r17.fee_growth_global0_x_128.lo r488.fee_growth_outside0_x_128.lo into r493;\n    sub.w r17.fee_growth_global0_x_128.hi r488.fee_growth_outside0_x_128.hi into r494;\n    sub.w r494 r492 into r495;\n    cast r495 r493 into r496 as U256__8JquwLopp8;\n    lt r17.fee_growth_global1_x_128.lo r488.fee_growth_outside1_x_128.lo into r497;\n    ternary r497 1u128 0u128 into r498;\n    sub.w r17.fee_growth_global1_x_128.lo r488.fee_growth_outside1_x_128.lo into r499;\n    sub.w r17.fee_growth_global1_x_128.hi r488.fee_growth_outside1_x_128.hi into r500;\n    sub.w r500 r498 into r501;\n    cast r501 r499 into r502 as U256__8JquwLopp8;\n    ternary r490 r488.fee_growth_outside0_x_128.hi r496.hi into r503;\n    ternary r490 r488.fee_growth_outside0_x_128.lo r496.lo into r504;\n    cast r503 r504 into r505 as U256__8JquwLopp8;\n    ternary r490 r488.fee_growth_outside1_x_128.hi r502.hi into r506;\n    ternary r490 r488.fee_growth_outside1_x_128.lo r502.lo into r507;\n    cast r506 r507 into r508 as U256__8JquwLopp8;\n    lt r17.tick r489.tick into r509;\n    lt r17.fee_growth_global0_x_128.lo r489.fee_growth_outside0_x_128.lo into r510;\n    ternary r510 1u128 0u128 into r511;\n    sub.w r17.fee_growth_global0_x_128.lo r489.fee_growth_outside0_x_128.lo into r512;\n    sub.w r17.fee_growth_global0_x_128.hi r489.fee_growth_outside0_x_128.hi into r513;\n    sub.w r513 r511 into r514;\n    cast r514 r512 into r515 as U256__8JquwLopp8;\n    lt r17.fee_growth_global1_x_128.lo r489.fee_growth_outside1_x_128.lo into r516;\n    ternary r516 1u128 0u128 into r517;\n    sub.w r17.fee_growth_global1_x_128.lo r489.fee_growth_outside1_x_128.lo into r518;\n    sub.w r17.fee_growth_global1_x_128.hi r489.fee_growth_outside1_x_128.hi into r519;\n    sub.w r519 r517 into r520;\n    cast r520 r518 into r521 as U256__8JquwLopp8;\n    ternary r509 r489.fee_growth_outside0_x_128.hi r515.hi into r522;\n    ternary r509 r489.fee_growth_outside0_x_128.lo r515.lo into r523;\n    cast r522 r523 into r524 as U256__8JquwLopp8;\n    ternary r509 r489.fee_growth_outside1_x_128.hi r521.hi into r525;\n    ternary r509 r489.fee_growth_outside1_x_128.lo r521.lo into r526;\n    cast r525 r526 into r527 as U256__8JquwLopp8;\n    lt r17.fee_growth_global0_x_128.lo r505.lo into r528;\n    ternary r528 1u128 0u128 into r529;\n    sub.w r17.fee_growth_global0_x_128.lo r505.lo into r530;\n    sub.w r17.fee_growth_global0_x_128.hi r505.hi into r531;\n    sub.w r531 r529 into r532;\n    cast r532 r530 into r533 as U256__8JquwLopp8;\n    lt r533.lo r524.lo into r534;\n    ternary r534 1u128 0u128 into r535;\n    sub.w r533.lo r524.lo into r536;\n    sub.w r533.hi r524.hi into r537;\n    sub.w r537 r535 into r538;\n    cast r538 r536 into r539 as U256__8JquwLopp8;\n    lt r17.fee_growth_global1_x_128.lo r508.lo into r540;\n    ternary r540 1u128 0u128 into r541;\n    sub.w r17.fee_growth_global1_x_128.lo r508.lo into r542;\n    sub.w r17.fee_growth_global1_x_128.hi r508.hi into r543;\n    sub.w r543 r541 into r544;\n    cast r544 r542 into r545 as U256__8JquwLopp8;\n    lt r545.lo r527.lo into r546;\n    ternary r546 1u128 0u128 into r547;\n    sub.w r545.lo r527.lo into r548;\n    sub.w r545.hi r527.hi into r549;\n    sub.w r549 r547 into r550;\n    cast r550 r548 into r551 as U256__8JquwLopp8;\n    lt r539.lo r16.fee_growth_inside0_last_x_128.lo into r552;\n    ternary r552 1u128 0u128 into r553;\n    sub.w r539.lo r16.fee_growth_inside0_last_x_128.lo into r554;\n    sub.w r539.hi r16.fee_growth_inside0_last_x_128.hi into r555;\n    sub.w r555 r553 into r556;\n    cast r556 r554 into r557 as U256__8JquwLopp8;\n    and r557.hi 18446744073709551615u128 into r558;\n    shr r557.hi 64u8 into r559;\n    and r16.liquidity 18446744073709551615u128 into r560;\n    shr r16.liquidity 64u8 into r561;\n    mul r558 r560 into r562;\n    mul r558 r561 into r563;\n    mul r559 r560 into r564;\n    mul r559 r561 into r565;\n    and r562 18446744073709551615u128 into r566;\n    shr r562 64u8 into r567;\n    and r563 18446744073709551615u128 into r568;\n    add r567 r568 into r569;\n    and r564 18446744073709551615u128 into r570;\n    add r569 r570 into r571;\n    and r571 18446744073709551615u128 into r572;\n    shr r571 64u8 into r573;\n    shr r563 64u8 into r574;\n    shr r564 64u8 into r575;\n    add r574 r575 into r576;\n    and r565 18446744073709551615u128 into r577;\n    add r576 r577 into r578;\n    add r578 r573 into r579;\n    and r579 18446744073709551615u128 into r580;\n    shr r579 64u8 into r581;\n    shr r565 64u8 into r582;\n    add r582 r581 into r583;\n    shl r583 64u8 into r584;\n    add r584 r580 into r585;\n    shl r572 64u8 into r586;\n    add r586 r566 into r587;\n    and r557.lo 18446744073709551615u128 into r588;\n    shr r557.lo 64u8 into r589;\n    mul r588 r560 into r590;\n    mul r588 r561 into r591;\n    mul r589 r560 into r592;\n    mul r589 r561 into r593;\n    and r590 18446744073709551615u128 into r594;\n    shr r590 64u8 into r595;\n    and r591 18446744073709551615u128 into r596;\n    add r595 r596 into r597;\n    and r592 18446744073709551615u128 into r598;\n    add r597 r598 into r599;\n    and r599 18446744073709551615u128 into r600;\n    shr r599 64u8 into r601;\n    shr r591 64u8 into r602;\n    shr r592 64u8 into r603;\n    add r602 r603 into r604;\n    and r593 18446744073709551615u128 into r605;\n    add r604 r605 into r606;\n    add r606 r601 into r607;\n    and r607 18446744073709551615u128 into r608;\n    shr r607 64u8 into r609;\n    shr r593 64u8 into r610;\n    add r610 r609 into r611;\n    shl r611 64u8 into r612;\n    add r612 r608 into r613;\n    shl r600 64u8 into r614;\n    add r614 r594 into r615;\n    sub 340282366920938463463374607431768211455u128 r587 into r616;\n    lte r613 r616 into r617;\n    is.eq r585 0u128 into r618;\n    and r618 r617 into r619;\n    assert.eq r619 true;\n    add r587 r613 into r620;\n    add r16.tokens_owed0 r620 into r621;\n    add r621 r448 into r622;\n    lt r551.lo r16.fee_growth_inside1_last_x_128.lo into r623;\n    ternary r623 1u128 0u128 into r624;\n    sub.w r551.lo r16.fee_growth_inside1_last_x_128.lo into r625;\n    sub.w r551.hi r16.fee_growth_inside1_last_x_128.hi into r626;\n    sub.w r626 r624 into r627;\n    cast r627 r625 into r628 as U256__8JquwLopp8;\n    and r628.hi 18446744073709551615u128 into r629;\n    shr r628.hi 64u8 into r630;\n    and r16.liquidity 18446744073709551615u128 into r631;\n    shr r16.liquidity 64u8 into r632;\n    mul r629 r631 into r633;\n    mul r629 r632 into r634;\n    mul r630 r631 into r635;\n    mul r630 r632 into r636;\n    and r633 18446744073709551615u128 into r637;\n    shr r633 64u8 into r638;\n    and r634 18446744073709551615u128 into r639;\n    add r638 r639 into r640;\n    and r635 18446744073709551615u128 into r641;\n    add r640 r641 into r642;\n    and r642 18446744073709551615u128 into r643;\n    shr r642 64u8 into r644;\n    shr r634 64u8 into r645;\n    shr r635 64u8 into r646;\n    add r645 r646 into r647;\n    and r636 18446744073709551615u128 into r648;\n    add r647 r648 into r649;\n    add r649 r644 into r650;\n    and r650 18446744073709551615u128 into r651;\n    shr r650 64u8 into r652;\n    shr r636 64u8 into r653;\n    add r653 r652 into r654;\n    shl r654 64u8 into r655;\n    add r655 r651 into r656;\n    shl r643 64u8 into r657;\n    add r657 r637 into r658;\n    and r628.lo 18446744073709551615u128 into r659;\n    shr r628.lo 64u8 into r660;\n    mul r659 r631 into r661;\n    mul r659 r632 into r662;\n    mul r660 r631 into r663;\n    mul r660 r632 into r664;\n    and r661 18446744073709551615u128 into r665;\n    shr r661 64u8 into r666;\n    and r662 18446744073709551615u128 into r667;\n    add r666 r667 into r668;\n    and r663 18446744073709551615u128 into r669;\n    add r668 r669 into r670;\n    and r670 18446744073709551615u128 into r671;\n    shr r670 64u8 into r672;\n    shr r662 64u8 into r673;\n    shr r663 64u8 into r674;\n    add r673 r674 into r675;\n    and r664 18446744073709551615u128 into r676;\n    add r675 r676 into r677;\n    add r677 r672 into r678;\n    and r678 18446744073709551615u128 into r679;\n    shr r678 64u8 into r680;\n    shr r664 64u8 into r681;\n    add r681 r680 into r682;\n    shl r682 64u8 into r683;\n    add r683 r679 into r684;\n    shl r671 64u8 into r685;\n    add r685 r665 into r686;\n    sub 340282366920938463463374607431768211455u128 r658 into r687;\n    lte r684 r687 into r688;\n    is.eq r656 0u128 into r689;\n    and r689 r688 into r690;\n    assert.eq r690 true;\n    add r658 r684 into r691;\n    add r16.tokens_owed1 r691 into r692;\n    add r692 r450 into r693;\n    sub r16.liquidity r4 into r694;\n    cast r0 r16.pool r16.tick_lower r16.tick_upper r694 r539 r551 r622 r693 into r695 as Position;\n    set r695 into positions[r0];\n    is.eq r17.next_init_below r16.tick_lower into r696;\n    and r462 r696 into r697;\n    ternary r697 r455.prev r17.next_init_below into r698;\n    is.eq r17.next_init_above r16.tick_lower into r699;\n    and r462 r699 into r700;\n    ternary r700 r455.next r17.next_init_above into r701;\n    is.eq r698 r16.tick_upper into r702;\n    and r464 r702 into r703;\n    ternary r703 r476.prev r698 into r704;\n    is.eq r701 r16.tick_upper into r705;\n    and r464 r705 into r706;\n    ternary r706 r476.next r701 into r707;\n    gte r17.tick r16.tick_lower into r708;\n    lt r17.tick r16.tick_upper into r709;\n    and r708 r709 into r710;\n    ternary r710 r4 0u128 into r711;\n    sub r17.liquidity r711 into r712;\n    cast r17.tick r17.tick_spacing r17.sqrt_price r17.fee_protocol r712 r17.fee_growth_global0_x_128 r17.fee_growth_global1_x_128 r17.max_liquidity_per_tick r17.protocol_fees0 r17.protocol_fees1 r704 r707 into r713 as Slot;\n    set r713 into slots[r16.pool];\n    branch.eq r462 false to end_then_0_4;\n    remove ticks[r452];\n    branch.eq true true to end_otherwise_0_5;\n    position end_then_0_4;\n    position end_otherwise_0_5;\n    branch.eq r464 false to end_then_0_6;\n    remove ticks[r454];\n    branch.eq true true to end_otherwise_0_7;\n    position end_then_0_6;\n    position end_otherwise_0_7;\n    gte r448 r5 into r714;\n    gte r450 r6 into r715;\n    and r714 r715 into r716;\n    assert.eq r716 true;\n\nfunction increase_liquidity:\n    input r0 as PositionNFT.record;\n    input r1 as dynamic.record;\n    input r2 as dynamic.record;\n    input r3 as u128.public;\n    input r4 as u128.public;\n    input r5 as u128.public;\n    input r6 as u128.public;\n    input r7 as field.public;\n    input r8 as field.public;\n    input r9 as i32.public;\n    input r10 as i32.public;\n    is.eq self.caller aleo18sekmsl46y6skh3kvkekmw4kqqm7d6rz79akpsg58r7wpp5klyyq0qtzqf into r11;\n    cast r0.owner r0.withdrawal r0.token_id r0.token0_id r0.token1_id r0.pool r0.tick_lower r0.tick_upper into r12 as PositionNFT.record;\n    call.dynamic r7 'aleo' 'transfer_private_to_public' with r1 shield_swap.aleo r3 (as dynamic.record address.public u128.public) into r13 r14 (as dynamic.record dynamic.future);\n    call.dynamic r8 'aleo' 'transfer_private_to_public' with r2 shield_swap.aleo r4 (as dynamic.record address.public u128.public) into r15 r16 (as dynamic.record dynamic.future);\n    async increase_liquidity r14 r16 r0.token_id r0.pool r0.tick_lower r0.tick_upper r3 r4 r5 r6 r7 r8 r9 r10 r11 into r17;\n    output r0.token_id as field.public;\n    output r12 as PositionNFT.record;\n    output r13 as dynamic.record;\n    output r15 as dynamic.record;\n    output r17 as shield_swap.aleo/increase_liquidity.future;\n\nfinalize increase_liquidity:\n    input r0 as dynamic.future;\n    input r1 as dynamic.future;\n    input r2 as field.public;\n    input r3 as field.public;\n    input r4 as i32.public;\n    input r5 as i32.public;\n    input r6 as u128.public;\n    input r7 as u128.public;\n    input r8 as u128.public;\n    input r9 as u128.public;\n    input r10 as field.public;\n    input r11 as field.public;\n    input r12 as i32.public;\n    input r13 as i32.public;\n    input r14 as boolean.public;\n    contains from_wrapper_token_id[r10] into r15;\n    contains from_wrapper_token_id[r11] into r16;\n    or r15 r16 into r17;\n    branch.eq r17 false to end_then_0_0;\n    assert.eq r14 true;\n    branch.eq true true to end_otherwise_0_1;\n    position end_then_0_0;\n    position end_otherwise_0_1;\n    await r0;\n    await r1;\n    get.or_use global_paused[true] false into r18;\n    not r18 into r19;\n    assert.eq r19 true;\n    get pools[r3] into r20;\n    assert.eq r20.enabled true;\n    get.or_use token_paused[r20.token0] false into r21;\n    not r21 into r22;\n    assert.eq r22 true;\n    get.or_use token_paused[r20.token1] false into r23;\n    not r23 into r24;\n    assert.eq r24 true;\n    cast r20.token0 r20.token1 into r25 as PairKey;\n    get.or_use pair_paused[r25] false into r26;\n    not r26 into r27;\n    assert.eq r27 true;\n    is.eq r20.token0 r10 into r28;\n    assert.eq r28 true;\n    is.eq r20.token1 r11 into r29;\n    assert.eq r29 true;\n    get slots[r3] into r30;\n    get positions[r2] into r31;\n    contains frozen_position[r2] into r32;\n    not r32 into r33;\n    assert.eq r33 true;\n    is.eq r31.pool r3 into r34;\n    is.eq r31.tick_lower r4 into r35;\n    and r34 r35 into r36;\n    is.eq r31.tick_upper r5 into r37;\n    and r36 r37 into r38;\n    assert.eq r38 true;\n    call view_sqrt_price_at_tick_x128 r4 into r39;\n    call view_sqrt_price_at_tick_x128 r5 into r40;\n    lt r39.hi r40.hi into r41;\n    gt r39.hi r40.hi into r42;\n    lt r39.lo r40.lo into r43;\n    ternary r42 false r43 into r44;\n    ternary r41 true r44 into r45;\n    ternary r45 r39.hi r40.hi into r46;\n    ternary r45 r39.lo r40.lo into r47;\n    cast r46 r47 into r48 as U256__8JquwLopp8;\n    lt r39.hi r40.hi into r49;\n    gt r39.hi r40.hi into r50;\n    lt r39.lo r40.lo into r51;\n    ternary r50 false r51 into r52;\n    ternary r49 true r52 into r53;\n    ternary r53 r40.hi r39.hi into r54;\n    ternary r53 r40.lo r39.lo into r55;\n    cast r54 r55 into r56 as U256__8JquwLopp8;\n    lt r48.hi r30.sqrt_price.hi into r57;\n    gt r48.hi r30.sqrt_price.hi into r58;\n    lt r48.lo r30.sqrt_price.lo into r59;\n    ternary r58 false r59 into r60;\n    ternary r57 true r60 into r61;\n    not r61 into r62;\n    not r62 into r63;\n    lt r30.sqrt_price.hi r56.hi into r64;\n    gt r30.sqrt_price.hi r56.hi into r65;\n    lt r30.sqrt_price.lo r56.lo into r66;\n    ternary r65 false r66 into r67;\n    ternary r64 true r67 into r68;\n    and r63 r68 into r69;\n    lt r30.sqrt_price.hi r56.hi into r70;\n    gt r30.sqrt_price.hi r56.hi into r71;\n    lt r30.sqrt_price.lo r56.lo into r72;\n    ternary r71 false r72 into r73;\n    ternary r70 true r73 into r74;\n    not r74 into r75;\n    and r63 r75 into r76;\n    ternary r62 r6 0u128 into r77;\n    lt r48.hi r56.hi into r78;\n    gt r48.hi r56.hi into r79;\n    lt r48.lo r56.lo into r80;\n    ternary r79 false r80 into r81;\n    ternary r78 true r81 into r82;\n    ternary r82 r48.hi r56.hi into r83;\n    ternary r82 r48.lo r56.lo into r84;\n    cast r83 r84 into r85 as U256__8JquwLopp8;\n    lt r48.hi r56.hi into r86;\n    gt r48.hi r56.hi into r87;\n    lt r48.lo r56.lo into r88;\n    ternary r87 false r88 into r89;\n    ternary r86 true r89 into r90;\n    ternary r90 r56.hi r48.hi into r91;\n    ternary r90 r56.lo r48.lo into r92;\n    cast r91 r92 into r93 as U256__8JquwLopp8;\n    lt r93.lo r85.lo into r94;\n    ternary r94 1u128 0u128 into r95;\n    sub.w r93.lo r85.lo into r96;\n    sub.w r93.hi r85.hi into r97;\n    sub.w r97 r95 into r98;\n    cast r98 r96 into r99 as U256__8JquwLopp8;\n    is.eq r99.hi 0u128 into r100;\n    is.eq r99.lo 0u128 into r101;\n    and r100 r101 into r102;\n    ternary r102 0u128 r99.hi into r103;\n    ternary r102 1u128 r99.lo into r104;\n    cast r103 r104 into r105 as U256__8JquwLopp8;\n    is.eq r99.hi 0u128 into r106;\n    is.eq r99.lo 0u128 into r107;\n    and r106 r107 into r108;\n    ternary r108 0u128 r77 into r109;\n    cast 1u128 0u128 into r110 as U256__8JquwLopp8;\n    call view_mul_div r85 r93 r110 false into r111;\n    cast 0u128 r109 into r112 as U256__8JquwLopp8;\n    call view_mul_div r112 r111 r105 false into r113;\n    is.eq r113.hi 0u128 into r114;\n    assert.eq r114 true;\n    ternary r69 r6 0u128 into r115;\n    lt r30.sqrt_price.hi r56.hi into r116;\n    gt r30.sqrt_price.hi r56.hi into r117;\n    lt r30.sqrt_price.lo r56.lo into r118;\n    ternary r117 false r118 into r119;\n    ternary r116 true r119 into r120;\n    ternary r120 r30.sqrt_price.hi r56.hi into r121;\n    ternary r120 r30.sqrt_price.lo r56.lo into r122;\n    cast r121 r122 into r123 as U256__8JquwLopp8;\n    lt r30.sqrt_price.hi r56.hi into r124;\n    gt r30.sqrt_price.hi r56.hi into r125;\n    lt r30.sqrt_price.lo r56.lo into r126;\n    ternary r125 false r126 into r127;\n    ternary r124 true r127 into r128;\n    ternary r128 r56.hi r30.sqrt_price.hi into r129;\n    ternary r128 r56.lo r30.sqrt_price.lo into r130;\n    cast r129 r130 into r131 as U256__8JquwLopp8;\n    lt r131.lo r123.lo into r132;\n    ternary r132 1u128 0u128 into r133;\n    sub.w r131.lo r123.lo into r134;\n    sub.w r131.hi r123.hi into r135;\n    sub.w r135 r133 into r136;\n    cast r136 r134 into r137 as U256__8JquwLopp8;\n    is.eq r137.hi 0u128 into r138;\n    is.eq r137.lo 0u128 into r139;\n    and r138 r139 into r140;\n    ternary r140 0u128 r137.hi into r141;\n    ternary r140 1u128 r137.lo into r142;\n    cast r141 r142 into r143 as U256__8JquwLopp8;\n    is.eq r137.hi 0u128 into r144;\n    is.eq r137.lo 0u128 into r145;\n    and r144 r145 into r146;\n    ternary r146 0u128 r115 into r147;\n    cast 1u128 0u128 into r148 as U256__8JquwLopp8;\n    call view_mul_div r123 r131 r148 false into r149;\n    cast 0u128 r147 into r150 as U256__8JquwLopp8;\n    call view_mul_div r150 r149 r143 false into r151;\n    is.eq r151.hi 0u128 into r152;\n    assert.eq r152 true;\n    ternary r69 r7 0u128 into r153;\n    lt r48.hi r30.sqrt_price.hi into r154;\n    gt r48.hi r30.sqrt_price.hi into r155;\n    lt r48.lo r30.sqrt_price.lo into r156;\n    ternary r155 false r156 into r157;\n    ternary r154 true r157 into r158;\n    ternary r158 r48.hi r30.sqrt_price.hi into r159;\n    ternary r158 r48.lo r30.sqrt_price.lo into r160;\n    cast r159 r160 into r161 as U256__8JquwLopp8;\n    lt r48.hi r30.sqrt_price.hi into r162;\n    gt r48.hi r30.sqrt_price.hi into r163;\n    lt r48.lo r30.sqrt_price.lo into r164;\n    ternary r163 false r164 into r165;\n    ternary r162 true r165 into r166;\n    ternary r166 r30.sqrt_price.hi r48.hi into r167;\n    ternary r166 r30.sqrt_price.lo r48.lo into r168;\n    cast r167 r168 into r169 as U256__8JquwLopp8;\n    lt r169.lo r161.lo into r170;\n    ternary r170 1u128 0u128 into r171;\n    sub.w r169.lo r161.lo into r172;\n    sub.w r169.hi r161.hi into r173;\n    sub.w r173 r171 into r174;\n    cast r174 r172 into r175 as U256__8JquwLopp8;\n    is.eq r175.hi 0u128 into r176;\n    is.eq r175.lo 0u128 into r177;\n    and r176 r177 into r178;\n    ternary r178 0u128 r175.hi into r179;\n    ternary r178 1u128 r175.lo into r180;\n    cast r179 r180 into r181 as U256__8JquwLopp8;\n    is.eq r175.hi 0u128 into r182;\n    is.eq r175.lo 0u128 into r183;\n    and r182 r183 into r184;\n    ternary r184 0u128 r153 into r185;\n    cast r185 0u128 into r186 as U256__8JquwLopp8;\n    cast 0u128 1u128 into r187 as U256__8JquwLopp8;\n    call view_mul_div r186 r187 r181 false into r188;\n    is.eq r188.hi 0u128 into r189;\n    assert.eq r189 true;\n    ternary r76 r7 0u128 into r190;\n    lt r48.hi r56.hi into r191;\n    gt r48.hi r56.hi into r192;\n    lt r48.lo r56.lo into r193;\n    ternary r192 false r193 into r194;\n    ternary r191 true r194 into r195;\n    ternary r195 r48.hi r56.hi into r196;\n    ternary r195 r48.lo r56.lo into r197;\n    cast r196 r197 into r198 as U256__8JquwLopp8;\n    lt r48.hi r56.hi into r199;\n    gt r48.hi r56.hi into r200;\n    lt r48.lo r56.lo into r201;\n    ternary r200 false r201 into r202;\n    ternary r199 true r202 into r203;\n    ternary r203 r56.hi r48.hi into r204;\n    ternary r203 r56.lo r48.lo into r205;\n    cast r204 r205 into r206 as U256__8JquwLopp8;\n    lt r206.lo r198.lo into r207;\n    ternary r207 1u128 0u128 into r208;\n    sub.w r206.lo r198.lo into r209;\n    sub.w r206.hi r198.hi into r210;\n    sub.w r210 r208 into r211;\n    cast r211 r209 into r212 as U256__8JquwLopp8;\n    is.eq r212.hi 0u128 into r213;\n    is.eq r212.lo 0u128 into r214;\n    and r213 r214 into r215;\n    ternary r215 0u128 r212.hi into r216;\n    ternary r215 1u128 r212.lo into r217;\n    cast r216 r217 into r218 as U256__8JquwLopp8;\n    is.eq r212.hi 0u128 into r219;\n    is.eq r212.lo 0u128 into r220;\n    and r219 r220 into r221;\n    ternary r221 0u128 r190 into r222;\n    cast r222 0u128 into r223 as U256__8JquwLopp8;\n    cast 0u128 1u128 into r224 as U256__8JquwLopp8;\n    call view_mul_div r223 r224 r218 false into r225;\n    is.eq r225.hi 0u128 into r226;\n    assert.eq r226 true;\n    lt r151.lo r188.lo into r227;\n    ternary r227 r151.lo r188.lo into r228;\n    ternary r69 r228 r225.lo into r229;\n    ternary r62 r113.lo r229 into r230;\n    gt r230 0u128 into r231;\n    assert.eq r231 true;\n    lt r39.hi r40.hi into r232;\n    gt r39.hi r40.hi into r233;\n    lt r39.lo r40.lo into r234;\n    ternary r233 false r234 into r235;\n    ternary r232 true r235 into r236;\n    ternary r236 r39.hi r40.hi into r237;\n    ternary r236 r39.lo r40.lo into r238;\n    cast r237 r238 into r239 as U256__8JquwLopp8;\n    lt r39.hi r40.hi into r240;\n    gt r39.hi r40.hi into r241;\n    lt r39.lo r40.lo into r242;\n    ternary r241 false r242 into r243;\n    ternary r240 true r243 into r244;\n    ternary r244 r40.hi r39.hi into r245;\n    ternary r244 r40.lo r39.lo into r246;\n    cast r245 r246 into r247 as U256__8JquwLopp8;\n    lt r239.hi r30.sqrt_price.hi into r248;\n    gt r239.hi r30.sqrt_price.hi into r249;\n    lt r239.lo r30.sqrt_price.lo into r250;\n    ternary r249 false r250 into r251;\n    ternary r248 true r251 into r252;\n    not r252 into r253;\n    not r253 into r254;\n    lt r30.sqrt_price.hi r247.hi into r255;\n    gt r30.sqrt_price.hi r247.hi into r256;\n    lt r30.sqrt_price.lo r247.lo into r257;\n    ternary r256 false r257 into r258;\n    ternary r255 true r258 into r259;\n    and r254 r259 into r260;\n    lt r30.sqrt_price.hi r247.hi into r261;\n    gt r30.sqrt_price.hi r247.hi into r262;\n    lt r30.sqrt_price.lo r247.lo into r263;\n    ternary r262 false r263 into r264;\n    ternary r261 true r264 into r265;\n    not r265 into r266;\n    and r254 r266 into r267;\n    ternary r253 r230 0u128 into r268;\n    lt r239.hi r247.hi into r269;\n    gt r239.hi r247.hi into r270;\n    lt r239.lo r247.lo into r271;\n    ternary r270 false r271 into r272;\n    ternary r269 true r272 into r273;\n    ternary r273 r239.hi r247.hi into r274;\n    ternary r273 r239.lo r247.lo into r275;\n    cast r274 r275 into r276 as U256__8JquwLopp8;\n    lt r239.hi r247.hi into r277;\n    gt r239.hi r247.hi into r278;\n    lt r239.lo r247.lo into r279;\n    ternary r278 false r279 into r280;\n    ternary r277 true r280 into r281;\n    ternary r281 r247.hi r239.hi into r282;\n    ternary r281 r247.lo r239.lo into r283;\n    cast r282 r283 into r284 as U256__8JquwLopp8;\n    lt r284.lo r276.lo into r285;\n    ternary r285 1u128 0u128 into r286;\n    sub.w r284.lo r276.lo into r287;\n    sub.w r284.hi r276.hi into r288;\n    sub.w r288 r286 into r289;\n    cast r289 r287 into r290 as U256__8JquwLopp8;\n    cast r268 0u128 into r291 as U256__8JquwLopp8;\n    call view_mul_div r291 r290 r284 true into r292;\n    cast 0u128 1u128 into r293 as U256__8JquwLopp8;\n    call view_mul_div r292 r293 r276 true into r294;\n    is.eq r294.hi 0u128 into r295;\n    assert.eq r295 true;\n    ternary r260 r230 0u128 into r296;\n    lt r30.sqrt_price.hi r247.hi into r297;\n    gt r30.sqrt_price.hi r247.hi into r298;\n    lt r30.sqrt_price.lo r247.lo into r299;\n    ternary r298 false r299 into r300;\n    ternary r297 true r300 into r301;\n    ternary r301 r30.sqrt_price.hi r247.hi into r302;\n    ternary r301 r30.sqrt_price.lo r247.lo into r303;\n    cast r302 r303 into r304 as U256__8JquwLopp8;\n    lt r30.sqrt_price.hi r247.hi into r305;\n    gt r30.sqrt_price.hi r247.hi into r306;\n    lt r30.sqrt_price.lo r247.lo into r307;\n    ternary r306 false r307 into r308;\n    ternary r305 true r308 into r309;\n    ternary r309 r247.hi r30.sqrt_price.hi into r310;\n    ternary r309 r247.lo r30.sqrt_price.lo into r311;\n    cast r310 r311 into r312 as U256__8JquwLopp8;\n    lt r312.lo r304.lo into r313;\n    ternary r313 1u128 0u128 into r314;\n    sub.w r312.lo r304.lo into r315;\n    sub.w r312.hi r304.hi into r316;\n    sub.w r316 r314 into r317;\n    cast r317 r315 into r318 as U256__8JquwLopp8;\n    cast r296 0u128 into r319 as U256__8JquwLopp8;\n    call view_mul_div r319 r318 r312 true into r320;\n    cast 0u128 1u128 into r321 as U256__8JquwLopp8;\n    call view_mul_div r320 r321 r304 true into r322;\n    is.eq r322.hi 0u128 into r323;\n    assert.eq r323 true;\n    lt r239.hi r30.sqrt_price.hi into r324;\n    gt r239.hi r30.sqrt_price.hi into r325;\n    lt r239.lo r30.sqrt_price.lo into r326;\n    ternary r325 false r326 into r327;\n    ternary r324 true r327 into r328;\n    ternary r328 r239.hi r30.sqrt_price.hi into r329;\n    ternary r328 r239.lo r30.sqrt_price.lo into r330;\n    cast r329 r330 into r331 as U256__8JquwLopp8;\n    lt r239.hi r30.sqrt_price.hi into r332;\n    gt r239.hi r30.sqrt_price.hi into r333;\n    lt r239.lo r30.sqrt_price.lo into r334;\n    ternary r333 false r334 into r335;\n    ternary r332 true r335 into r336;\n    ternary r336 r30.sqrt_price.hi r239.hi into r337;\n    ternary r336 r30.sqrt_price.lo r239.lo into r338;\n    cast r337 r338 into r339 as U256__8JquwLopp8;\n    lt r339.lo r331.lo into r340;\n    ternary r340 1u128 0u128 into r341;\n    sub.w r339.lo r331.lo into r342;\n    sub.w r339.hi r331.hi into r343;\n    sub.w r343 r341 into r344;\n    cast r344 r342 into r345 as U256__8JquwLopp8;\n    cast 0u128 r296 into r346 as U256__8JquwLopp8;\n    and r346.lo 18446744073709551615u128 into r347;\n    shr r346.lo 64u8 into r348;\n    and r345.lo 18446744073709551615u128 into r349;\n    shr r345.lo 64u8 into r350;\n    mul r347 r349 into r351;\n    mul r347 r350 into r352;\n    mul r348 r349 into r353;\n    mul r348 r350 into r354;\n    and r351 18446744073709551615u128 into r355;\n    shr r351 64u8 into r356;\n    and r352 18446744073709551615u128 into r357;\n    add r356 r357 into r358;\n    and r353 18446744073709551615u128 into r359;\n    add r358 r359 into r360;\n    and r360 18446744073709551615u128 into r361;\n    shr r360 64u8 into r362;\n    shr r352 64u8 into r363;\n    shr r353 64u8 into r364;\n    add r363 r364 into r365;\n    and r354 18446744073709551615u128 into r366;\n    add r365 r366 into r367;\n    add r367 r362 into r368;\n    and r368 18446744073709551615u128 into r369;\n    shr r368 64u8 into r370;\n    shr r354 64u8 into r371;\n    add r371 r370 into r372;\n    shl r372 64u8 into r373;\n    add r373 r369 into r374;\n    shl r361 64u8 into r375;\n    add r375 r355 into r376;\n    and r346.lo 18446744073709551615u128 into r377;\n    shr r346.lo 64u8 into r378;\n    and r345.hi 18446744073709551615u128 into r379;\n    shr r345.hi 64u8 into r380;\n    mul r377 r379 into r381;\n    mul r377 r380 into r382;\n    mul r378 r379 into r383;\n    mul r378 r380 into r384;\n    and r381 18446744073709551615u128 into r385;\n    shr r381 64u8 into r386;\n    and r382 18446744073709551615u128 into r387;\n    add r386 r387 into r388;\n    and r383 18446744073709551615u128 into r389;\n    add r388 r389 into r390;\n    and r390 18446744073709551615u128 into r391;\n    shr r390 64u8 into r392;\n    shr r382 64u8 into r393;\n    shr r383 64u8 into r394;\n    add r393 r394 into r395;\n    and r384 18446744073709551615u128 into r396;\n    add r395 r396 into r397;\n    add r397 r392 into r398;\n    and r398 18446744073709551615u128 into r399;\n    shr r398 64u8 into r400;\n    shr r384 64u8 into r401;\n    add r401 r400 into r402;\n    shl r402 64u8 into r403;\n    add r403 r399 into r404;\n    shl r391 64u8 into r405;\n    add r405 r385 into r406;\n    and r346.hi 18446744073709551615u128 into r407;\n    shr r346.hi 64u8 into r408;\n    and r345.lo 18446744073709551615u128 into r409;\n    shr r345.lo 64u8 into r410;\n    mul r407 r409 into r411;\n    mul r407 r410 into r412;\n    mul r408 r409 into r413;\n    mul r408 r410 into r414;\n    and r411 18446744073709551615u128 into r415;\n    shr r411 64u8 into r416;\n    and r412 18446744073709551615u128 into r417;\n    add r416 r417 into r418;\n    and r413 18446744073709551615u128 into r419;\n    add r418 r419 into r420;\n    and r420 18446744073709551615u128 into r421;\n    shr r420 64u8 into r422;\n    shr r412 64u8 into r423;\n    shr r413 64u8 into r424;\n    add r423 r424 into r425;\n    and r414 18446744073709551615u128 into r426;\n    add r425 r426 into r427;\n    add r427 r422 into r428;\n    and r428 18446744073709551615u128 into r429;\n    shr r428 64u8 into r430;\n    shr r414 64u8 into r431;\n    add r431 r430 into r432;\n    shl r432 64u8 into r433;\n    add r433 r429 into r434;\n    shl r421 64u8 into r435;\n    add r435 r415 into r436;\n    and r346.hi 18446744073709551615u128 into r437;\n    shr r346.hi 64u8 into r438;\n    and r345.hi 18446744073709551615u128 into r439;\n    shr r345.hi 64u8 into r440;\n    mul r437 r439 into r441;\n    mul r437 r440 into r442;\n    mul r438 r439 into r443;\n    mul r438 r440 into r444;\n    and r441 18446744073709551615u128 into r445;\n    shr r441 64u8 into r446;\n    and r442 18446744073709551615u128 into r447;\n    add r446 r447 into r448;\n    and r443 18446744073709551615u128 into r449;\n    add r448 r449 into r450;\n    and r450 18446744073709551615u128 into r451;\n    shr r450 64u8 into r452;\n    shr r442 64u8 into r453;\n    shr r443 64u8 into r454;\n    add r453 r454 into r455;\n    and r444 18446744073709551615u128 into r456;\n    add r455 r456 into r457;\n    add r457 r452 into r458;\n    and r458 18446744073709551615u128 into r459;\n    shr r458 64u8 into r460;\n    shr r444 64u8 into r461;\n    add r461 r460 into r462;\n    shl r462 64u8 into r463;\n    add r463 r459 into r464;\n    shl r451 64u8 into r465;\n    add r465 r445 into r466;\n    add.w r374 r406 into r467;\n    lt r467 r374 into r468;\n    ternary r468 1u128 0u128 into r469;\n    add.w r467 r436 into r470;\n    lt r470 r467 into r471;\n    ternary r471 1u128 0u128 into r472;\n    add r469 r472 into r473;\n    add.w r404 r434 into r474;\n    lt r474 r404 into r475;\n    ternary r475 1u128 0u128 into r476;\n    add.w r474 r466 into r477;\n    lt r477 r474 into r478;\n    ternary r478 1u128 0u128 into r479;\n    add.w r477 r473 into r480;\n    lt r480 r477 into r481;\n    ternary r481 1u128 0u128 into r482;\n    add r476 r479 into r483;\n    add r483 r482 into r484;\n    add.w r464 r484 into r485;\n    cast r485 r480 into r486 as U256__8JquwLopp8;\n    cast r470 r376 into r487 as U256__8JquwLopp8;\n    is.eq r486.hi 0u128 into r488;\n    is.eq r486.lo 0u128 into r489;\n    and r488 r489 into r490;\n    assert.eq r490 true;\n    gt r487.lo 0u128 into r491;\n    ternary r491 1u128 0u128 into r492;\n    add r487.hi r492 into r493;\n    ternary r267 r230 0u128 into r494;\n    lt r239.hi r247.hi into r495;\n    gt r239.hi r247.hi into r496;\n    lt r239.lo r247.lo into r497;\n    ternary r496 false r497 into r498;\n    ternary r495 true r498 into r499;\n    ternary r499 r239.hi r247.hi into r500;\n    ternary r499 r239.lo r247.lo into r501;\n    cast r500 r501 into r502 as U256__8JquwLopp8;\n    lt r239.hi r247.hi into r503;\n    gt r239.hi r247.hi into r504;\n    lt r239.lo r247.lo into r505;\n    ternary r504 false r505 into r506;\n    ternary r503 true r506 into r507;\n    ternary r507 r247.hi r239.hi into r508;\n    ternary r507 r247.lo r239.lo into r509;\n    cast r508 r509 into r510 as U256__8JquwLopp8;\n    lt r510.lo r502.lo into r511;\n    ternary r511 1u128 0u128 into r512;\n    sub.w r510.lo r502.lo into r513;\n    sub.w r510.hi r502.hi into r514;\n    sub.w r514 r512 into r515;\n    cast r515 r513 into r516 as U256__8JquwLopp8;\n    cast 0u128 r494 into r517 as U256__8JquwLopp8;\n    and r517.lo 18446744073709551615u128 into r518;\n    shr r517.lo 64u8 into r519;\n    and r516.lo 18446744073709551615u128 into r520;\n    shr r516.lo 64u8 into r521;\n    mul r518 r520 into r522;\n    mul r518 r521 into r523;\n    mul r519 r520 into r524;\n    mul r519 r521 into r525;\n    and r522 18446744073709551615u128 into r526;\n    shr r522 64u8 into r527;\n    and r523 18446744073709551615u128 into r528;\n    add r527 r528 into r529;\n    and r524 18446744073709551615u128 into r530;\n    add r529 r530 into r531;\n    and r531 18446744073709551615u128 into r532;\n    shr r531 64u8 into r533;\n    shr r523 64u8 into r534;\n    shr r524 64u8 into r535;\n    add r534 r535 into r536;\n    and r525 18446744073709551615u128 into r537;\n    add r536 r537 into r538;\n    add r538 r533 into r539;\n    and r539 18446744073709551615u128 into r540;\n    shr r539 64u8 into r541;\n    shr r525 64u8 into r542;\n    add r542 r541 into r543;\n    shl r543 64u8 into r544;\n    add r544 r540 into r545;\n    shl r532 64u8 into r546;\n    add r546 r526 into r547;\n    and r517.lo 18446744073709551615u128 into r548;\n    shr r517.lo 64u8 into r549;\n    and r516.hi 18446744073709551615u128 into r550;\n    shr r516.hi 64u8 into r551;\n    mul r548 r550 into r552;\n    mul r548 r551 into r553;\n    mul r549 r550 into r554;\n    mul r549 r551 into r555;\n    and r552 18446744073709551615u128 into r556;\n    shr r552 64u8 into r557;\n    and r553 18446744073709551615u128 into r558;\n    add r557 r558 into r559;\n    and r554 18446744073709551615u128 into r560;\n    add r559 r560 into r561;\n    and r561 18446744073709551615u128 into r562;\n    shr r561 64u8 into r563;\n    shr r553 64u8 into r564;\n    shr r554 64u8 into r565;\n    add r564 r565 into r566;\n    and r555 18446744073709551615u128 into r567;\n    add r566 r567 into r568;\n    add r568 r563 into r569;\n    and r569 18446744073709551615u128 into r570;\n    shr r569 64u8 into r571;\n    shr r555 64u8 into r572;\n    add r572 r571 into r573;\n    shl r573 64u8 into r574;\n    add r574 r570 into r575;\n    shl r562 64u8 into r576;\n    add r576 r556 into r577;\n    and r517.hi 18446744073709551615u128 into r578;\n    shr r517.hi 64u8 into r579;\n    and r516.lo 18446744073709551615u128 into r580;\n    shr r516.lo 64u8 into r581;\n    mul r578 r580 into r582;\n    mul r578 r581 into r583;\n    mul r579 r580 into r584;\n    mul r579 r581 into r585;\n    and r582 18446744073709551615u128 into r586;\n    shr r582 64u8 into r587;\n    and r583 18446744073709551615u128 into r588;\n    add r587 r588 into r589;\n    and r584 18446744073709551615u128 into r590;\n    add r589 r590 into r591;\n    and r591 18446744073709551615u128 into r592;\n    shr r591 64u8 into r593;\n    shr r583 64u8 into r594;\n    shr r584 64u8 into r595;\n    add r594 r595 into r596;\n    and r585 18446744073709551615u128 into r597;\n    add r596 r597 into r598;\n    add r598 r593 into r599;\n    and r599 18446744073709551615u128 into r600;\n    shr r599 64u8 into r601;\n    shr r585 64u8 into r602;\n    add r602 r601 into r603;\n    shl r603 64u8 into r604;\n    add r604 r600 into r605;\n    shl r592 64u8 into r606;\n    add r606 r586 into r607;\n    and r517.hi 18446744073709551615u128 into r608;\n    shr r517.hi 64u8 into r609;\n    and r516.hi 18446744073709551615u128 into r610;\n    shr r516.hi 64u8 into r611;\n    mul r608 r610 into r612;\n    mul r608 r611 into r613;\n    mul r609 r610 into r614;\n    mul r609 r611 into r615;\n    and r612 18446744073709551615u128 into r616;\n    shr r612 64u8 into r617;\n    and r613 18446744073709551615u128 into r618;\n    add r617 r618 into r619;\n    and r614 18446744073709551615u128 into r620;\n    add r619 r620 into r621;\n    and r621 18446744073709551615u128 into r622;\n    shr r621 64u8 into r623;\n    shr r613 64u8 into r624;\n    shr r614 64u8 into r625;\n    add r624 r625 into r626;\n    and r615 18446744073709551615u128 into r627;\n    add r626 r627 into r628;\n    add r628 r623 into r629;\n    and r629 18446744073709551615u128 into r630;\n    shr r629 64u8 into r631;\n    shr r615 64u8 into r632;\n    add r632 r631 into r633;\n    shl r633 64u8 into r634;\n    add r634 r630 into r635;\n    shl r622 64u8 into r636;\n    add r636 r616 into r637;\n    add.w r545 r577 into r638;\n    lt r638 r545 into r639;\n    ternary r639 1u128 0u128 into r640;\n    add.w r638 r607 into r641;\n    lt r641 r638 into r642;\n    ternary r642 1u128 0u128 into r643;\n    add r640 r643 into r644;\n    add.w r575 r605 into r645;\n    lt r645 r575 into r646;\n    ternary r646 1u128 0u128 into r647;\n    add.w r645 r637 into r648;\n    lt r648 r645 into r649;\n    ternary r649 1u128 0u128 into r650;\n    add.w r648 r644 into r651;\n    lt r651 r648 into r652;\n    ternary r652 1u128 0u128 into r653;\n    add r647 r650 into r654;\n    add r654 r653 into r655;\n    add.w r635 r655 into r656;\n    cast r656 r651 into r657 as U256__8JquwLopp8;\n    cast r641 r547 into r658 as U256__8JquwLopp8;\n    is.eq r657.hi 0u128 into r659;\n    is.eq r657.lo 0u128 into r660;\n    and r659 r660 into r661;\n    assert.eq r661 true;\n    gt r658.lo 0u128 into r662;\n    ternary r662 1u128 0u128 into r663;\n    add r658.hi r663 into r664;\n    ternary r260 r322.lo 0u128 into r665;\n    ternary r253 r294.lo r665 into r666;\n    ternary r267 r664 0u128 into r667;\n    ternary r260 r493 r667 into r668;\n    lte r666 r6 into r669;\n    lte r668 r7 into r670;\n    and r669 r670 into r671;\n    assert.eq r671 true;\n    gte r666 r8 into r672;\n    gte r668 r9 into r673;\n    and r672 r673 into r674;\n    assert.eq r674 true;\n    lt r30.sqrt_price.hi r40.hi into r675;\n    gt r30.sqrt_price.hi r40.hi into r676;\n    lt r30.sqrt_price.lo r40.lo into r677;\n    ternary r676 false r677 into r678;\n    ternary r675 true r678 into r679;\n    branch.eq r679 false to end_then_0_2;\n    gt r666 0u128 into r680;\n    assert.eq r680 true;\n    branch.eq true true to end_otherwise_0_3;\n    position end_then_0_2;\n    position end_otherwise_0_3;\n    lt r39.hi r30.sqrt_price.hi into r681;\n    gt r39.hi r30.sqrt_price.hi into r682;\n    lt r39.lo r30.sqrt_price.lo into r683;\n    ternary r682 false r683 into r684;\n    ternary r681 true r684 into r685;\n    branch.eq r685 false to end_then_0_4;\n    gt r668 0u128 into r686;\n    assert.eq r686 true;\n    branch.eq true true to end_otherwise_0_5;\n    position end_then_0_4;\n    position end_otherwise_0_5;\n    cast r3 r4 into r687 as TickKey;\n    hash.bhp256 r687 into r688 as field;\n    cast r3 r5 into r689 as TickKey;\n    hash.bhp256 r689 into r690 as field;\n    cast 0u128 0u128 into r691 as U256__8JquwLopp8;\n    cast 0u128 0u128 into r692 as U256__8JquwLopp8;\n    cast r3 0i128 0u128 r4 r691 r692 0i32 0i32 into r693 as Tick;\n    cast 0u128 0u128 into r694 as U256__8JquwLopp8;\n    cast 0u128 0u128 into r695 as U256__8JquwLopp8;\n    cast r3 0i128 0u128 r5 r694 r695 0i32 0i32 into r696 as Tick;\n    get.or_use ticks[r688] r693 into r697;\n    get.or_use ticks[r690] r696 into r698;\n    gt r697.liquidity_gross 0u128 into r699;\n    gt r698.liquidity_gross 0u128 into r700;\n    add r697.liquidity_gross r230 into r701;\n    add r698.liquidity_gross r230 into r702;\n    lte r701 r30.max_liquidity_per_tick into r703;\n    assert.eq r703 true;\n    lte r702 r30.max_liquidity_per_tick into r704;\n    assert.eq r704 true;\n    not r699 into r705;\n    lte r4 r30.tick into r706;\n    and r705 r706 into r707;\n    ternary r707 r30.fee_growth_global0_x_128.hi r697.fee_growth_outside0_x_128.hi into r708;\n    ternary r707 r30.fee_growth_global0_x_128.lo r697.fee_growth_outside0_x_128.lo into r709;\n    cast r708 r709 into r710 as U256__8JquwLopp8;\n    lte r4 r30.tick into r711;\n    and r705 r711 into r712;\n    ternary r712 r30.fee_growth_global1_x_128.hi r697.fee_growth_outside1_x_128.hi into r713;\n    ternary r712 r30.fee_growth_global1_x_128.lo r697.fee_growth_outside1_x_128.lo into r714;\n    cast r713 r714 into r715 as U256__8JquwLopp8;\n    not r700 into r716;\n    lte r5 r30.tick into r717;\n    and r716 r717 into r718;\n    ternary r718 r30.fee_growth_global0_x_128.hi r698.fee_growth_outside0_x_128.hi into r719;\n    ternary r718 r30.fee_growth_global0_x_128.lo r698.fee_growth_outside0_x_128.lo into r720;\n    cast r719 r720 into r721 as U256__8JquwLopp8;\n    lte r5 r30.tick into r722;\n    and r716 r722 into r723;\n    ternary r723 r30.fee_growth_global1_x_128.hi r698.fee_growth_outside1_x_128.hi into r724;\n    ternary r723 r30.fee_growth_global1_x_128.lo r698.fee_growth_outside1_x_128.lo into r725;\n    cast r724 r725 into r726 as U256__8JquwLopp8;\n    ternary r699 -400001i32 r12 into r727;\n    cast r3 r727 into r728 as TickKey;\n    hash.bhp256 r728 into r729 as field;\n    get ticks[r729] into r730;\n    branch.eq r705 false to end_then_0_6;\n    is.eq r730.pool r3 into r731;\n    assert.eq r731 true;\n    is.eq r730.tick r12 into r732;\n    assert.eq r732 true;\n    is.eq r12 -400001i32 into r733;\n    gt r730.liquidity_gross 0u128 into r734;\n    or r733 r734 into r735;\n    assert.eq r735 true;\n    lt r730.tick r4 into r736;\n    assert.eq r736 true;\n    gt r730.next r4 into r737;\n    assert.eq r737 true;\n    branch.eq true true to end_otherwise_0_7;\n    position end_then_0_6;\n    position end_otherwise_0_7;\n    ternary r699 r697.prev r12 into r738;\n    ternary r699 r697.next r730.next into r739;\n    cast r230 into r740 as i128;\n    add r697.liquidity_net r740 into r741;\n    cast r3 r741 r701 r4 r710 r715 r738 r739 into r742 as Tick;\n    set r742 into ticks[r688];\n    branch.eq r705 false to end_then_0_8;\n    cast r730.pool r730.liquidity_net r730.liquidity_gross r730.tick r730.fee_growth_outside0_x_128 r730.fee_growth_outside1_x_128 r730.prev r4 into r743 as Tick;\n    set r743 into ticks[r729];\n    cast r3 r739 into r744 as TickKey;\n    hash.bhp256 r744 into r745 as field;\n    get ticks[r745] into r746;\n    cast r746.pool r746.liquidity_net r746.liquidity_gross r746.tick r746.fee_growth_outside0_x_128 r746.fee_growth_outside1_x_128 r4 r746.next into r747 as Tick;\n    set r747 into ticks[r745];\n    branch.eq true true to end_otherwise_0_9;\n    position end_then_0_8;\n    position end_otherwise_0_9;\n    get.or_use ticks[r690] r696 into r748;\n    ternary r700 -400001i32 r13 into r749;\n    cast r3 r749 into r750 as TickKey;\n    hash.bhp256 r750 into r751 as field;\n    get ticks[r751] into r752;\n    branch.eq r716 false to end_then_0_10;\n    is.eq r752.pool r3 into r753;\n    assert.eq r753 true;\n    is.eq r752.tick r13 into r754;\n    assert.eq r754 true;\n    is.eq r13 -400001i32 into r755;\n    gt r752.liquidity_gross 0u128 into r756;\n    or r755 r756 into r757;\n    assert.eq r757 true;\n    lt r752.tick r5 into r758;\n    assert.eq r758 true;\n    gt r752.next r5 into r759;\n    assert.eq r759 true;\n    branch.eq true true to end_otherwise_0_11;\n    position end_then_0_10;\n    position end_otherwise_0_11;\n    ternary r700 r748.prev r13 into r760;\n    ternary r700 r748.next r752.next into r761;\n    cast r230 into r762 as i128;\n    sub r748.liquidity_net r762 into r763;\n    cast r3 r763 r702 r5 r721 r726 r760 r761 into r764 as Tick;\n    set r764 into ticks[r690];\n    branch.eq r716 false to end_then_0_12;\n    get ticks[r751] into r765;\n    cast r765.pool r765.liquidity_net r765.liquidity_gross r765.tick r765.fee_growth_outside0_x_128 r765.fee_growth_outside1_x_128 r765.prev r5 into r766 as Tick;\n    set r766 into ticks[r751];\n    cast r3 r761 into r767 as TickKey;\n    hash.bhp256 r767 into r768 as field;\n    get ticks[r768] into r769;\n    cast r769.pool r769.liquidity_net r769.liquidity_gross r769.tick r769.fee_growth_outside0_x_128 r769.fee_growth_outside1_x_128 r5 r769.next into r770 as Tick;\n    set r770 into ticks[r768];\n    branch.eq true true to end_otherwise_0_13;\n    position end_then_0_12;\n    position end_otherwise_0_13;\n    get ticks[r688] into r771;\n    get ticks[r690] into r772;\n    gte r30.tick r771.tick into r773;\n    lt r30.fee_growth_global0_x_128.lo r771.fee_growth_outside0_x_128.lo into r774;\n    ternary r774 1u128 0u128 into r775;\n    sub.w r30.fee_growth_global0_x_128.lo r771.fee_growth_outside0_x_128.lo into r776;\n    sub.w r30.fee_growth_global0_x_128.hi r771.fee_growth_outside0_x_128.hi into r777;\n    sub.w r777 r775 into r778;\n    cast r778 r776 into r779 as U256__8JquwLopp8;\n    lt r30.fee_growth_global1_x_128.lo r771.fee_growth_outside1_x_128.lo into r780;\n    ternary r780 1u128 0u128 into r781;\n    sub.w r30.fee_growth_global1_x_128.lo r771.fee_growth_outside1_x_128.lo into r782;\n    sub.w r30.fee_growth_global1_x_128.hi r771.fee_growth_outside1_x_128.hi into r783;\n    sub.w r783 r781 into r784;\n    cast r784 r782 into r785 as U256__8JquwLopp8;\n    ternary r773 r771.fee_growth_outside0_x_128.hi r779.hi into r786;\n    ternary r773 r771.fee_growth_outside0_x_128.lo r779.lo into r787;\n    cast r786 r787 into r788 as U256__8JquwLopp8;\n    ternary r773 r771.fee_growth_outside1_x_128.hi r785.hi into r789;\n    ternary r773 r771.fee_growth_outside1_x_128.lo r785.lo into r790;\n    cast r789 r790 into r791 as U256__8JquwLopp8;\n    lt r30.tick r772.tick into r792;\n    lt r30.fee_growth_global0_x_128.lo r772.fee_growth_outside0_x_128.lo into r793;\n    ternary r793 1u128 0u128 into r794;\n    sub.w r30.fee_growth_global0_x_128.lo r772.fee_growth_outside0_x_128.lo into r795;\n    sub.w r30.fee_growth_global0_x_128.hi r772.fee_growth_outside0_x_128.hi into r796;\n    sub.w r796 r794 into r797;\n    cast r797 r795 into r798 as U256__8JquwLopp8;\n    lt r30.fee_growth_global1_x_128.lo r772.fee_growth_outside1_x_128.lo into r799;\n    ternary r799 1u128 0u128 into r800;\n    sub.w r30.fee_growth_global1_x_128.lo r772.fee_growth_outside1_x_128.lo into r801;\n    sub.w r30.fee_growth_global1_x_128.hi r772.fee_growth_outside1_x_128.hi into r802;\n    sub.w r802 r800 into r803;\n    cast r803 r801 into r804 as U256__8JquwLopp8;\n    ternary r792 r772.fee_growth_outside0_x_128.hi r798.hi into r805;\n    ternary r792 r772.fee_growth_outside0_x_128.lo r798.lo into r806;\n    cast r805 r806 into r807 as U256__8JquwLopp8;\n    ternary r792 r772.fee_growth_outside1_x_128.hi r804.hi into r808;\n    ternary r792 r772.fee_growth_outside1_x_128.lo r804.lo into r809;\n    cast r808 r809 into r810 as U256__8JquwLopp8;\n    lt r30.fee_growth_global0_x_128.lo r788.lo into r811;\n    ternary r811 1u128 0u128 into r812;\n    sub.w r30.fee_growth_global0_x_128.lo r788.lo into r813;\n    sub.w r30.fee_growth_global0_x_128.hi r788.hi into r814;\n    sub.w r814 r812 into r815;\n    cast r815 r813 into r816 as U256__8JquwLopp8;\n    lt r816.lo r807.lo into r817;\n    ternary r817 1u128 0u128 into r818;\n    sub.w r816.lo r807.lo into r819;\n    sub.w r816.hi r807.hi into r820;\n    sub.w r820 r818 into r821;\n    cast r821 r819 into r822 as U256__8JquwLopp8;\n    lt r30.fee_growth_global1_x_128.lo r791.lo into r823;\n    ternary r823 1u128 0u128 into r824;\n    sub.w r30.fee_growth_global1_x_128.lo r791.lo into r825;\n    sub.w r30.fee_growth_global1_x_128.hi r791.hi into r826;\n    sub.w r826 r824 into r827;\n    cast r827 r825 into r828 as U256__8JquwLopp8;\n    lt r828.lo r810.lo into r829;\n    ternary r829 1u128 0u128 into r830;\n    sub.w r828.lo r810.lo into r831;\n    sub.w r828.hi r810.hi into r832;\n    sub.w r832 r830 into r833;\n    cast r833 r831 into r834 as U256__8JquwLopp8;\n    lt r822.lo r31.fee_growth_inside0_last_x_128.lo into r835;\n    ternary r835 1u128 0u128 into r836;\n    sub.w r822.lo r31.fee_growth_inside0_last_x_128.lo into r837;\n    sub.w r822.hi r31.fee_growth_inside0_last_x_128.hi into r838;\n    sub.w r838 r836 into r839;\n    cast r839 r837 into r840 as U256__8JquwLopp8;\n    and r840.hi 18446744073709551615u128 into r841;\n    shr r840.hi 64u8 into r842;\n    and r31.liquidity 18446744073709551615u128 into r843;\n    shr r31.liquidity 64u8 into r844;\n    mul r841 r843 into r845;\n    mul r841 r844 into r846;\n    mul r842 r843 into r847;\n    mul r842 r844 into r848;\n    and r845 18446744073709551615u128 into r849;\n    shr r845 64u8 into r850;\n    and r846 18446744073709551615u128 into r851;\n    add r850 r851 into r852;\n    and r847 18446744073709551615u128 into r853;\n    add r852 r853 into r854;\n    and r854 18446744073709551615u128 into r855;\n    shr r854 64u8 into r856;\n    shr r846 64u8 into r857;\n    shr r847 64u8 into r858;\n    add r857 r858 into r859;\n    and r848 18446744073709551615u128 into r860;\n    add r859 r860 into r861;\n    add r861 r856 into r862;\n    and r862 18446744073709551615u128 into r863;\n    shr r862 64u8 into r864;\n    shr r848 64u8 into r865;\n    add r865 r864 into r866;\n    shl r866 64u8 into r867;\n    add r867 r863 into r868;\n    shl r855 64u8 into r869;\n    add r869 r849 into r870;\n    and r840.lo 18446744073709551615u128 into r871;\n    shr r840.lo 64u8 into r872;\n    mul r871 r843 into r873;\n    mul r871 r844 into r874;\n    mul r872 r843 into r875;\n    mul r872 r844 into r876;\n    and r873 18446744073709551615u128 into r877;\n    shr r873 64u8 into r878;\n    and r874 18446744073709551615u128 into r879;\n    add r878 r879 into r880;\n    and r875 18446744073709551615u128 into r881;\n    add r880 r881 into r882;\n    and r882 18446744073709551615u128 into r883;\n    shr r882 64u8 into r884;\n    shr r874 64u8 into r885;\n    shr r875 64u8 into r886;\n    add r885 r886 into r887;\n    and r876 18446744073709551615u128 into r888;\n    add r887 r888 into r889;\n    add r889 r884 into r890;\n    and r890 18446744073709551615u128 into r891;\n    shr r890 64u8 into r892;\n    shr r876 64u8 into r893;\n    add r893 r892 into r894;\n    shl r894 64u8 into r895;\n    add r895 r891 into r896;\n    shl r883 64u8 into r897;\n    add r897 r877 into r898;\n    sub 340282366920938463463374607431768211455u128 r870 into r899;\n    lte r896 r899 into r900;\n    is.eq r868 0u128 into r901;\n    and r901 r900 into r902;\n    assert.eq r902 true;\n    add r870 r896 into r903;\n    lt r834.lo r31.fee_growth_inside1_last_x_128.lo into r904;\n    ternary r904 1u128 0u128 into r905;\n    sub.w r834.lo r31.fee_growth_inside1_last_x_128.lo into r906;\n    sub.w r834.hi r31.fee_growth_inside1_last_x_128.hi into r907;\n    sub.w r907 r905 into r908;\n    cast r908 r906 into r909 as U256__8JquwLopp8;\n    and r909.hi 18446744073709551615u128 into r910;\n    shr r909.hi 64u8 into r911;\n    and r31.liquidity 18446744073709551615u128 into r912;\n    shr r31.liquidity 64u8 into r913;\n    mul r910 r912 into r914;\n    mul r910 r913 into r915;\n    mul r911 r912 into r916;\n    mul r911 r913 into r917;\n    and r914 18446744073709551615u128 into r918;\n    shr r914 64u8 into r919;\n    and r915 18446744073709551615u128 into r920;\n    add r919 r920 into r921;\n    and r916 18446744073709551615u128 into r922;\n    add r921 r922 into r923;\n    and r923 18446744073709551615u128 into r924;\n    shr r923 64u8 into r925;\n    shr r915 64u8 into r926;\n    shr r916 64u8 into r927;\n    add r926 r927 into r928;\n    and r917 18446744073709551615u128 into r929;\n    add r928 r929 into r930;\n    add r930 r925 into r931;\n    and r931 18446744073709551615u128 into r932;\n    shr r931 64u8 into r933;\n    shr r917 64u8 into r934;\n    add r934 r933 into r935;\n    shl r935 64u8 into r936;\n    add r936 r932 into r937;\n    shl r924 64u8 into r938;\n    add r938 r918 into r939;\n    and r909.lo 18446744073709551615u128 into r940;\n    shr r909.lo 64u8 into r941;\n    mul r940 r912 into r942;\n    mul r940 r913 into r943;\n    mul r941 r912 into r944;\n    mul r941 r913 into r945;\n    and r942 18446744073709551615u128 into r946;\n    shr r942 64u8 into r947;\n    and r943 18446744073709551615u128 into r948;\n    add r947 r948 into r949;\n    and r944 18446744073709551615u128 into r950;\n    add r949 r950 into r951;\n    and r951 18446744073709551615u128 into r952;\n    shr r951 64u8 into r953;\n    shr r943 64u8 into r954;\n    shr r944 64u8 into r955;\n    add r954 r955 into r956;\n    and r945 18446744073709551615u128 into r957;\n    add r956 r957 into r958;\n    add r958 r953 into r959;\n    and r959 18446744073709551615u128 into r960;\n    shr r959 64u8 into r961;\n    shr r945 64u8 into r962;\n    add r962 r961 into r963;\n    shl r963 64u8 into r964;\n    add r964 r960 into r965;\n    shl r952 64u8 into r966;\n    add r966 r946 into r967;\n    sub 340282366920938463463374607431768211455u128 r939 into r968;\n    lte r965 r968 into r969;\n    is.eq r937 0u128 into r970;\n    and r970 r969 into r971;\n    assert.eq r971 true;\n    add r939 r965 into r972;\n    sub r6 r666 into r973;\n    sub r7 r668 into r974;\n    add r31.liquidity r230 into r975;\n    add r31.tokens_owed0 r903 into r976;\n    add r976 r973 into r977;\n    add r31.tokens_owed1 r972 into r978;\n    add r978 r974 into r979;\n    cast r2 r3 r4 r5 r975 r822 r834 r977 r979 into r980 as Position;\n    set r980 into positions[r2];\n    lte r4 r30.tick into r981;\n    and r705 r981 into r982;\n    gt r4 r30.next_init_below into r983;\n    and r982 r983 into r984;\n    ternary r984 r4 r30.next_init_below into r985;\n    gt r4 r30.tick into r986;\n    and r705 r986 into r987;\n    lt r4 r30.next_init_above into r988;\n    and r987 r988 into r989;\n    ternary r989 r4 r30.next_init_above into r990;\n    lte r5 r30.tick into r991;\n    and r716 r991 into r992;\n    gt r5 r985 into r993;\n    and r992 r993 into r994;\n    ternary r994 r5 r985 into r995;\n    gt r5 r30.tick into r996;\n    and r716 r996 into r997;\n    lt r5 r990 into r998;\n    and r997 r998 into r999;\n    ternary r999 r5 r990 into r1000;\n    gte r30.tick r4 into r1001;\n    lt r30.tick r5 into r1002;\n    and r1001 r1002 into r1003;\n    add r30.liquidity r230 into r1004;\n    ternary r1003 r1004 r30.liquidity into r1005;\n    cast r30.tick r30.tick_spacing r30.sqrt_price r30.fee_protocol r1005 r30.fee_growth_global0_x_128 r30.fee_growth_global1_x_128 r30.max_liquidity_per_tick r30.protocol_fees0 r30.protocol_fees1 r995 r1000 into r1006 as Slot;\n    set r1006 into slots[r3];\n\nfunction collect:\n    input r0 as PositionNFT.record;\n    input r1 as u128.public;\n    input r2 as u128.public;\n    input r3 as field.public;\n    input r4 as field.public;\n    input r5 as [MerkleProof; 2u32].private;\n    input r6 as [MerkleProof; 2u32].private;\n    is.eq self.caller aleo18sekmsl46y6skh3kvkekmw4kqqm7d6rz79akpsg58r7wpp5klyyq0qtzqf into r7;\n    call assert_valid_position_address r0.withdrawal;\n    and r5[0u32].leaf_index 1u32 into r8;\n    is.eq r8 0u32 into r9;\n    cast 1field r5[0u32].siblings[0u32] r5[0u32].siblings[1u32] into r10 as [field; 3u32];\n    cast 1field r5[0u32].siblings[1u32] r5[0u32].siblings[0u32] into r11 as [field; 3u32];\n    ternary r9 r10[0u32] r11[0u32] into r12;\n    ternary r9 r10[1u32] r11[1u32] into r13;\n    ternary r9 r10[2u32] r11[2u32] into r14;\n    cast r12 r13 r14 into r15 as [field; 3u32];\n    hash.psd4 r15 into r16 as field;\n    is.eq r5[0u32].siblings[2u32] 0field into r17;\n    shr r5[0u32].leaf_index 1u8 into r18;\n    and r18 1u32 into r19;\n    is.eq r19 0u32 into r20;\n    cast 0field r16 r5[0u32].siblings[2u32] into r21 as [field; 3u32];\n    cast 0field r5[0u32].siblings[2u32] r16 into r22 as [field; 3u32];\n    ternary r20 r21[0u32] r22[0u32] into r23;\n    ternary r20 r21[1u32] r22[1u32] into r24;\n    ternary r20 r21[2u32] r22[2u32] into r25;\n    cast r23 r24 r25 into r26 as [field; 3u32];\n    hash.psd4 r26 into r27 as field;\n    is.eq r5[0u32].siblings[3u32] 0field into r28;\n    shr r5[0u32].leaf_index 2u8 into r29;\n    and r29 1u32 into r30;\n    is.eq r30 0u32 into r31;\n    cast 0field r27 r5[0u32].siblings[3u32] into r32 as [field; 3u32];\n    cast 0field r5[0u32].siblings[3u32] r27 into r33 as [field; 3u32];\n    ternary r31 r32[0u32] r33[0u32] into r34;\n    ternary r31 r32[1u32] r33[1u32] into r35;\n    ternary r31 r32[2u32] r33[2u32] into r36;\n    cast r34 r35 r36 into r37 as [field; 3u32];\n    hash.psd4 r37 into r38 as field;\n    is.eq r5[0u32].siblings[4u32] 0field into r39;\n    shr r5[0u32].leaf_index 3u8 into r40;\n    and r40 1u32 into r41;\n    is.eq r41 0u32 into r42;\n    cast 0field r38 r5[0u32].siblings[4u32] into r43 as [field; 3u32];\n    cast 0field r5[0u32].siblings[4u32] r38 into r44 as [field; 3u32];\n    ternary r42 r43[0u32] r44[0u32] into r45;\n    ternary r42 r43[1u32] r44[1u32] into r46;\n    ternary r42 r43[2u32] r44[2u32] into r47;\n    cast r45 r46 r47 into r48 as [field; 3u32];\n    hash.psd4 r48 into r49 as field;\n    is.eq r5[0u32].siblings[5u32] 0field into r50;\n    shr r5[0u32].leaf_index 4u8 into r51;\n    and r51 1u32 into r52;\n    is.eq r52 0u32 into r53;\n    cast 0field r49 r5[0u32].siblings[5u32] into r54 as [field; 3u32];\n    cast 0field r5[0u32].siblings[5u32] r49 into r55 as [field; 3u32];\n    ternary r53 r54[0u32] r55[0u32] into r56;\n    ternary r53 r54[1u32] r55[1u32] into r57;\n    ternary r53 r54[2u32] r55[2u32] into r58;\n    cast r56 r57 r58 into r59 as [field; 3u32];\n    hash.psd4 r59 into r60 as field;\n    is.eq r5[0u32].siblings[6u32] 0field into r61;\n    shr r5[0u32].leaf_index 5u8 into r62;\n    and r62 1u32 into r63;\n    is.eq r63 0u32 into r64;\n    cast 0field r60 r5[0u32].siblings[6u32] into r65 as [field; 3u32];\n    cast 0field r5[0u32].siblings[6u32] r60 into r66 as [field; 3u32];\n    ternary r64 r65[0u32] r66[0u32] into r67;\n    ternary r64 r65[1u32] r66[1u32] into r68;\n    ternary r64 r65[2u32] r66[2u32] into r69;\n    cast r67 r68 r69 into r70 as [field; 3u32];\n    hash.psd4 r70 into r71 as field;\n    is.eq r5[0u32].siblings[7u32] 0field into r72;\n    shr r5[0u32].leaf_index 6u8 into r73;\n    and r73 1u32 into r74;\n    is.eq r74 0u32 into r75;\n    cast 0field r71 r5[0u32].siblings[7u32] into r76 as [field; 3u32];\n    cast 0field r5[0u32].siblings[7u32] r71 into r77 as [field; 3u32];\n    ternary r75 r76[0u32] r77[0u32] into r78;\n    ternary r75 r76[1u32] r77[1u32] into r79;\n    ternary r75 r76[2u32] r77[2u32] into r80;\n    cast r78 r79 r80 into r81 as [field; 3u32];\n    hash.psd4 r81 into r82 as field;\n    is.eq r5[0u32].siblings[8u32] 0field into r83;\n    shr r5[0u32].leaf_index 7u8 into r84;\n    and r84 1u32 into r85;\n    is.eq r85 0u32 into r86;\n    cast 0field r82 r5[0u32].siblings[8u32] into r87 as [field; 3u32];\n    cast 0field r5[0u32].siblings[8u32] r82 into r88 as [field; 3u32];\n    ternary r86 r87[0u32] r88[0u32] into r89;\n    ternary r86 r87[1u32] r88[1u32] into r90;\n    ternary r86 r87[2u32] r88[2u32] into r91;\n    cast r89 r90 r91 into r92 as [field; 3u32];\n    hash.psd4 r92 into r93 as field;\n    is.eq r5[0u32].siblings[9u32] 0field into r94;\n    shr r5[0u32].leaf_index 8u8 into r95;\n    and r95 1u32 into r96;\n    is.eq r96 0u32 into r97;\n    cast 0field r93 r5[0u32].siblings[9u32] into r98 as [field; 3u32];\n    cast 0field r5[0u32].siblings[9u32] r93 into r99 as [field; 3u32];\n    ternary r97 r98[0u32] r99[0u32] into r100;\n    ternary r97 r98[1u32] r99[1u32] into r101;\n    ternary r97 r98[2u32] r99[2u32] into r102;\n    cast r100 r101 r102 into r103 as [field; 3u32];\n    hash.psd4 r103 into r104 as field;\n    is.eq r5[0u32].siblings[10u32] 0field into r105;\n    shr r5[0u32].leaf_index 9u8 into r106;\n    and r106 1u32 into r107;\n    is.eq r107 0u32 into r108;\n    cast 0field r104 r5[0u32].siblings[10u32] into r109 as [field; 3u32];\n    cast 0field r5[0u32].siblings[10u32] r104 into r110 as [field; 3u32];\n    ternary r108 r109[0u32] r110[0u32] into r111;\n    ternary r108 r109[1u32] r110[1u32] into r112;\n    ternary r108 r109[2u32] r110[2u32] into r113;\n    cast r111 r112 r113 into r114 as [field; 3u32];\n    hash.psd4 r114 into r115 as field;\n    is.eq r5[0u32].siblings[11u32] 0field into r116;\n    shr r5[0u32].leaf_index 10u8 into r117;\n    and r117 1u32 into r118;\n    is.eq r118 0u32 into r119;\n    cast 0field r115 r5[0u32].siblings[11u32] into r120 as [field; 3u32];\n    cast 0field r5[0u32].siblings[11u32] r115 into r121 as [field; 3u32];\n    ternary r119 r120[0u32] r121[0u32] into r122;\n    ternary r119 r120[1u32] r121[1u32] into r123;\n    ternary r119 r120[2u32] r121[2u32] into r124;\n    cast r122 r123 r124 into r125 as [field; 3u32];\n    hash.psd4 r125 into r126 as field;\n    is.eq r5[0u32].siblings[12u32] 0field into r127;\n    shr r5[0u32].leaf_index 11u8 into r128;\n    and r128 1u32 into r129;\n    is.eq r129 0u32 into r130;\n    cast 0field r126 r5[0u32].siblings[12u32] into r131 as [field; 3u32];\n    cast 0field r5[0u32].siblings[12u32] r126 into r132 as [field; 3u32];\n    ternary r130 r131[0u32] r132[0u32] into r133;\n    ternary r130 r131[1u32] r132[1u32] into r134;\n    ternary r130 r131[2u32] r132[2u32] into r135;\n    cast r133 r134 r135 into r136 as [field; 3u32];\n    hash.psd4 r136 into r137 as field;\n    is.eq r5[0u32].siblings[13u32] 0field into r138;\n    shr r5[0u32].leaf_index 12u8 into r139;\n    and r139 1u32 into r140;\n    is.eq r140 0u32 into r141;\n    cast 0field r137 r5[0u32].siblings[13u32] into r142 as [field; 3u32];\n    cast 0field r5[0u32].siblings[13u32] r137 into r143 as [field; 3u32];\n    ternary r141 r142[0u32] r143[0u32] into r144;\n    ternary r141 r142[1u32] r143[1u32] into r145;\n    ternary r141 r142[2u32] r143[2u32] into r146;\n    cast r144 r145 r146 into r147 as [field; 3u32];\n    hash.psd4 r147 into r148 as field;\n    is.eq r5[0u32].siblings[14u32] 0field into r149;\n    shr r5[0u32].leaf_index 13u8 into r150;\n    and r150 1u32 into r151;\n    is.eq r151 0u32 into r152;\n    cast 0field r148 r5[0u32].siblings[14u32] into r153 as [field; 3u32];\n    cast 0field r5[0u32].siblings[14u32] r148 into r154 as [field; 3u32];\n    ternary r152 r153[0u32] r154[0u32] into r155;\n    ternary r152 r153[1u32] r154[1u32] into r156;\n    ternary r152 r153[2u32] r154[2u32] into r157;\n    cast r155 r156 r157 into r158 as [field; 3u32];\n    hash.psd4 r158 into r159 as field;\n    is.eq r5[0u32].siblings[15u32] 0field into r160;\n    shr r5[0u32].leaf_index 14u8 into r161;\n    and r161 1u32 into r162;\n    is.eq r162 0u32 into r163;\n    cast 0field r159 r5[0u32].siblings[15u32] into r164 as [field; 3u32];\n    cast 0field r5[0u32].siblings[15u32] r159 into r165 as [field; 3u32];\n    ternary r163 r164[0u32] r165[0u32] into r166;\n    ternary r163 r164[1u32] r165[1u32] into r167;\n    ternary r163 r164[2u32] r165[2u32] into r168;\n    cast r166 r167 r168 into r169 as [field; 3u32];\n    hash.psd4 r169 into r170 as field;\n    ternary r160 r159 r170 into r171;\n    ternary r160 14u8 15u8 into r172;\n    ternary r149 r148 r171 into r173;\n    ternary r149 13u8 r172 into r174;\n    ternary r138 r137 r173 into r175;\n    ternary r138 12u8 r174 into r176;\n    ternary r127 r126 r175 into r177;\n    ternary r127 11u8 r176 into r178;\n    ternary r116 r115 r177 into r179;\n    ternary r116 10u8 r178 into r180;\n    ternary r105 r104 r179 into r181;\n    ternary r105 9u8 r180 into r182;\n    ternary r94 r93 r181 into r183;\n    ternary r94 8u8 r182 into r184;\n    ternary r83 r82 r183 into r185;\n    ternary r83 7u8 r184 into r186;\n    ternary r72 r71 r185 into r187;\n    ternary r72 6u8 r186 into r188;\n    ternary r61 r60 r187 into r189;\n    ternary r61 5u8 r188 into r190;\n    ternary r50 r49 r189 into r191;\n    ternary r50 4u8 r190 into r192;\n    ternary r39 r38 r191 into r193;\n    ternary r39 3u8 r192 into r194;\n    ternary r28 r27 r193 into r195;\n    ternary r28 2u8 r194 into r196;\n    ternary r17 r16 r195 into r197;\n    ternary r17 1u8 r196 into r198;\n    and r5[1u32].leaf_index 1u32 into r199;\n    is.eq r199 0u32 into r200;\n    cast 1field r5[1u32].siblings[0u32] r5[1u32].siblings[1u32] into r201 as [field; 3u32];\n    cast 1field r5[1u32].siblings[1u32] r5[1u32].siblings[0u32] into r202 as [field; 3u32];\n    ternary r200 r201[0u32] r202[0u32] into r203;\n    ternary r200 r201[1u32] r202[1u32] into r204;\n    ternary r200 r201[2u32] r202[2u32] into r205;\n    cast r203 r204 r205 into r206 as [field; 3u32];\n    hash.psd4 r206 into r207 as field;\n    is.eq r5[1u32].siblings[2u32] 0field into r208;\n    shr r5[1u32].leaf_index 1u8 into r209;\n    and r209 1u32 into r210;\n    is.eq r210 0u32 into r211;\n    cast 0field r207 r5[1u32].siblings[2u32] into r212 as [field; 3u32];\n    cast 0field r5[1u32].siblings[2u32] r207 into r213 as [field; 3u32];\n    ternary r211 r212[0u32] r213[0u32] into r214;\n    ternary r211 r212[1u32] r213[1u32] into r215;\n    ternary r211 r212[2u32] r213[2u32] into r216;\n    cast r214 r215 r216 into r217 as [field; 3u32];\n    hash.psd4 r217 into r218 as field;\n    is.eq r5[1u32].siblings[3u32] 0field into r219;\n    shr r5[1u32].leaf_index 2u8 into r220;\n    and r220 1u32 into r221;\n    is.eq r221 0u32 into r222;\n    cast 0field r218 r5[1u32].siblings[3u32] into r223 as [field; 3u32];\n    cast 0field r5[1u32].siblings[3u32] r218 into r224 as [field; 3u32];\n    ternary r222 r223[0u32] r224[0u32] into r225;\n    ternary r222 r223[1u32] r224[1u32] into r226;\n    ternary r222 r223[2u32] r224[2u32] into r227;\n    cast r225 r226 r227 into r228 as [field; 3u32];\n    hash.psd4 r228 into r229 as field;\n    is.eq r5[1u32].siblings[4u32] 0field into r230;\n    shr r5[1u32].leaf_index 3u8 into r231;\n    and r231 1u32 into r232;\n    is.eq r232 0u32 into r233;\n    cast 0field r229 r5[1u32].siblings[4u32] into r234 as [field; 3u32];\n    cast 0field r5[1u32].siblings[4u32] r229 into r235 as [field; 3u32];\n    ternary r233 r234[0u32] r235[0u32] into r236;\n    ternary r233 r234[1u32] r235[1u32] into r237;\n    ternary r233 r234[2u32] r235[2u32] into r238;\n    cast r236 r237 r238 into r239 as [field; 3u32];\n    hash.psd4 r239 into r240 as field;\n    is.eq r5[1u32].siblings[5u32] 0field into r241;\n    shr r5[1u32].leaf_index 4u8 into r242;\n    and r242 1u32 into r243;\n    is.eq r243 0u32 into r244;\n    cast 0field r240 r5[1u32].siblings[5u32] into r245 as [field; 3u32];\n    cast 0field r5[1u32].siblings[5u32] r240 into r246 as [field; 3u32];\n    ternary r244 r245[0u32] r246[0u32] into r247;\n    ternary r244 r245[1u32] r246[1u32] into r248;\n    ternary r244 r245[2u32] r246[2u32] into r249;\n    cast r247 r248 r249 into r250 as [field; 3u32];\n    hash.psd4 r250 into r251 as field;\n    is.eq r5[1u32].siblings[6u32] 0field into r252;\n    shr r5[1u32].leaf_index 5u8 into r253;\n    and r253 1u32 into r254;\n    is.eq r254 0u32 into r255;\n    cast 0field r251 r5[1u32].siblings[6u32] into r256 as [field; 3u32];\n    cast 0field r5[1u32].siblings[6u32] r251 into r257 as [field; 3u32];\n    ternary r255 r256[0u32] r257[0u32] into r258;\n    ternary r255 r256[1u32] r257[1u32] into r259;\n    ternary r255 r256[2u32] r257[2u32] into r260;\n    cast r258 r259 r260 into r261 as [field; 3u32];\n    hash.psd4 r261 into r262 as field;\n    is.eq r5[1u32].siblings[7u32] 0field into r263;\n    shr r5[1u32].leaf_index 6u8 into r264;\n    and r264 1u32 into r265;\n    is.eq r265 0u32 into r266;\n    cast 0field r262 r5[1u32].siblings[7u32] into r267 as [field; 3u32];\n    cast 0field r5[1u32].siblings[7u32] r262 into r268 as [field; 3u32];\n    ternary r266 r267[0u32] r268[0u32] into r269;\n    ternary r266 r267[1u32] r268[1u32] into r270;\n    ternary r266 r267[2u32] r268[2u32] into r271;\n    cast r269 r270 r271 into r272 as [field; 3u32];\n    hash.psd4 r272 into r273 as field;\n    is.eq r5[1u32].siblings[8u32] 0field into r274;\n    shr r5[1u32].leaf_index 7u8 into r275;\n    and r275 1u32 into r276;\n    is.eq r276 0u32 into r277;\n    cast 0field r273 r5[1u32].siblings[8u32] into r278 as [field; 3u32];\n    cast 0field r5[1u32].siblings[8u32] r273 into r279 as [field; 3u32];\n    ternary r277 r278[0u32] r279[0u32] into r280;\n    ternary r277 r278[1u32] r279[1u32] into r281;\n    ternary r277 r278[2u32] r279[2u32] into r282;\n    cast r280 r281 r282 into r283 as [field; 3u32];\n    hash.psd4 r283 into r284 as field;\n    is.eq r5[1u32].siblings[9u32] 0field into r285;\n    shr r5[1u32].leaf_index 8u8 into r286;\n    and r286 1u32 into r287;\n    is.eq r287 0u32 into r288;\n    cast 0field r284 r5[1u32].siblings[9u32] into r289 as [field; 3u32];\n    cast 0field r5[1u32].siblings[9u32] r284 into r290 as [field; 3u32];\n    ternary r288 r289[0u32] r290[0u32] into r291;\n    ternary r288 r289[1u32] r290[1u32] into r292;\n    ternary r288 r289[2u32] r290[2u32] into r293;\n    cast r291 r292 r293 into r294 as [field; 3u32];\n    hash.psd4 r294 into r295 as field;\n    is.eq r5[1u32].siblings[10u32] 0field into r296;\n    shr r5[1u32].leaf_index 9u8 into r297;\n    and r297 1u32 into r298;\n    is.eq r298 0u32 into r299;\n    cast 0field r295 r5[1u32].siblings[10u32] into r300 as [field; 3u32];\n    cast 0field r5[1u32].siblings[10u32] r295 into r301 as [field; 3u32];\n    ternary r299 r300[0u32] r301[0u32] into r302;\n    ternary r299 r300[1u32] r301[1u32] into r303;\n    ternary r299 r300[2u32] r301[2u32] into r304;\n    cast r302 r303 r304 into r305 as [field; 3u32];\n    hash.psd4 r305 into r306 as field;\n    is.eq r5[1u32].siblings[11u32] 0field into r307;\n    shr r5[1u32].leaf_index 10u8 into r308;\n    and r308 1u32 into r309;\n    is.eq r309 0u32 into r310;\n    cast 0field r306 r5[1u32].siblings[11u32] into r311 as [field; 3u32];\n    cast 0field r5[1u32].siblings[11u32] r306 into r312 as [field; 3u32];\n    ternary r310 r311[0u32] r312[0u32] into r313;\n    ternary r310 r311[1u32] r312[1u32] into r314;\n    ternary r310 r311[2u32] r312[2u32] into r315;\n    cast r313 r314 r315 into r316 as [field; 3u32];\n    hash.psd4 r316 into r317 as field;\n    is.eq r5[1u32].siblings[12u32] 0field into r318;\n    shr r5[1u32].leaf_index 11u8 into r319;\n    and r319 1u32 into r320;\n    is.eq r320 0u32 into r321;\n    cast 0field r317 r5[1u32].siblings[12u32] into r322 as [field; 3u32];\n    cast 0field r5[1u32].siblings[12u32] r317 into r323 as [field; 3u32];\n    ternary r321 r322[0u32] r323[0u32] into r324;\n    ternary r321 r322[1u32] r323[1u32] into r325;\n    ternary r321 r322[2u32] r323[2u32] into r326;\n    cast r324 r325 r326 into r327 as [field; 3u32];\n    hash.psd4 r327 into r328 as field;\n    is.eq r5[1u32].siblings[13u32] 0field into r329;\n    shr r5[1u32].leaf_index 12u8 into r330;\n    and r330 1u32 into r331;\n    is.eq r331 0u32 into r332;\n    cast 0field r328 r5[1u32].siblings[13u32] into r333 as [field; 3u32];\n    cast 0field r5[1u32].siblings[13u32] r328 into r334 as [field; 3u32];\n    ternary r332 r333[0u32] r334[0u32] into r335;\n    ternary r332 r333[1u32] r334[1u32] into r336;\n    ternary r332 r333[2u32] r334[2u32] into r337;\n    cast r335 r336 r337 into r338 as [field; 3u32];\n    hash.psd4 r338 into r339 as field;\n    is.eq r5[1u32].siblings[14u32] 0field into r340;\n    shr r5[1u32].leaf_index 13u8 into r341;\n    and r341 1u32 into r342;\n    is.eq r342 0u32 into r343;\n    cast 0field r339 r5[1u32].siblings[14u32] into r344 as [field; 3u32];\n    cast 0field r5[1u32].siblings[14u32] r339 into r345 as [field; 3u32];\n    ternary r343 r344[0u32] r345[0u32] into r346;\n    ternary r343 r344[1u32] r345[1u32] into r347;\n    ternary r343 r344[2u32] r345[2u32] into r348;\n    cast r346 r347 r348 into r349 as [field; 3u32];\n    hash.psd4 r349 into r350 as field;\n    is.eq r5[1u32].siblings[15u32] 0field into r351;\n    shr r5[1u32].leaf_index 14u8 into r352;\n    and r352 1u32 into r353;\n    is.eq r353 0u32 into r354;\n    cast 0field r350 r5[1u32].siblings[15u32] into r355 as [field; 3u32];\n    cast 0field r5[1u32].siblings[15u32] r350 into r356 as [field; 3u32];\n    ternary r354 r355[0u32] r356[0u32] into r357;\n    ternary r354 r355[1u32] r356[1u32] into r358;\n    ternary r354 r355[2u32] r356[2u32] into r359;\n    cast r357 r358 r359 into r360 as [field; 3u32];\n    hash.psd4 r360 into r361 as field;\n    ternary r351 r350 r361 into r362;\n    ternary r351 14u8 15u8 into r363;\n    ternary r340 r339 r362 into r364;\n    ternary r340 13u8 r363 into r365;\n    ternary r329 r328 r364 into r366;\n    ternary r329 12u8 r365 into r367;\n    ternary r318 r317 r366 into r368;\n    ternary r318 11u8 r367 into r369;\n    ternary r307 r306 r368 into r370;\n    ternary r307 10u8 r369 into r371;\n    ternary r296 r295 r370 into r372;\n    ternary r296 9u8 r371 into r373;\n    ternary r285 r284 r372 into r374;\n    ternary r285 8u8 r373 into r375;\n    ternary r274 r273 r374 into r376;\n    ternary r274 7u8 r375 into r377;\n    ternary r263 r262 r376 into r378;\n    ternary r263 6u8 r377 into r379;\n    ternary r252 r251 r378 into r380;\n    ternary r252 5u8 r379 into r381;\n    ternary r241 r240 r380 into r382;\n    ternary r241 4u8 r381 into r383;\n    ternary r230 r229 r382 into r384;\n    ternary r230 3u8 r383 into r385;\n    ternary r219 r218 r384 into r386;\n    ternary r219 2u8 r385 into r387;\n    ternary r208 r207 r386 into r388;\n    ternary r208 1u8 r387 into r389;\n    assert.eq r197 r388;\n    assert.eq r198 r389;\n    cast self.signer into r390 as field;\n    lt r390 r5[0u32].siblings[0u32] into r391;\n    is.eq r390 r5[0u32].siblings[0u32] into r392;\n    nor r391 r392 into r393;\n    is.eq r5[0u32].leaf_index r5[1u32].leaf_index into r394;\n    is.eq r5[0u32].leaf_index 0u32 into r395;\n    and r394 r395 into r396;\n    not r396 into r397;\n    or r391 r397 into r398;\n    assert.eq r398 true;\n    not r395 into r399;\n    shl 1u32 r198 into r400;\n    sub r400 1u32 into r401;\n    and r394 r399 into r402;\n    not r402 into r403;\n    is.eq r5[0u32].leaf_index r401 into r404;\n    or r404 r403 into r405;\n    assert.eq r405 true;\n    or r393 r403 into r406;\n    assert.eq r406 true;\n    not r394 into r407;\n    not r407 into r408;\n    or r393 r408 into r409;\n    assert.eq r409 true;\n    lt r390 r5[1u32].siblings[0u32] into r410;\n    or r410 r408 into r411;\n    assert.eq r411 true;\n    lte r5[1u32].leaf_index r401 into r412;\n    or r412 r408 into r413;\n    assert.eq r413 true;\n    add r5[0u32].leaf_index 1u32 into r414;\n    is.eq r414 r5[1u32].leaf_index into r415;\n    or r415 r408 into r416;\n    assert.eq r416 true;\n    and r6[0u32].leaf_index 1u32 into r417;\n    is.eq r417 0u32 into r418;\n    cast 1field r6[0u32].siblings[0u32] r6[0u32].siblings[1u32] into r419 as [field; 3u32];\n    cast 1field r6[0u32].siblings[1u32] r6[0u32].siblings[0u32] into r420 as [field; 3u32];\n    ternary r418 r419[0u32] r420[0u32] into r421;\n    ternary r418 r419[1u32] r420[1u32] into r422;\n    ternary r418 r419[2u32] r420[2u32] into r423;\n    cast r421 r422 r423 into r424 as [field; 3u32];\n    hash.psd4 r424 into r425 as field;\n    is.eq r6[0u32].siblings[2u32] 0field into r426;\n    shr r6[0u32].leaf_index 1u8 into r427;\n    and r427 1u32 into r428;\n    is.eq r428 0u32 into r429;\n    cast 0field r425 r6[0u32].siblings[2u32] into r430 as [field; 3u32];\n    cast 0field r6[0u32].siblings[2u32] r425 into r431 as [field; 3u32];\n    ternary r429 r430[0u32] r431[0u32] into r432;\n    ternary r429 r430[1u32] r431[1u32] into r433;\n    ternary r429 r430[2u32] r431[2u32] into r434;\n    cast r432 r433 r434 into r435 as [field; 3u32];\n    hash.psd4 r435 into r436 as field;\n    is.eq r6[0u32].siblings[3u32] 0field into r437;\n    shr r6[0u32].leaf_index 2u8 into r438;\n    and r438 1u32 into r439;\n    is.eq r439 0u32 into r440;\n    cast 0field r436 r6[0u32].siblings[3u32] into r441 as [field; 3u32];\n    cast 0field r6[0u32].siblings[3u32] r436 into r442 as [field; 3u32];\n    ternary r440 r441[0u32] r442[0u32] into r443;\n    ternary r440 r441[1u32] r442[1u32] into r444;\n    ternary r440 r441[2u32] r442[2u32] into r445;\n    cast r443 r444 r445 into r446 as [field; 3u32];\n    hash.psd4 r446 into r447 as field;\n    is.eq r6[0u32].siblings[4u32] 0field into r448;\n    shr r6[0u32].leaf_index 3u8 into r449;\n    and r449 1u32 into r450;\n    is.eq r450 0u32 into r451;\n    cast 0field r447 r6[0u32].siblings[4u32] into r452 as [field; 3u32];\n    cast 0field r6[0u32].siblings[4u32] r447 into r453 as [field; 3u32];\n    ternary r451 r452[0u32] r453[0u32] into r454;\n    ternary r451 r452[1u32] r453[1u32] into r455;\n    ternary r451 r452[2u32] r453[2u32] into r456;\n    cast r454 r455 r456 into r457 as [field; 3u32];\n    hash.psd4 r457 into r458 as field;\n    is.eq r6[0u32].siblings[5u32] 0field into r459;\n    shr r6[0u32].leaf_index 4u8 into r460;\n    and r460 1u32 into r461;\n    is.eq r461 0u32 into r462;\n    cast 0field r458 r6[0u32].siblings[5u32] into r463 as [field; 3u32];\n    cast 0field r6[0u32].siblings[5u32] r458 into r464 as [field; 3u32];\n    ternary r462 r463[0u32] r464[0u32] into r465;\n    ternary r462 r463[1u32] r464[1u32] into r466;\n    ternary r462 r463[2u32] r464[2u32] into r467;\n    cast r465 r466 r467 into r468 as [field; 3u32];\n    hash.psd4 r468 into r469 as field;\n    is.eq r6[0u32].siblings[6u32] 0field into r470;\n    shr r6[0u32].leaf_index 5u8 into r471;\n    and r471 1u32 into r472;\n    is.eq r472 0u32 into r473;\n    cast 0field r469 r6[0u32].siblings[6u32] into r474 as [field; 3u32];\n    cast 0field r6[0u32].siblings[6u32] r469 into r475 as [field; 3u32];\n    ternary r473 r474[0u32] r475[0u32] into r476;\n    ternary r473 r474[1u32] r475[1u32] into r477;\n    ternary r473 r474[2u32] r475[2u32] into r478;\n    cast r476 r477 r478 into r479 as [field; 3u32];\n    hash.psd4 r479 into r480 as field;\n    is.eq r6[0u32].siblings[7u32] 0field into r481;\n    shr r6[0u32].leaf_index 6u8 into r482;\n    and r482 1u32 into r483;\n    is.eq r483 0u32 into r484;\n    cast 0field r480 r6[0u32].siblings[7u32] into r485 as [field; 3u32];\n    cast 0field r6[0u32].siblings[7u32] r480 into r486 as [field; 3u32];\n    ternary r484 r485[0u32] r486[0u32] into r487;\n    ternary r484 r485[1u32] r486[1u32] into r488;\n    ternary r484 r485[2u32] r486[2u32] into r489;\n    cast r487 r488 r489 into r490 as [field; 3u32];\n    hash.psd4 r490 into r491 as field;\n    is.eq r6[0u32].siblings[8u32] 0field into r492;\n    shr r6[0u32].leaf_index 7u8 into r493;\n    and r493 1u32 into r494;\n    is.eq r494 0u32 into r495;\n    cast 0field r491 r6[0u32].siblings[8u32] into r496 as [field; 3u32];\n    cast 0field r6[0u32].siblings[8u32] r491 into r497 as [field; 3u32];\n    ternary r495 r496[0u32] r497[0u32] into r498;\n    ternary r495 r496[1u32] r497[1u32] into r499;\n    ternary r495 r496[2u32] r497[2u32] into r500;\n    cast r498 r499 r500 into r501 as [field; 3u32];\n    hash.psd4 r501 into r502 as field;\n    is.eq r6[0u32].siblings[9u32] 0field into r503;\n    shr r6[0u32].leaf_index 8u8 into r504;\n    and r504 1u32 into r505;\n    is.eq r505 0u32 into r506;\n    cast 0field r502 r6[0u32].siblings[9u32] into r507 as [field; 3u32];\n    cast 0field r6[0u32].siblings[9u32] r502 into r508 as [field; 3u32];\n    ternary r506 r507[0u32] r508[0u32] into r509;\n    ternary r506 r507[1u32] r508[1u32] into r510;\n    ternary r506 r507[2u32] r508[2u32] into r511;\n    cast r509 r510 r511 into r512 as [field; 3u32];\n    hash.psd4 r512 into r513 as field;\n    is.eq r6[0u32].siblings[10u32] 0field into r514;\n    shr r6[0u32].leaf_index 9u8 into r515;\n    and r515 1u32 into r516;\n    is.eq r516 0u32 into r517;\n    cast 0field r513 r6[0u32].siblings[10u32] into r518 as [field; 3u32];\n    cast 0field r6[0u32].siblings[10u32] r513 into r519 as [field; 3u32];\n    ternary r517 r518[0u32] r519[0u32] into r520;\n    ternary r517 r518[1u32] r519[1u32] into r521;\n    ternary r517 r518[2u32] r519[2u32] into r522;\n    cast r520 r521 r522 into r523 as [field; 3u32];\n    hash.psd4 r523 into r524 as field;\n    is.eq r6[0u32].siblings[11u32] 0field into r525;\n    shr r6[0u32].leaf_index 10u8 into r526;\n    and r526 1u32 into r527;\n    is.eq r527 0u32 into r528;\n    cast 0field r524 r6[0u32].siblings[11u32] into r529 as [field; 3u32];\n    cast 0field r6[0u32].siblings[11u32] r524 into r530 as [field; 3u32];\n    ternary r528 r529[0u32] r530[0u32] into r531;\n    ternary r528 r529[1u32] r530[1u32] into r532;\n    ternary r528 r529[2u32] r530[2u32] into r533;\n    cast r531 r532 r533 into r534 as [field; 3u32];\n    hash.psd4 r534 into r535 as field;\n    is.eq r6[0u32].siblings[12u32] 0field into r536;\n    shr r6[0u32].leaf_index 11u8 into r537;\n    and r537 1u32 into r538;\n    is.eq r538 0u32 into r539;\n    cast 0field r535 r6[0u32].siblings[12u32] into r540 as [field; 3u32];\n    cast 0field r6[0u32].siblings[12u32] r535 into r541 as [field; 3u32];\n    ternary r539 r540[0u32] r541[0u32] into r542;\n    ternary r539 r540[1u32] r541[1u32] into r543;\n    ternary r539 r540[2u32] r541[2u32] into r544;\n    cast r542 r543 r544 into r545 as [field; 3u32];\n    hash.psd4 r545 into r546 as field;\n    is.eq r6[0u32].siblings[13u32] 0field into r547;\n    shr r6[0u32].leaf_index 12u8 into r548;\n    and r548 1u32 into r549;\n    is.eq r549 0u32 into r550;\n    cast 0field r546 r6[0u32].siblings[13u32] into r551 as [field; 3u32];\n    cast 0field r6[0u32].siblings[13u32] r546 into r552 as [field; 3u32];\n    ternary r550 r551[0u32] r552[0u32] into r553;\n    ternary r550 r551[1u32] r552[1u32] into r554;\n    ternary r550 r551[2u32] r552[2u32] into r555;\n    cast r553 r554 r555 into r556 as [field; 3u32];\n    hash.psd4 r556 into r557 as field;\n    is.eq r6[0u32].siblings[14u32] 0field into r558;\n    shr r6[0u32].leaf_index 13u8 into r559;\n    and r559 1u32 into r560;\n    is.eq r560 0u32 into r561;\n    cast 0field r557 r6[0u32].siblings[14u32] into r562 as [field; 3u32];\n    cast 0field r6[0u32].siblings[14u32] r557 into r563 as [field; 3u32];\n    ternary r561 r562[0u32] r563[0u32] into r564;\n    ternary r561 r562[1u32] r563[1u32] into r565;\n    ternary r561 r562[2u32] r563[2u32] into r566;\n    cast r564 r565 r566 into r567 as [field; 3u32];\n    hash.psd4 r567 into r568 as field;\n    is.eq r6[0u32].siblings[15u32] 0field into r569;\n    shr r6[0u32].leaf_index 14u8 into r570;\n    and r570 1u32 into r571;\n    is.eq r571 0u32 into r572;\n    cast 0field r568 r6[0u32].siblings[15u32] into r573 as [field; 3u32];\n    cast 0field r6[0u32].siblings[15u32] r568 into r574 as [field; 3u32];\n    ternary r572 r573[0u32] r574[0u32] into r575;\n    ternary r572 r573[1u32] r574[1u32] into r576;\n    ternary r572 r573[2u32] r574[2u32] into r577;\n    cast r575 r576 r577 into r578 as [field; 3u32];\n    hash.psd4 r578 into r579 as field;\n    ternary r569 r568 r579 into r580;\n    ternary r569 14u8 15u8 into r581;\n    ternary r558 r557 r580 into r582;\n    ternary r558 13u8 r581 into r583;\n    ternary r547 r546 r582 into r584;\n    ternary r547 12u8 r583 into r585;\n    ternary r536 r535 r584 into r586;\n    ternary r536 11u8 r585 into r587;\n    ternary r525 r524 r586 into r588;\n    ternary r525 10u8 r587 into r589;\n    ternary r514 r513 r588 into r590;\n    ternary r514 9u8 r589 into r591;\n    ternary r503 r502 r590 into r592;\n    ternary r503 8u8 r591 into r593;\n    ternary r492 r491 r592 into r594;\n    ternary r492 7u8 r593 into r595;\n    ternary r481 r480 r594 into r596;\n    ternary r481 6u8 r595 into r597;\n    ternary r470 r469 r596 into r598;\n    ternary r470 5u8 r597 into r599;\n    ternary r459 r458 r598 into r600;\n    ternary r459 4u8 r599 into r601;\n    ternary r448 r447 r600 into r602;\n    ternary r448 3u8 r601 into r603;\n    ternary r437 r436 r602 into r604;\n    ternary r437 2u8 r603 into r605;\n    ternary r426 r425 r604 into r606;\n    ternary r426 1u8 r605 into r607;\n    and r6[1u32].leaf_index 1u32 into r608;\n    is.eq r608 0u32 into r609;\n    cast 1field r6[1u32].siblings[0u32] r6[1u32].siblings[1u32] into r610 as [field; 3u32];\n    cast 1field r6[1u32].siblings[1u32] r6[1u32].siblings[0u32] into r611 as [field; 3u32];\n    ternary r609 r610[0u32] r611[0u32] into r612;\n    ternary r609 r610[1u32] r611[1u32] into r613;\n    ternary r609 r610[2u32] r611[2u32] into r614;\n    cast r612 r613 r614 into r615 as [field; 3u32];\n    hash.psd4 r615 into r616 as field;\n    is.eq r6[1u32].siblings[2u32] 0field into r617;\n    shr r6[1u32].leaf_index 1u8 into r618;\n    and r618 1u32 into r619;\n    is.eq r619 0u32 into r620;\n    cast 0field r616 r6[1u32].siblings[2u32] into r621 as [field; 3u32];\n    cast 0field r6[1u32].siblings[2u32] r616 into r622 as [field; 3u32];\n    ternary r620 r621[0u32] r622[0u32] into r623;\n    ternary r620 r621[1u32] r622[1u32] into r624;\n    ternary r620 r621[2u32] r622[2u32] into r625;\n    cast r623 r624 r625 into r626 as [field; 3u32];\n    hash.psd4 r626 into r627 as field;\n    is.eq r6[1u32].siblings[3u32] 0field into r628;\n    shr r6[1u32].leaf_index 2u8 into r629;\n    and r629 1u32 into r630;\n    is.eq r630 0u32 into r631;\n    cast 0field r627 r6[1u32].siblings[3u32] into r632 as [field; 3u32];\n    cast 0field r6[1u32].siblings[3u32] r627 into r633 as [field; 3u32];\n    ternary r631 r632[0u32] r633[0u32] into r634;\n    ternary r631 r632[1u32] r633[1u32] into r635;\n    ternary r631 r632[2u32] r633[2u32] into r636;\n    cast r634 r635 r636 into r637 as [field; 3u32];\n    hash.psd4 r637 into r638 as field;\n    is.eq r6[1u32].siblings[4u32] 0field into r639;\n    shr r6[1u32].leaf_index 3u8 into r640;\n    and r640 1u32 into r641;\n    is.eq r641 0u32 into r642;\n    cast 0field r638 r6[1u32].siblings[4u32] into r643 as [field; 3u32];\n    cast 0field r6[1u32].siblings[4u32] r638 into r644 as [field; 3u32];\n    ternary r642 r643[0u32] r644[0u32] into r645;\n    ternary r642 r643[1u32] r644[1u32] into r646;\n    ternary r642 r643[2u32] r644[2u32] into r647;\n    cast r645 r646 r647 into r648 as [field; 3u32];\n    hash.psd4 r648 into r649 as field;\n    is.eq r6[1u32].siblings[5u32] 0field into r650;\n    shr r6[1u32].leaf_index 4u8 into r651;\n    and r651 1u32 into r652;\n    is.eq r652 0u32 into r653;\n    cast 0field r649 r6[1u32].siblings[5u32] into r654 as [field; 3u32];\n    cast 0field r6[1u32].siblings[5u32] r649 into r655 as [field; 3u32];\n    ternary r653 r654[0u32] r655[0u32] into r656;\n    ternary r653 r654[1u32] r655[1u32] into r657;\n    ternary r653 r654[2u32] r655[2u32] into r658;\n    cast r656 r657 r658 into r659 as [field; 3u32];\n    hash.psd4 r659 into r660 as field;\n    is.eq r6[1u32].siblings[6u32] 0field into r661;\n    shr r6[1u32].leaf_index 5u8 into r662;\n    and r662 1u32 into r663;\n    is.eq r663 0u32 into r664;\n    cast 0field r660 r6[1u32].siblings[6u32] into r665 as [field; 3u32];\n    cast 0field r6[1u32].siblings[6u32] r660 into r666 as [field; 3u32];\n    ternary r664 r665[0u32] r666[0u32] into r667;\n    ternary r664 r665[1u32] r666[1u32] into r668;\n    ternary r664 r665[2u32] r666[2u32] into r669;\n    cast r667 r668 r669 into r670 as [field; 3u32];\n    hash.psd4 r670 into r671 as field;\n    is.eq r6[1u32].siblings[7u32] 0field into r672;\n    shr r6[1u32].leaf_index 6u8 into r673;\n    and r673 1u32 into r674;\n    is.eq r674 0u32 into r675;\n    cast 0field r671 r6[1u32].siblings[7u32] into r676 as [field; 3u32];\n    cast 0field r6[1u32].siblings[7u32] r671 into r677 as [field; 3u32];\n    ternary r675 r676[0u32] r677[0u32] into r678;\n    ternary r675 r676[1u32] r677[1u32] into r679;\n    ternary r675 r676[2u32] r677[2u32] into r680;\n    cast r678 r679 r680 into r681 as [field; 3u32];\n    hash.psd4 r681 into r682 as field;\n    is.eq r6[1u32].siblings[8u32] 0field into r683;\n    shr r6[1u32].leaf_index 7u8 into r684;\n    and r684 1u32 into r685;\n    is.eq r685 0u32 into r686;\n    cast 0field r682 r6[1u32].siblings[8u32] into r687 as [field; 3u32];\n    cast 0field r6[1u32].siblings[8u32] r682 into r688 as [field; 3u32];\n    ternary r686 r687[0u32] r688[0u32] into r689;\n    ternary r686 r687[1u32] r688[1u32] into r690;\n    ternary r686 r687[2u32] r688[2u32] into r691;\n    cast r689 r690 r691 into r692 as [field; 3u32];\n    hash.psd4 r692 into r693 as field;\n    is.eq r6[1u32].siblings[9u32] 0field into r694;\n    shr r6[1u32].leaf_index 8u8 into r695;\n    and r695 1u32 into r696;\n    is.eq r696 0u32 into r697;\n    cast 0field r693 r6[1u32].siblings[9u32] into r698 as [field; 3u32];\n    cast 0field r6[1u32].siblings[9u32] r693 into r699 as [field; 3u32];\n    ternary r697 r698[0u32] r699[0u32] into r700;\n    ternary r697 r698[1u32] r699[1u32] into r701;\n    ternary r697 r698[2u32] r699[2u32] into r702;\n    cast r700 r701 r702 into r703 as [field; 3u32];\n    hash.psd4 r703 into r704 as field;\n    is.eq r6[1u32].siblings[10u32] 0field into r705;\n    shr r6[1u32].leaf_index 9u8 into r706;\n    and r706 1u32 into r707;\n    is.eq r707 0u32 into r708;\n    cast 0field r704 r6[1u32].siblings[10u32] into r709 as [field; 3u32];\n    cast 0field r6[1u32].siblings[10u32] r704 into r710 as [field; 3u32];\n    ternary r708 r709[0u32] r710[0u32] into r711;\n    ternary r708 r709[1u32] r710[1u32] into r712;\n    ternary r708 r709[2u32] r710[2u32] into r713;\n    cast r711 r712 r713 into r714 as [field; 3u32];\n    hash.psd4 r714 into r715 as field;\n    is.eq r6[1u32].siblings[11u32] 0field into r716;\n    shr r6[1u32].leaf_index 10u8 into r717;\n    and r717 1u32 into r718;\n    is.eq r718 0u32 into r719;\n    cast 0field r715 r6[1u32].siblings[11u32] into r720 as [field; 3u32];\n    cast 0field r6[1u32].siblings[11u32] r715 into r721 as [field; 3u32];\n    ternary r719 r720[0u32] r721[0u32] into r722;\n    ternary r719 r720[1u32] r721[1u32] into r723;\n    ternary r719 r720[2u32] r721[2u32] into r724;\n    cast r722 r723 r724 into r725 as [field; 3u32];\n    hash.psd4 r725 into r726 as field;\n    is.eq r6[1u32].siblings[12u32] 0field into r727;\n    shr r6[1u32].leaf_index 11u8 into r728;\n    and r728 1u32 into r729;\n    is.eq r729 0u32 into r730;\n    cast 0field r726 r6[1u32].siblings[12u32] into r731 as [field; 3u32];\n    cast 0field r6[1u32].siblings[12u32] r726 into r732 as [field; 3u32];\n    ternary r730 r731[0u32] r732[0u32] into r733;\n    ternary r730 r731[1u32] r732[1u32] into r734;\n    ternary r730 r731[2u32] r732[2u32] into r735;\n    cast r733 r734 r735 into r736 as [field; 3u32];\n    hash.psd4 r736 into r737 as field;\n    is.eq r6[1u32].siblings[13u32] 0field into r738;\n    shr r6[1u32].leaf_index 12u8 into r739;\n    and r739 1u32 into r740;\n    is.eq r740 0u32 into r741;\n    cast 0field r737 r6[1u32].siblings[13u32] into r742 as [field; 3u32];\n    cast 0field r6[1u32].siblings[13u32] r737 into r743 as [field; 3u32];\n    ternary r741 r742[0u32] r743[0u32] into r744;\n    ternary r741 r742[1u32] r743[1u32] into r745;\n    ternary r741 r742[2u32] r743[2u32] into r746;\n    cast r744 r745 r746 into r747 as [field; 3u32];\n    hash.psd4 r747 into r748 as field;\n    is.eq r6[1u32].siblings[14u32] 0field into r749;\n    shr r6[1u32].leaf_index 13u8 into r750;\n    and r750 1u32 into r751;\n    is.eq r751 0u32 into r752;\n    cast 0field r748 r6[1u32].siblings[14u32] into r753 as [field; 3u32];\n    cast 0field r6[1u32].siblings[14u32] r748 into r754 as [field; 3u32];\n    ternary r752 r753[0u32] r754[0u32] into r755;\n    ternary r752 r753[1u32] r754[1u32] into r756;\n    ternary r752 r753[2u32] r754[2u32] into r757;\n    cast r755 r756 r757 into r758 as [field; 3u32];\n    hash.psd4 r758 into r759 as field;\n    is.eq r6[1u32].siblings[15u32] 0field into r760;\n    shr r6[1u32].leaf_index 14u8 into r761;\n    and r761 1u32 into r762;\n    is.eq r762 0u32 into r763;\n    cast 0field r759 r6[1u32].siblings[15u32] into r764 as [field; 3u32];\n    cast 0field r6[1u32].siblings[15u32] r759 into r765 as [field; 3u32];\n    ternary r763 r764[0u32] r765[0u32] into r766;\n    ternary r763 r764[1u32] r765[1u32] into r767;\n    ternary r763 r764[2u32] r765[2u32] into r768;\n    cast r766 r767 r768 into r769 as [field; 3u32];\n    hash.psd4 r769 into r770 as field;\n    ternary r760 r759 r770 into r771;\n    ternary r760 14u8 15u8 into r772;\n    ternary r749 r748 r771 into r773;\n    ternary r749 13u8 r772 into r774;\n    ternary r738 r737 r773 into r775;\n    ternary r738 12u8 r774 into r776;\n    ternary r727 r726 r775 into r777;\n    ternary r727 11u8 r776 into r778;\n    ternary r716 r715 r777 into r779;\n    ternary r716 10u8 r778 into r780;\n    ternary r705 r704 r779 into r781;\n    ternary r705 9u8 r780 into r782;\n    ternary r694 r693 r781 into r783;\n    ternary r694 8u8 r782 into r784;\n    ternary r683 r682 r783 into r785;\n    ternary r683 7u8 r784 into r786;\n    ternary r672 r671 r785 into r787;\n    ternary r672 6u8 r786 into r788;\n    ternary r661 r660 r787 into r789;\n    ternary r661 5u8 r788 into r790;\n    ternary r650 r649 r789 into r791;\n    ternary r650 4u8 r790 into r792;\n    ternary r639 r638 r791 into r793;\n    ternary r639 3u8 r792 into r794;\n    ternary r628 r627 r793 into r795;\n    ternary r628 2u8 r794 into r796;\n    ternary r617 r616 r795 into r797;\n    ternary r617 1u8 r796 into r798;\n    assert.eq r606 r797;\n    assert.eq r607 r798;\n    cast r0.withdrawal into r799 as field;\n    lt r799 r6[0u32].siblings[0u32] into r800;\n    is.eq r799 r6[0u32].siblings[0u32] into r801;\n    nor r800 r801 into r802;\n    is.eq r6[0u32].leaf_index r6[1u32].leaf_index into r803;\n    is.eq r6[0u32].leaf_index 0u32 into r804;\n    and r803 r804 into r805;\n    not r805 into r806;\n    or r800 r806 into r807;\n    assert.eq r807 true;\n    not r804 into r808;\n    shl 1u32 r607 into r809;\n    sub r809 1u32 into r810;\n    and r803 r808 into r811;\n    not r811 into r812;\n    is.eq r6[0u32].leaf_index r810 into r813;\n    or r813 r812 into r814;\n    assert.eq r814 true;\n    or r802 r812 into r815;\n    assert.eq r815 true;\n    not r803 into r816;\n    not r816 into r817;\n    or r802 r817 into r818;\n    assert.eq r818 true;\n    lt r799 r6[1u32].siblings[0u32] into r819;\n    or r819 r817 into r820;\n    assert.eq r820 true;\n    lte r6[1u32].leaf_index r810 into r821;\n    or r821 r817 into r822;\n    assert.eq r822 true;\n    add r6[0u32].leaf_index 1u32 into r823;\n    is.eq r823 r6[1u32].leaf_index into r824;\n    or r824 r817 into r825;\n    assert.eq r825 true;\n    assert.eq r197 r606;\n    cast r0.owner r0.withdrawal r0.token_id r0.token0_id r0.token1_id r0.pool r0.tick_lower r0.tick_upper into r826 as PositionNFT.record;\n    call.dynamic r3 'aleo' 'transfer_public_to_private' with r0.withdrawal r1 (as address.private u128.public) into r827 r828 (as dynamic.record dynamic.future);\n    call.dynamic r4 'aleo' 'transfer_public_to_private' with r0.withdrawal r2 (as address.private u128.public) into r829 r830 (as dynamic.record dynamic.future);\n    async collect r828 r830 r0.token_id r0.pool r0.tick_lower r0.tick_upper r1 r2 r3 r4 r197 r7 into r831;\n    output r826 as PositionNFT.record;\n    output r827 as dynamic.record;\n    output r829 as dynamic.record;\n    output r831 as shield_swap.aleo/collect.future;\n\nfinalize collect:\n    input r0 as dynamic.future;\n    input r1 as dynamic.future;\n    input r2 as field.public;\n    input r3 as field.public;\n    input r4 as i32.public;\n    input r5 as i32.public;\n    input r6 as u128.public;\n    input r7 as u128.public;\n    input r8 as field.public;\n    input r9 as field.public;\n    input r10 as field.public;\n    input r11 as boolean.public;\n    get shield_swap_freezelist.aleo/freeze_list_root[1u8] into r12;\n    is.neq r12 r10 into r13;\n    branch.eq r13 false to end_then_0_0;\n    get shield_swap_freezelist.aleo/freeze_list_root[2u8] into r14;\n    get shield_swap_freezelist.aleo/root_updated_height[true] into r15;\n    get shield_swap_freezelist.aleo/previous_root_window[true] into r16;\n    is.eq r10 r12 into r17;\n    is.eq r10 r14 into r18;\n    sub block.height r15 into r19;\n    lt r19 r16 into r20;\n    and r18 r20 into r21;\n    or r17 r21 into r22;\n    assert.eq r22 true;\n    branch.eq true true to end_otherwise_0_1;\n    position end_then_0_0;\n    position end_otherwise_0_1;\n    contains from_wrapper_token_id[r8] into r23;\n    contains from_wrapper_token_id[r9] into r24;\n    or r23 r24 into r25;\n    branch.eq r25 false to end_then_0_2;\n    assert.eq r11 true;\n    branch.eq true true to end_otherwise_0_3;\n    position end_then_0_2;\n    position end_otherwise_0_3;\n    await r0;\n    await r1;\n    get pools[r3] into r26;\n    is.eq r26.token0 r8 into r27;\n    is.eq r26.token1 r9 into r28;\n    and r27 r28 into r29;\n    assert.eq r29 true;\n    get slots[r3] into r30;\n    get positions[r2] into r31;\n    contains frozen_position[r2] into r32;\n    not r32 into r33;\n    assert.eq r33 true;\n    is.eq r31.pool r3 into r34;\n    is.eq r31.tick_lower r4 into r35;\n    and r34 r35 into r36;\n    is.eq r31.tick_upper r5 into r37;\n    and r36 r37 into r38;\n    assert.eq r38 true;\n    cast 0u128 0u128 into r39 as U256__8JquwLopp8;\n    cast 0u128 0u128 into r40 as U256__8JquwLopp8;\n    cast r3 0i128 0u128 r4 r39 r40 0i32 0i32 into r41 as Tick;\n    cast 0u128 0u128 into r42 as U256__8JquwLopp8;\n    cast 0u128 0u128 into r43 as U256__8JquwLopp8;\n    cast r3 0i128 0u128 r5 r42 r43 0i32 0i32 into r44 as Tick;\n    cast r3 r4 into r45 as TickKey;\n    hash.bhp256 r45 into r46 as field;\n    get.or_use ticks[r46] r41 into r47;\n    cast r3 r5 into r48 as TickKey;\n    hash.bhp256 r48 into r49 as field;\n    get.or_use ticks[r49] r44 into r50;\n    gte r30.tick r47.tick into r51;\n    lt r30.fee_growth_global0_x_128.lo r47.fee_growth_outside0_x_128.lo into r52;\n    ternary r52 1u128 0u128 into r53;\n    sub.w r30.fee_growth_global0_x_128.lo r47.fee_growth_outside0_x_128.lo into r54;\n    sub.w r30.fee_growth_global0_x_128.hi r47.fee_growth_outside0_x_128.hi into r55;\n    sub.w r55 r53 into r56;\n    cast r56 r54 into r57 as U256__8JquwLopp8;\n    lt r30.fee_growth_global1_x_128.lo r47.fee_growth_outside1_x_128.lo into r58;\n    ternary r58 1u128 0u128 into r59;\n    sub.w r30.fee_growth_global1_x_128.lo r47.fee_growth_outside1_x_128.lo into r60;\n    sub.w r30.fee_growth_global1_x_128.hi r47.fee_growth_outside1_x_128.hi into r61;\n    sub.w r61 r59 into r62;\n    cast r62 r60 into r63 as U256__8JquwLopp8;\n    ternary r51 r47.fee_growth_outside0_x_128.hi r57.hi into r64;\n    ternary r51 r47.fee_growth_outside0_x_128.lo r57.lo into r65;\n    cast r64 r65 into r66 as U256__8JquwLopp8;\n    ternary r51 r47.fee_growth_outside1_x_128.hi r63.hi into r67;\n    ternary r51 r47.fee_growth_outside1_x_128.lo r63.lo into r68;\n    cast r67 r68 into r69 as U256__8JquwLopp8;\n    lt r30.tick r50.tick into r70;\n    lt r30.fee_growth_global0_x_128.lo r50.fee_growth_outside0_x_128.lo into r71;\n    ternary r71 1u128 0u128 into r72;\n    sub.w r30.fee_growth_global0_x_128.lo r50.fee_growth_outside0_x_128.lo into r73;\n    sub.w r30.fee_growth_global0_x_128.hi r50.fee_growth_outside0_x_128.hi into r74;\n    sub.w r74 r72 into r75;\n    cast r75 r73 into r76 as U256__8JquwLopp8;\n    lt r30.fee_growth_global1_x_128.lo r50.fee_growth_outside1_x_128.lo into r77;\n    ternary r77 1u128 0u128 into r78;\n    sub.w r30.fee_growth_global1_x_128.lo r50.fee_growth_outside1_x_128.lo into r79;\n    sub.w r30.fee_growth_global1_x_128.hi r50.fee_growth_outside1_x_128.hi into r80;\n    sub.w r80 r78 into r81;\n    cast r81 r79 into r82 as U256__8JquwLopp8;\n    ternary r70 r50.fee_growth_outside0_x_128.hi r76.hi into r83;\n    ternary r70 r50.fee_growth_outside0_x_128.lo r76.lo into r84;\n    cast r83 r84 into r85 as U256__8JquwLopp8;\n    ternary r70 r50.fee_growth_outside1_x_128.hi r82.hi into r86;\n    ternary r70 r50.fee_growth_outside1_x_128.lo r82.lo into r87;\n    cast r86 r87 into r88 as U256__8JquwLopp8;\n    lt r30.fee_growth_global0_x_128.lo r66.lo into r89;\n    ternary r89 1u128 0u128 into r90;\n    sub.w r30.fee_growth_global0_x_128.lo r66.lo into r91;\n    sub.w r30.fee_growth_global0_x_128.hi r66.hi into r92;\n    sub.w r92 r90 into r93;\n    cast r93 r91 into r94 as U256__8JquwLopp8;\n    lt r94.lo r85.lo into r95;\n    ternary r95 1u128 0u128 into r96;\n    sub.w r94.lo r85.lo into r97;\n    sub.w r94.hi r85.hi into r98;\n    sub.w r98 r96 into r99;\n    cast r99 r97 into r100 as U256__8JquwLopp8;\n    lt r30.fee_growth_global1_x_128.lo r69.lo into r101;\n    ternary r101 1u128 0u128 into r102;\n    sub.w r30.fee_growth_global1_x_128.lo r69.lo into r103;\n    sub.w r30.fee_growth_global1_x_128.hi r69.hi into r104;\n    sub.w r104 r102 into r105;\n    cast r105 r103 into r106 as U256__8JquwLopp8;\n    lt r106.lo r88.lo into r107;\n    ternary r107 1u128 0u128 into r108;\n    sub.w r106.lo r88.lo into r109;\n    sub.w r106.hi r88.hi into r110;\n    sub.w r110 r108 into r111;\n    cast r111 r109 into r112 as U256__8JquwLopp8;\n    lt r100.lo r31.fee_growth_inside0_last_x_128.lo into r113;\n    ternary r113 1u128 0u128 into r114;\n    sub.w r100.lo r31.fee_growth_inside0_last_x_128.lo into r115;\n    sub.w r100.hi r31.fee_growth_inside0_last_x_128.hi into r116;\n    sub.w r116 r114 into r117;\n    cast r117 r115 into r118 as U256__8JquwLopp8;\n    and r118.hi 18446744073709551615u128 into r119;\n    shr r118.hi 64u8 into r120;\n    and r31.liquidity 18446744073709551615u128 into r121;\n    shr r31.liquidity 64u8 into r122;\n    mul r119 r121 into r123;\n    mul r119 r122 into r124;\n    mul r120 r121 into r125;\n    mul r120 r122 into r126;\n    and r123 18446744073709551615u128 into r127;\n    shr r123 64u8 into r128;\n    and r124 18446744073709551615u128 into r129;\n    add r128 r129 into r130;\n    and r125 18446744073709551615u128 into r131;\n    add r130 r131 into r132;\n    and r132 18446744073709551615u128 into r133;\n    shr r132 64u8 into r134;\n    shr r124 64u8 into r135;\n    shr r125 64u8 into r136;\n    add r135 r136 into r137;\n    and r126 18446744073709551615u128 into r138;\n    add r137 r138 into r139;\n    add r139 r134 into r140;\n    and r140 18446744073709551615u128 into r141;\n    shr r140 64u8 into r142;\n    shr r126 64u8 into r143;\n    add r143 r142 into r144;\n    shl r144 64u8 into r145;\n    add r145 r141 into r146;\n    shl r133 64u8 into r147;\n    add r147 r127 into r148;\n    and r118.lo 18446744073709551615u128 into r149;\n    shr r118.lo 64u8 into r150;\n    mul r149 r121 into r151;\n    mul r149 r122 into r152;\n    mul r150 r121 into r153;\n    mul r150 r122 into r154;\n    and r151 18446744073709551615u128 into r155;\n    shr r151 64u8 into r156;\n    and r152 18446744073709551615u128 into r157;\n    add r156 r157 into r158;\n    and r153 18446744073709551615u128 into r159;\n    add r158 r159 into r160;\n    and r160 18446744073709551615u128 into r161;\n    shr r160 64u8 into r162;\n    shr r152 64u8 into r163;\n    shr r153 64u8 into r164;\n    add r163 r164 into r165;\n    and r154 18446744073709551615u128 into r166;\n    add r165 r166 into r167;\n    add r167 r162 into r168;\n    and r168 18446744073709551615u128 into r169;\n    shr r168 64u8 into r170;\n    shr r154 64u8 into r171;\n    add r171 r170 into r172;\n    shl r172 64u8 into r173;\n    add r173 r169 into r174;\n    shl r161 64u8 into r175;\n    add r175 r155 into r176;\n    sub 340282366920938463463374607431768211455u128 r148 into r177;\n    lte r174 r177 into r178;\n    is.eq r146 0u128 into r179;\n    and r179 r178 into r180;\n    assert.eq r180 true;\n    add r148 r174 into r181;\n    add r31.tokens_owed0 r181 into r182;\n    lt r112.lo r31.fee_growth_inside1_last_x_128.lo into r183;\n    ternary r183 1u128 0u128 into r184;\n    sub.w r112.lo r31.fee_growth_inside1_last_x_128.lo into r185;\n    sub.w r112.hi r31.fee_growth_inside1_last_x_128.hi into r186;\n    sub.w r186 r184 into r187;\n    cast r187 r185 into r188 as U256__8JquwLopp8;\n    and r188.hi 18446744073709551615u128 into r189;\n    shr r188.hi 64u8 into r190;\n    and r31.liquidity 18446744073709551615u128 into r191;\n    shr r31.liquidity 64u8 into r192;\n    mul r189 r191 into r193;\n    mul r189 r192 into r194;\n    mul r190 r191 into r195;\n    mul r190 r192 into r196;\n    and r193 18446744073709551615u128 into r197;\n    shr r193 64u8 into r198;\n    and r194 18446744073709551615u128 into r199;\n    add r198 r199 into r200;\n    and r195 18446744073709551615u128 into r201;\n    add r200 r201 into r202;\n    and r202 18446744073709551615u128 into r203;\n    shr r202 64u8 into r204;\n    shr r194 64u8 into r205;\n    shr r195 64u8 into r206;\n    add r205 r206 into r207;\n    and r196 18446744073709551615u128 into r208;\n    add r207 r208 into r209;\n    add r209 r204 into r210;\n    and r210 18446744073709551615u128 into r211;\n    shr r210 64u8 into r212;\n    shr r196 64u8 into r213;\n    add r213 r212 into r214;\n    shl r214 64u8 into r215;\n    add r215 r211 into r216;\n    shl r203 64u8 into r217;\n    add r217 r197 into r218;\n    and r188.lo 18446744073709551615u128 into r219;\n    shr r188.lo 64u8 into r220;\n    mul r219 r191 into r221;\n    mul r219 r192 into r222;\n    mul r220 r191 into r223;\n    mul r220 r192 into r224;\n    and r221 18446744073709551615u128 into r225;\n    shr r221 64u8 into r226;\n    and r222 18446744073709551615u128 into r227;\n    add r226 r227 into r228;\n    and r223 18446744073709551615u128 into r229;\n    add r228 r229 into r230;\n    and r230 18446744073709551615u128 into r231;\n    shr r230 64u8 into r232;\n    shr r222 64u8 into r233;\n    shr r223 64u8 into r234;\n    add r233 r234 into r235;\n    and r224 18446744073709551615u128 into r236;\n    add r235 r236 into r237;\n    add r237 r232 into r238;\n    and r238 18446744073709551615u128 into r239;\n    shr r238 64u8 into r240;\n    shr r224 64u8 into r241;\n    add r241 r240 into r242;\n    shl r242 64u8 into r243;\n    add r243 r239 into r244;\n    shl r231 64u8 into r245;\n    add r245 r225 into r246;\n    sub 340282366920938463463374607431768211455u128 r218 into r247;\n    lte r244 r247 into r248;\n    is.eq r216 0u128 into r249;\n    and r249 r248 into r250;\n    assert.eq r250 true;\n    add r218 r244 into r251;\n    add r31.tokens_owed1 r251 into r252;\n    lte r6 r182 into r253;\n    lte r7 r252 into r254;\n    and r253 r254 into r255;\n    assert.eq r255 true;\n    sub r182 r6 into r256;\n    sub r252 r7 into r257;\n    cast r2 r3 r4 r5 r31.liquidity r100 r112 r256 r257 into r258 as Position;\n    set r258 into positions[r2];\n\nfunction burn:\n    input r0 as PositionNFT.record;\n    async burn r0.token_id into r1;\n    output r0.token_id as field.public;\n    output r1 as shield_swap.aleo/burn.future;\n\nfinalize burn:\n    input r0 as field.public;\n    contains frozen_position[r0] into r1;\n    not r1 into r2;\n    assert.eq r2 true;\n    get positions[r0] into r3;\n    is.eq r3.liquidity 0u128 into r4;\n    assert.eq r4 true;\n    is.eq r3.tokens_owed0 0u128 into r5;\n    assert.eq r5 true;\n    is.eq r3.tokens_owed1 0u128 into r6;\n    assert.eq r6 true;\n    remove positions[r0];\n\nclosure verify_blinded_address:\n    input r0 as address;\n    input r1 as address;\n    input r2 as field;\n    input r3 as address;\n    cast r0 into r4 as field;\n    cast r1 into r5 as field;\n    cast r4 11835072102227764468342786961086432175093421716844963782363567713633field r5 r2 into r6 as [field; 4u32];\n    hash.psd8.raw r6 into r7 as address;\n    assert.eq r7 r3;\n\nview view_swap_iteration_v2:\n    input r0 as SwapIterCfg.public;\n    input r1 as i32.public;\n    input r2 as U256__8JquwLopp8.public;\n    input r3 as Tick.public;\n    input r4 as SwapIterState.public;\n    lt r2.hi r0.lim.hi into r5;\n    gt r2.hi r0.lim.hi into r6;\n    lt r2.lo r0.lim.lo into r7;\n    ternary r6 false r7 into r8;\n    ternary r5 true r8 into r9;\n    ternary r9 r0.lim.hi r2.hi into r10;\n    ternary r9 r0.lim.lo r2.lo into r11;\n    cast r10 r11 into r12 as U256__8JquwLopp8;\n    lt r0.lim.hi r2.hi into r13;\n    gt r0.lim.hi r2.hi into r14;\n    lt r0.lim.lo r2.lo into r15;\n    ternary r14 false r15 into r16;\n    ternary r13 true r16 into r17;\n    ternary r17 r0.lim.hi r2.hi into r18;\n    ternary r17 r0.lim.lo r2.lo into r19;\n    cast r18 r19 into r20 as U256__8JquwLopp8;\n    ternary r0.z r12.hi r20.hi into r21;\n    ternary r0.z r12.lo r20.lo into r22;\n    cast r21 r22 into r23 as U256__8JquwLopp8;\n    gt r4.rem 0u128 into r24;\n    and r4.crossed r24 into r25;\n    is.eq r4.liq 0u128 into r26;\n    and r25 r26 into r27;\n    gt r4.liq 0u128 into r28;\n    and r24 r28 into r29;\n    and r29 r4.crossed into r30;\n    lt r4.sp.hi r23.hi into r31;\n    gt r4.sp.hi r23.hi into r32;\n    lt r4.sp.lo r23.lo into r33;\n    ternary r32 false r33 into r34;\n    ternary r31 true r34 into r35;\n    ternary r35 r4.sp.hi r23.hi into r36;\n    ternary r35 r4.sp.lo r23.lo into r37;\n    cast r36 r37 into r38 as U256__8JquwLopp8;\n    lt r4.sp.hi r23.hi into r39;\n    gt r4.sp.hi r23.hi into r40;\n    lt r4.sp.lo r23.lo into r41;\n    ternary r40 false r41 into r42;\n    ternary r39 true r42 into r43;\n    ternary r43 r23.hi r4.sp.hi into r44;\n    ternary r43 r23.lo r4.sp.lo into r45;\n    cast r44 r45 into r46 as U256__8JquwLopp8;\n    lt r46.lo r38.lo into r47;\n    ternary r47 1u128 0u128 into r48;\n    sub.w r46.lo r38.lo into r49;\n    sub.w r46.hi r38.hi into r50;\n    sub.w r50 r48 into r51;\n    cast r51 r49 into r52 as U256__8JquwLopp8;\n    shr r52.lo 64u8 into r53;\n    shr r52.hi 64u8 into r54;\n    and r4.liq 18446744073709551615u128 into r55;\n    shr r4.liq 64u8 into r56;\n    and r52.lo 18446744073709551615u128 into r57;\n    shr r52.lo 64u8 into r58;\n    mul r55 r57 into r59;\n    mul r55 r58 into r60;\n    mul r56 r57 into r61;\n    mul r56 r58 into r62;\n    and r59 18446744073709551615u128 into r63;\n    shr r59 64u8 into r64;\n    and r60 18446744073709551615u128 into r65;\n    add r64 r65 into r66;\n    and r61 18446744073709551615u128 into r67;\n    add r66 r67 into r68;\n    and r68 18446744073709551615u128 into r69;\n    shr r68 64u8 into r70;\n    shr r60 64u8 into r71;\n    shr r61 64u8 into r72;\n    add r71 r72 into r73;\n    and r62 18446744073709551615u128 into r74;\n    add r73 r74 into r75;\n    add r75 r70 into r76;\n    and r76 18446744073709551615u128 into r77;\n    shr r76 64u8 into r78;\n    shr r62 64u8 into r79;\n    add r79 r78 into r80;\n    shl r80 64u8 into r81;\n    add r81 r77 into r82;\n    shl r69 64u8 into r83;\n    add r83 r63 into r84;\n    and r52.hi 18446744073709551615u128 into r85;\n    shr r52.hi 64u8 into r86;\n    mul r55 r85 into r87;\n    mul r55 r86 into r88;\n    mul r56 r85 into r89;\n    mul r56 r86 into r90;\n    and r87 18446744073709551615u128 into r91;\n    shr r87 64u8 into r92;\n    and r88 18446744073709551615u128 into r93;\n    add r92 r93 into r94;\n    and r89 18446744073709551615u128 into r95;\n    add r94 r95 into r96;\n    and r96 18446744073709551615u128 into r97;\n    shr r96 64u8 into r98;\n    shr r88 64u8 into r99;\n    shr r89 64u8 into r100;\n    add r99 r100 into r101;\n    and r90 18446744073709551615u128 into r102;\n    add r101 r102 into r103;\n    add r103 r98 into r104;\n    and r104 18446744073709551615u128 into r105;\n    shr r104 64u8 into r106;\n    shr r90 64u8 into r107;\n    add r107 r106 into r108;\n    shl r108 64u8 into r109;\n    add r109 r105 into r110;\n    shl r97 64u8 into r111;\n    add r111 r91 into r112;\n    lt r84 0u128 into r113;\n    ternary r113 1u128 0u128 into r114;\n    lt r82 0u128 into r115;\n    ternary r115 1u128 0u128 into r116;\n    add.w r82 r112 into r117;\n    lt r117 r82 into r118;\n    ternary r118 1u128 0u128 into r119;\n    add.w r117 r114 into r120;\n    lt r120 r117 into r121;\n    ternary r121 1u128 0u128 into r122;\n    add r116 r119 into r123;\n    add r123 r122 into r124;\n    add.w r110 r124 into r125;\n    cast r125 r120 into r126 as U256__8JquwLopp8;\n    cast r84 0u128 into r127 as U256__8JquwLopp8;\n    lt r126.hi r46.hi into r128;\n    gt r126.hi r46.hi into r129;\n    lt r126.lo r46.lo into r130;\n    ternary r129 false r130 into r131;\n    ternary r128 true r131 into r132;\n    assert.eq r132 true;\n    gt r46.hi 0u128 into r133;\n    ternary r133 r46.hi r46.lo into r134;\n    ternary r133 128u32 0u32 into r135;\n    gte r134 18446744073709551616u128 into r136;\n    shr r134 64u8 into r137;\n    ternary r136 r137 r134 into r138;\n    ternary r136 64u32 0u32 into r139;\n    gte r138 4294967296u128 into r140;\n    shr r138 32u8 into r141;\n    add r139 32u32 into r142;\n    ternary r140 r141 r138 into r143;\n    ternary r140 r142 r139 into r144;\n    gte r143 65536u128 into r145;\n    shr r143 16u8 into r146;\n    add r144 16u32 into r147;\n    ternary r145 r146 r143 into r148;\n    ternary r145 r147 r144 into r149;\n    gte r148 256u128 into r150;\n    shr r148 8u8 into r151;\n    add r149 8u32 into r152;\n    ternary r150 r151 r148 into r153;\n    ternary r150 r152 r149 into r154;\n    gte r153 16u128 into r155;\n    shr r153 4u8 into r156;\n    add r154 4u32 into r157;\n    ternary r155 r156 r153 into r158;\n    ternary r155 r157 r154 into r159;\n    gte r158 4u128 into r160;\n    shr r158 2u8 into r161;\n    add r159 2u32 into r162;\n    ternary r160 r161 r158 into r163;\n    ternary r160 r162 r159 into r164;\n    gte r163 2u128 into r165;\n    add r164 1u32 into r166;\n    ternary r165 r166 r164 into r167;\n    add r135 r167 into r168;\n    sub 255u32 r168 into r169;\n    cast r169 into r170 as u16;\n    and r170 127u16 into r171;\n    cast r171 into r172 as u8;\n    is.eq r172 0u8 into r173;\n    sub 128u8 r172 into r174;\n    shr.w r46.lo r174 into r175;\n    ternary r173 0u128 r175 into r176;\n    shl.w r46.hi r172 into r177;\n    or r177 r176 into r178;\n    shl.w r46.lo r172 into r179;\n    shl.w r46.lo r172 into r180;\n    gte r170 128u16 into r181;\n    ternary r181 r180 r178 into r182;\n    ternary r181 0u128 r179 into r183;\n    cast r182 r183 into r184 as U256__8JquwLopp8;\n    and r184.lo 18446744073709551615u128 into r185;\n    shr r184.lo 64u8 into r186;\n    and r184.hi 18446744073709551615u128 into r187;\n    shr r184.hi 64u8 into r188;\n    cast r171 into r189 as u8;\n    is.eq r189 0u8 into r190;\n    sub 128u8 r189 into r191;\n    shr.w r127.lo r191 into r192;\n    ternary r190 0u128 r192 into r193;\n    shl.w r127.hi r189 into r194;\n    or r194 r193 into r195;\n    shl.w r127.lo r189 into r196;\n    shl.w r127.lo r189 into r197;\n    ternary r181 r197 r195 into r198;\n    ternary r181 0u128 r196 into r199;\n    cast r198 r199 into r200 as U256__8JquwLopp8;\n    is.eq r170 0u16 into r201;\n    sub 256u16 r170 into r202;\n    and r202 127u16 into r203;\n    cast r203 into r204 as u8;\n    is.eq r204 0u8 into r205;\n    sub 128u8 r204 into r206;\n    shl.w r127.hi r206 into r207;\n    ternary r205 0u128 r207 into r208;\n    shr r127.lo r204 into r209;\n    or r209 r208 into r210;\n    shr r127.hi r204 into r211;\n    shr r127.hi r204 into r212;\n    gte r202 128u16 into r213;\n    ternary r213 0u128 r211 into r214;\n    ternary r213 r212 r210 into r215;\n    cast r214 r215 into r216 as U256__8JquwLopp8;\n    ternary r201 0u128 r216.hi into r217;\n    ternary r201 0u128 r216.lo into r218;\n    cast r217 r218 into r219 as U256__8JquwLopp8;\n    cast r171 into r220 as u8;\n    is.eq r220 0u8 into r221;\n    sub 128u8 r220 into r222;\n    shr.w r126.lo r222 into r223;\n    ternary r221 0u128 r223 into r224;\n    shl.w r126.hi r220 into r225;\n    or r225 r224 into r226;\n    shl.w r126.lo r220 into r227;\n    shl.w r126.lo r220 into r228;\n    ternary r181 r228 r226 into r229;\n    ternary r181 0u128 r227 into r230;\n    cast r229 r230 into r231 as U256__8JquwLopp8;\n    add.w r231.lo r219.lo into r232;\n    lt r232 r231.lo into r233;\n    ternary r233 1u128 0u128 into r234;\n    add.w r231.hi r219.hi into r235;\n    add.w r235 r234 into r236;\n    cast r236 r232 into r237 as U256__8JquwLopp8;\n    and r200.lo 18446744073709551615u128 into r238;\n    shr r200.lo 64u8 into r239;\n    and r200.hi 18446744073709551615u128 into r240;\n    shr r200.hi 64u8 into r241;\n    and r237.lo 18446744073709551615u128 into r242;\n    shr r237.lo 64u8 into r243;\n    and r237.hi 18446744073709551615u128 into r244;\n    shr r237.hi 64u8 into r245;\n    shl r245 64u8 into r246;\n    add r246 r244 into r247;\n    div r247 r188 into r248;\n    gt r248 18446744073709551615u128 into r249;\n    ternary r249 18446744073709551615u128 r248 into r250;\n    mul r250 r188 into r251;\n    sub r247 r251 into r252;\n    lte r252 18446744073709551615u128 into r253;\n    mul r250 r187 into r254;\n    and r252 18446744073709551615u128 into r255;\n    shl r255 64u8 into r256;\n    add r256 r243 into r257;\n    gt r254 r257 into r258;\n    and r253 r258 into r259;\n    sub.w r250 1u128 into r260;\n    ternary r259 r260 r250 into r261;\n    add r252 r188 into r262;\n    ternary r259 r262 r252 into r263;\n    lte r263 18446744073709551615u128 into r264;\n    and r259 r264 into r265;\n    mul r261 r187 into r266;\n    and r263 18446744073709551615u128 into r267;\n    shl r267 64u8 into r268;\n    add r268 r243 into r269;\n    gt r266 r269 into r270;\n    and r265 r270 into r271;\n    sub.w r261 1u128 into r272;\n    ternary r271 r272 r261 into r273;\n    mul r273 r185 into r274;\n    and r274 18446744073709551615u128 into r275;\n    lt r241 r275 into r276;\n    add r241 18446744073709551616u128 into r277;\n    sub r277 r275 into r278;\n    and r278 18446744073709551615u128 into r279;\n    shr r274 64u8 into r280;\n    ternary r276 1u128 0u128 into r281;\n    add r280 r281 into r282;\n    mul r273 r186 into r283;\n    add r283 r282 into r284;\n    and r284 18446744073709551615u128 into r285;\n    lt r242 r285 into r286;\n    add r242 18446744073709551616u128 into r287;\n    sub r287 r285 into r288;\n    and r288 18446744073709551615u128 into r289;\n    shr r284 64u8 into r290;\n    ternary r286 1u128 0u128 into r291;\n    add r290 r291 into r292;\n    mul r273 r187 into r293;\n    add r293 r292 into r294;\n    and r294 18446744073709551615u128 into r295;\n    lt r243 r295 into r296;\n    add r243 18446744073709551616u128 into r297;\n    sub r297 r295 into r298;\n    and r298 18446744073709551615u128 into r299;\n    shr r294 64u8 into r300;\n    ternary r296 1u128 0u128 into r301;\n    add r300 r301 into r302;\n    mul r273 r188 into r303;\n    add r303 r302 into r304;\n    and r304 18446744073709551615u128 into r305;\n    lt r244 r305 into r306;\n    add r244 18446744073709551616u128 into r307;\n    sub r307 r305 into r308;\n    and r308 18446744073709551615u128 into r309;\n    shr r304 64u8 into r310;\n    ternary r306 1u128 0u128 into r311;\n    add r310 r311 into r312;\n    lt r245 r312 into r313;\n    add r245 18446744073709551616u128 into r314;\n    sub r314 r312 into r315;\n    and r315 18446744073709551615u128 into r316;\n    sub.w r273 1u128 into r317;\n    ternary r313 r317 r273 into r318;\n    add r279 r185 into r319;\n    and r319 18446744073709551615u128 into r320;\n    ternary r313 r320 r279 into r321;\n    shr r319 64u8 into r322;\n    ternary r313 r322 0u128 into r323;\n    add r289 r186 into r324;\n    add r324 r323 into r325;\n    and r325 18446744073709551615u128 into r326;\n    ternary r313 r326 r289 into r327;\n    shr r325 64u8 into r328;\n    ternary r313 r328 0u128 into r329;\n    add r299 r187 into r330;\n    add r330 r329 into r331;\n    and r331 18446744073709551615u128 into r332;\n    ternary r313 r332 r299 into r333;\n    shr r331 64u8 into r334;\n    ternary r313 r334 0u128 into r335;\n    add r309 r188 into r336;\n    add r336 r335 into r337;\n    and r337 18446744073709551615u128 into r338;\n    ternary r313 r338 r309 into r339;\n    shr r337 64u8 into r340;\n    ternary r313 r340 0u128 into r341;\n    add r316 r341 into r342;\n    shl r339 64u8 into r343;\n    add r343 r333 into r344;\n    div r344 r188 into r345;\n    gt r345 18446744073709551615u128 into r346;\n    ternary r346 18446744073709551615u128 r345 into r347;\n    mul r347 r188 into r348;\n    sub r344 r348 into r349;\n    lte r349 18446744073709551615u128 into r350;\n    mul r347 r187 into r351;\n    and r349 18446744073709551615u128 into r352;\n    shl r352 64u8 into r353;\n    add r353 r327 into r354;\n    gt r351 r354 into r355;\n    and r350 r355 into r356;\n    sub.w r347 1u128 into r357;\n    ternary r356 r357 r347 into r358;\n    add r349 r188 into r359;\n    ternary r356 r359 r349 into r360;\n    lte r360 18446744073709551615u128 into r361;\n    and r356 r361 into r362;\n    mul r358 r187 into r363;\n    and r360 18446744073709551615u128 into r364;\n    shl r364 64u8 into r365;\n    add r365 r327 into r366;\n    gt r363 r366 into r367;\n    and r362 r367 into r368;\n    sub.w r358 1u128 into r369;\n    ternary r368 r369 r358 into r370;\n    mul r370 r185 into r371;\n    and r371 18446744073709551615u128 into r372;\n    lt r240 r372 into r373;\n    add r240 18446744073709551616u128 into r374;\n    sub r374 r372 into r375;\n    and r375 18446744073709551615u128 into r376;\n    shr r371 64u8 into r377;\n    ternary r373 1u128 0u128 into r378;\n    add r377 r378 into r379;\n    mul r370 r186 into r380;\n    add r380 r379 into r381;\n    and r381 18446744073709551615u128 into r382;\n    lt r321 r382 into r383;\n    add r321 18446744073709551616u128 into r384;\n    sub r384 r382 into r385;\n    and r385 18446744073709551615u128 into r386;\n    shr r381 64u8 into r387;\n    ternary r383 1u128 0u128 into r388;\n    add r387 r388 into r389;\n    mul r370 r187 into r390;\n    add r390 r389 into r391;\n    and r391 18446744073709551615u128 into r392;\n    lt r327 r392 into r393;\n    add r327 18446744073709551616u128 into r394;\n    sub r394 r392 into r395;\n    and r395 18446744073709551615u128 into r396;\n    shr r391 64u8 into r397;\n    ternary r393 1u128 0u128 into r398;\n    add r397 r398 into r399;\n    mul r370 r188 into r400;\n    add r400 r399 into r401;\n    and r401 18446744073709551615u128 into r402;\n    lt r333 r402 into r403;\n    add r333 18446744073709551616u128 into r404;\n    sub r404 r402 into r405;\n    and r405 18446744073709551615u128 into r406;\n    shr r401 64u8 into r407;\n    ternary r403 1u128 0u128 into r408;\n    add r407 r408 into r409;\n    lt r339 r409 into r410;\n    add r339 18446744073709551616u128 into r411;\n    sub r411 r409 into r412;\n    and r412 18446744073709551615u128 into r413;\n    sub.w r370 1u128 into r414;\n    ternary r410 r414 r370 into r415;\n    add r376 r185 into r416;\n    and r416 18446744073709551615u128 into r417;\n    ternary r410 r417 r376 into r418;\n    shr r416 64u8 into r419;\n    ternary r410 r419 0u128 into r420;\n    add r386 r186 into r421;\n    add r421 r420 into r422;\n    and r422 18446744073709551615u128 into r423;\n    ternary r410 r423 r386 into r424;\n    shr r422 64u8 into r425;\n    ternary r410 r425 0u128 into r426;\n    add r396 r187 into r427;\n    add r427 r426 into r428;\n    and r428 18446744073709551615u128 into r429;\n    ternary r410 r429 r396 into r430;\n    shr r428 64u8 into r431;\n    ternary r410 r431 0u128 into r432;\n    add r406 r188 into r433;\n    add r433 r432 into r434;\n    and r434 18446744073709551615u128 into r435;\n    ternary r410 r435 r406 into r436;\n    shr r434 64u8 into r437;\n    ternary r410 r437 0u128 into r438;\n    add r413 r438 into r439;\n    shl r436 64u8 into r440;\n    add r440 r430 into r441;\n    div r441 r188 into r442;\n    gt r442 18446744073709551615u128 into r443;\n    ternary r443 18446744073709551615u128 r442 into r444;\n    mul r444 r188 into r445;\n    sub r441 r445 into r446;\n    lte r446 18446744073709551615u128 into r447;\n    mul r444 r187 into r448;\n    and r446 18446744073709551615u128 into r449;\n    shl r449 64u8 into r450;\n    add r450 r424 into r451;\n    gt r448 r451 into r452;\n    and r447 r452 into r453;\n    sub.w r444 1u128 into r454;\n    ternary r453 r454 r444 into r455;\n    add r446 r188 into r456;\n    ternary r453 r456 r446 into r457;\n    lte r457 18446744073709551615u128 into r458;\n    and r453 r458 into r459;\n    mul r455 r187 into r460;\n    and r457 18446744073709551615u128 into r461;\n    shl r461 64u8 into r462;\n    add r462 r424 into r463;\n    gt r460 r463 into r464;\n    and r459 r464 into r465;\n    sub.w r455 1u128 into r466;\n    ternary r465 r466 r455 into r467;\n    mul r467 r185 into r468;\n    and r468 18446744073709551615u128 into r469;\n    lt r239 r469 into r470;\n    add r239 18446744073709551616u128 into r471;\n    sub r471 r469 into r472;\n    and r472 18446744073709551615u128 into r473;\n    shr r468 64u8 into r474;\n    ternary r470 1u128 0u128 into r475;\n    add r474 r475 into r476;\n    mul r467 r186 into r477;\n    add r477 r476 into r478;\n    and r478 18446744073709551615u128 into r479;\n    lt r418 r479 into r480;\n    add r418 18446744073709551616u128 into r481;\n    sub r481 r479 into r482;\n    and r482 18446744073709551615u128 into r483;\n    shr r478 64u8 into r484;\n    ternary r480 1u128 0u128 into r485;\n    add r484 r485 into r486;\n    mul r467 r187 into r487;\n    add r487 r486 into r488;\n    and r488 18446744073709551615u128 into r489;\n    lt r424 r489 into r490;\n    add r424 18446744073709551616u128 into r491;\n    sub r491 r489 into r492;\n    and r492 18446744073709551615u128 into r493;\n    shr r488 64u8 into r494;\n    ternary r490 1u128 0u128 into r495;\n    add r494 r495 into r496;\n    mul r467 r188 into r497;\n    add r497 r496 into r498;\n    and r498 18446744073709551615u128 into r499;\n    lt r430 r499 into r500;\n    add r430 18446744073709551616u128 into r501;\n    sub r501 r499 into r502;\n    and r502 18446744073709551615u128 into r503;\n    shr r498 64u8 into r504;\n    ternary r500 1u128 0u128 into r505;\n    add r504 r505 into r506;\n    lt r436 r506 into r507;\n    add r436 18446744073709551616u128 into r508;\n    sub r508 r506 into r509;\n    and r509 18446744073709551615u128 into r510;\n    sub.w r467 1u128 into r511;\n    ternary r507 r511 r467 into r512;\n    add r473 r185 into r513;\n    and r513 18446744073709551615u128 into r514;\n    ternary r507 r514 r473 into r515;\n    shr r513 64u8 into r516;\n    ternary r507 r516 0u128 into r517;\n    add r483 r186 into r518;\n    add r518 r517 into r519;\n    and r519 18446744073709551615u128 into r520;\n    ternary r507 r520 r483 into r521;\n    shr r519 64u8 into r522;\n    ternary r507 r522 0u128 into r523;\n    add r493 r187 into r524;\n    add r524 r523 into r525;\n    and r525 18446744073709551615u128 into r526;\n    ternary r507 r526 r493 into r527;\n    shr r525 64u8 into r528;\n    ternary r507 r528 0u128 into r529;\n    add r503 r188 into r530;\n    add r530 r529 into r531;\n    and r531 18446744073709551615u128 into r532;\n    ternary r507 r532 r503 into r533;\n    shr r531 64u8 into r534;\n    ternary r507 r534 0u128 into r535;\n    add r510 r535 into r536;\n    shl r533 64u8 into r537;\n    add r537 r527 into r538;\n    div r538 r188 into r539;\n    gt r539 18446744073709551615u128 into r540;\n    ternary r540 18446744073709551615u128 r539 into r541;\n    mul r541 r188 into r542;\n    sub r538 r542 into r543;\n    lte r543 18446744073709551615u128 into r544;\n    mul r541 r187 into r545;\n    and r543 18446744073709551615u128 into r546;\n    shl r546 64u8 into r547;\n    add r547 r521 into r548;\n    gt r545 r548 into r549;\n    and r544 r549 into r550;\n    sub.w r541 1u128 into r551;\n    ternary r550 r551 r541 into r552;\n    add r543 r188 into r553;\n    ternary r550 r553 r543 into r554;\n    lte r554 18446744073709551615u128 into r555;\n    and r550 r555 into r556;\n    mul r552 r187 into r557;\n    and r554 18446744073709551615u128 into r558;\n    shl r558 64u8 into r559;\n    add r559 r521 into r560;\n    gt r557 r560 into r561;\n    and r556 r561 into r562;\n    sub.w r552 1u128 into r563;\n    ternary r562 r563 r552 into r564;\n    mul r564 r185 into r565;\n    and r565 18446744073709551615u128 into r566;\n    lt r238 r566 into r567;\n    add r238 18446744073709551616u128 into r568;\n    sub r568 r566 into r569;\n    and r569 18446744073709551615u128 into r570;\n    shr r565 64u8 into r571;\n    ternary r567 1u128 0u128 into r572;\n    add r571 r572 into r573;\n    mul r564 r186 into r574;\n    add r574 r573 into r575;\n    and r575 18446744073709551615u128 into r576;\n    lt r515 r576 into r577;\n    add r515 18446744073709551616u128 into r578;\n    sub r578 r576 into r579;\n    and r579 18446744073709551615u128 into r580;\n    shr r575 64u8 into r581;\n    ternary r577 1u128 0u128 into r582;\n    add r581 r582 into r583;\n    mul r564 r187 into r584;\n    add r584 r583 into r585;\n    and r585 18446744073709551615u128 into r586;\n    lt r521 r586 into r587;\n    add r521 18446744073709551616u128 into r588;\n    sub r588 r586 into r589;\n    and r589 18446744073709551615u128 into r590;\n    shr r585 64u8 into r591;\n    ternary r587 1u128 0u128 into r592;\n    add r591 r592 into r593;\n    mul r564 r188 into r594;\n    add r594 r593 into r595;\n    and r595 18446744073709551615u128 into r596;\n    lt r527 r596 into r597;\n    add r527 18446744073709551616u128 into r598;\n    sub r598 r596 into r599;\n    and r599 18446744073709551615u128 into r600;\n    shr r595 64u8 into r601;\n    ternary r597 1u128 0u128 into r602;\n    add r601 r602 into r603;\n    lt r533 r603 into r604;\n    add r533 18446744073709551616u128 into r605;\n    sub r605 r603 into r606;\n    and r606 18446744073709551615u128 into r607;\n    sub.w r564 1u128 into r608;\n    ternary r604 r608 r564 into r609;\n    add r570 r185 into r610;\n    and r610 18446744073709551615u128 into r611;\n    ternary r604 r611 r570 into r612;\n    shr r610 64u8 into r613;\n    ternary r604 r613 0u128 into r614;\n    add r580 r186 into r615;\n    add r615 r614 into r616;\n    and r616 18446744073709551615u128 into r617;\n    ternary r604 r617 r580 into r618;\n    shr r616 64u8 into r619;\n    ternary r604 r619 0u128 into r620;\n    add r590 r187 into r621;\n    add r621 r620 into r622;\n    and r622 18446744073709551615u128 into r623;\n    ternary r604 r623 r590 into r624;\n    shr r622 64u8 into r625;\n    ternary r604 r625 0u128 into r626;\n    add r600 r188 into r627;\n    add r627 r626 into r628;\n    and r628 18446744073709551615u128 into r629;\n    ternary r604 r629 r600 into r630;\n    shr r628 64u8 into r631;\n    ternary r604 r631 0u128 into r632;\n    add r607 r632 into r633;\n    shl r318 64u8 into r634;\n    add r634 r415 into r635;\n    shl r512 64u8 into r636;\n    add r636 r609 into r637;\n    cast r635 r637 into r638 as U256__8JquwLopp8;\n    shl r630 64u8 into r639;\n    add r639 r624 into r640;\n    shl r618 64u8 into r641;\n    add r641 r612 into r642;\n    cast r171 into r643 as u8;\n    is.eq r643 0u8 into r644;\n    sub 128u8 r643 into r645;\n    shl.w r640 r645 into r646;\n    ternary r644 0u128 r646 into r647;\n    shr r642 r643 into r648;\n    or r648 r647 into r649;\n    shr r640 r643 into r650;\n    ternary r181 0u128 r650 into r651;\n    ternary r181 r650 r649 into r652;\n    cast r651 r652 into r653 as U256__8JquwLopp8;\n    is.eq r653.hi 0u128 into r654;\n    is.eq r653.lo 0u128 into r655;\n    and r654 r655 into r656;\n    not r656 into r657;\n    and r0.z r657 into r658;\n    is.eq r638.hi 340282366920938463463374607431768211455u128 into r659;\n    is.eq r638.lo 340282366920938463463374607431768211455u128 into r660;\n    and r659 r660 into r661;\n    and r658 r661 into r662;\n    not r662 into r663;\n    assert.eq r663 true;\n    add.w r638.lo 1u128 into r664;\n    lt r664 r638.lo into r665;\n    ternary r665 1u128 0u128 into r666;\n    add.w r638.hi r666 into r667;\n    cast r667 r664 into r668 as U256__8JquwLopp8;\n    ternary r658 r668.hi r638.hi into r669;\n    ternary r658 r668.lo r638.lo into r670;\n    cast r669 r670 into r671 as U256__8JquwLopp8;\n    and r671.lo 18446744073709551615u128 into r672;\n    shr r671.lo 64u8 into r673;\n    and r672 18446744073709551615u128 into r674;\n    shr r672 64u8 into r675;\n    and r673 18446744073709551615u128 into r676;\n    add r675 r676 into r677;\n    and r677 18446744073709551615u128 into r678;\n    shr r677 64u8 into r679;\n    shr r673 64u8 into r680;\n    add r680 r679 into r681;\n    and r681 18446744073709551615u128 into r682;\n    shr r681 64u8 into r683;\n    shl r683 64u8 into r684;\n    add r684 r682 into r685;\n    shl r678 64u8 into r686;\n    add r686 r674 into r687;\n    shr r671.lo 64u8 into r688;\n    and r671.hi 18446744073709551615u128 into r689;\n    shr r671.hi 64u8 into r690;\n    and r689 18446744073709551615u128 into r691;\n    shr r689 64u8 into r692;\n    and r690 18446744073709551615u128 into r693;\n    add r692 r693 into r694;\n    and r694 18446744073709551615u128 into r695;\n    shr r694 64u8 into r696;\n    shr r690 64u8 into r697;\n    add r697 r696 into r698;\n    and r698 18446744073709551615u128 into r699;\n    shr r698 64u8 into r700;\n    shl r700 64u8 into r701;\n    add r701 r699 into r702;\n    shl r695 64u8 into r703;\n    add r703 r691 into r704;\n    shr r671.hi 64u8 into r705;\n    lt r685 r685 into r706;\n    ternary r706 1u128 0u128 into r707;\n    add.w r685 r704 into r708;\n    lt r708 r685 into r709;\n    ternary r709 1u128 0u128 into r710;\n    add r707 r710 into r711;\n    lt r702 0u128 into r712;\n    ternary r712 1u128 0u128 into r713;\n    lt r702 r702 into r714;\n    ternary r714 1u128 0u128 into r715;\n    add.w r702 r711 into r716;\n    lt r716 r702 into r717;\n    ternary r717 1u128 0u128 into r718;\n    add r713 r715 into r719;\n    add r719 r718 into r720;\n    cast r720 r716 into r721 as U256__8JquwLopp8;\n    cast r708 r687 into r722 as U256__8JquwLopp8;\n    lt r721.hi r38.hi into r723;\n    gt r721.hi r38.hi into r724;\n    lt r721.lo r38.lo into r725;\n    ternary r724 false r725 into r726;\n    ternary r723 true r726 into r727;\n    assert.eq r727 true;\n    gt r38.hi 0u128 into r728;\n    ternary r728 r38.hi r38.lo into r729;\n    ternary r728 128u32 0u32 into r730;\n    gte r729 18446744073709551616u128 into r731;\n    shr r729 64u8 into r732;\n    ternary r731 r732 r729 into r733;\n    ternary r731 64u32 0u32 into r734;\n    gte r733 4294967296u128 into r735;\n    shr r733 32u8 into r736;\n    add r734 32u32 into r737;\n    ternary r735 r736 r733 into r738;\n    ternary r735 r737 r734 into r739;\n    gte r738 65536u128 into r740;\n    shr r738 16u8 into r741;\n    add r739 16u32 into r742;\n    ternary r740 r741 r738 into r743;\n    ternary r740 r742 r739 into r744;\n    gte r743 256u128 into r745;\n    shr r743 8u8 into r746;\n    add r744 8u32 into r747;\n    ternary r745 r746 r743 into r748;\n    ternary r745 r747 r744 into r749;\n    gte r748 16u128 into r750;\n    shr r748 4u8 into r751;\n    add r749 4u32 into r752;\n    ternary r750 r751 r748 into r753;\n    ternary r750 r752 r749 into r754;\n    gte r753 4u128 into r755;\n    shr r753 2u8 into r756;\n    add r754 2u32 into r757;\n    ternary r755 r756 r753 into r758;\n    ternary r755 r757 r754 into r759;\n    gte r758 2u128 into r760;\n    add r759 1u32 into r761;\n    ternary r760 r761 r759 into r762;\n    add r730 r762 into r763;\n    sub 255u32 r763 into r764;\n    cast r764 into r765 as u16;\n    and r765 127u16 into r766;\n    cast r766 into r767 as u8;\n    is.eq r767 0u8 into r768;\n    sub 128u8 r767 into r769;\n    shr.w r38.lo r769 into r770;\n    ternary r768 0u128 r770 into r771;\n    shl.w r38.hi r767 into r772;\n    or r772 r771 into r773;\n    shl.w r38.lo r767 into r774;\n    shl.w r38.lo r767 into r775;\n    gte r765 128u16 into r776;\n    ternary r776 r775 r773 into r777;\n    ternary r776 0u128 r774 into r778;\n    cast r777 r778 into r779 as U256__8JquwLopp8;\n    and r779.lo 18446744073709551615u128 into r780;\n    shr r779.lo 64u8 into r781;\n    and r779.hi 18446744073709551615u128 into r782;\n    shr r779.hi 64u8 into r783;\n    cast r766 into r784 as u8;\n    is.eq r784 0u8 into r785;\n    sub 128u8 r784 into r786;\n    shr.w r722.lo r786 into r787;\n    ternary r785 0u128 r787 into r788;\n    shl.w r722.hi r784 into r789;\n    or r789 r788 into r790;\n    shl.w r722.lo r784 into r791;\n    shl.w r722.lo r784 into r792;\n    ternary r776 r792 r790 into r793;\n    ternary r776 0u128 r791 into r794;\n    cast r793 r794 into r795 as U256__8JquwLopp8;\n    is.eq r765 0u16 into r796;\n    sub 256u16 r765 into r797;\n    and r797 127u16 into r798;\n    cast r798 into r799 as u8;\n    is.eq r799 0u8 into r800;\n    sub 128u8 r799 into r801;\n    shl.w r722.hi r801 into r802;\n    ternary r800 0u128 r802 into r803;\n    shr r722.lo r799 into r804;\n    or r804 r803 into r805;\n    shr r722.hi r799 into r806;\n    shr r722.hi r799 into r807;\n    gte r797 128u16 into r808;\n    ternary r808 0u128 r806 into r809;\n    ternary r808 r807 r805 into r810;\n    cast r809 r810 into r811 as U256__8JquwLopp8;\n    ternary r796 0u128 r811.hi into r812;\n    ternary r796 0u128 r811.lo into r813;\n    cast r812 r813 into r814 as U256__8JquwLopp8;\n    cast r766 into r815 as u8;\n    is.eq r815 0u8 into r816;\n    sub 128u8 r815 into r817;\n    shr.w r721.lo r817 into r818;\n    ternary r816 0u128 r818 into r819;\n    shl.w r721.hi r815 into r820;\n    or r820 r819 into r821;\n    shl.w r721.lo r815 into r822;\n    shl.w r721.lo r815 into r823;\n    ternary r776 r823 r821 into r824;\n    ternary r776 0u128 r822 into r825;\n    cast r824 r825 into r826 as U256__8JquwLopp8;\n    add.w r826.lo r814.lo into r827;\n    lt r827 r826.lo into r828;\n    ternary r828 1u128 0u128 into r829;\n    add.w r826.hi r814.hi into r830;\n    add.w r830 r829 into r831;\n    cast r831 r827 into r832 as U256__8JquwLopp8;\n    and r795.lo 18446744073709551615u128 into r833;\n    shr r795.lo 64u8 into r834;\n    and r795.hi 18446744073709551615u128 into r835;\n    shr r795.hi 64u8 into r836;\n    and r832.lo 18446744073709551615u128 into r837;\n    shr r832.lo 64u8 into r838;\n    and r832.hi 18446744073709551615u128 into r839;\n    shr r832.hi 64u8 into r840;\n    shl r840 64u8 into r841;\n    add r841 r839 into r842;\n    div r842 r783 into r843;\n    gt r843 18446744073709551615u128 into r844;\n    ternary r844 18446744073709551615u128 r843 into r845;\n    mul r845 r783 into r846;\n    sub r842 r846 into r847;\n    lte r847 18446744073709551615u128 into r848;\n    mul r845 r782 into r849;\n    and r847 18446744073709551615u128 into r850;\n    shl r850 64u8 into r851;\n    add r851 r838 into r852;\n    gt r849 r852 into r853;\n    and r848 r853 into r854;\n    sub.w r845 1u128 into r855;\n    ternary r854 r855 r845 into r856;\n    add r847 r783 into r857;\n    ternary r854 r857 r847 into r858;\n    lte r858 18446744073709551615u128 into r859;\n    and r854 r859 into r860;\n    mul r856 r782 into r861;\n    and r858 18446744073709551615u128 into r862;\n    shl r862 64u8 into r863;\n    add r863 r838 into r864;\n    gt r861 r864 into r865;\n    and r860 r865 into r866;\n    sub.w r856 1u128 into r867;\n    ternary r866 r867 r856 into r868;\n    mul r868 r780 into r869;\n    and r869 18446744073709551615u128 into r870;\n    lt r836 r870 into r871;\n    add r836 18446744073709551616u128 into r872;\n    sub r872 r870 into r873;\n    and r873 18446744073709551615u128 into r874;\n    shr r869 64u8 into r875;\n    ternary r871 1u128 0u128 into r876;\n    add r875 r876 into r877;\n    mul r868 r781 into r878;\n    add r878 r877 into r879;\n    and r879 18446744073709551615u128 into r880;\n    lt r837 r880 into r881;\n    add r837 18446744073709551616u128 into r882;\n    sub r882 r880 into r883;\n    and r883 18446744073709551615u128 into r884;\n    shr r879 64u8 into r885;\n    ternary r881 1u128 0u128 into r886;\n    add r885 r886 into r887;\n    mul r868 r782 into r888;\n    add r888 r887 into r889;\n    and r889 18446744073709551615u128 into r890;\n    lt r838 r890 into r891;\n    add r838 18446744073709551616u128 into r892;\n    sub r892 r890 into r893;\n    and r893 18446744073709551615u128 into r894;\n    shr r889 64u8 into r895;\n    ternary r891 1u128 0u128 into r896;\n    add r895 r896 into r897;\n    mul r868 r783 into r898;\n    add r898 r897 into r899;\n    and r899 18446744073709551615u128 into r900;\n    lt r839 r900 into r901;\n    add r839 18446744073709551616u128 into r902;\n    sub r902 r900 into r903;\n    and r903 18446744073709551615u128 into r904;\n    shr r899 64u8 into r905;\n    ternary r901 1u128 0u128 into r906;\n    add r905 r906 into r907;\n    lt r840 r907 into r908;\n    add r840 18446744073709551616u128 into r909;\n    sub r909 r907 into r910;\n    and r910 18446744073709551615u128 into r911;\n    sub.w r868 1u128 into r912;\n    ternary r908 r912 r868 into r913;\n    add r874 r780 into r914;\n    and r914 18446744073709551615u128 into r915;\n    ternary r908 r915 r874 into r916;\n    shr r914 64u8 into r917;\n    ternary r908 r917 0u128 into r918;\n    add r884 r781 into r919;\n    add r919 r918 into r920;\n    and r920 18446744073709551615u128 into r921;\n    ternary r908 r921 r884 into r922;\n    shr r920 64u8 into r923;\n    ternary r908 r923 0u128 into r924;\n    add r894 r782 into r925;\n    add r925 r924 into r926;\n    and r926 18446744073709551615u128 into r927;\n    ternary r908 r927 r894 into r928;\n    shr r926 64u8 into r929;\n    ternary r908 r929 0u128 into r930;\n    add r904 r783 into r931;\n    add r931 r930 into r932;\n    and r932 18446744073709551615u128 into r933;\n    ternary r908 r933 r904 into r934;\n    shr r932 64u8 into r935;\n    ternary r908 r935 0u128 into r936;\n    add r911 r936 into r937;\n    shl r934 64u8 into r938;\n    add r938 r928 into r939;\n    div r939 r783 into r940;\n    gt r940 18446744073709551615u128 into r941;\n    ternary r941 18446744073709551615u128 r940 into r942;\n    mul r942 r783 into r943;\n    sub r939 r943 into r944;\n    lte r944 18446744073709551615u128 into r945;\n    mul r942 r782 into r946;\n    and r944 18446744073709551615u128 into r947;\n    shl r947 64u8 into r948;\n    add r948 r922 into r949;\n    gt r946 r949 into r950;\n    and r945 r950 into r951;\n    sub.w r942 1u128 into r952;\n    ternary r951 r952 r942 into r953;\n    add r944 r783 into r954;\n    ternary r951 r954 r944 into r955;\n    lte r955 18446744073709551615u128 into r956;\n    and r951 r956 into r957;\n    mul r953 r782 into r958;\n    and r955 18446744073709551615u128 into r959;\n    shl r959 64u8 into r960;\n    add r960 r922 into r961;\n    gt r958 r961 into r962;\n    and r957 r962 into r963;\n    sub.w r953 1u128 into r964;\n    ternary r963 r964 r953 into r965;\n    mul r965 r780 into r966;\n    and r966 18446744073709551615u128 into r967;\n    lt r835 r967 into r968;\n    add r835 18446744073709551616u128 into r969;\n    sub r969 r967 into r970;\n    and r970 18446744073709551615u128 into r971;\n    shr r966 64u8 into r972;\n    ternary r968 1u128 0u128 into r973;\n    add r972 r973 into r974;\n    mul r965 r781 into r975;\n    add r975 r974 into r976;\n    and r976 18446744073709551615u128 into r977;\n    lt r916 r977 into r978;\n    add r916 18446744073709551616u128 into r979;\n    sub r979 r977 into r980;\n    and r980 18446744073709551615u128 into r981;\n    shr r976 64u8 into r982;\n    ternary r978 1u128 0u128 into r983;\n    add r982 r983 into r984;\n    mul r965 r782 into r985;\n    add r985 r984 into r986;\n    and r986 18446744073709551615u128 into r987;\n    lt r922 r987 into r988;\n    add r922 18446744073709551616u128 into r989;\n    sub r989 r987 into r990;\n    and r990 18446744073709551615u128 into r991;\n    shr r986 64u8 into r992;\n    ternary r988 1u128 0u128 into r993;\n    add r992 r993 into r994;\n    mul r965 r783 into r995;\n    add r995 r994 into r996;\n    and r996 18446744073709551615u128 into r997;\n    lt r928 r997 into r998;\n    add r928 18446744073709551616u128 into r999;\n    sub r999 r997 into r1000;\n    and r1000 18446744073709551615u128 into r1001;\n    shr r996 64u8 into r1002;\n    ternary r998 1u128 0u128 into r1003;\n    add r1002 r1003 into r1004;\n    lt r934 r1004 into r1005;\n    add r934 18446744073709551616u128 into r1006;\n    sub r1006 r1004 into r1007;\n    and r1007 18446744073709551615u128 into r1008;\n    sub.w r965 1u128 into r1009;\n    ternary r1005 r1009 r965 into r1010;\n    add r971 r780 into r1011;\n    and r1011 18446744073709551615u128 into r1012;\n    ternary r1005 r1012 r971 into r1013;\n    shr r1011 64u8 into r1014;\n    ternary r1005 r1014 0u128 into r1015;\n    add r981 r781 into r1016;\n    add r1016 r1015 into r1017;\n    and r1017 18446744073709551615u128 into r1018;\n    ternary r1005 r1018 r981 into r1019;\n    shr r1017 64u8 into r1020;\n    ternary r1005 r1020 0u128 into r1021;\n    add r991 r782 into r1022;\n    add r1022 r1021 into r1023;\n    and r1023 18446744073709551615u128 into r1024;\n    ternary r1005 r1024 r991 into r1025;\n    shr r1023 64u8 into r1026;\n    ternary r1005 r1026 0u128 into r1027;\n    add r1001 r783 into r1028;\n    add r1028 r1027 into r1029;\n    and r1029 18446744073709551615u128 into r1030;\n    ternary r1005 r1030 r1001 into r1031;\n    shr r1029 64u8 into r1032;\n    ternary r1005 r1032 0u128 into r1033;\n    add r1008 r1033 into r1034;\n    shl r1031 64u8 into r1035;\n    add r1035 r1025 into r1036;\n    div r1036 r783 into r1037;\n    gt r1037 18446744073709551615u128 into r1038;\n    ternary r1038 18446744073709551615u128 r1037 into r1039;\n    mul r1039 r783 into r1040;\n    sub r1036 r1040 into r1041;\n    lte r1041 18446744073709551615u128 into r1042;\n    mul r1039 r782 into r1043;\n    and r1041 18446744073709551615u128 into r1044;\n    shl r1044 64u8 into r1045;\n    add r1045 r1019 into r1046;\n    gt r1043 r1046 into r1047;\n    and r1042 r1047 into r1048;\n    sub.w r1039 1u128 into r1049;\n    ternary r1048 r1049 r1039 into r1050;\n    add r1041 r783 into r1051;\n    ternary r1048 r1051 r1041 into r1052;\n    lte r1052 18446744073709551615u128 into r1053;\n    and r1048 r1053 into r1054;\n    mul r1050 r782 into r1055;\n    and r1052 18446744073709551615u128 into r1056;\n    shl r1056 64u8 into r1057;\n    add r1057 r1019 into r1058;\n    gt r1055 r1058 into r1059;\n    and r1054 r1059 into r1060;\n    sub.w r1050 1u128 into r1061;\n    ternary r1060 r1061 r1050 into r1062;\n    mul r1062 r780 into r1063;\n    and r1063 18446744073709551615u128 into r1064;\n    lt r834 r1064 into r1065;\n    add r834 18446744073709551616u128 into r1066;\n    sub r1066 r1064 into r1067;\n    and r1067 18446744073709551615u128 into r1068;\n    shr r1063 64u8 into r1069;\n    ternary r1065 1u128 0u128 into r1070;\n    add r1069 r1070 into r1071;\n    mul r1062 r781 into r1072;\n    add r1072 r1071 into r1073;\n    and r1073 18446744073709551615u128 into r1074;\n    lt r1013 r1074 into r1075;\n    add r1013 18446744073709551616u128 into r1076;\n    sub r1076 r1074 into r1077;\n    and r1077 18446744073709551615u128 into r1078;\n    shr r1073 64u8 into r1079;\n    ternary r1075 1u128 0u128 into r1080;\n    add r1079 r1080 into r1081;\n    mul r1062 r782 into r1082;\n    add r1082 r1081 into r1083;\n    and r1083 18446744073709551615u128 into r1084;\n    lt r1019 r1084 into r1085;\n    add r1019 18446744073709551616u128 into r1086;\n    sub r1086 r1084 into r1087;\n    and r1087 18446744073709551615u128 into r1088;\n    shr r1083 64u8 into r1089;\n    ternary r1085 1u128 0u128 into r1090;\n    add r1089 r1090 into r1091;\n    mul r1062 r783 into r1092;\n    add r1092 r1091 into r1093;\n    and r1093 18446744073709551615u128 into r1094;\n    lt r1025 r1094 into r1095;\n    add r1025 18446744073709551616u128 into r1096;\n    sub r1096 r1094 into r1097;\n    and r1097 18446744073709551615u128 into r1098;\n    shr r1093 64u8 into r1099;\n    ternary r1095 1u128 0u128 into r1100;\n    add r1099 r1100 into r1101;\n    lt r1031 r1101 into r1102;\n    add r1031 18446744073709551616u128 into r1103;\n    sub r1103 r1101 into r1104;\n    and r1104 18446744073709551615u128 into r1105;\n    sub.w r1062 1u128 into r1106;\n    ternary r1102 r1106 r1062 into r1107;\n    add r1068 r780 into r1108;\n    and r1108 18446744073709551615u128 into r1109;\n    ternary r1102 r1109 r1068 into r1110;\n    shr r1108 64u8 into r1111;\n    ternary r1102 r1111 0u128 into r1112;\n    add r1078 r781 into r1113;\n    add r1113 r1112 into r1114;\n    and r1114 18446744073709551615u128 into r1115;\n    ternary r1102 r1115 r1078 into r1116;\n    shr r1114 64u8 into r1117;\n    ternary r1102 r1117 0u128 into r1118;\n    add r1088 r782 into r1119;\n    add r1119 r1118 into r1120;\n    and r1120 18446744073709551615u128 into r1121;\n    ternary r1102 r1121 r1088 into r1122;\n    shr r1120 64u8 into r1123;\n    ternary r1102 r1123 0u128 into r1124;\n    add r1098 r783 into r1125;\n    add r1125 r1124 into r1126;\n    and r1126 18446744073709551615u128 into r1127;\n    ternary r1102 r1127 r1098 into r1128;\n    shr r1126 64u8 into r1129;\n    ternary r1102 r1129 0u128 into r1130;\n    add r1105 r1130 into r1131;\n    shl r1128 64u8 into r1132;\n    add r1132 r1122 into r1133;\n    div r1133 r783 into r1134;\n    gt r1134 18446744073709551615u128 into r1135;\n    ternary r1135 18446744073709551615u128 r1134 into r1136;\n    mul r1136 r783 into r1137;\n    sub r1133 r1137 into r1138;\n    lte r1138 18446744073709551615u128 into r1139;\n    mul r1136 r782 into r1140;\n    and r1138 18446744073709551615u128 into r1141;\n    shl r1141 64u8 into r1142;\n    add r1142 r1116 into r1143;\n    gt r1140 r1143 into r1144;\n    and r1139 r1144 into r1145;\n    sub.w r1136 1u128 into r1146;\n    ternary r1145 r1146 r1136 into r1147;\n    add r1138 r783 into r1148;\n    ternary r1145 r1148 r1138 into r1149;\n    lte r1149 18446744073709551615u128 into r1150;\n    and r1145 r1150 into r1151;\n    mul r1147 r782 into r1152;\n    and r1149 18446744073709551615u128 into r1153;\n    shl r1153 64u8 into r1154;\n    add r1154 r1116 into r1155;\n    gt r1152 r1155 into r1156;\n    and r1151 r1156 into r1157;\n    sub.w r1147 1u128 into r1158;\n    ternary r1157 r1158 r1147 into r1159;\n    mul r1159 r780 into r1160;\n    and r1160 18446744073709551615u128 into r1161;\n    lt r833 r1161 into r1162;\n    add r833 18446744073709551616u128 into r1163;\n    sub r1163 r1161 into r1164;\n    and r1164 18446744073709551615u128 into r1165;\n    shr r1160 64u8 into r1166;\n    ternary r1162 1u128 0u128 into r1167;\n    add r1166 r1167 into r1168;\n    mul r1159 r781 into r1169;\n    add r1169 r1168 into r1170;\n    and r1170 18446744073709551615u128 into r1171;\n    lt r1110 r1171 into r1172;\n    add r1110 18446744073709551616u128 into r1173;\n    sub r1173 r1171 into r1174;\n    and r1174 18446744073709551615u128 into r1175;\n    shr r1170 64u8 into r1176;\n    ternary r1172 1u128 0u128 into r1177;\n    add r1176 r1177 into r1178;\n    mul r1159 r782 into r1179;\n    add r1179 r1178 into r1180;\n    and r1180 18446744073709551615u128 into r1181;\n    lt r1116 r1181 into r1182;\n    add r1116 18446744073709551616u128 into r1183;\n    sub r1183 r1181 into r1184;\n    and r1184 18446744073709551615u128 into r1185;\n    shr r1180 64u8 into r1186;\n    ternary r1182 1u128 0u128 into r1187;\n    add r1186 r1187 into r1188;\n    mul r1159 r783 into r1189;\n    add r1189 r1188 into r1190;\n    and r1190 18446744073709551615u128 into r1191;\n    lt r1122 r1191 into r1192;\n    add r1122 18446744073709551616u128 into r1193;\n    sub r1193 r1191 into r1194;\n    and r1194 18446744073709551615u128 into r1195;\n    shr r1190 64u8 into r1196;\n    ternary r1192 1u128 0u128 into r1197;\n    add r1196 r1197 into r1198;\n    lt r1128 r1198 into r1199;\n    add r1128 18446744073709551616u128 into r1200;\n    sub r1200 r1198 into r1201;\n    and r1201 18446744073709551615u128 into r1202;\n    sub.w r1159 1u128 into r1203;\n    ternary r1199 r1203 r1159 into r1204;\n    add r1165 r780 into r1205;\n    and r1205 18446744073709551615u128 into r1206;\n    ternary r1199 r1206 r1165 into r1207;\n    shr r1205 64u8 into r1208;\n    ternary r1199 r1208 0u128 into r1209;\n    add r1175 r781 into r1210;\n    add r1210 r1209 into r1211;\n    and r1211 18446744073709551615u128 into r1212;\n    ternary r1199 r1212 r1175 into r1213;\n    shr r1211 64u8 into r1214;\n    ternary r1199 r1214 0u128 into r1215;\n    add r1185 r782 into r1216;\n    add r1216 r1215 into r1217;\n    and r1217 18446744073709551615u128 into r1218;\n    ternary r1199 r1218 r1185 into r1219;\n    shr r1217 64u8 into r1220;\n    ternary r1199 r1220 0u128 into r1221;\n    add r1195 r783 into r1222;\n    add r1222 r1221 into r1223;\n    and r1223 18446744073709551615u128 into r1224;\n    ternary r1199 r1224 r1195 into r1225;\n    shr r1223 64u8 into r1226;\n    ternary r1199 r1226 0u128 into r1227;\n    add r1202 r1227 into r1228;\n    shl r913 64u8 into r1229;\n    add r1229 r1010 into r1230;\n    shl r1107 64u8 into r1231;\n    add r1231 r1204 into r1232;\n    cast r1230 r1232 into r1233 as U256__8JquwLopp8;\n    shl r1225 64u8 into r1234;\n    add r1234 r1219 into r1235;\n    shl r1213 64u8 into r1236;\n    add r1236 r1207 into r1237;\n    cast r766 into r1238 as u8;\n    is.eq r1238 0u8 into r1239;\n    sub 128u8 r1238 into r1240;\n    shl.w r1235 r1240 into r1241;\n    ternary r1239 0u128 r1241 into r1242;\n    shr r1237 r1238 into r1243;\n    or r1243 r1242 into r1244;\n    shr r1235 r1238 into r1245;\n    ternary r776 0u128 r1245 into r1246;\n    ternary r776 r1245 r1244 into r1247;\n    cast r1246 r1247 into r1248 as U256__8JquwLopp8;\n    is.eq r1248.hi 0u128 into r1249;\n    is.eq r1248.lo 0u128 into r1250;\n    and r1249 r1250 into r1251;\n    not r1251 into r1252;\n    and r0.z r1252 into r1253;\n    is.eq r1233.hi 340282366920938463463374607431768211455u128 into r1254;\n    is.eq r1233.lo 340282366920938463463374607431768211455u128 into r1255;\n    and r1254 r1255 into r1256;\n    and r1253 r1256 into r1257;\n    not r1257 into r1258;\n    assert.eq r1258 true;\n    add.w r1233.lo 1u128 into r1259;\n    lt r1259 r1233.lo into r1260;\n    ternary r1260 1u128 0u128 into r1261;\n    add.w r1233.hi r1261 into r1262;\n    cast r1262 r1259 into r1263 as U256__8JquwLopp8;\n    ternary r1253 r1263.hi r1233.hi into r1264;\n    ternary r1253 r1263.lo r1233.lo into r1265;\n    cast r1264 r1265 into r1266 as U256__8JquwLopp8;\n    is.neq r1266.hi 0u128 into r1267;\n    not r0.z into r1268;\n    lt r4.sp.hi r23.hi into r1269;\n    gt r4.sp.hi r23.hi into r1270;\n    lt r4.sp.lo r23.lo into r1271;\n    ternary r1270 false r1271 into r1272;\n    ternary r1269 true r1272 into r1273;\n    ternary r1273 r4.sp.hi r23.hi into r1274;\n    ternary r1273 r4.sp.lo r23.lo into r1275;\n    cast r1274 r1275 into r1276 as U256__8JquwLopp8;\n    lt r4.sp.hi r23.hi into r1277;\n    gt r4.sp.hi r23.hi into r1278;\n    lt r4.sp.lo r23.lo into r1279;\n    ternary r1278 false r1279 into r1280;\n    ternary r1277 true r1280 into r1281;\n    ternary r1281 r23.hi r4.sp.hi into r1282;\n    ternary r1281 r23.lo r4.sp.lo into r1283;\n    cast r1282 r1283 into r1284 as U256__8JquwLopp8;\n    lt r1284.lo r1276.lo into r1285;\n    ternary r1285 1u128 0u128 into r1286;\n    sub.w r1284.lo r1276.lo into r1287;\n    sub.w r1284.hi r1276.hi into r1288;\n    sub.w r1288 r1286 into r1289;\n    cast r1289 r1287 into r1290 as U256__8JquwLopp8;\n    cast 0u128 r4.liq into r1291 as U256__8JquwLopp8;\n    and r1291.lo 18446744073709551615u128 into r1292;\n    shr r1291.lo 64u8 into r1293;\n    and r1290.lo 18446744073709551615u128 into r1294;\n    shr r1290.lo 64u8 into r1295;\n    mul r1292 r1294 into r1296;\n    mul r1292 r1295 into r1297;\n    mul r1293 r1294 into r1298;\n    mul r1293 r1295 into r1299;\n    and r1296 18446744073709551615u128 into r1300;\n    shr r1296 64u8 into r1301;\n    and r1297 18446744073709551615u128 into r1302;\n    add r1301 r1302 into r1303;\n    and r1298 18446744073709551615u128 into r1304;\n    add r1303 r1304 into r1305;\n    and r1305 18446744073709551615u128 into r1306;\n    shr r1305 64u8 into r1307;\n    shr r1297 64u8 into r1308;\n    shr r1298 64u8 into r1309;\n    add r1308 r1309 into r1310;\n    and r1299 18446744073709551615u128 into r1311;\n    add r1310 r1311 into r1312;\n    add r1312 r1307 into r1313;\n    and r1313 18446744073709551615u128 into r1314;\n    shr r1313 64u8 into r1315;\n    shr r1299 64u8 into r1316;\n    add r1316 r1315 into r1317;\n    shl r1317 64u8 into r1318;\n    add r1318 r1314 into r1319;\n    shl r1306 64u8 into r1320;\n    add r1320 r1300 into r1321;\n    and r1291.lo 18446744073709551615u128 into r1322;\n    shr r1291.lo 64u8 into r1323;\n    and r1290.hi 18446744073709551615u128 into r1324;\n    shr r1290.hi 64u8 into r1325;\n    mul r1322 r1324 into r1326;\n    mul r1322 r1325 into r1327;\n    mul r1323 r1324 into r1328;\n    mul r1323 r1325 into r1329;\n    and r1326 18446744073709551615u128 into r1330;\n    shr r1326 64u8 into r1331;\n    and r1327 18446744073709551615u128 into r1332;\n    add r1331 r1332 into r1333;\n    and r1328 18446744073709551615u128 into r1334;\n    add r1333 r1334 into r1335;\n    and r1335 18446744073709551615u128 into r1336;\n    shr r1335 64u8 into r1337;\n    shr r1327 64u8 into r1338;\n    shr r1328 64u8 into r1339;\n    add r1338 r1339 into r1340;\n    and r1329 18446744073709551615u128 into r1341;\n    add r1340 r1341 into r1342;\n    add r1342 r1337 into r1343;\n    and r1343 18446744073709551615u128 into r1344;\n    shr r1343 64u8 into r1345;\n    shr r1329 64u8 into r1346;\n    add r1346 r1345 into r1347;\n    shl r1347 64u8 into r1348;\n    add r1348 r1344 into r1349;\n    shl r1336 64u8 into r1350;\n    add r1350 r1330 into r1351;\n    and r1291.hi 18446744073709551615u128 into r1352;\n    shr r1291.hi 64u8 into r1353;\n    and r1290.lo 18446744073709551615u128 into r1354;\n    shr r1290.lo 64u8 into r1355;\n    mul r1352 r1354 into r1356;\n    mul r1352 r1355 into r1357;\n    mul r1353 r1354 into r1358;\n    mul r1353 r1355 into r1359;\n    and r1356 18446744073709551615u128 into r1360;\n    shr r1356 64u8 into r1361;\n    and r1357 18446744073709551615u128 into r1362;\n    add r1361 r1362 into r1363;\n    and r1358 18446744073709551615u128 into r1364;\n    add r1363 r1364 into r1365;\n    and r1365 18446744073709551615u128 into r1366;\n    shr r1365 64u8 into r1367;\n    shr r1357 64u8 into r1368;\n    shr r1358 64u8 into r1369;\n    add r1368 r1369 into r1370;\n    and r1359 18446744073709551615u128 into r1371;\n    add r1370 r1371 into r1372;\n    add r1372 r1367 into r1373;\n    and r1373 18446744073709551615u128 into r1374;\n    shr r1373 64u8 into r1375;\n    shr r1359 64u8 into r1376;\n    add r1376 r1375 into r1377;\n    shl r1377 64u8 into r1378;\n    add r1378 r1374 into r1379;\n    shl r1366 64u8 into r1380;\n    add r1380 r1360 into r1381;\n    and r1291.hi 18446744073709551615u128 into r1382;\n    shr r1291.hi 64u8 into r1383;\n    and r1290.hi 18446744073709551615u128 into r1384;\n    shr r1290.hi 64u8 into r1385;\n    mul r1382 r1384 into r1386;\n    mul r1382 r1385 into r1387;\n    mul r1383 r1384 into r1388;\n    mul r1383 r1385 into r1389;\n    and r1386 18446744073709551615u128 into r1390;\n    shr r1386 64u8 into r1391;\n    and r1387 18446744073709551615u128 into r1392;\n    add r1391 r1392 into r1393;\n    and r1388 18446744073709551615u128 into r1394;\n    add r1393 r1394 into r1395;\n    and r1395 18446744073709551615u128 into r1396;\n    shr r1395 64u8 into r1397;\n    shr r1387 64u8 into r1398;\n    shr r1388 64u8 into r1399;\n    add r1398 r1399 into r1400;\n    and r1389 18446744073709551615u128 into r1401;\n    add r1400 r1401 into r1402;\n    add r1402 r1397 into r1403;\n    and r1403 18446744073709551615u128 into r1404;\n    shr r1403 64u8 into r1405;\n    shr r1389 64u8 into r1406;\n    add r1406 r1405 into r1407;\n    shl r1407 64u8 into r1408;\n    add r1408 r1404 into r1409;\n    shl r1396 64u8 into r1410;\n    add r1410 r1390 into r1411;\n    add.w r1319 r1351 into r1412;\n    lt r1412 r1319 into r1413;\n    ternary r1413 1u128 0u128 into r1414;\n    add.w r1412 r1381 into r1415;\n    lt r1415 r1412 into r1416;\n    ternary r1416 1u128 0u128 into r1417;\n    add r1414 r1417 into r1418;\n    add.w r1349 r1379 into r1419;\n    lt r1419 r1349 into r1420;\n    ternary r1420 1u128 0u128 into r1421;\n    add.w r1419 r1411 into r1422;\n    lt r1422 r1419 into r1423;\n    ternary r1423 1u128 0u128 into r1424;\n    add.w r1422 r1418 into r1425;\n    lt r1425 r1422 into r1426;\n    ternary r1426 1u128 0u128 into r1427;\n    add r1421 r1424 into r1428;\n    add r1428 r1427 into r1429;\n    add.w r1409 r1429 into r1430;\n    cast r1430 r1425 into r1431 as U256__8JquwLopp8;\n    cast r1415 r1321 into r1432 as U256__8JquwLopp8;\n    gt r1432.lo 0u128 into r1433;\n    and r1268 r1433 into r1434;\n    is.eq r1432.hi 340282366920938463463374607431768211455u128 into r1435;\n    and r1434 r1435 into r1436;\n    is.neq r1431.hi 0u128 into r1437;\n    is.neq r1431.lo 0u128 into r1438;\n    or r1437 r1438 into r1439;\n    or r1439 r1436 into r1440;\n    gt r1432.lo 0u128 into r1441;\n    and r1268 r1441 into r1442;\n    lt r1432.hi 340282366920938463463374607431768211455u128 into r1443;\n    and r1442 r1443 into r1444;\n    add.w r1432.hi 1u128 into r1445;\n    ternary r1444 r1445 r1432.hi into r1446;\n    ternary r0.z r1266.lo r1446 into r1447;\n    ternary r0.z r1446 r1266.lo into r1448;\n    cast r0.fee_pips into r1449 as u128;\n    sub 1000000u128 r1449 into r1450;\n    and r4.rem 18446744073709551615u128 into r1451;\n    shr r4.rem 64u8 into r1452;\n    and r1450 18446744073709551615u128 into r1453;\n    shr r1450 64u8 into r1454;\n    mul r1451 r1453 into r1455;\n    mul r1451 r1454 into r1456;\n    mul r1452 r1453 into r1457;\n    mul r1452 r1454 into r1458;\n    and r1455 18446744073709551615u128 into r1459;\n    shr r1455 64u8 into r1460;\n    and r1456 18446744073709551615u128 into r1461;\n    add r1460 r1461 into r1462;\n    and r1457 18446744073709551615u128 into r1463;\n    add r1462 r1463 into r1464;\n    and r1464 18446744073709551615u128 into r1465;\n    shr r1464 64u8 into r1466;\n    shr r1456 64u8 into r1467;\n    shr r1457 64u8 into r1468;\n    add r1467 r1468 into r1469;\n    and r1458 18446744073709551615u128 into r1470;\n    add r1469 r1470 into r1471;\n    add r1471 r1466 into r1472;\n    and r1472 18446744073709551615u128 into r1473;\n    shr r1472 64u8 into r1474;\n    shr r1458 64u8 into r1475;\n    add r1475 r1474 into r1476;\n    shl r1476 64u8 into r1477;\n    add r1477 r1473 into r1478;\n    shl r1465 64u8 into r1479;\n    add r1479 r1459 into r1480;\n    lt r1478 1000000u128 into r1481;\n    assert.eq r1481 true;\n    shr r1480 96u8 into r1482;\n    and r1482 4294967295u128 into r1483;\n    shl r1478 32u8 into r1484;\n    add r1484 r1483 into r1485;\n    div r1485 1000000u128 into r1486;\n    rem r1485 1000000u128 into r1487;\n    shr r1480 64u8 into r1488;\n    and r1488 4294967295u128 into r1489;\n    shl r1487 32u8 into r1490;\n    add r1490 r1489 into r1491;\n    shl r1486 32u8 into r1492;\n    div r1491 1000000u128 into r1493;\n    add r1492 r1493 into r1494;\n    rem r1491 1000000u128 into r1495;\n    shr r1480 32u8 into r1496;\n    and r1496 4294967295u128 into r1497;\n    shl r1495 32u8 into r1498;\n    add r1498 r1497 into r1499;\n    shl r1494 32u8 into r1500;\n    div r1499 1000000u128 into r1501;\n    add r1500 r1501 into r1502;\n    rem r1499 1000000u128 into r1503;\n    shr r1480 0u8 into r1504;\n    and r1504 4294967295u128 into r1505;\n    shl r1503 32u8 into r1506;\n    add r1506 r1505 into r1507;\n    shl r1502 32u8 into r1508;\n    div r1507 1000000u128 into r1509;\n    add r1508 r1509 into r1510;\n    rem r1507 1000000u128 into r1511;\n    not r1267 into r1512;\n    not r1440 into r1513;\n    and r1512 r1513 into r1514;\n    gte r1510 r1447 into r1515;\n    and r1514 r1515 into r1516;\n    ternary r1516 r23.hi r4.sp.hi into r1517;\n    ternary r1516 r23.lo r4.sp.lo into r1518;\n    cast r1517 r1518 into r1519 as U256__8JquwLopp8;\n    ternary r1516 r1447 0u128 into r1520;\n    ternary r1516 r1448 0u128 into r1521;\n    cast r0.fee_pips into r1522 as u128;\n    cast r0.fee_pips into r1523 as u128;\n    sub 1000000u128 r1523 into r1524;\n    and r1520 18446744073709551615u128 into r1525;\n    shr r1520 64u8 into r1526;\n    and r1522 18446744073709551615u128 into r1527;\n    shr r1522 64u8 into r1528;\n    mul r1525 r1527 into r1529;\n    mul r1525 r1528 into r1530;\n    mul r1526 r1527 into r1531;\n    mul r1526 r1528 into r1532;\n    and r1529 18446744073709551615u128 into r1533;\n    shr r1529 64u8 into r1534;\n    and r1530 18446744073709551615u128 into r1535;\n    add r1534 r1535 into r1536;\n    and r1531 18446744073709551615u128 into r1537;\n    add r1536 r1537 into r1538;\n    and r1538 18446744073709551615u128 into r1539;\n    shr r1538 64u8 into r1540;\n    shr r1530 64u8 into r1541;\n    shr r1531 64u8 into r1542;\n    add r1541 r1542 into r1543;\n    and r1532 18446744073709551615u128 into r1544;\n    add r1543 r1544 into r1545;\n    add r1545 r1540 into r1546;\n    and r1546 18446744073709551615u128 into r1547;\n    shr r1546 64u8 into r1548;\n    shr r1532 64u8 into r1549;\n    add r1549 r1548 into r1550;\n    shl r1550 64u8 into r1551;\n    add r1551 r1547 into r1552;\n    shl r1539 64u8 into r1553;\n    add r1553 r1533 into r1554;\n    lt r1552 r1524 into r1555;\n    assert.eq r1555 true;\n    shr r1554 96u8 into r1556;\n    and r1556 4294967295u128 into r1557;\n    shl r1552 32u8 into r1558;\n    add r1558 r1557 into r1559;\n    div r1559 r1524 into r1560;\n    rem r1559 r1524 into r1561;\n    shr r1554 64u8 into r1562;\n    and r1562 4294967295u128 into r1563;\n    shl r1561 32u8 into r1564;\n    add r1564 r1563 into r1565;\n    shl r1560 32u8 into r1566;\n    div r1565 r1524 into r1567;\n    add r1566 r1567 into r1568;\n    rem r1565 r1524 into r1569;\n    shr r1554 32u8 into r1570;\n    and r1570 4294967295u128 into r1571;\n    shl r1569 32u8 into r1572;\n    add r1572 r1571 into r1573;\n    shl r1568 32u8 into r1574;\n    div r1573 r1524 into r1575;\n    add r1574 r1575 into r1576;\n    rem r1573 r1524 into r1577;\n    shr r1554 0u8 into r1578;\n    and r1578 4294967295u128 into r1579;\n    shl r1577 32u8 into r1580;\n    add r1580 r1579 into r1581;\n    shl r1576 32u8 into r1582;\n    div r1581 r1524 into r1583;\n    add r1582 r1583 into r1584;\n    rem r1581 r1524 into r1585;\n    gt r1585 0u128 into r1586;\n    ternary r1586 1u128 0u128 into r1587;\n    add r1584 r1587 into r1588;\n    ternary r1516 r1588 0u128 into r1589;\n    ternary r27 r23.hi r4.sp.hi into r1590;\n    ternary r27 r23.lo r4.sp.lo into r1591;\n    cast r1590 r1591 into r1592 as U256__8JquwLopp8;\n    ternary r30 r1519.hi r1592.hi into r1593;\n    ternary r30 r1519.lo r1592.lo into r1594;\n    cast r1593 r1594 into r1595 as U256__8JquwLopp8;\n    ternary r30 r1520 0u128 into r1596;\n    ternary r30 r1521 0u128 into r1597;\n    ternary r30 r1589 0u128 into r1598;\n    add r1596 r1598 into r1599;\n    gt r1599 r4.rem into r1600;\n    ternary r1600 r4.rem r1599 into r1601;\n    sub r1601 r1596 into r1602;\n    cast r0.fee_protocol into r1603 as u128;\n    mul r1602 r1603 into r1604;\n    div r1604 16u128 into r1605;\n    sub r1602 r1605 into r1606;\n    add r4.pf r1605 into r1607;\n    sub r4.rem r1601 into r1608;\n    add r4.out r1597 into r1609;\n    gt r4.liq 0u128 into r1610;\n    ternary r1610 r4.liq 1u128 into r1611;\n    div r1606 r1611 into r1612;\n    rem r1606 r1611 into r1613;\n    lt r1613 r1611 into r1614;\n    assert.eq r1614 true;\n    gte r1613 170141183460469231731687303715884105728u128 into r1615;\n    add.w r1613 r1613 into r1616;\n    gte r1616 r1611 into r1617;\n    or r1615 r1617 into r1618;\n    sub.w r1616 r1611 into r1619;\n    ternary r1618 r1619 r1616 into r1620;\n    ternary r1618 170141183460469231731687303715884105728u128 0u128 into r1621;\n    gte r1620 170141183460469231731687303715884105728u128 into r1622;\n    add.w r1620 r1620 into r1623;\n    gte r1623 r1611 into r1624;\n    or r1622 r1624 into r1625;\n    sub.w r1623 r1611 into r1626;\n    ternary r1625 r1626 r1623 into r1627;\n    add r1621 85070591730234615865843651857942052864u128 into r1628;\n    ternary r1625 r1628 r1621 into r1629;\n    gte r1627 170141183460469231731687303715884105728u128 into r1630;\n    add.w r1627 r1627 into r1631;\n    gte r1631 r1611 into r1632;\n    or r1630 r1632 into r1633;\n    sub.w r1631 r1611 into r1634;\n    ternary r1633 r1634 r1631 into r1635;\n    add r1629 42535295865117307932921825928971026432u128 into r1636;\n    ternary r1633 r1636 r1629 into r1637;\n    gte r1635 170141183460469231731687303715884105728u128 into r1638;\n    add.w r1635 r1635 into r1639;\n    gte r1639 r1611 into r1640;\n    or r1638 r1640 into r1641;\n    sub.w r1639 r1611 into r1642;\n    ternary r1641 r1642 r1639 into r1643;\n    add r1637 21267647932558653966460912964485513216u128 into r1644;\n    ternary r1641 r1644 r1637 into r1645;\n    gte r1643 170141183460469231731687303715884105728u128 into r1646;\n    add.w r1643 r1643 into r1647;\n    gte r1647 r1611 into r1648;\n    or r1646 r1648 into r1649;\n    sub.w r1647 r1611 into r1650;\n    ternary r1649 r1650 r1647 into r1651;\n    add r1645 10633823966279326983230456482242756608u128 into r1652;\n    ternary r1649 r1652 r1645 into r1653;\n    gte r1651 170141183460469231731687303715884105728u128 into r1654;\n    add.w r1651 r1651 into r1655;\n    gte r1655 r1611 into r1656;\n    or r1654 r1656 into r1657;\n    sub.w r1655 r1611 into r1658;\n    ternary r1657 r1658 r1655 into r1659;\n    add r1653 5316911983139663491615228241121378304u128 into r1660;\n    ternary r1657 r1660 r1653 into r1661;\n    gte r1659 170141183460469231731687303715884105728u128 into r1662;\n    add.w r1659 r1659 into r1663;\n    gte r1663 r1611 into r1664;\n    or r1662 r1664 into r1665;\n    sub.w r1663 r1611 into r1666;\n    ternary r1665 r1666 r1663 into r1667;\n    add r1661 2658455991569831745807614120560689152u128 into r1668;\n    ternary r1665 r1668 r1661 into r1669;\n    gte r1667 170141183460469231731687303715884105728u128 into r1670;\n    add.w r1667 r1667 into r1671;\n    gte r1671 r1611 into r1672;\n    or r1670 r1672 into r1673;\n    sub.w r1671 r1611 into r1674;\n    ternary r1673 r1674 r1671 into r1675;\n    add r1669 1329227995784915872903807060280344576u128 into r1676;\n    ternary r1673 r1676 r1669 into r1677;\n    gte r1675 170141183460469231731687303715884105728u128 into r1678;\n    add.w r1675 r1675 into r1679;\n    gte r1679 r1611 into r1680;\n    or r1678 r1680 into r1681;\n    sub.w r1679 r1611 into r1682;\n    ternary r1681 r1682 r1679 into r1683;\n    add r1677 664613997892457936451903530140172288u128 into r1684;\n    ternary r1681 r1684 r1677 into r1685;\n    gte r1683 170141183460469231731687303715884105728u128 into r1686;\n    add.w r1683 r1683 into r1687;\n    gte r1687 r1611 into r1688;\n    or r1686 r1688 into r1689;\n    sub.w r1687 r1611 into r1690;\n    ternary r1689 r1690 r1687 into r1691;\n    add r1685 332306998946228968225951765070086144u128 into r1692;\n    ternary r1689 r1692 r1685 into r1693;\n    gte r1691 170141183460469231731687303715884105728u128 into r1694;\n    add.w r1691 r1691 into r1695;\n    gte r1695 r1611 into r1696;\n    or r1694 r1696 into r1697;\n    sub.w r1695 r1611 into r1698;\n    ternary r1697 r1698 r1695 into r1699;\n    add r1693 166153499473114484112975882535043072u128 into r1700;\n    ternary r1697 r1700 r1693 into r1701;\n    gte r1699 170141183460469231731687303715884105728u128 into r1702;\n    add.w r1699 r1699 into r1703;\n    gte r1703 r1611 into r1704;\n    or r1702 r1704 into r1705;\n    sub.w r1703 r1611 into r1706;\n    ternary r1705 r1706 r1703 into r1707;\n    add r1701 83076749736557242056487941267521536u128 into r1708;\n    ternary r1705 r1708 r1701 into r1709;\n    gte r1707 170141183460469231731687303715884105728u128 into r1710;\n    add.w r1707 r1707 into r1711;\n    gte r1711 r1611 into r1712;\n    or r1710 r1712 into r1713;\n    sub.w r1711 r1611 into r1714;\n    ternary r1713 r1714 r1711 into r1715;\n    add r1709 41538374868278621028243970633760768u128 into r1716;\n    ternary r1713 r1716 r1709 into r1717;\n    gte r1715 170141183460469231731687303715884105728u128 into r1718;\n    add.w r1715 r1715 into r1719;\n    gte r1719 r1611 into r1720;\n    or r1718 r1720 into r1721;\n    sub.w r1719 r1611 into r1722;\n    ternary r1721 r1722 r1719 into r1723;\n    add r1717 20769187434139310514121985316880384u128 into r1724;\n    ternary r1721 r1724 r1717 into r1725;\n    gte r1723 170141183460469231731687303715884105728u128 into r1726;\n    add.w r1723 r1723 into r1727;\n    gte r1727 r1611 into r1728;\n    or r1726 r1728 into r1729;\n    sub.w r1727 r1611 into r1730;\n    ternary r1729 r1730 r1727 into r1731;\n    add r1725 10384593717069655257060992658440192u128 into r1732;\n    ternary r1729 r1732 r1725 into r1733;\n    gte r1731 170141183460469231731687303715884105728u128 into r1734;\n    add.w r1731 r1731 into r1735;\n    gte r1735 r1611 into r1736;\n    or r1734 r1736 into r1737;\n    sub.w r1735 r1611 into r1738;\n    ternary r1737 r1738 r1735 into r1739;\n    add r1733 5192296858534827628530496329220096u128 into r1740;\n    ternary r1737 r1740 r1733 into r1741;\n    gte r1739 170141183460469231731687303715884105728u128 into r1742;\n    add.w r1739 r1739 into r1743;\n    gte r1743 r1611 into r1744;\n    or r1742 r1744 into r1745;\n    sub.w r1743 r1611 into r1746;\n    ternary r1745 r1746 r1743 into r1747;\n    add r1741 2596148429267413814265248164610048u128 into r1748;\n    ternary r1745 r1748 r1741 into r1749;\n    gte r1747 170141183460469231731687303715884105728u128 into r1750;\n    add.w r1747 r1747 into r1751;\n    gte r1751 r1611 into r1752;\n    or r1750 r1752 into r1753;\n    sub.w r1751 r1611 into r1754;\n    ternary r1753 r1754 r1751 into r1755;\n    add r1749 1298074214633706907132624082305024u128 into r1756;\n    ternary r1753 r1756 r1749 into r1757;\n    gte r1755 170141183460469231731687303715884105728u128 into r1758;\n    add.w r1755 r1755 into r1759;\n    gte r1759 r1611 into r1760;\n    or r1758 r1760 into r1761;\n    sub.w r1759 r1611 into r1762;\n    ternary r1761 r1762 r1759 into r1763;\n    add r1757 649037107316853453566312041152512u128 into r1764;\n    ternary r1761 r1764 r1757 into r1765;\n    gte r1763 170141183460469231731687303715884105728u128 into r1766;\n    add.w r1763 r1763 into r1767;\n    gte r1767 r1611 into r1768;\n    or r1766 r1768 into r1769;\n    sub.w r1767 r1611 into r1770;\n    ternary r1769 r1770 r1767 into r1771;\n    add r1765 324518553658426726783156020576256u128 into r1772;\n    ternary r1769 r1772 r1765 into r1773;\n    gte r1771 170141183460469231731687303715884105728u128 into r1774;\n    add.w r1771 r1771 into r1775;\n    gte r1775 r1611 into r1776;\n    or r1774 r1776 into r1777;\n    sub.w r1775 r1611 into r1778;\n    ternary r1777 r1778 r1775 into r1779;\n    add r1773 162259276829213363391578010288128u128 into r1780;\n    ternary r1777 r1780 r1773 into r1781;\n    gte r1779 170141183460469231731687303715884105728u128 into r1782;\n    add.w r1779 r1779 into r1783;\n    gte r1783 r1611 into r1784;\n    or r1782 r1784 into r1785;\n    sub.w r1783 r1611 into r1786;\n    ternary r1785 r1786 r1783 into r1787;\n    add r1781 81129638414606681695789005144064u128 into r1788;\n    ternary r1785 r1788 r1781 into r1789;\n    gte r1787 170141183460469231731687303715884105728u128 into r1790;\n    add.w r1787 r1787 into r1791;\n    gte r1791 r1611 into r1792;\n    or r1790 r1792 into r1793;\n    sub.w r1791 r1611 into r1794;\n    ternary r1793 r1794 r1791 into r1795;\n    add r1789 40564819207303340847894502572032u128 into r1796;\n    ternary r1793 r1796 r1789 into r1797;\n    gte r1795 170141183460469231731687303715884105728u128 into r1798;\n    add.w r1795 r1795 into r1799;\n    gte r1799 r1611 into r1800;\n    or r1798 r1800 into r1801;\n    sub.w r1799 r1611 into r1802;\n    ternary r1801 r1802 r1799 into r1803;\n    add r1797 20282409603651670423947251286016u128 into r1804;\n    ternary r1801 r1804 r1797 into r1805;\n    gte r1803 170141183460469231731687303715884105728u128 into r1806;\n    add.w r1803 r1803 into r1807;\n    gte r1807 r1611 into r1808;\n    or r1806 r1808 into r1809;\n    sub.w r1807 r1611 into r1810;\n    ternary r1809 r1810 r1807 into r1811;\n    add r1805 10141204801825835211973625643008u128 into r1812;\n    ternary r1809 r1812 r1805 into r1813;\n    gte r1811 170141183460469231731687303715884105728u128 into r1814;\n    add.w r1811 r1811 into r1815;\n    gte r1815 r1611 into r1816;\n    or r1814 r1816 into r1817;\n    sub.w r1815 r1611 into r1818;\n    ternary r1817 r1818 r1815 into r1819;\n    add r1813 5070602400912917605986812821504u128 into r1820;\n    ternary r1817 r1820 r1813 into r1821;\n    gte r1819 170141183460469231731687303715884105728u128 into r1822;\n    add.w r1819 r1819 into r1823;\n    gte r1823 r1611 into r1824;\n    or r1822 r1824 into r1825;\n    sub.w r1823 r1611 into r1826;\n    ternary r1825 r1826 r1823 into r1827;\n    add r1821 2535301200456458802993406410752u128 into r1828;\n    ternary r1825 r1828 r1821 into r1829;\n    gte r1827 170141183460469231731687303715884105728u128 into r1830;\n    add.w r1827 r1827 into r1831;\n    gte r1831 r1611 into r1832;\n    or r1830 r1832 into r1833;\n    sub.w r1831 r1611 into r1834;\n    ternary r1833 r1834 r1831 into r1835;\n    add r1829 1267650600228229401496703205376u128 into r1836;\n    ternary r1833 r1836 r1829 into r1837;\n    gte r1835 170141183460469231731687303715884105728u128 into r1838;\n    add.w r1835 r1835 into r1839;\n    gte r1839 r1611 into r1840;\n    or r1838 r1840 into r1841;\n    sub.w r1839 r1611 into r1842;\n    ternary r1841 r1842 r1839 into r1843;\n    add r1837 633825300114114700748351602688u128 into r1844;\n    ternary r1841 r1844 r1837 into r1845;\n    gte r1843 170141183460469231731687303715884105728u128 into r1846;\n    add.w r1843 r1843 into r1847;\n    gte r1847 r1611 into r1848;\n    or r1846 r1848 into r1849;\n    sub.w r1847 r1611 into r1850;\n    ternary r1849 r1850 r1847 into r1851;\n    add r1845 316912650057057350374175801344u128 into r1852;\n    ternary r1849 r1852 r1845 into r1853;\n    gte r1851 170141183460469231731687303715884105728u128 into r1854;\n    add.w r1851 r1851 into r1855;\n    gte r1855 r1611 into r1856;\n    or r1854 r1856 into r1857;\n    sub.w r1855 r1611 into r1858;\n    ternary r1857 r1858 r1855 into r1859;\n    add r1853 158456325028528675187087900672u128 into r1860;\n    ternary r1857 r1860 r1853 into r1861;\n    gte r1859 170141183460469231731687303715884105728u128 into r1862;\n    add.w r1859 r1859 into r1863;\n    gte r1863 r1611 into r1864;\n    or r1862 r1864 into r1865;\n    sub.w r1863 r1611 into r1866;\n    ternary r1865 r1866 r1863 into r1867;\n    add r1861 79228162514264337593543950336u128 into r1868;\n    ternary r1865 r1868 r1861 into r1869;\n    gte r1867 170141183460469231731687303715884105728u128 into r1870;\n    add.w r1867 r1867 into r1871;\n    gte r1871 r1611 into r1872;\n    or r1870 r1872 into r1873;\n    sub.w r1871 r1611 into r1874;\n    ternary r1873 r1874 r1871 into r1875;\n    add r1869 39614081257132168796771975168u128 into r1876;\n    ternary r1873 r1876 r1869 into r1877;\n    gte r1875 170141183460469231731687303715884105728u128 into r1878;\n    add.w r1875 r1875 into r1879;\n    gte r1879 r1611 into r1880;\n    or r1878 r1880 into r1881;\n    sub.w r1879 r1611 into r1882;\n    ternary r1881 r1882 r1879 into r1883;\n    add r1877 19807040628566084398385987584u128 into r1884;\n    ternary r1881 r1884 r1877 into r1885;\n    gte r1883 170141183460469231731687303715884105728u128 into r1886;\n    add.w r1883 r1883 into r1887;\n    gte r1887 r1611 into r1888;\n    or r1886 r1888 into r1889;\n    sub.w r1887 r1611 into r1890;\n    ternary r1889 r1890 r1887 into r1891;\n    add r1885 9903520314283042199192993792u128 into r1892;\n    ternary r1889 r1892 r1885 into r1893;\n    gte r1891 170141183460469231731687303715884105728u128 into r1894;\n    add.w r1891 r1891 into r1895;\n    gte r1895 r1611 into r1896;\n    or r1894 r1896 into r1897;\n    sub.w r1895 r1611 into r1898;\n    ternary r1897 r1898 r1895 into r1899;\n    add r1893 4951760157141521099596496896u128 into r1900;\n    ternary r1897 r1900 r1893 into r1901;\n    gte r1899 170141183460469231731687303715884105728u128 into r1902;\n    add.w r1899 r1899 into r1903;\n    gte r1903 r1611 into r1904;\n    or r1902 r1904 into r1905;\n    sub.w r1903 r1611 into r1906;\n    ternary r1905 r1906 r1903 into r1907;\n    add r1901 2475880078570760549798248448u128 into r1908;\n    ternary r1905 r1908 r1901 into r1909;\n    gte r1907 170141183460469231731687303715884105728u128 into r1910;\n    add.w r1907 r1907 into r1911;\n    gte r1911 r1611 into r1912;\n    or r1910 r1912 into r1913;\n    sub.w r1911 r1611 into r1914;\n    ternary r1913 r1914 r1911 into r1915;\n    add r1909 1237940039285380274899124224u128 into r1916;\n    ternary r1913 r1916 r1909 into r1917;\n    gte r1915 170141183460469231731687303715884105728u128 into r1918;\n    add.w r1915 r1915 into r1919;\n    gte r1919 r1611 into r1920;\n    or r1918 r1920 into r1921;\n    sub.w r1919 r1611 into r1922;\n    ternary r1921 r1922 r1919 into r1923;\n    add r1917 618970019642690137449562112u128 into r1924;\n    ternary r1921 r1924 r1917 into r1925;\n    gte r1923 170141183460469231731687303715884105728u128 into r1926;\n    add.w r1923 r1923 into r1927;\n    gte r1927 r1611 into r1928;\n    or r1926 r1928 into r1929;\n    sub.w r1927 r1611 into r1930;\n    ternary r1929 r1930 r1927 into r1931;\n    add r1925 309485009821345068724781056u128 into r1932;\n    ternary r1929 r1932 r1925 into r1933;\n    gte r1931 170141183460469231731687303715884105728u128 into r1934;\n    add.w r1931 r1931 into r1935;\n    gte r1935 r1611 into r1936;\n    or r1934 r1936 into r1937;\n    sub.w r1935 r1611 into r1938;\n    ternary r1937 r1938 r1935 into r1939;\n    add r1933 154742504910672534362390528u128 into r1940;\n    ternary r1937 r1940 r1933 into r1941;\n    gte r1939 170141183460469231731687303715884105728u128 into r1942;\n    add.w r1939 r1939 into r1943;\n    gte r1943 r1611 into r1944;\n    or r1942 r1944 into r1945;\n    sub.w r1943 r1611 into r1946;\n    ternary r1945 r1946 r1943 into r1947;\n    add r1941 77371252455336267181195264u128 into r1948;\n    ternary r1945 r1948 r1941 into r1949;\n    gte r1947 170141183460469231731687303715884105728u128 into r1950;\n    add.w r1947 r1947 into r1951;\n    gte r1951 r1611 into r1952;\n    or r1950 r1952 into r1953;\n    sub.w r1951 r1611 into r1954;\n    ternary r1953 r1954 r1951 into r1955;\n    add r1949 38685626227668133590597632u128 into r1956;\n    ternary r1953 r1956 r1949 into r1957;\n    gte r1955 170141183460469231731687303715884105728u128 into r1958;\n    add.w r1955 r1955 into r1959;\n    gte r1959 r1611 into r1960;\n    or r1958 r1960 into r1961;\n    sub.w r1959 r1611 into r1962;\n    ternary r1961 r1962 r1959 into r1963;\n    add r1957 19342813113834066795298816u128 into r1964;\n    ternary r1961 r1964 r1957 into r1965;\n    gte r1963 170141183460469231731687303715884105728u128 into r1966;\n    add.w r1963 r1963 into r1967;\n    gte r1967 r1611 into r1968;\n    or r1966 r1968 into r1969;\n    sub.w r1967 r1611 into r1970;\n    ternary r1969 r1970 r1967 into r1971;\n    add r1965 9671406556917033397649408u128 into r1972;\n    ternary r1969 r1972 r1965 into r1973;\n    gte r1971 170141183460469231731687303715884105728u128 into r1974;\n    add.w r1971 r1971 into r1975;\n    gte r1975 r1611 into r1976;\n    or r1974 r1976 into r1977;\n    sub.w r1975 r1611 into r1978;\n    ternary r1977 r1978 r1975 into r1979;\n    add r1973 4835703278458516698824704u128 into r1980;\n    ternary r1977 r1980 r1973 into r1981;\n    gte r1979 170141183460469231731687303715884105728u128 into r1982;\n    add.w r1979 r1979 into r1983;\n    gte r1983 r1611 into r1984;\n    or r1982 r1984 into r1985;\n    sub.w r1983 r1611 into r1986;\n    ternary r1985 r1986 r1983 into r1987;\n    add r1981 2417851639229258349412352u128 into r1988;\n    ternary r1985 r1988 r1981 into r1989;\n    gte r1987 170141183460469231731687303715884105728u128 into r1990;\n    add.w r1987 r1987 into r1991;\n    gte r1991 r1611 into r1992;\n    or r1990 r1992 into r1993;\n    sub.w r1991 r1611 into r1994;\n    ternary r1993 r1994 r1991 into r1995;\n    add r1989 1208925819614629174706176u128 into r1996;\n    ternary r1993 r1996 r1989 into r1997;\n    gte r1995 170141183460469231731687303715884105728u128 into r1998;\n    add.w r1995 r1995 into r1999;\n    gte r1999 r1611 into r2000;\n    or r1998 r2000 into r2001;\n    sub.w r1999 r1611 into r2002;\n    ternary r2001 r2002 r1999 into r2003;\n    add r1997 604462909807314587353088u128 into r2004;\n    ternary r2001 r2004 r1997 into r2005;\n    gte r2003 170141183460469231731687303715884105728u128 into r2006;\n    add.w r2003 r2003 into r2007;\n    gte r2007 r1611 into r2008;\n    or r2006 r2008 into r2009;\n    sub.w r2007 r1611 into r2010;\n    ternary r2009 r2010 r2007 into r2011;\n    add r2005 302231454903657293676544u128 into r2012;\n    ternary r2009 r2012 r2005 into r2013;\n    gte r2011 170141183460469231731687303715884105728u128 into r2014;\n    add.w r2011 r2011 into r2015;\n    gte r2015 r1611 into r2016;\n    or r2014 r2016 into r2017;\n    sub.w r2015 r1611 into r2018;\n    ternary r2017 r2018 r2015 into r2019;\n    add r2013 151115727451828646838272u128 into r2020;\n    ternary r2017 r2020 r2013 into r2021;\n    gte r2019 170141183460469231731687303715884105728u128 into r2022;\n    add.w r2019 r2019 into r2023;\n    gte r2023 r1611 into r2024;\n    or r2022 r2024 into r2025;\n    sub.w r2023 r1611 into r2026;\n    ternary r2025 r2026 r2023 into r2027;\n    add r2021 75557863725914323419136u128 into r2028;\n    ternary r2025 r2028 r2021 into r2029;\n    gte r2027 170141183460469231731687303715884105728u128 into r2030;\n    add.w r2027 r2027 into r2031;\n    gte r2031 r1611 into r2032;\n    or r2030 r2032 into r2033;\n    sub.w r2031 r1611 into r2034;\n    ternary r2033 r2034 r2031 into r2035;\n    add r2029 37778931862957161709568u128 into r2036;\n    ternary r2033 r2036 r2029 into r2037;\n    gte r2035 170141183460469231731687303715884105728u128 into r2038;\n    add.w r2035 r2035 into r2039;\n    gte r2039 r1611 into r2040;\n    or r2038 r2040 into r2041;\n    sub.w r2039 r1611 into r2042;\n    ternary r2041 r2042 r2039 into r2043;\n    add r2037 18889465931478580854784u128 into r2044;\n    ternary r2041 r2044 r2037 into r2045;\n    gte r2043 170141183460469231731687303715884105728u128 into r2046;\n    add.w r2043 r2043 into r2047;\n    gte r2047 r1611 into r2048;\n    or r2046 r2048 into r2049;\n    sub.w r2047 r1611 into r2050;\n    ternary r2049 r2050 r2047 into r2051;\n    add r2045 9444732965739290427392u128 into r2052;\n    ternary r2049 r2052 r2045 into r2053;\n    gte r2051 170141183460469231731687303715884105728u128 into r2054;\n    add.w r2051 r2051 into r2055;\n    gte r2055 r1611 into r2056;\n    or r2054 r2056 into r2057;\n    sub.w r2055 r1611 into r2058;\n    ternary r2057 r2058 r2055 into r2059;\n    add r2053 4722366482869645213696u128 into r2060;\n    ternary r2057 r2060 r2053 into r2061;\n    gte r2059 170141183460469231731687303715884105728u128 into r2062;\n    add.w r2059 r2059 into r2063;\n    gte r2063 r1611 into r2064;\n    or r2062 r2064 into r2065;\n    sub.w r2063 r1611 into r2066;\n    ternary r2065 r2066 r2063 into r2067;\n    add r2061 2361183241434822606848u128 into r2068;\n    ternary r2065 r2068 r2061 into r2069;\n    gte r2067 170141183460469231731687303715884105728u128 into r2070;\n    add.w r2067 r2067 into r2071;\n    gte r2071 r1611 into r2072;\n    or r2070 r2072 into r2073;\n    sub.w r2071 r1611 into r2074;\n    ternary r2073 r2074 r2071 into r2075;\n    add r2069 1180591620717411303424u128 into r2076;\n    ternary r2073 r2076 r2069 into r2077;\n    gte r2075 170141183460469231731687303715884105728u128 into r2078;\n    add.w r2075 r2075 into r2079;\n    gte r2079 r1611 into r2080;\n    or r2078 r2080 into r2081;\n    sub.w r2079 r1611 into r2082;\n    ternary r2081 r2082 r2079 into r2083;\n    add r2077 590295810358705651712u128 into r2084;\n    ternary r2081 r2084 r2077 into r2085;\n    gte r2083 170141183460469231731687303715884105728u128 into r2086;\n    add.w r2083 r2083 into r2087;\n    gte r2087 r1611 into r2088;\n    or r2086 r2088 into r2089;\n    sub.w r2087 r1611 into r2090;\n    ternary r2089 r2090 r2087 into r2091;\n    add r2085 295147905179352825856u128 into r2092;\n    ternary r2089 r2092 r2085 into r2093;\n    gte r2091 170141183460469231731687303715884105728u128 into r2094;\n    add.w r2091 r2091 into r2095;\n    gte r2095 r1611 into r2096;\n    or r2094 r2096 into r2097;\n    sub.w r2095 r1611 into r2098;\n    ternary r2097 r2098 r2095 into r2099;\n    add r2093 147573952589676412928u128 into r2100;\n    ternary r2097 r2100 r2093 into r2101;\n    gte r2099 170141183460469231731687303715884105728u128 into r2102;\n    add.w r2099 r2099 into r2103;\n    gte r2103 r1611 into r2104;\n    or r2102 r2104 into r2105;\n    sub.w r2103 r1611 into r2106;\n    ternary r2105 r2106 r2103 into r2107;\n    add r2101 73786976294838206464u128 into r2108;\n    ternary r2105 r2108 r2101 into r2109;\n    gte r2107 170141183460469231731687303715884105728u128 into r2110;\n    add.w r2107 r2107 into r2111;\n    gte r2111 r1611 into r2112;\n    or r2110 r2112 into r2113;\n    sub.w r2111 r1611 into r2114;\n    ternary r2113 r2114 r2111 into r2115;\n    add r2109 36893488147419103232u128 into r2116;\n    ternary r2113 r2116 r2109 into r2117;\n    gte r2115 170141183460469231731687303715884105728u128 into r2118;\n    add.w r2115 r2115 into r2119;\n    gte r2119 r1611 into r2120;\n    or r2118 r2120 into r2121;\n    sub.w r2119 r1611 into r2122;\n    ternary r2121 r2122 r2119 into r2123;\n    add r2117 18446744073709551616u128 into r2124;\n    ternary r2121 r2124 r2117 into r2125;\n    gte r2123 170141183460469231731687303715884105728u128 into r2126;\n    add.w r2123 r2123 into r2127;\n    gte r2127 r1611 into r2128;\n    or r2126 r2128 into r2129;\n    sub.w r2127 r1611 into r2130;\n    ternary r2129 r2130 r2127 into r2131;\n    add r2125 9223372036854775808u128 into r2132;\n    ternary r2129 r2132 r2125 into r2133;\n    gte r2131 170141183460469231731687303715884105728u128 into r2134;\n    add.w r2131 r2131 into r2135;\n    gte r2135 r1611 into r2136;\n    or r2134 r2136 into r2137;\n    sub.w r2135 r1611 into r2138;\n    ternary r2137 r2138 r2135 into r2139;\n    add r2133 4611686018427387904u128 into r2140;\n    ternary r2137 r2140 r2133 into r2141;\n    gte r2139 170141183460469231731687303715884105728u128 into r2142;\n    add.w r2139 r2139 into r2143;\n    gte r2143 r1611 into r2144;\n    or r2142 r2144 into r2145;\n    sub.w r2143 r1611 into r2146;\n    ternary r2145 r2146 r2143 into r2147;\n    add r2141 2305843009213693952u128 into r2148;\n    ternary r2145 r2148 r2141 into r2149;\n    gte r2147 170141183460469231731687303715884105728u128 into r2150;\n    add.w r2147 r2147 into r2151;\n    gte r2151 r1611 into r2152;\n    or r2150 r2152 into r2153;\n    sub.w r2151 r1611 into r2154;\n    ternary r2153 r2154 r2151 into r2155;\n    add r2149 1152921504606846976u128 into r2156;\n    ternary r2153 r2156 r2149 into r2157;\n    gte r2155 170141183460469231731687303715884105728u128 into r2158;\n    add.w r2155 r2155 into r2159;\n    gte r2159 r1611 into r2160;\n    or r2158 r2160 into r2161;\n    sub.w r2159 r1611 into r2162;\n    ternary r2161 r2162 r2159 into r2163;\n    add r2157 576460752303423488u128 into r2164;\n    ternary r2161 r2164 r2157 into r2165;\n    gte r2163 170141183460469231731687303715884105728u128 into r2166;\n    add.w r2163 r2163 into r2167;\n    gte r2167 r1611 into r2168;\n    or r2166 r2168 into r2169;\n    sub.w r2167 r1611 into r2170;\n    ternary r2169 r2170 r2167 into r2171;\n    add r2165 288230376151711744u128 into r2172;\n    ternary r2169 r2172 r2165 into r2173;\n    gte r2171 170141183460469231731687303715884105728u128 into r2174;\n    add.w r2171 r2171 into r2175;\n    gte r2175 r1611 into r2176;\n    or r2174 r2176 into r2177;\n    sub.w r2175 r1611 into r2178;\n    ternary r2177 r2178 r2175 into r2179;\n    add r2173 144115188075855872u128 into r2180;\n    ternary r2177 r2180 r2173 into r2181;\n    gte r2179 170141183460469231731687303715884105728u128 into r2182;\n    add.w r2179 r2179 into r2183;\n    gte r2183 r1611 into r2184;\n    or r2182 r2184 into r2185;\n    sub.w r2183 r1611 into r2186;\n    ternary r2185 r2186 r2183 into r2187;\n    add r2181 72057594037927936u128 into r2188;\n    ternary r2185 r2188 r2181 into r2189;\n    gte r2187 170141183460469231731687303715884105728u128 into r2190;\n    add.w r2187 r2187 into r2191;\n    gte r2191 r1611 into r2192;\n    or r2190 r2192 into r2193;\n    sub.w r2191 r1611 into r2194;\n    ternary r2193 r2194 r2191 into r2195;\n    add r2189 36028797018963968u128 into r2196;\n    ternary r2193 r2196 r2189 into r2197;\n    gte r2195 170141183460469231731687303715884105728u128 into r2198;\n    add.w r2195 r2195 into r2199;\n    gte r2199 r1611 into r2200;\n    or r2198 r2200 into r2201;\n    sub.w r2199 r1611 into r2202;\n    ternary r2201 r2202 r2199 into r2203;\n    add r2197 18014398509481984u128 into r2204;\n    ternary r2201 r2204 r2197 into r2205;\n    gte r2203 170141183460469231731687303715884105728u128 into r2206;\n    add.w r2203 r2203 into r2207;\n    gte r2207 r1611 into r2208;\n    or r2206 r2208 into r2209;\n    sub.w r2207 r1611 into r2210;\n    ternary r2209 r2210 r2207 into r2211;\n    add r2205 9007199254740992u128 into r2212;\n    ternary r2209 r2212 r2205 into r2213;\n    gte r2211 170141183460469231731687303715884105728u128 into r2214;\n    add.w r2211 r2211 into r2215;\n    gte r2215 r1611 into r2216;\n    or r2214 r2216 into r2217;\n    sub.w r2215 r1611 into r2218;\n    ternary r2217 r2218 r2215 into r2219;\n    add r2213 4503599627370496u128 into r2220;\n    ternary r2217 r2220 r2213 into r2221;\n    gte r2219 170141183460469231731687303715884105728u128 into r2222;\n    add.w r2219 r2219 into r2223;\n    gte r2223 r1611 into r2224;\n    or r2222 r2224 into r2225;\n    sub.w r2223 r1611 into r2226;\n    ternary r2225 r2226 r2223 into r2227;\n    add r2221 2251799813685248u128 into r2228;\n    ternary r2225 r2228 r2221 into r2229;\n    gte r2227 170141183460469231731687303715884105728u128 into r2230;\n    add.w r2227 r2227 into r2231;\n    gte r2231 r1611 into r2232;\n    or r2230 r2232 into r2233;\n    sub.w r2231 r1611 into r2234;\n    ternary r2233 r2234 r2231 into r2235;\n    add r2229 1125899906842624u128 into r2236;\n    ternary r2233 r2236 r2229 into r2237;\n    gte r2235 170141183460469231731687303715884105728u128 into r2238;\n    add.w r2235 r2235 into r2239;\n    gte r2239 r1611 into r2240;\n    or r2238 r2240 into r2241;\n    sub.w r2239 r1611 into r2242;\n    ternary r2241 r2242 r2239 into r2243;\n    add r2237 562949953421312u128 into r2244;\n    ternary r2241 r2244 r2237 into r2245;\n    gte r2243 170141183460469231731687303715884105728u128 into r2246;\n    add.w r2243 r2243 into r2247;\n    gte r2247 r1611 into r2248;\n    or r2246 r2248 into r2249;\n    sub.w r2247 r1611 into r2250;\n    ternary r2249 r2250 r2247 into r2251;\n    add r2245 281474976710656u128 into r2252;\n    ternary r2249 r2252 r2245 into r2253;\n    gte r2251 170141183460469231731687303715884105728u128 into r2254;\n    add.w r2251 r2251 into r2255;\n    gte r2255 r1611 into r2256;\n    or r2254 r2256 into r2257;\n    sub.w r2255 r1611 into r2258;\n    ternary r2257 r2258 r2255 into r2259;\n    add r2253 140737488355328u128 into r2260;\n    ternary r2257 r2260 r2253 into r2261;\n    gte r2259 170141183460469231731687303715884105728u128 into r2262;\n    add.w r2259 r2259 into r2263;\n    gte r2263 r1611 into r2264;\n    or r2262 r2264 into r2265;\n    sub.w r2263 r1611 into r2266;\n    ternary r2265 r2266 r2263 into r2267;\n    add r2261 70368744177664u128 into r2268;\n    ternary r2265 r2268 r2261 into r2269;\n    gte r2267 170141183460469231731687303715884105728u128 into r2270;\n    add.w r2267 r2267 into r2271;\n    gte r2271 r1611 into r2272;\n    or r2270 r2272 into r2273;\n    sub.w r2271 r1611 into r2274;\n    ternary r2273 r2274 r2271 into r2275;\n    add r2269 35184372088832u128 into r2276;\n    ternary r2273 r2276 r2269 into r2277;\n    gte r2275 170141183460469231731687303715884105728u128 into r2278;\n    add.w r2275 r2275 into r2279;\n    gte r2279 r1611 into r2280;\n    or r2278 r2280 into r2281;\n    sub.w r2279 r1611 into r2282;\n    ternary r2281 r2282 r2279 into r2283;\n    add r2277 17592186044416u128 into r2284;\n    ternary r2281 r2284 r2277 into r2285;\n    gte r2283 170141183460469231731687303715884105728u128 into r2286;\n    add.w r2283 r2283 into r2287;\n    gte r2287 r1611 into r2288;\n    or r2286 r2288 into r2289;\n    sub.w r2287 r1611 into r2290;\n    ternary r2289 r2290 r2287 into r2291;\n    add r2285 8796093022208u128 into r2292;\n    ternary r2289 r2292 r2285 into r2293;\n    gte r2291 170141183460469231731687303715884105728u128 into r2294;\n    add.w r2291 r2291 into r2295;\n    gte r2295 r1611 into r2296;\n    or r2294 r2296 into r2297;\n    sub.w r2295 r1611 into r2298;\n    ternary r2297 r2298 r2295 into r2299;\n    add r2293 4398046511104u128 into r2300;\n    ternary r2297 r2300 r2293 into r2301;\n    gte r2299 170141183460469231731687303715884105728u128 into r2302;\n    add.w r2299 r2299 into r2303;\n    gte r2303 r1611 into r2304;\n    or r2302 r2304 into r2305;\n    sub.w r2303 r1611 into r2306;\n    ternary r2305 r2306 r2303 into r2307;\n    add r2301 2199023255552u128 into r2308;\n    ternary r2305 r2308 r2301 into r2309;\n    gte r2307 170141183460469231731687303715884105728u128 into r2310;\n    add.w r2307 r2307 into r2311;\n    gte r2311 r1611 into r2312;\n    or r2310 r2312 into r2313;\n    sub.w r2311 r1611 into r2314;\n    ternary r2313 r2314 r2311 into r2315;\n    add r2309 1099511627776u128 into r2316;\n    ternary r2313 r2316 r2309 into r2317;\n    gte r2315 170141183460469231731687303715884105728u128 into r2318;\n    add.w r2315 r2315 into r2319;\n    gte r2319 r1611 into r2320;\n    or r2318 r2320 into r2321;\n    sub.w r2319 r1611 into r2322;\n    ternary r2321 r2322 r2319 into r2323;\n    add r2317 549755813888u128 into r2324;\n    ternary r2321 r2324 r2317 into r2325;\n    gte r2323 170141183460469231731687303715884105728u128 into r2326;\n    add.w r2323 r2323 into r2327;\n    gte r2327 r1611 into r2328;\n    or r2326 r2328 into r2329;\n    sub.w r2327 r1611 into r2330;\n    ternary r2329 r2330 r2327 into r2331;\n    add r2325 274877906944u128 into r2332;\n    ternary r2329 r2332 r2325 into r2333;\n    gte r2331 170141183460469231731687303715884105728u128 into r2334;\n    add.w r2331 r2331 into r2335;\n    gte r2335 r1611 into r2336;\n    or r2334 r2336 into r2337;\n    sub.w r2335 r1611 into r2338;\n    ternary r2337 r2338 r2335 into r2339;\n    add r2333 137438953472u128 into r2340;\n    ternary r2337 r2340 r2333 into r2341;\n    gte r2339 170141183460469231731687303715884105728u128 into r2342;\n    add.w r2339 r2339 into r2343;\n    gte r2343 r1611 into r2344;\n    or r2342 r2344 into r2345;\n    sub.w r2343 r1611 into r2346;\n    ternary r2345 r2346 r2343 into r2347;\n    add r2341 68719476736u128 into r2348;\n    ternary r2345 r2348 r2341 into r2349;\n    gte r2347 170141183460469231731687303715884105728u128 into r2350;\n    add.w r2347 r2347 into r2351;\n    gte r2351 r1611 into r2352;\n    or r2350 r2352 into r2353;\n    sub.w r2351 r1611 into r2354;\n    ternary r2353 r2354 r2351 into r2355;\n    add r2349 34359738368u128 into r2356;\n    ternary r2353 r2356 r2349 into r2357;\n    gte r2355 170141183460469231731687303715884105728u128 into r2358;\n    add.w r2355 r2355 into r2359;\n    gte r2359 r1611 into r2360;\n    or r2358 r2360 into r2361;\n    sub.w r2359 r1611 into r2362;\n    ternary r2361 r2362 r2359 into r2363;\n    add r2357 17179869184u128 into r2364;\n    ternary r2361 r2364 r2357 into r2365;\n    gte r2363 170141183460469231731687303715884105728u128 into r2366;\n    add.w r2363 r2363 into r2367;\n    gte r2367 r1611 into r2368;\n    or r2366 r2368 into r2369;\n    sub.w r2367 r1611 into r2370;\n    ternary r2369 r2370 r2367 into r2371;\n    add r2365 8589934592u128 into r2372;\n    ternary r2369 r2372 r2365 into r2373;\n    gte r2371 170141183460469231731687303715884105728u128 into r2374;\n    add.w r2371 r2371 into r2375;\n    gte r2375 r1611 into r2376;\n    or r2374 r2376 into r2377;\n    sub.w r2375 r1611 into r2378;\n    ternary r2377 r2378 r2375 into r2379;\n    add r2373 4294967296u128 into r2380;\n    ternary r2377 r2380 r2373 into r2381;\n    gte r2379 170141183460469231731687303715884105728u128 into r2382;\n    add.w r2379 r2379 into r2383;\n    gte r2383 r1611 into r2384;\n    or r2382 r2384 into r2385;\n    sub.w r2383 r1611 into r2386;\n    ternary r2385 r2386 r2383 into r2387;\n    add r2381 2147483648u128 into r2388;\n    ternary r2385 r2388 r2381 into r2389;\n    gte r2387 170141183460469231731687303715884105728u128 into r2390;\n    add.w r2387 r2387 into r2391;\n    gte r2391 r1611 into r2392;\n    or r2390 r2392 into r2393;\n    sub.w r2391 r1611 into r2394;\n    ternary r2393 r2394 r2391 into r2395;\n    add r2389 1073741824u128 into r2396;\n    ternary r2393 r2396 r2389 into r2397;\n    gte r2395 170141183460469231731687303715884105728u128 into r2398;\n    add.w r2395 r2395 into r2399;\n    gte r2399 r1611 into r2400;\n    or r2398 r2400 into r2401;\n    sub.w r2399 r1611 into r2402;\n    ternary r2401 r2402 r2399 into r2403;\n    add r2397 536870912u128 into r2404;\n    ternary r2401 r2404 r2397 into r2405;\n    gte r2403 170141183460469231731687303715884105728u128 into r2406;\n    add.w r2403 r2403 into r2407;\n    gte r2407 r1611 into r2408;\n    or r2406 r2408 into r2409;\n    sub.w r2407 r1611 into r2410;\n    ternary r2409 r2410 r2407 into r2411;\n    add r2405 268435456u128 into r2412;\n    ternary r2409 r2412 r2405 into r2413;\n    gte r2411 170141183460469231731687303715884105728u128 into r2414;\n    add.w r2411 r2411 into r2415;\n    gte r2415 r1611 into r2416;\n    or r2414 r2416 into r2417;\n    sub.w r2415 r1611 into r2418;\n    ternary r2417 r2418 r2415 into r2419;\n    add r2413 134217728u128 into r2420;\n    ternary r2417 r2420 r2413 into r2421;\n    gte r2419 170141183460469231731687303715884105728u128 into r2422;\n    add.w r2419 r2419 into r2423;\n    gte r2423 r1611 into r2424;\n    or r2422 r2424 into r2425;\n    sub.w r2423 r1611 into r2426;\n    ternary r2425 r2426 r2423 into r2427;\n    add r2421 67108864u128 into r2428;\n    ternary r2425 r2428 r2421 into r2429;\n    gte r2427 170141183460469231731687303715884105728u128 into r2430;\n    add.w r2427 r2427 into r2431;\n    gte r2431 r1611 into r2432;\n    or r2430 r2432 into r2433;\n    sub.w r2431 r1611 into r2434;\n    ternary r2433 r2434 r2431 into r2435;\n    add r2429 33554432u128 into r2436;\n    ternary r2433 r2436 r2429 into r2437;\n    gte r2435 170141183460469231731687303715884105728u128 into r2438;\n    add.w r2435 r2435 into r2439;\n    gte r2439 r1611 into r2440;\n    or r2438 r2440 into r2441;\n    sub.w r2439 r1611 into r2442;\n    ternary r2441 r2442 r2439 into r2443;\n    add r2437 16777216u128 into r2444;\n    ternary r2441 r2444 r2437 into r2445;\n    gte r2443 170141183460469231731687303715884105728u128 into r2446;\n    add.w r2443 r2443 into r2447;\n    gte r2447 r1611 into r2448;\n    or r2446 r2448 into r2449;\n    sub.w r2447 r1611 into r2450;\n    ternary r2449 r2450 r2447 into r2451;\n    add r2445 8388608u128 into r2452;\n    ternary r2449 r2452 r2445 into r2453;\n    gte r2451 170141183460469231731687303715884105728u128 into r2454;\n    add.w r2451 r2451 into r2455;\n    gte r2455 r1611 into r2456;\n    or r2454 r2456 into r2457;\n    sub.w r2455 r1611 into r2458;\n    ternary r2457 r2458 r2455 into r2459;\n    add r2453 4194304u128 into r2460;\n    ternary r2457 r2460 r2453 into r2461;\n    gte r2459 170141183460469231731687303715884105728u128 into r2462;\n    add.w r2459 r2459 into r2463;\n    gte r2463 r1611 into r2464;\n    or r2462 r2464 into r2465;\n    sub.w r2463 r1611 into r2466;\n    ternary r2465 r2466 r2463 into r2467;\n    add r2461 2097152u128 into r2468;\n    ternary r2465 r2468 r2461 into r2469;\n    gte r2467 170141183460469231731687303715884105728u128 into r2470;\n    add.w r2467 r2467 into r2471;\n    gte r2471 r1611 into r2472;\n    or r2470 r2472 into r2473;\n    sub.w r2471 r1611 into r2474;\n    ternary r2473 r2474 r2471 into r2475;\n    add r2469 1048576u128 into r2476;\n    ternary r2473 r2476 r2469 into r2477;\n    gte r2475 170141183460469231731687303715884105728u128 into r2478;\n    add.w r2475 r2475 into r2479;\n    gte r2479 r1611 into r2480;\n    or r2478 r2480 into r2481;\n    sub.w r2479 r1611 into r2482;\n    ternary r2481 r2482 r2479 into r2483;\n    add r2477 524288u128 into r2484;\n    ternary r2481 r2484 r2477 into r2485;\n    gte r2483 170141183460469231731687303715884105728u128 into r2486;\n    add.w r2483 r2483 into r2487;\n    gte r2487 r1611 into r2488;\n    or r2486 r2488 into r2489;\n    sub.w r2487 r1611 into r2490;\n    ternary r2489 r2490 r2487 into r2491;\n    add r2485 262144u128 into r2492;\n    ternary r2489 r2492 r2485 into r2493;\n    gte r2491 170141183460469231731687303715884105728u128 into r2494;\n    add.w r2491 r2491 into r2495;\n    gte r2495 r1611 into r2496;\n    or r2494 r2496 into r2497;\n    sub.w r2495 r1611 into r2498;\n    ternary r2497 r2498 r2495 into r2499;\n    add r2493 131072u128 into r2500;\n    ternary r2497 r2500 r2493 into r2501;\n    gte r2499 170141183460469231731687303715884105728u128 into r2502;\n    add.w r2499 r2499 into r2503;\n    gte r2503 r1611 into r2504;\n    or r2502 r2504 into r2505;\n    sub.w r2503 r1611 into r2506;\n    ternary r2505 r2506 r2503 into r2507;\n    add r2501 65536u128 into r2508;\n    ternary r2505 r2508 r2501 into r2509;\n    gte r2507 170141183460469231731687303715884105728u128 into r2510;\n    add.w r2507 r2507 into r2511;\n    gte r2511 r1611 into r2512;\n    or r2510 r2512 into r2513;\n    sub.w r2511 r1611 into r2514;\n    ternary r2513 r2514 r2511 into r2515;\n    add r2509 32768u128 into r2516;\n    ternary r2513 r2516 r2509 into r2517;\n    gte r2515 170141183460469231731687303715884105728u128 into r2518;\n    add.w r2515 r2515 into r2519;\n    gte r2519 r1611 into r2520;\n    or r2518 r2520 into r2521;\n    sub.w r2519 r1611 into r2522;\n    ternary r2521 r2522 r2519 into r2523;\n    add r2517 16384u128 into r2524;\n    ternary r2521 r2524 r2517 into r2525;\n    gte r2523 170141183460469231731687303715884105728u128 into r2526;\n    add.w r2523 r2523 into r2527;\n    gte r2527 r1611 into r2528;\n    or r2526 r2528 into r2529;\n    sub.w r2527 r1611 into r2530;\n    ternary r2529 r2530 r2527 into r2531;\n    add r2525 8192u128 into r2532;\n    ternary r2529 r2532 r2525 into r2533;\n    gte r2531 170141183460469231731687303715884105728u128 into r2534;\n    add.w r2531 r2531 into r2535;\n    gte r2535 r1611 into r2536;\n    or r2534 r2536 into r2537;\n    sub.w r2535 r1611 into r2538;\n    ternary r2537 r2538 r2535 into r2539;\n    add r2533 4096u128 into r2540;\n    ternary r2537 r2540 r2533 into r2541;\n    gte r2539 170141183460469231731687303715884105728u128 into r2542;\n    add.w r2539 r2539 into r2543;\n    gte r2543 r1611 into r2544;\n    or r2542 r2544 into r2545;\n    sub.w r2543 r1611 into r2546;\n    ternary r2545 r2546 r2543 into r2547;\n    add r2541 2048u128 into r2548;\n    ternary r2545 r2548 r2541 into r2549;\n    gte r2547 170141183460469231731687303715884105728u128 into r2550;\n    add.w r2547 r2547 into r2551;\n    gte r2551 r1611 into r2552;\n    or r2550 r2552 into r2553;\n    sub.w r2551 r1611 into r2554;\n    ternary r2553 r2554 r2551 into r2555;\n    add r2549 1024u128 into r2556;\n    ternary r2553 r2556 r2549 into r2557;\n    gte r2555 170141183460469231731687303715884105728u128 into r2558;\n    add.w r2555 r2555 into r2559;\n    gte r2559 r1611 into r2560;\n    or r2558 r2560 into r2561;\n    sub.w r2559 r1611 into r2562;\n    ternary r2561 r2562 r2559 into r2563;\n    add r2557 512u128 into r2564;\n    ternary r2561 r2564 r2557 into r2565;\n    gte r2563 170141183460469231731687303715884105728u128 into r2566;\n    add.w r2563 r2563 into r2567;\n    gte r2567 r1611 into r2568;\n    or r2566 r2568 into r2569;\n    sub.w r2567 r1611 into r2570;\n    ternary r2569 r2570 r2567 into r2571;\n    add r2565 256u128 into r2572;\n    ternary r2569 r2572 r2565 into r2573;\n    gte r2571 170141183460469231731687303715884105728u128 into r2574;\n    add.w r2571 r2571 into r2575;\n    gte r2575 r1611 into r2576;\n    or r2574 r2576 into r2577;\n    sub.w r2575 r1611 into r2578;\n    ternary r2577 r2578 r2575 into r2579;\n    add r2573 128u128 into r2580;\n    ternary r2577 r2580 r2573 into r2581;\n    gte r2579 170141183460469231731687303715884105728u128 into r2582;\n    add.w r2579 r2579 into r2583;\n    gte r2583 r1611 into r2584;\n    or r2582 r2584 into r2585;\n    sub.w r2583 r1611 into r2586;\n    ternary r2585 r2586 r2583 into r2587;\n    add r2581 64u128 into r2588;\n    ternary r2585 r2588 r2581 into r2589;\n    gte r2587 170141183460469231731687303715884105728u128 into r2590;\n    add.w r2587 r2587 into r2591;\n    gte r2591 r1611 into r2592;\n    or r2590 r2592 into r2593;\n    sub.w r2591 r1611 into r2594;\n    ternary r2593 r2594 r2591 into r2595;\n    add r2589 32u128 into r2596;\n    ternary r2593 r2596 r2589 into r2597;\n    gte r2595 170141183460469231731687303715884105728u128 into r2598;\n    add.w r2595 r2595 into r2599;\n    gte r2599 r1611 into r2600;\n    or r2598 r2600 into r2601;\n    sub.w r2599 r1611 into r2602;\n    ternary r2601 r2602 r2599 into r2603;\n    add r2597 16u128 into r2604;\n    ternary r2601 r2604 r2597 into r2605;\n    gte r2603 170141183460469231731687303715884105728u128 into r2606;\n    add.w r2603 r2603 into r2607;\n    gte r2607 r1611 into r2608;\n    or r2606 r2608 into r2609;\n    sub.w r2607 r1611 into r2610;\n    ternary r2609 r2610 r2607 into r2611;\n    add r2605 8u128 into r2612;\n    ternary r2609 r2612 r2605 into r2613;\n    gte r2611 170141183460469231731687303715884105728u128 into r2614;\n    add.w r2611 r2611 into r2615;\n    gte r2615 r1611 into r2616;\n    or r2614 r2616 into r2617;\n    sub.w r2615 r1611 into r2618;\n    ternary r2617 r2618 r2615 into r2619;\n    add r2613 4u128 into r2620;\n    ternary r2617 r2620 r2613 into r2621;\n    gte r2619 170141183460469231731687303715884105728u128 into r2622;\n    add.w r2619 r2619 into r2623;\n    gte r2623 r1611 into r2624;\n    or r2622 r2624 into r2625;\n    sub.w r2623 r1611 into r2626;\n    ternary r2625 r2626 r2623 into r2627;\n    add r2621 2u128 into r2628;\n    ternary r2625 r2628 r2621 into r2629;\n    gte r2627 170141183460469231731687303715884105728u128 into r2630;\n    add.w r2627 r2627 into r2631;\n    gte r2631 r1611 into r2632;\n    or r2630 r2632 into r2633;\n    add r2629 1u128 into r2634;\n    ternary r2633 r2634 r2629 into r2635;\n    ternary r1610 r1612 0u128 into r2636;\n    ternary r1610 r2635 0u128 into r2637;\n    cast r2636 r2637 into r2638 as U256__8JquwLopp8;\n    add.w r4.fg.lo r2638.lo into r2639;\n    lt r2639 r4.fg.lo into r2640;\n    ternary r2640 1u128 0u128 into r2641;\n    add.w r4.fg.hi r2638.hi into r2642;\n    add.w r2642 r2641 into r2643;\n    cast r2643 r2639 into r2644 as U256__8JquwLopp8;\n    is.eq r1595.hi r2.hi into r2645;\n    is.eq r1595.lo r2.lo into r2646;\n    and r2645 r2646 into r2647;\n    and r4.crossed r2647 into r2648;\n    ternary r0.z r2644.hi r0.slot_fg0.hi into r2649;\n    ternary r0.z r2644.lo r0.slot_fg0.lo into r2650;\n    cast r2649 r2650 into r2651 as U256__8JquwLopp8;\n    ternary r0.z r0.slot_fg1.hi r2644.hi into r2652;\n    ternary r0.z r0.slot_fg1.lo r2644.lo into r2653;\n    cast r2652 r2653 into r2654 as U256__8JquwLopp8;\n    lt r2651.lo r3.fee_growth_outside0_x_128.lo into r2655;\n    ternary r2655 1u128 0u128 into r2656;\n    sub.w r2651.lo r3.fee_growth_outside0_x_128.lo into r2657;\n    sub.w r2651.hi r3.fee_growth_outside0_x_128.hi into r2658;\n    sub.w r2658 r2656 into r2659;\n    cast r2659 r2657 into r2660 as U256__8JquwLopp8;\n    lt r2654.lo r3.fee_growth_outside1_x_128.lo into r2661;\n    ternary r2661 1u128 0u128 into r2662;\n    sub.w r2654.lo r3.fee_growth_outside1_x_128.lo into r2663;\n    sub.w r2654.hi r3.fee_growth_outside1_x_128.hi into r2664;\n    sub.w r2664 r2662 into r2665;\n    cast r2665 r2663 into r2666 as U256__8JquwLopp8;\n    ternary r2648 r2660.hi r3.fee_growth_outside0_x_128.hi into r2667;\n    ternary r2648 r2660.lo r3.fee_growth_outside0_x_128.lo into r2668;\n    cast r2667 r2668 into r2669 as U256__8JquwLopp8;\n    ternary r2648 r2666.hi r3.fee_growth_outside1_x_128.hi into r2670;\n    ternary r2648 r2666.lo r3.fee_growth_outside1_x_128.lo into r2671;\n    cast r2670 r2671 into r2672 as U256__8JquwLopp8;\n    ternary r2648 r3.pool r3.pool into r2673;\n    ternary r2648 r3.liquidity_net r3.liquidity_net into r2674;\n    ternary r2648 r3.liquidity_gross r3.liquidity_gross into r2675;\n    ternary r2648 r3.tick r3.tick into r2676;\n    ternary r2648 r3.prev r3.prev into r2677;\n    ternary r2648 r3.next r3.next into r2678;\n    cast r2673 r2674 r2675 r2676 r2669 r2672 r2677 r2678 into r2679 as Tick;\n    sub 0i128 r3.liquidity_net into r2680;\n    ternary r0.z r2680 r3.liquidity_net into r2681;\n    ternary r2648 r2681 0i128 into r2682;\n    sub 0i128 r2682 into r2683;\n    gt r2682 0i128 into r2684;\n    ternary r2684 r2682 0i128 into r2685;\n    gt r2683 0i128 into r2686;\n    ternary r2686 r2683 0i128 into r2687;\n    cast r2685 into r2688 as u128;\n    cast r2687 into r2689 as u128;\n    gte r4.liq r2689 into r2690;\n    assert.eq r2690 true;\n    sub r4.liq r2689 into r2691;\n    add r4.liq r2688 into r2692;\n    lt r2682 0i128 into r2693;\n    ternary r2693 r2691 r2692 into r2694;\n    ternary r2648 r2694 r4.liq into r2695;\n    sub r1 1i32 into r2696;\n    ternary r0.z r2696 r1 into r2697;\n    ternary r2648 r2697 r4.tk into r2698;\n    ternary r0.z r3.prev r1 into r2699;\n    ternary r2648 r2699 r4.nb into r2700;\n    ternary r0.z r1 r3.next into r2701;\n    ternary r2648 r2701 r4.na into r2702;\n    cast r1595 r1608 r1609 r2644 r2695 r2698 r2648 r1607 r2700 r2702 into r2703 as SwapIterState;\n    output r2703 as SwapIterState.public;\n    output r2679 as Tick.public;\n    output r1602 as u128.public;\n\nview view_bounded_partial_v2:\n    input r0 as U256__8JquwLopp8.public;\n    input r1 as u128.public;\n    input r2 as u128.public;\n    input r3 as u128.public;\n    input r4 as U256__8JquwLopp8.public;\n    input r5 as u128.public;\n    input r6 as U256__8JquwLopp8.public;\n    input r7 as U256__8JquwLopp8.public;\n    input r8 as u32.public;\n    input r9 as u8.public;\n    input r10 as boolean.public;\n    lt r6.hi r7.hi into r11;\n    gt r6.hi r7.hi into r12;\n    lt r6.lo r7.lo into r13;\n    ternary r12 false r13 into r14;\n    ternary r11 true r14 into r15;\n    ternary r15 r7.hi r6.hi into r16;\n    ternary r15 r7.lo r6.lo into r17;\n    cast r16 r17 into r18 as U256__8JquwLopp8;\n    lt r7.hi r6.hi into r19;\n    gt r7.hi r6.hi into r20;\n    lt r7.lo r6.lo into r21;\n    ternary r20 false r21 into r22;\n    ternary r19 true r22 into r23;\n    ternary r23 r7.hi r6.hi into r24;\n    ternary r23 r7.lo r6.lo into r25;\n    cast r24 r25 into r26 as U256__8JquwLopp8;\n    ternary r10 r18.hi r26.hi into r27;\n    ternary r10 r18.lo r26.lo into r28;\n    cast r27 r28 into r29 as U256__8JquwLopp8;\n    is.eq r29.hi r6.hi into r30;\n    is.eq r29.lo r6.lo into r31;\n    and r30 r31 into r32;\n    lt r29.hi r0.hi into r33;\n    gt r29.hi r0.hi into r34;\n    lt r29.lo r0.lo into r35;\n    ternary r34 false r35 into r36;\n    ternary r33 true r36 into r37;\n    lt r0.hi r29.hi into r38;\n    gt r0.hi r29.hi into r39;\n    lt r0.lo r29.lo into r40;\n    ternary r39 false r40 into r41;\n    ternary r38 true r41 into r42;\n    ternary r10 r37 r42 into r43;\n    gt r2 0u128 into r44;\n    gt r1 0u128 into r45;\n    and r44 r45 into r46;\n    and r46 r43 into r47;\n    cast r8 into r48 as u128;\n    sub 1000000u128 r48 into r49;\n    and r2 18446744073709551615u128 into r50;\n    shr r2 64u8 into r51;\n    and r49 18446744073709551615u128 into r52;\n    shr r49 64u8 into r53;\n    mul r50 r52 into r54;\n    mul r50 r53 into r55;\n    mul r51 r52 into r56;\n    mul r51 r53 into r57;\n    and r54 18446744073709551615u128 into r58;\n    shr r54 64u8 into r59;\n    and r55 18446744073709551615u128 into r60;\n    add r59 r60 into r61;\n    and r56 18446744073709551615u128 into r62;\n    add r61 r62 into r63;\n    and r63 18446744073709551615u128 into r64;\n    shr r63 64u8 into r65;\n    shr r55 64u8 into r66;\n    shr r56 64u8 into r67;\n    add r66 r67 into r68;\n    and r57 18446744073709551615u128 into r69;\n    add r68 r69 into r70;\n    add r70 r65 into r71;\n    and r71 18446744073709551615u128 into r72;\n    shr r71 64u8 into r73;\n    shr r57 64u8 into r74;\n    add r74 r73 into r75;\n    shl r75 64u8 into r76;\n    add r76 r72 into r77;\n    shl r64 64u8 into r78;\n    add r78 r58 into r79;\n    lt r77 1000000u128 into r80;\n    assert.eq r80 true;\n    shr r79 96u8 into r81;\n    and r81 4294967295u128 into r82;\n    shl r77 32u8 into r83;\n    add r83 r82 into r84;\n    div r84 1000000u128 into r85;\n    rem r84 1000000u128 into r86;\n    shr r79 64u8 into r87;\n    and r87 4294967295u128 into r88;\n    shl r86 32u8 into r89;\n    add r89 r88 into r90;\n    shl r85 32u8 into r91;\n    div r90 1000000u128 into r92;\n    add r91 r92 into r93;\n    rem r90 1000000u128 into r94;\n    shr r79 32u8 into r95;\n    and r95 4294967295u128 into r96;\n    shl r94 32u8 into r97;\n    add r97 r96 into r98;\n    shl r93 32u8 into r99;\n    div r98 1000000u128 into r100;\n    add r99 r100 into r101;\n    rem r98 1000000u128 into r102;\n    shr r79 0u8 into r103;\n    and r103 4294967295u128 into r104;\n    shl r102 32u8 into r105;\n    add r105 r104 into r106;\n    shl r101 32u8 into r107;\n    div r106 1000000u128 into r108;\n    add r107 r108 into r109;\n    rem r106 1000000u128 into r110;\n    lt r0.hi r29.hi into r111;\n    gt r0.hi r29.hi into r112;\n    lt r0.lo r29.lo into r113;\n    ternary r112 false r113 into r114;\n    ternary r111 true r114 into r115;\n    ternary r115 r0.hi r29.hi into r116;\n    ternary r115 r0.lo r29.lo into r117;\n    cast r116 r117 into r118 as U256__8JquwLopp8;\n    lt r0.hi r29.hi into r119;\n    gt r0.hi r29.hi into r120;\n    lt r0.lo r29.lo into r121;\n    ternary r120 false r121 into r122;\n    ternary r119 true r122 into r123;\n    ternary r123 r29.hi r0.hi into r124;\n    ternary r123 r29.lo r0.lo into r125;\n    cast r124 r125 into r126 as U256__8JquwLopp8;\n    lt r126.lo r118.lo into r127;\n    ternary r127 1u128 0u128 into r128;\n    sub.w r126.lo r118.lo into r129;\n    sub.w r126.hi r118.hi into r130;\n    sub.w r130 r128 into r131;\n    cast r131 r129 into r132 as U256__8JquwLopp8;\n    shr r132.lo 64u8 into r133;\n    shr r132.hi 64u8 into r134;\n    and r1 18446744073709551615u128 into r135;\n    shr r1 64u8 into r136;\n    and r132.lo 18446744073709551615u128 into r137;\n    shr r132.lo 64u8 into r138;\n    mul r135 r137 into r139;\n    mul r135 r138 into r140;\n    mul r136 r137 into r141;\n    mul r136 r138 into r142;\n    and r139 18446744073709551615u128 into r143;\n    shr r139 64u8 into r144;\n    and r140 18446744073709551615u128 into r145;\n    add r144 r145 into r146;\n    and r141 18446744073709551615u128 into r147;\n    add r146 r147 into r148;\n    and r148 18446744073709551615u128 into r149;\n    shr r148 64u8 into r150;\n    shr r140 64u8 into r151;\n    shr r141 64u8 into r152;\n    add r151 r152 into r153;\n    and r142 18446744073709551615u128 into r154;\n    add r153 r154 into r155;\n    add r155 r150 into r156;\n    and r156 18446744073709551615u128 into r157;\n    shr r156 64u8 into r158;\n    shr r142 64u8 into r159;\n    add r159 r158 into r160;\n    shl r160 64u8 into r161;\n    add r161 r157 into r162;\n    shl r149 64u8 into r163;\n    add r163 r143 into r164;\n    and r132.hi 18446744073709551615u128 into r165;\n    shr r132.hi 64u8 into r166;\n    mul r135 r165 into r167;\n    mul r135 r166 into r168;\n    mul r136 r165 into r169;\n    mul r136 r166 into r170;\n    and r167 18446744073709551615u128 into r171;\n    shr r167 64u8 into r172;\n    and r168 18446744073709551615u128 into r173;\n    add r172 r173 into r174;\n    and r169 18446744073709551615u128 into r175;\n    add r174 r175 into r176;\n    and r176 18446744073709551615u128 into r177;\n    shr r176 64u8 into r178;\n    shr r168 64u8 into r179;\n    shr r169 64u8 into r180;\n    add r179 r180 into r181;\n    and r170 18446744073709551615u128 into r182;\n    add r181 r182 into r183;\n    add r183 r178 into r184;\n    and r184 18446744073709551615u128 into r185;\n    shr r184 64u8 into r186;\n    shr r170 64u8 into r187;\n    add r187 r186 into r188;\n    shl r188 64u8 into r189;\n    add r189 r185 into r190;\n    shl r177 64u8 into r191;\n    add r191 r171 into r192;\n    lt r164 0u128 into r193;\n    ternary r193 1u128 0u128 into r194;\n    lt r162 0u128 into r195;\n    ternary r195 1u128 0u128 into r196;\n    add.w r162 r192 into r197;\n    lt r197 r162 into r198;\n    ternary r198 1u128 0u128 into r199;\n    add.w r197 r194 into r200;\n    lt r200 r197 into r201;\n    ternary r201 1u128 0u128 into r202;\n    add r196 r199 into r203;\n    add r203 r202 into r204;\n    add.w r190 r204 into r205;\n    cast r205 r200 into r206 as U256__8JquwLopp8;\n    cast r164 0u128 into r207 as U256__8JquwLopp8;\n    lt r206.hi r126.hi into r208;\n    gt r206.hi r126.hi into r209;\n    lt r206.lo r126.lo into r210;\n    ternary r209 false r210 into r211;\n    ternary r208 true r211 into r212;\n    assert.eq r212 true;\n    gt r126.hi 0u128 into r213;\n    ternary r213 r126.hi r126.lo into r214;\n    ternary r213 128u32 0u32 into r215;\n    gte r214 18446744073709551616u128 into r216;\n    shr r214 64u8 into r217;\n    ternary r216 r217 r214 into r218;\n    ternary r216 64u32 0u32 into r219;\n    gte r218 4294967296u128 into r220;\n    shr r218 32u8 into r221;\n    add r219 32u32 into r222;\n    ternary r220 r221 r218 into r223;\n    ternary r220 r222 r219 into r224;\n    gte r223 65536u128 into r225;\n    shr r223 16u8 into r226;\n    add r224 16u32 into r227;\n    ternary r225 r226 r223 into r228;\n    ternary r225 r227 r224 into r229;\n    gte r228 256u128 into r230;\n    shr r228 8u8 into r231;\n    add r229 8u32 into r232;\n    ternary r230 r231 r228 into r233;\n    ternary r230 r232 r229 into r234;\n    gte r233 16u128 into r235;\n    shr r233 4u8 into r236;\n    add r234 4u32 into r237;\n    ternary r235 r236 r233 into r238;\n    ternary r235 r237 r234 into r239;\n    gte r238 4u128 into r240;\n    shr r238 2u8 into r241;\n    add r239 2u32 into r242;\n    ternary r240 r241 r238 into r243;\n    ternary r240 r242 r239 into r244;\n    gte r243 2u128 into r245;\n    add r244 1u32 into r246;\n    ternary r245 r246 r244 into r247;\n    add r215 r247 into r248;\n    sub 255u32 r248 into r249;\n    cast r249 into r250 as u16;\n    and r250 127u16 into r251;\n    cast r251 into r252 as u8;\n    is.eq r252 0u8 into r253;\n    sub 128u8 r252 into r254;\n    shr.w r126.lo r254 into r255;\n    ternary r253 0u128 r255 into r256;\n    shl.w r126.hi r252 into r257;\n    or r257 r256 into r258;\n    shl.w r126.lo r252 into r259;\n    shl.w r126.lo r252 into r260;\n    gte r250 128u16 into r261;\n    ternary r261 r260 r258 into r262;\n    ternary r261 0u128 r259 into r263;\n    cast r262 r263 into r264 as U256__8JquwLopp8;\n    and r264.lo 18446744073709551615u128 into r265;\n    shr r264.lo 64u8 into r266;\n    and r264.hi 18446744073709551615u128 into r267;\n    shr r264.hi 64u8 into r268;\n    cast r251 into r269 as u8;\n    is.eq r269 0u8 into r270;\n    sub 128u8 r269 into r271;\n    shr.w r207.lo r271 into r272;\n    ternary r270 0u128 r272 into r273;\n    shl.w r207.hi r269 into r274;\n    or r274 r273 into r275;\n    shl.w r207.lo r269 into r276;\n    shl.w r207.lo r269 into r277;\n    ternary r261 r277 r275 into r278;\n    ternary r261 0u128 r276 into r279;\n    cast r278 r279 into r280 as U256__8JquwLopp8;\n    is.eq r250 0u16 into r281;\n    sub 256u16 r250 into r282;\n    and r282 127u16 into r283;\n    cast r283 into r284 as u8;\n    is.eq r284 0u8 into r285;\n    sub 128u8 r284 into r286;\n    shl.w r207.hi r286 into r287;\n    ternary r285 0u128 r287 into r288;\n    shr r207.lo r284 into r289;\n    or r289 r288 into r290;\n    shr r207.hi r284 into r291;\n    shr r207.hi r284 into r292;\n    gte r282 128u16 into r293;\n    ternary r293 0u128 r291 into r294;\n    ternary r293 r292 r290 into r295;\n    cast r294 r295 into r296 as U256__8JquwLopp8;\n    ternary r281 0u128 r296.hi into r297;\n    ternary r281 0u128 r296.lo into r298;\n    cast r297 r298 into r299 as U256__8JquwLopp8;\n    cast r251 into r300 as u8;\n    is.eq r300 0u8 into r301;\n    sub 128u8 r300 into r302;\n    shr.w r206.lo r302 into r303;\n    ternary r301 0u128 r303 into r304;\n    shl.w r206.hi r300 into r305;\n    or r305 r304 into r306;\n    shl.w r206.lo r300 into r307;\n    shl.w r206.lo r300 into r308;\n    ternary r261 r308 r306 into r309;\n    ternary r261 0u128 r307 into r310;\n    cast r309 r310 into r311 as U256__8JquwLopp8;\n    add.w r311.lo r299.lo into r312;\n    lt r312 r311.lo into r313;\n    ternary r313 1u128 0u128 into r314;\n    add.w r311.hi r299.hi into r315;\n    add.w r315 r314 into r316;\n    cast r316 r312 into r317 as U256__8JquwLopp8;\n    and r280.lo 18446744073709551615u128 into r318;\n    shr r280.lo 64u8 into r319;\n    and r280.hi 18446744073709551615u128 into r320;\n    shr r280.hi 64u8 into r321;\n    and r317.lo 18446744073709551615u128 into r322;\n    shr r317.lo 64u8 into r323;\n    and r317.hi 18446744073709551615u128 into r324;\n    shr r317.hi 64u8 into r325;\n    shl r325 64u8 into r326;\n    add r326 r324 into r327;\n    div r327 r268 into r328;\n    gt r328 18446744073709551615u128 into r329;\n    ternary r329 18446744073709551615u128 r328 into r330;\n    mul r330 r268 into r331;\n    sub r327 r331 into r332;\n    lte r332 18446744073709551615u128 into r333;\n    mul r330 r267 into r334;\n    and r332 18446744073709551615u128 into r335;\n    shl r335 64u8 into r336;\n    add r336 r323 into r337;\n    gt r334 r337 into r338;\n    and r333 r338 into r339;\n    sub.w r330 1u128 into r340;\n    ternary r339 r340 r330 into r341;\n    add r332 r268 into r342;\n    ternary r339 r342 r332 into r343;\n    lte r343 18446744073709551615u128 into r344;\n    and r339 r344 into r345;\n    mul r341 r267 into r346;\n    and r343 18446744073709551615u128 into r347;\n    shl r347 64u8 into r348;\n    add r348 r323 into r349;\n    gt r346 r349 into r350;\n    and r345 r350 into r351;\n    sub.w r341 1u128 into r352;\n    ternary r351 r352 r341 into r353;\n    mul r353 r265 into r354;\n    and r354 18446744073709551615u128 into r355;\n    lt r321 r355 into r356;\n    add r321 18446744073709551616u128 into r357;\n    sub r357 r355 into r358;\n    and r358 18446744073709551615u128 into r359;\n    shr r354 64u8 into r360;\n    ternary r356 1u128 0u128 into r361;\n    add r360 r361 into r362;\n    mul r353 r266 into r363;\n    add r363 r362 into r364;\n    and r364 18446744073709551615u128 into r365;\n    lt r322 r365 into r366;\n    add r322 18446744073709551616u128 into r367;\n    sub r367 r365 into r368;\n    and r368 18446744073709551615u128 into r369;\n    shr r364 64u8 into r370;\n    ternary r366 1u128 0u128 into r371;\n    add r370 r371 into r372;\n    mul r353 r267 into r373;\n    add r373 r372 into r374;\n    and r374 18446744073709551615u128 into r375;\n    lt r323 r375 into r376;\n    add r323 18446744073709551616u128 into r377;\n    sub r377 r375 into r378;\n    and r378 18446744073709551615u128 into r379;\n    shr r374 64u8 into r380;\n    ternary r376 1u128 0u128 into r381;\n    add r380 r381 into r382;\n    mul r353 r268 into r383;\n    add r383 r382 into r384;\n    and r384 18446744073709551615u128 into r385;\n    lt r324 r385 into r386;\n    add r324 18446744073709551616u128 into r387;\n    sub r387 r385 into r388;\n    and r388 18446744073709551615u128 into r389;\n    shr r384 64u8 into r390;\n    ternary r386 1u128 0u128 into r391;\n    add r390 r391 into r392;\n    lt r325 r392 into r393;\n    add r325 18446744073709551616u128 into r394;\n    sub r394 r392 into r395;\n    and r395 18446744073709551615u128 into r396;\n    sub.w r353 1u128 into r397;\n    ternary r393 r397 r353 into r398;\n    add r359 r265 into r399;\n    and r399 18446744073709551615u128 into r400;\n    ternary r393 r400 r359 into r401;\n    shr r399 64u8 into r402;\n    ternary r393 r402 0u128 into r403;\n    add r369 r266 into r404;\n    add r404 r403 into r405;\n    and r405 18446744073709551615u128 into r406;\n    ternary r393 r406 r369 into r407;\n    shr r405 64u8 into r408;\n    ternary r393 r408 0u128 into r409;\n    add r379 r267 into r410;\n    add r410 r409 into r411;\n    and r411 18446744073709551615u128 into r412;\n    ternary r393 r412 r379 into r413;\n    shr r411 64u8 into r414;\n    ternary r393 r414 0u128 into r415;\n    add r389 r268 into r416;\n    add r416 r415 into r417;\n    and r417 18446744073709551615u128 into r418;\n    ternary r393 r418 r389 into r419;\n    shr r417 64u8 into r420;\n    ternary r393 r420 0u128 into r421;\n    add r396 r421 into r422;\n    shl r419 64u8 into r423;\n    add r423 r413 into r424;\n    div r424 r268 into r425;\n    gt r425 18446744073709551615u128 into r426;\n    ternary r426 18446744073709551615u128 r425 into r427;\n    mul r427 r268 into r428;\n    sub r424 r428 into r429;\n    lte r429 18446744073709551615u128 into r430;\n    mul r427 r267 into r431;\n    and r429 18446744073709551615u128 into r432;\n    shl r432 64u8 into r433;\n    add r433 r407 into r434;\n    gt r431 r434 into r435;\n    and r430 r435 into r436;\n    sub.w r427 1u128 into r437;\n    ternary r436 r437 r427 into r438;\n    add r429 r268 into r439;\n    ternary r436 r439 r429 into r440;\n    lte r440 18446744073709551615u128 into r441;\n    and r436 r441 into r442;\n    mul r438 r267 into r443;\n    and r440 18446744073709551615u128 into r444;\n    shl r444 64u8 into r445;\n    add r445 r407 into r446;\n    gt r443 r446 into r447;\n    and r442 r447 into r448;\n    sub.w r438 1u128 into r449;\n    ternary r448 r449 r438 into r450;\n    mul r450 r265 into r451;\n    and r451 18446744073709551615u128 into r452;\n    lt r320 r452 into r453;\n    add r320 18446744073709551616u128 into r454;\n    sub r454 r452 into r455;\n    and r455 18446744073709551615u128 into r456;\n    shr r451 64u8 into r457;\n    ternary r453 1u128 0u128 into r458;\n    add r457 r458 into r459;\n    mul r450 r266 into r460;\n    add r460 r459 into r461;\n    and r461 18446744073709551615u128 into r462;\n    lt r401 r462 into r463;\n    add r401 18446744073709551616u128 into r464;\n    sub r464 r462 into r465;\n    and r465 18446744073709551615u128 into r466;\n    shr r461 64u8 into r467;\n    ternary r463 1u128 0u128 into r468;\n    add r467 r468 into r469;\n    mul r450 r267 into r470;\n    add r470 r469 into r471;\n    and r471 18446744073709551615u128 into r472;\n    lt r407 r472 into r473;\n    add r407 18446744073709551616u128 into r474;\n    sub r474 r472 into r475;\n    and r475 18446744073709551615u128 into r476;\n    shr r471 64u8 into r477;\n    ternary r473 1u128 0u128 into r478;\n    add r477 r478 into r479;\n    mul r450 r268 into r480;\n    add r480 r479 into r481;\n    and r481 18446744073709551615u128 into r482;\n    lt r413 r482 into r483;\n    add r413 18446744073709551616u128 into r484;\n    sub r484 r482 into r485;\n    and r485 18446744073709551615u128 into r486;\n    shr r481 64u8 into r487;\n    ternary r483 1u128 0u128 into r488;\n    add r487 r488 into r489;\n    lt r419 r489 into r490;\n    add r419 18446744073709551616u128 into r491;\n    sub r491 r489 into r492;\n    and r492 18446744073709551615u128 into r493;\n    sub.w r450 1u128 into r494;\n    ternary r490 r494 r450 into r495;\n    add r456 r265 into r496;\n    and r496 18446744073709551615u128 into r497;\n    ternary r490 r497 r456 into r498;\n    shr r496 64u8 into r499;\n    ternary r490 r499 0u128 into r500;\n    add r466 r266 into r501;\n    add r501 r500 into r502;\n    and r502 18446744073709551615u128 into r503;\n    ternary r490 r503 r466 into r504;\n    shr r502 64u8 into r505;\n    ternary r490 r505 0u128 into r506;\n    add r476 r267 into r507;\n    add r507 r506 into r508;\n    and r508 18446744073709551615u128 into r509;\n    ternary r490 r509 r476 into r510;\n    shr r508 64u8 into r511;\n    ternary r490 r511 0u128 into r512;\n    add r486 r268 into r513;\n    add r513 r512 into r514;\n    and r514 18446744073709551615u128 into r515;\n    ternary r490 r515 r486 into r516;\n    shr r514 64u8 into r517;\n    ternary r490 r517 0u128 into r518;\n    add r493 r518 into r519;\n    shl r516 64u8 into r520;\n    add r520 r510 into r521;\n    div r521 r268 into r522;\n    gt r522 18446744073709551615u128 into r523;\n    ternary r523 18446744073709551615u128 r522 into r524;\n    mul r524 r268 into r525;\n    sub r521 r525 into r526;\n    lte r526 18446744073709551615u128 into r527;\n    mul r524 r267 into r528;\n    and r526 18446744073709551615u128 into r529;\n    shl r529 64u8 into r530;\n    add r530 r504 into r531;\n    gt r528 r531 into r532;\n    and r527 r532 into r533;\n    sub.w r524 1u128 into r534;\n    ternary r533 r534 r524 into r535;\n    add r526 r268 into r536;\n    ternary r533 r536 r526 into r537;\n    lte r537 18446744073709551615u128 into r538;\n    and r533 r538 into r539;\n    mul r535 r267 into r540;\n    and r537 18446744073709551615u128 into r541;\n    shl r541 64u8 into r542;\n    add r542 r504 into r543;\n    gt r540 r543 into r544;\n    and r539 r544 into r545;\n    sub.w r535 1u128 into r546;\n    ternary r545 r546 r535 into r547;\n    mul r547 r265 into r548;\n    and r548 18446744073709551615u128 into r549;\n    lt r319 r549 into r550;\n    add r319 18446744073709551616u128 into r551;\n    sub r551 r549 into r552;\n    and r552 18446744073709551615u128 into r553;\n    shr r548 64u8 into r554;\n    ternary r550 1u128 0u128 into r555;\n    add r554 r555 into r556;\n    mul r547 r266 into r557;\n    add r557 r556 into r558;\n    and r558 18446744073709551615u128 into r559;\n    lt r498 r559 into r560;\n    add r498 18446744073709551616u128 into r561;\n    sub r561 r559 into r562;\n    and r562 18446744073709551615u128 into r563;\n    shr r558 64u8 into r564;\n    ternary r560 1u128 0u128 into r565;\n    add r564 r565 into r566;\n    mul r547 r267 into r567;\n    add r567 r566 into r568;\n    and r568 18446744073709551615u128 into r569;\n    lt r504 r569 into r570;\n    add r504 18446744073709551616u128 into r571;\n    sub r571 r569 into r572;\n    and r572 18446744073709551615u128 into r573;\n    shr r568 64u8 into r574;\n    ternary r570 1u128 0u128 into r575;\n    add r574 r575 into r576;\n    mul r547 r268 into r577;\n    add r577 r576 into r578;\n    and r578 18446744073709551615u128 into r579;\n    lt r510 r579 into r580;\n    add r510 18446744073709551616u128 into r581;\n    sub r581 r579 into r582;\n    and r582 18446744073709551615u128 into r583;\n    shr r578 64u8 into r584;\n    ternary r580 1u128 0u128 into r585;\n    add r584 r585 into r586;\n    lt r516 r586 into r587;\n    add r516 18446744073709551616u128 into r588;\n    sub r588 r586 into r589;\n    and r589 18446744073709551615u128 into r590;\n    sub.w r547 1u128 into r591;\n    ternary r587 r591 r547 into r592;\n    add r553 r265 into r593;\n    and r593 18446744073709551615u128 into r594;\n    ternary r587 r594 r553 into r595;\n    shr r593 64u8 into r596;\n    ternary r587 r596 0u128 into r597;\n    add r563 r266 into r598;\n    add r598 r597 into r599;\n    and r599 18446744073709551615u128 into r600;\n    ternary r587 r600 r563 into r601;\n    shr r599 64u8 into r602;\n    ternary r587 r602 0u128 into r603;\n    add r573 r267 into r604;\n    add r604 r603 into r605;\n    and r605 18446744073709551615u128 into r606;\n    ternary r587 r606 r573 into r607;\n    shr r605 64u8 into r608;\n    ternary r587 r608 0u128 into r609;\n    add r583 r268 into r610;\n    add r610 r609 into r611;\n    and r611 18446744073709551615u128 into r612;\n    ternary r587 r612 r583 into r613;\n    shr r611 64u8 into r614;\n    ternary r587 r614 0u128 into r615;\n    add r590 r615 into r616;\n    shl r613 64u8 into r617;\n    add r617 r607 into r618;\n    div r618 r268 into r619;\n    gt r619 18446744073709551615u128 into r620;\n    ternary r620 18446744073709551615u128 r619 into r621;\n    mul r621 r268 into r622;\n    sub r618 r622 into r623;\n    lte r623 18446744073709551615u128 into r624;\n    mul r621 r267 into r625;\n    and r623 18446744073709551615u128 into r626;\n    shl r626 64u8 into r627;\n    add r627 r601 into r628;\n    gt r625 r628 into r629;\n    and r624 r629 into r630;\n    sub.w r621 1u128 into r631;\n    ternary r630 r631 r621 into r632;\n    add r623 r268 into r633;\n    ternary r630 r633 r623 into r634;\n    lte r634 18446744073709551615u128 into r635;\n    and r630 r635 into r636;\n    mul r632 r267 into r637;\n    and r634 18446744073709551615u128 into r638;\n    shl r638 64u8 into r639;\n    add r639 r601 into r640;\n    gt r637 r640 into r641;\n    and r636 r641 into r642;\n    sub.w r632 1u128 into r643;\n    ternary r642 r643 r632 into r644;\n    mul r644 r265 into r645;\n    and r645 18446744073709551615u128 into r646;\n    lt r318 r646 into r647;\n    add r318 18446744073709551616u128 into r648;\n    sub r648 r646 into r649;\n    and r649 18446744073709551615u128 into r650;\n    shr r645 64u8 into r651;\n    ternary r647 1u128 0u128 into r652;\n    add r651 r652 into r653;\n    mul r644 r266 into r654;\n    add r654 r653 into r655;\n    and r655 18446744073709551615u128 into r656;\n    lt r595 r656 into r657;\n    add r595 18446744073709551616u128 into r658;\n    sub r658 r656 into r659;\n    and r659 18446744073709551615u128 into r660;\n    shr r655 64u8 into r661;\n    ternary r657 1u128 0u128 into r662;\n    add r661 r662 into r663;\n    mul r644 r267 into r664;\n    add r664 r663 into r665;\n    and r665 18446744073709551615u128 into r666;\n    lt r601 r666 into r667;\n    add r601 18446744073709551616u128 into r668;\n    sub r668 r666 into r669;\n    and r669 18446744073709551615u128 into r670;\n    shr r665 64u8 into r671;\n    ternary r667 1u128 0u128 into r672;\n    add r671 r672 into r673;\n    mul r644 r268 into r674;\n    add r674 r673 into r675;\n    and r675 18446744073709551615u128 into r676;\n    lt r607 r676 into r677;\n    add r607 18446744073709551616u128 into r678;\n    sub r678 r676 into r679;\n    and r679 18446744073709551615u128 into r680;\n    shr r675 64u8 into r681;\n    ternary r677 1u128 0u128 into r682;\n    add r681 r682 into r683;\n    lt r613 r683 into r684;\n    add r613 18446744073709551616u128 into r685;\n    sub r685 r683 into r686;\n    and r686 18446744073709551615u128 into r687;\n    sub.w r644 1u128 into r688;\n    ternary r684 r688 r644 into r689;\n    add r650 r265 into r690;\n    and r690 18446744073709551615u128 into r691;\n    ternary r684 r691 r650 into r692;\n    shr r690 64u8 into r693;\n    ternary r684 r693 0u128 into r694;\n    add r660 r266 into r695;\n    add r695 r694 into r696;\n    and r696 18446744073709551615u128 into r697;\n    ternary r684 r697 r660 into r698;\n    shr r696 64u8 into r699;\n    ternary r684 r699 0u128 into r700;\n    add r670 r267 into r701;\n    add r701 r700 into r702;\n    and r702 18446744073709551615u128 into r703;\n    ternary r684 r703 r670 into r704;\n    shr r702 64u8 into r705;\n    ternary r684 r705 0u128 into r706;\n    add r680 r268 into r707;\n    add r707 r706 into r708;\n    and r708 18446744073709551615u128 into r709;\n    ternary r684 r709 r680 into r710;\n    shr r708 64u8 into r711;\n    ternary r684 r711 0u128 into r712;\n    add r687 r712 into r713;\n    shl r398 64u8 into r714;\n    add r714 r495 into r715;\n    shl r592 64u8 into r716;\n    add r716 r689 into r717;\n    cast r715 r717 into r718 as U256__8JquwLopp8;\n    shl r710 64u8 into r719;\n    add r719 r704 into r720;\n    shl r698 64u8 into r721;\n    add r721 r692 into r722;\n    cast r251 into r723 as u8;\n    is.eq r723 0u8 into r724;\n    sub 128u8 r723 into r725;\n    shl.w r720 r725 into r726;\n    ternary r724 0u128 r726 into r727;\n    shr r722 r723 into r728;\n    or r728 r727 into r729;\n    shr r720 r723 into r730;\n    ternary r261 0u128 r730 into r731;\n    ternary r261 r730 r729 into r732;\n    cast r731 r732 into r733 as U256__8JquwLopp8;\n    is.eq r733.hi 0u128 into r734;\n    is.eq r733.lo 0u128 into r735;\n    and r734 r735 into r736;\n    not r736 into r737;\n    is.eq r718.hi 340282366920938463463374607431768211455u128 into r738;\n    is.eq r718.lo 340282366920938463463374607431768211455u128 into r739;\n    and r738 r739 into r740;\n    and r737 r740 into r741;\n    not r741 into r742;\n    assert.eq r742 true;\n    add.w r718.lo 1u128 into r743;\n    lt r743 r718.lo into r744;\n    ternary r744 1u128 0u128 into r745;\n    add.w r718.hi r745 into r746;\n    cast r746 r743 into r747 as U256__8JquwLopp8;\n    ternary r737 r747.hi r718.hi into r748;\n    ternary r737 r747.lo r718.lo into r749;\n    cast r748 r749 into r750 as U256__8JquwLopp8;\n    and r750.lo 18446744073709551615u128 into r751;\n    shr r750.lo 64u8 into r752;\n    and r751 18446744073709551615u128 into r753;\n    shr r751 64u8 into r754;\n    and r752 18446744073709551615u128 into r755;\n    add r754 r755 into r756;\n    and r756 18446744073709551615u128 into r757;\n    shr r756 64u8 into r758;\n    shr r752 64u8 into r759;\n    add r759 r758 into r760;\n    and r760 18446744073709551615u128 into r761;\n    shr r760 64u8 into r762;\n    shl r762 64u8 into r763;\n    add r763 r761 into r764;\n    shl r757 64u8 into r765;\n    add r765 r753 into r766;\n    shr r750.lo 64u8 into r767;\n    and r750.hi 18446744073709551615u128 into r768;\n    shr r750.hi 64u8 into r769;\n    and r768 18446744073709551615u128 into r770;\n    shr r768 64u8 into r771;\n    and r769 18446744073709551615u128 into r772;\n    add r771 r772 into r773;\n    and r773 18446744073709551615u128 into r774;\n    shr r773 64u8 into r775;\n    shr r769 64u8 into r776;\n    add r776 r775 into r777;\n    and r777 18446744073709551615u128 into r778;\n    shr r777 64u8 into r779;\n    shl r779 64u8 into r780;\n    add r780 r778 into r781;\n    shl r774 64u8 into r782;\n    add r782 r770 into r783;\n    shr r750.hi 64u8 into r784;\n    lt r764 r764 into r785;\n    ternary r785 1u128 0u128 into r786;\n    add.w r764 r783 into r787;\n    lt r787 r764 into r788;\n    ternary r788 1u128 0u128 into r789;\n    add r786 r789 into r790;\n    lt r781 0u128 into r791;\n    ternary r791 1u128 0u128 into r792;\n    lt r781 r781 into r793;\n    ternary r793 1u128 0u128 into r794;\n    add.w r781 r790 into r795;\n    lt r795 r781 into r796;\n    ternary r796 1u128 0u128 into r797;\n    add r792 r794 into r798;\n    add r798 r797 into r799;\n    cast r799 r795 into r800 as U256__8JquwLopp8;\n    cast r787 r766 into r801 as U256__8JquwLopp8;\n    lt r800.hi r118.hi into r802;\n    gt r800.hi r118.hi into r803;\n    lt r800.lo r118.lo into r804;\n    ternary r803 false r804 into r805;\n    ternary r802 true r805 into r806;\n    assert.eq r806 true;\n    gt r118.hi 0u128 into r807;\n    ternary r807 r118.hi r118.lo into r808;\n    ternary r807 128u32 0u32 into r809;\n    gte r808 18446744073709551616u128 into r810;\n    shr r808 64u8 into r811;\n    ternary r810 r811 r808 into r812;\n    ternary r810 64u32 0u32 into r813;\n    gte r812 4294967296u128 into r814;\n    shr r812 32u8 into r815;\n    add r813 32u32 into r816;\n    ternary r814 r815 r812 into r817;\n    ternary r814 r816 r813 into r818;\n    gte r817 65536u128 into r819;\n    shr r817 16u8 into r820;\n    add r818 16u32 into r821;\n    ternary r819 r820 r817 into r822;\n    ternary r819 r821 r818 into r823;\n    gte r822 256u128 into r824;\n    shr r822 8u8 into r825;\n    add r823 8u32 into r826;\n    ternary r824 r825 r822 into r827;\n    ternary r824 r826 r823 into r828;\n    gte r827 16u128 into r829;\n    shr r827 4u8 into r830;\n    add r828 4u32 into r831;\n    ternary r829 r830 r827 into r832;\n    ternary r829 r831 r828 into r833;\n    gte r832 4u128 into r834;\n    shr r832 2u8 into r835;\n    add r833 2u32 into r836;\n    ternary r834 r835 r832 into r837;\n    ternary r834 r836 r833 into r838;\n    gte r837 2u128 into r839;\n    add r838 1u32 into r840;\n    ternary r839 r840 r838 into r841;\n    add r809 r841 into r842;\n    sub 255u32 r842 into r843;\n    cast r843 into r844 as u16;\n    and r844 127u16 into r845;\n    cast r845 into r846 as u8;\n    is.eq r846 0u8 into r847;\n    sub 128u8 r846 into r848;\n    shr.w r118.lo r848 into r849;\n    ternary r847 0u128 r849 into r850;\n    shl.w r118.hi r846 into r851;\n    or r851 r850 into r852;\n    shl.w r118.lo r846 into r853;\n    shl.w r118.lo r846 into r854;\n    gte r844 128u16 into r855;\n    ternary r855 r854 r852 into r856;\n    ternary r855 0u128 r853 into r857;\n    cast r856 r857 into r858 as U256__8JquwLopp8;\n    and r858.lo 18446744073709551615u128 into r859;\n    shr r858.lo 64u8 into r860;\n    and r858.hi 18446744073709551615u128 into r861;\n    shr r858.hi 64u8 into r862;\n    cast r845 into r863 as u8;\n    is.eq r863 0u8 into r864;\n    sub 128u8 r863 into r865;\n    shr.w r801.lo r865 into r866;\n    ternary r864 0u128 r866 into r867;\n    shl.w r801.hi r863 into r868;\n    or r868 r867 into r869;\n    shl.w r801.lo r863 into r870;\n    shl.w r801.lo r863 into r871;\n    ternary r855 r871 r869 into r872;\n    ternary r855 0u128 r870 into r873;\n    cast r872 r873 into r874 as U256__8JquwLopp8;\n    is.eq r844 0u16 into r875;\n    sub 256u16 r844 into r876;\n    and r876 127u16 into r877;\n    cast r877 into r878 as u8;\n    is.eq r878 0u8 into r879;\n    sub 128u8 r878 into r880;\n    shl.w r801.hi r880 into r881;\n    ternary r879 0u128 r881 into r882;\n    shr r801.lo r878 into r883;\n    or r883 r882 into r884;\n    shr r801.hi r878 into r885;\n    shr r801.hi r878 into r886;\n    gte r876 128u16 into r887;\n    ternary r887 0u128 r885 into r888;\n    ternary r887 r886 r884 into r889;\n    cast r888 r889 into r890 as U256__8JquwLopp8;\n    ternary r875 0u128 r890.hi into r891;\n    ternary r875 0u128 r890.lo into r892;\n    cast r891 r892 into r893 as U256__8JquwLopp8;\n    cast r845 into r894 as u8;\n    is.eq r894 0u8 into r895;\n    sub 128u8 r894 into r896;\n    shr.w r800.lo r896 into r897;\n    ternary r895 0u128 r897 into r898;\n    shl.w r800.hi r894 into r899;\n    or r899 r898 into r900;\n    shl.w r800.lo r894 into r901;\n    shl.w r800.lo r894 into r902;\n    ternary r855 r902 r900 into r903;\n    ternary r855 0u128 r901 into r904;\n    cast r903 r904 into r905 as U256__8JquwLopp8;\n    add.w r905.lo r893.lo into r906;\n    lt r906 r905.lo into r907;\n    ternary r907 1u128 0u128 into r908;\n    add.w r905.hi r893.hi into r909;\n    add.w r909 r908 into r910;\n    cast r910 r906 into r911 as U256__8JquwLopp8;\n    and r874.lo 18446744073709551615u128 into r912;\n    shr r874.lo 64u8 into r913;\n    and r874.hi 18446744073709551615u128 into r914;\n    shr r874.hi 64u8 into r915;\n    and r911.lo 18446744073709551615u128 into r916;\n    shr r911.lo 64u8 into r917;\n    and r911.hi 18446744073709551615u128 into r918;\n    shr r911.hi 64u8 into r919;\n    shl r919 64u8 into r920;\n    add r920 r918 into r921;\n    div r921 r862 into r922;\n    gt r922 18446744073709551615u128 into r923;\n    ternary r923 18446744073709551615u128 r922 into r924;\n    mul r924 r862 into r925;\n    sub r921 r925 into r926;\n    lte r926 18446744073709551615u128 into r927;\n    mul r924 r861 into r928;\n    and r926 18446744073709551615u128 into r929;\n    shl r929 64u8 into r930;\n    add r930 r917 into r931;\n    gt r928 r931 into r932;\n    and r927 r932 into r933;\n    sub.w r924 1u128 into r934;\n    ternary r933 r934 r924 into r935;\n    add r926 r862 into r936;\n    ternary r933 r936 r926 into r937;\n    lte r937 18446744073709551615u128 into r938;\n    and r933 r938 into r939;\n    mul r935 r861 into r940;\n    and r937 18446744073709551615u128 into r941;\n    shl r941 64u8 into r942;\n    add r942 r917 into r943;\n    gt r940 r943 into r944;\n    and r939 r944 into r945;\n    sub.w r935 1u128 into r946;\n    ternary r945 r946 r935 into r947;\n    mul r947 r859 into r948;\n    and r948 18446744073709551615u128 into r949;\n    lt r915 r949 into r950;\n    add r915 18446744073709551616u128 into r951;\n    sub r951 r949 into r952;\n    and r952 18446744073709551615u128 into r953;\n    shr r948 64u8 into r954;\n    ternary r950 1u128 0u128 into r955;\n    add r954 r955 into r956;\n    mul r947 r860 into r957;\n    add r957 r956 into r958;\n    and r958 18446744073709551615u128 into r959;\n    lt r916 r959 into r960;\n    add r916 18446744073709551616u128 into r961;\n    sub r961 r959 into r962;\n    and r962 18446744073709551615u128 into r963;\n    shr r958 64u8 into r964;\n    ternary r960 1u128 0u128 into r965;\n    add r964 r965 into r966;\n    mul r947 r861 into r967;\n    add r967 r966 into r968;\n    and r968 18446744073709551615u128 into r969;\n    lt r917 r969 into r970;\n    add r917 18446744073709551616u128 into r971;\n    sub r971 r969 into r972;\n    and r972 18446744073709551615u128 into r973;\n    shr r968 64u8 into r974;\n    ternary r970 1u128 0u128 into r975;\n    add r974 r975 into r976;\n    mul r947 r862 into r977;\n    add r977 r976 into r978;\n    and r978 18446744073709551615u128 into r979;\n    lt r918 r979 into r980;\n    add r918 18446744073709551616u128 into r981;\n    sub r981 r979 into r982;\n    and r982 18446744073709551615u128 into r983;\n    shr r978 64u8 into r984;\n    ternary r980 1u128 0u128 into r985;\n    add r984 r985 into r986;\n    lt r919 r986 into r987;\n    add r919 18446744073709551616u128 into r988;\n    sub r988 r986 into r989;\n    and r989 18446744073709551615u128 into r990;\n    sub.w r947 1u128 into r991;\n    ternary r987 r991 r947 into r992;\n    add r953 r859 into r993;\n    and r993 18446744073709551615u128 into r994;\n    ternary r987 r994 r953 into r995;\n    shr r993 64u8 into r996;\n    ternary r987 r996 0u128 into r997;\n    add r963 r860 into r998;\n    add r998 r997 into r999;\n    and r999 18446744073709551615u128 into r1000;\n    ternary r987 r1000 r963 into r1001;\n    shr r999 64u8 into r1002;\n    ternary r987 r1002 0u128 into r1003;\n    add r973 r861 into r1004;\n    add r1004 r1003 into r1005;\n    and r1005 18446744073709551615u128 into r1006;\n    ternary r987 r1006 r973 into r1007;\n    shr r1005 64u8 into r1008;\n    ternary r987 r1008 0u128 into r1009;\n    add r983 r862 into r1010;\n    add r1010 r1009 into r1011;\n    and r1011 18446744073709551615u128 into r1012;\n    ternary r987 r1012 r983 into r1013;\n    shr r1011 64u8 into r1014;\n    ternary r987 r1014 0u128 into r1015;\n    add r990 r1015 into r1016;\n    shl r1013 64u8 into r1017;\n    add r1017 r1007 into r1018;\n    div r1018 r862 into r1019;\n    gt r1019 18446744073709551615u128 into r1020;\n    ternary r1020 18446744073709551615u128 r1019 into r1021;\n    mul r1021 r862 into r1022;\n    sub r1018 r1022 into r1023;\n    lte r1023 18446744073709551615u128 into r1024;\n    mul r1021 r861 into r1025;\n    and r1023 18446744073709551615u128 into r1026;\n    shl r1026 64u8 into r1027;\n    add r1027 r1001 into r1028;\n    gt r1025 r1028 into r1029;\n    and r1024 r1029 into r1030;\n    sub.w r1021 1u128 into r1031;\n    ternary r1030 r1031 r1021 into r1032;\n    add r1023 r862 into r1033;\n    ternary r1030 r1033 r1023 into r1034;\n    lte r1034 18446744073709551615u128 into r1035;\n    and r1030 r1035 into r1036;\n    mul r1032 r861 into r1037;\n    and r1034 18446744073709551615u128 into r1038;\n    shl r1038 64u8 into r1039;\n    add r1039 r1001 into r1040;\n    gt r1037 r1040 into r1041;\n    and r1036 r1041 into r1042;\n    sub.w r1032 1u128 into r1043;\n    ternary r1042 r1043 r1032 into r1044;\n    mul r1044 r859 into r1045;\n    and r1045 18446744073709551615u128 into r1046;\n    lt r914 r1046 into r1047;\n    add r914 18446744073709551616u128 into r1048;\n    sub r1048 r1046 into r1049;\n    and r1049 18446744073709551615u128 into r1050;\n    shr r1045 64u8 into r1051;\n    ternary r1047 1u128 0u128 into r1052;\n    add r1051 r1052 into r1053;\n    mul r1044 r860 into r1054;\n    add r1054 r1053 into r1055;\n    and r1055 18446744073709551615u128 into r1056;\n    lt r995 r1056 into r1057;\n    add r995 18446744073709551616u128 into r1058;\n    sub r1058 r1056 into r1059;\n    and r1059 18446744073709551615u128 into r1060;\n    shr r1055 64u8 into r1061;\n    ternary r1057 1u128 0u128 into r1062;\n    add r1061 r1062 into r1063;\n    mul r1044 r861 into r1064;\n    add r1064 r1063 into r1065;\n    and r1065 18446744073709551615u128 into r1066;\n    lt r1001 r1066 into r1067;\n    add r1001 18446744073709551616u128 into r1068;\n    sub r1068 r1066 into r1069;\n    and r1069 18446744073709551615u128 into r1070;\n    shr r1065 64u8 into r1071;\n    ternary r1067 1u128 0u128 into r1072;\n    add r1071 r1072 into r1073;\n    mul r1044 r862 into r1074;\n    add r1074 r1073 into r1075;\n    and r1075 18446744073709551615u128 into r1076;\n    lt r1007 r1076 into r1077;\n    add r1007 18446744073709551616u128 into r1078;\n    sub r1078 r1076 into r1079;\n    and r1079 18446744073709551615u128 into r1080;\n    shr r1075 64u8 into r1081;\n    ternary r1077 1u128 0u128 into r1082;\n    add r1081 r1082 into r1083;\n    lt r1013 r1083 into r1084;\n    add r1013 18446744073709551616u128 into r1085;\n    sub r1085 r1083 into r1086;\n    and r1086 18446744073709551615u128 into r1087;\n    sub.w r1044 1u128 into r1088;\n    ternary r1084 r1088 r1044 into r1089;\n    add r1050 r859 into r1090;\n    and r1090 18446744073709551615u128 into r1091;\n    ternary r1084 r1091 r1050 into r1092;\n    shr r1090 64u8 into r1093;\n    ternary r1084 r1093 0u128 into r1094;\n    add r1060 r860 into r1095;\n    add r1095 r1094 into r1096;\n    and r1096 18446744073709551615u128 into r1097;\n    ternary r1084 r1097 r1060 into r1098;\n    shr r1096 64u8 into r1099;\n    ternary r1084 r1099 0u128 into r1100;\n    add r1070 r861 into r1101;\n    add r1101 r1100 into r1102;\n    and r1102 18446744073709551615u128 into r1103;\n    ternary r1084 r1103 r1070 into r1104;\n    shr r1102 64u8 into r1105;\n    ternary r1084 r1105 0u128 into r1106;\n    add r1080 r862 into r1107;\n    add r1107 r1106 into r1108;\n    and r1108 18446744073709551615u128 into r1109;\n    ternary r1084 r1109 r1080 into r1110;\n    shr r1108 64u8 into r1111;\n    ternary r1084 r1111 0u128 into r1112;\n    add r1087 r1112 into r1113;\n    shl r1110 64u8 into r1114;\n    add r1114 r1104 into r1115;\n    div r1115 r862 into r1116;\n    gt r1116 18446744073709551615u128 into r1117;\n    ternary r1117 18446744073709551615u128 r1116 into r1118;\n    mul r1118 r862 into r1119;\n    sub r1115 r1119 into r1120;\n    lte r1120 18446744073709551615u128 into r1121;\n    mul r1118 r861 into r1122;\n    and r1120 18446744073709551615u128 into r1123;\n    shl r1123 64u8 into r1124;\n    add r1124 r1098 into r1125;\n    gt r1122 r1125 into r1126;\n    and r1121 r1126 into r1127;\n    sub.w r1118 1u128 into r1128;\n    ternary r1127 r1128 r1118 into r1129;\n    add r1120 r862 into r1130;\n    ternary r1127 r1130 r1120 into r1131;\n    lte r1131 18446744073709551615u128 into r1132;\n    and r1127 r1132 into r1133;\n    mul r1129 r861 into r1134;\n    and r1131 18446744073709551615u128 into r1135;\n    shl r1135 64u8 into r1136;\n    add r1136 r1098 into r1137;\n    gt r1134 r1137 into r1138;\n    and r1133 r1138 into r1139;\n    sub.w r1129 1u128 into r1140;\n    ternary r1139 r1140 r1129 into r1141;\n    mul r1141 r859 into r1142;\n    and r1142 18446744073709551615u128 into r1143;\n    lt r913 r1143 into r1144;\n    add r913 18446744073709551616u128 into r1145;\n    sub r1145 r1143 into r1146;\n    and r1146 18446744073709551615u128 into r1147;\n    shr r1142 64u8 into r1148;\n    ternary r1144 1u128 0u128 into r1149;\n    add r1148 r1149 into r1150;\n    mul r1141 r860 into r1151;\n    add r1151 r1150 into r1152;\n    and r1152 18446744073709551615u128 into r1153;\n    lt r1092 r1153 into r1154;\n    add r1092 18446744073709551616u128 into r1155;\n    sub r1155 r1153 into r1156;\n    and r1156 18446744073709551615u128 into r1157;\n    shr r1152 64u8 into r1158;\n    ternary r1154 1u128 0u128 into r1159;\n    add r1158 r1159 into r1160;\n    mul r1141 r861 into r1161;\n    add r1161 r1160 into r1162;\n    and r1162 18446744073709551615u128 into r1163;\n    lt r1098 r1163 into r1164;\n    add r1098 18446744073709551616u128 into r1165;\n    sub r1165 r1163 into r1166;\n    and r1166 18446744073709551615u128 into r1167;\n    shr r1162 64u8 into r1168;\n    ternary r1164 1u128 0u128 into r1169;\n    add r1168 r1169 into r1170;\n    mul r1141 r862 into r1171;\n    add r1171 r1170 into r1172;\n    and r1172 18446744073709551615u128 into r1173;\n    lt r1104 r1173 into r1174;\n    add r1104 18446744073709551616u128 into r1175;\n    sub r1175 r1173 into r1176;\n    and r1176 18446744073709551615u128 into r1177;\n    shr r1172 64u8 into r1178;\n    ternary r1174 1u128 0u128 into r1179;\n    add r1178 r1179 into r1180;\n    lt r1110 r1180 into r1181;\n    add r1110 18446744073709551616u128 into r1182;\n    sub r1182 r1180 into r1183;\n    and r1183 18446744073709551615u128 into r1184;\n    sub.w r1141 1u128 into r1185;\n    ternary r1181 r1185 r1141 into r1186;\n    add r1147 r859 into r1187;\n    and r1187 18446744073709551615u128 into r1188;\n    ternary r1181 r1188 r1147 into r1189;\n    shr r1187 64u8 into r1190;\n    ternary r1181 r1190 0u128 into r1191;\n    add r1157 r860 into r1192;\n    add r1192 r1191 into r1193;\n    and r1193 18446744073709551615u128 into r1194;\n    ternary r1181 r1194 r1157 into r1195;\n    shr r1193 64u8 into r1196;\n    ternary r1181 r1196 0u128 into r1197;\n    add r1167 r861 into r1198;\n    add r1198 r1197 into r1199;\n    and r1199 18446744073709551615u128 into r1200;\n    ternary r1181 r1200 r1167 into r1201;\n    shr r1199 64u8 into r1202;\n    ternary r1181 r1202 0u128 into r1203;\n    add r1177 r862 into r1204;\n    add r1204 r1203 into r1205;\n    and r1205 18446744073709551615u128 into r1206;\n    ternary r1181 r1206 r1177 into r1207;\n    shr r1205 64u8 into r1208;\n    ternary r1181 r1208 0u128 into r1209;\n    add r1184 r1209 into r1210;\n    shl r1207 64u8 into r1211;\n    add r1211 r1201 into r1212;\n    div r1212 r862 into r1213;\n    gt r1213 18446744073709551615u128 into r1214;\n    ternary r1214 18446744073709551615u128 r1213 into r1215;\n    mul r1215 r862 into r1216;\n    sub r1212 r1216 into r1217;\n    lte r1217 18446744073709551615u128 into r1218;\n    mul r1215 r861 into r1219;\n    and r1217 18446744073709551615u128 into r1220;\n    shl r1220 64u8 into r1221;\n    add r1221 r1195 into r1222;\n    gt r1219 r1222 into r1223;\n    and r1218 r1223 into r1224;\n    sub.w r1215 1u128 into r1225;\n    ternary r1224 r1225 r1215 into r1226;\n    add r1217 r862 into r1227;\n    ternary r1224 r1227 r1217 into r1228;\n    lte r1228 18446744073709551615u128 into r1229;\n    and r1224 r1229 into r1230;\n    mul r1226 r861 into r1231;\n    and r1228 18446744073709551615u128 into r1232;\n    shl r1232 64u8 into r1233;\n    add r1233 r1195 into r1234;\n    gt r1231 r1234 into r1235;\n    and r1230 r1235 into r1236;\n    sub.w r1226 1u128 into r1237;\n    ternary r1236 r1237 r1226 into r1238;\n    mul r1238 r859 into r1239;\n    and r1239 18446744073709551615u128 into r1240;\n    lt r912 r1240 into r1241;\n    add r912 18446744073709551616u128 into r1242;\n    sub r1242 r1240 into r1243;\n    and r1243 18446744073709551615u128 into r1244;\n    shr r1239 64u8 into r1245;\n    ternary r1241 1u128 0u128 into r1246;\n    add r1245 r1246 into r1247;\n    mul r1238 r860 into r1248;\n    add r1248 r1247 into r1249;\n    and r1249 18446744073709551615u128 into r1250;\n    lt r1189 r1250 into r1251;\n    add r1189 18446744073709551616u128 into r1252;\n    sub r1252 r1250 into r1253;\n    and r1253 18446744073709551615u128 into r1254;\n    shr r1249 64u8 into r1255;\n    ternary r1251 1u128 0u128 into r1256;\n    add r1255 r1256 into r1257;\n    mul r1238 r861 into r1258;\n    add r1258 r1257 into r1259;\n    and r1259 18446744073709551615u128 into r1260;\n    lt r1195 r1260 into r1261;\n    add r1195 18446744073709551616u128 into r1262;\n    sub r1262 r1260 into r1263;\n    and r1263 18446744073709551615u128 into r1264;\n    shr r1259 64u8 into r1265;\n    ternary r1261 1u128 0u128 into r1266;\n    add r1265 r1266 into r1267;\n    mul r1238 r862 into r1268;\n    add r1268 r1267 into r1269;\n    and r1269 18446744073709551615u128 into r1270;\n    lt r1201 r1270 into r1271;\n    add r1201 18446744073709551616u128 into r1272;\n    sub r1272 r1270 into r1273;\n    and r1273 18446744073709551615u128 into r1274;\n    shr r1269 64u8 into r1275;\n    ternary r1271 1u128 0u128 into r1276;\n    add r1275 r1276 into r1277;\n    lt r1207 r1277 into r1278;\n    add r1207 18446744073709551616u128 into r1279;\n    sub r1279 r1277 into r1280;\n    and r1280 18446744073709551615u128 into r1281;\n    sub.w r1238 1u128 into r1282;\n    ternary r1278 r1282 r1238 into r1283;\n    add r1244 r859 into r1284;\n    and r1284 18446744073709551615u128 into r1285;\n    ternary r1278 r1285 r1244 into r1286;\n    shr r1284 64u8 into r1287;\n    ternary r1278 r1287 0u128 into r1288;\n    add r1254 r860 into r1289;\n    add r1289 r1288 into r1290;\n    and r1290 18446744073709551615u128 into r1291;\n    ternary r1278 r1291 r1254 into r1292;\n    shr r1290 64u8 into r1293;\n    ternary r1278 r1293 0u128 into r1294;\n    add r1264 r861 into r1295;\n    add r1295 r1294 into r1296;\n    and r1296 18446744073709551615u128 into r1297;\n    ternary r1278 r1297 r1264 into r1298;\n    shr r1296 64u8 into r1299;\n    ternary r1278 r1299 0u128 into r1300;\n    add r1274 r862 into r1301;\n    add r1301 r1300 into r1302;\n    and r1302 18446744073709551615u128 into r1303;\n    ternary r1278 r1303 r1274 into r1304;\n    shr r1302 64u8 into r1305;\n    ternary r1278 r1305 0u128 into r1306;\n    add r1281 r1306 into r1307;\n    shl r992 64u8 into r1308;\n    add r1308 r1089 into r1309;\n    shl r1186 64u8 into r1310;\n    add r1310 r1283 into r1311;\n    cast r1309 r1311 into r1312 as U256__8JquwLopp8;\n    shl r1304 64u8 into r1313;\n    add r1313 r1298 into r1314;\n    shl r1292 64u8 into r1315;\n    add r1315 r1286 into r1316;\n    cast r845 into r1317 as u8;\n    is.eq r1317 0u8 into r1318;\n    sub 128u8 r1317 into r1319;\n    shl.w r1314 r1319 into r1320;\n    ternary r1318 0u128 r1320 into r1321;\n    shr r1316 r1317 into r1322;\n    or r1322 r1321 into r1323;\n    shr r1314 r1317 into r1324;\n    ternary r855 0u128 r1324 into r1325;\n    ternary r855 r1324 r1323 into r1326;\n    cast r1325 r1326 into r1327 as U256__8JquwLopp8;\n    is.eq r1327.hi 0u128 into r1328;\n    is.eq r1327.lo 0u128 into r1329;\n    and r1328 r1329 into r1330;\n    not r1330 into r1331;\n    is.eq r1312.hi 340282366920938463463374607431768211455u128 into r1332;\n    is.eq r1312.lo 340282366920938463463374607431768211455u128 into r1333;\n    and r1332 r1333 into r1334;\n    and r1331 r1334 into r1335;\n    not r1335 into r1336;\n    assert.eq r1336 true;\n    add.w r1312.lo 1u128 into r1337;\n    lt r1337 r1312.lo into r1338;\n    ternary r1338 1u128 0u128 into r1339;\n    add.w r1312.hi r1339 into r1340;\n    cast r1340 r1337 into r1341 as U256__8JquwLopp8;\n    ternary r1331 r1341.hi r1312.hi into r1342;\n    ternary r1331 r1341.lo r1312.lo into r1343;\n    cast r1342 r1343 into r1344 as U256__8JquwLopp8;\n    is.neq r1344.hi 0u128 into r1345;\n    lt r0.hi r29.hi into r1346;\n    gt r0.hi r29.hi into r1347;\n    lt r0.lo r29.lo into r1348;\n    ternary r1347 false r1348 into r1349;\n    ternary r1346 true r1349 into r1350;\n    ternary r1350 r0.hi r29.hi into r1351;\n    ternary r1350 r0.lo r29.lo into r1352;\n    cast r1351 r1352 into r1353 as U256__8JquwLopp8;\n    lt r0.hi r29.hi into r1354;\n    gt r0.hi r29.hi into r1355;\n    lt r0.lo r29.lo into r1356;\n    ternary r1355 false r1356 into r1357;\n    ternary r1354 true r1357 into r1358;\n    ternary r1358 r29.hi r0.hi into r1359;\n    ternary r1358 r29.lo r0.lo into r1360;\n    cast r1359 r1360 into r1361 as U256__8JquwLopp8;\n    lt r1361.lo r1353.lo into r1362;\n    ternary r1362 1u128 0u128 into r1363;\n    sub.w r1361.lo r1353.lo into r1364;\n    sub.w r1361.hi r1353.hi into r1365;\n    sub.w r1365 r1363 into r1366;\n    cast r1366 r1364 into r1367 as U256__8JquwLopp8;\n    cast 0u128 r1 into r1368 as U256__8JquwLopp8;\n    and r1368.lo 18446744073709551615u128 into r1369;\n    shr r1368.lo 64u8 into r1370;\n    and r1367.lo 18446744073709551615u128 into r1371;\n    shr r1367.lo 64u8 into r1372;\n    mul r1369 r1371 into r1373;\n    mul r1369 r1372 into r1374;\n    mul r1370 r1371 into r1375;\n    mul r1370 r1372 into r1376;\n    and r1373 18446744073709551615u128 into r1377;\n    shr r1373 64u8 into r1378;\n    and r1374 18446744073709551615u128 into r1379;\n    add r1378 r1379 into r1380;\n    and r1375 18446744073709551615u128 into r1381;\n    add r1380 r1381 into r1382;\n    and r1382 18446744073709551615u128 into r1383;\n    shr r1382 64u8 into r1384;\n    shr r1374 64u8 into r1385;\n    shr r1375 64u8 into r1386;\n    add r1385 r1386 into r1387;\n    and r1376 18446744073709551615u128 into r1388;\n    add r1387 r1388 into r1389;\n    add r1389 r1384 into r1390;\n    and r1390 18446744073709551615u128 into r1391;\n    shr r1390 64u8 into r1392;\n    shr r1376 64u8 into r1393;\n    add r1393 r1392 into r1394;\n    shl r1394 64u8 into r1395;\n    add r1395 r1391 into r1396;\n    shl r1383 64u8 into r1397;\n    add r1397 r1377 into r1398;\n    and r1368.lo 18446744073709551615u128 into r1399;\n    shr r1368.lo 64u8 into r1400;\n    and r1367.hi 18446744073709551615u128 into r1401;\n    shr r1367.hi 64u8 into r1402;\n    mul r1399 r1401 into r1403;\n    mul r1399 r1402 into r1404;\n    mul r1400 r1401 into r1405;\n    mul r1400 r1402 into r1406;\n    and r1403 18446744073709551615u128 into r1407;\n    shr r1403 64u8 into r1408;\n    and r1404 18446744073709551615u128 into r1409;\n    add r1408 r1409 into r1410;\n    and r1405 18446744073709551615u128 into r1411;\n    add r1410 r1411 into r1412;\n    and r1412 18446744073709551615u128 into r1413;\n    shr r1412 64u8 into r1414;\n    shr r1404 64u8 into r1415;\n    shr r1405 64u8 into r1416;\n    add r1415 r1416 into r1417;\n    and r1406 18446744073709551615u128 into r1418;\n    add r1417 r1418 into r1419;\n    add r1419 r1414 into r1420;\n    and r1420 18446744073709551615u128 into r1421;\n    shr r1420 64u8 into r1422;\n    shr r1406 64u8 into r1423;\n    add r1423 r1422 into r1424;\n    shl r1424 64u8 into r1425;\n    add r1425 r1421 into r1426;\n    shl r1413 64u8 into r1427;\n    add r1427 r1407 into r1428;\n    and r1368.hi 18446744073709551615u128 into r1429;\n    shr r1368.hi 64u8 into r1430;\n    and r1367.lo 18446744073709551615u128 into r1431;\n    shr r1367.lo 64u8 into r1432;\n    mul r1429 r1431 into r1433;\n    mul r1429 r1432 into r1434;\n    mul r1430 r1431 into r1435;\n    mul r1430 r1432 into r1436;\n    and r1433 18446744073709551615u128 into r1437;\n    shr r1433 64u8 into r1438;\n    and r1434 18446744073709551615u128 into r1439;\n    add r1438 r1439 into r1440;\n    and r1435 18446744073709551615u128 into r1441;\n    add r1440 r1441 into r1442;\n    and r1442 18446744073709551615u128 into r1443;\n    shr r1442 64u8 into r1444;\n    shr r1434 64u8 into r1445;\n    shr r1435 64u8 into r1446;\n    add r1445 r1446 into r1447;\n    and r1436 18446744073709551615u128 into r1448;\n    add r1447 r1448 into r1449;\n    add r1449 r1444 into r1450;\n    and r1450 18446744073709551615u128 into r1451;\n    shr r1450 64u8 into r1452;\n    shr r1436 64u8 into r1453;\n    add r1453 r1452 into r1454;\n    shl r1454 64u8 into r1455;\n    add r1455 r1451 into r1456;\n    shl r1443 64u8 into r1457;\n    add r1457 r1437 into r1458;\n    and r1368.hi 18446744073709551615u128 into r1459;\n    shr r1368.hi 64u8 into r1460;\n    and r1367.hi 18446744073709551615u128 into r1461;\n    shr r1367.hi 64u8 into r1462;\n    mul r1459 r1461 into r1463;\n    mul r1459 r1462 into r1464;\n    mul r1460 r1461 into r1465;\n    mul r1460 r1462 into r1466;\n    and r1463 18446744073709551615u128 into r1467;\n    shr r1463 64u8 into r1468;\n    and r1464 18446744073709551615u128 into r1469;\n    add r1468 r1469 into r1470;\n    and r1465 18446744073709551615u128 into r1471;\n    add r1470 r1471 into r1472;\n    and r1472 18446744073709551615u128 into r1473;\n    shr r1472 64u8 into r1474;\n    shr r1464 64u8 into r1475;\n    shr r1465 64u8 into r1476;\n    add r1475 r1476 into r1477;\n    and r1466 18446744073709551615u128 into r1478;\n    add r1477 r1478 into r1479;\n    add r1479 r1474 into r1480;\n    and r1480 18446744073709551615u128 into r1481;\n    shr r1480 64u8 into r1482;\n    shr r1466 64u8 into r1483;\n    add r1483 r1482 into r1484;\n    shl r1484 64u8 into r1485;\n    add r1485 r1481 into r1486;\n    shl r1473 64u8 into r1487;\n    add r1487 r1467 into r1488;\n    add.w r1396 r1428 into r1489;\n    lt r1489 r1396 into r1490;\n    ternary r1490 1u128 0u128 into r1491;\n    add.w r1489 r1458 into r1492;\n    lt r1492 r1489 into r1493;\n    ternary r1493 1u128 0u128 into r1494;\n    add r1491 r1494 into r1495;\n    add.w r1426 r1456 into r1496;\n    lt r1496 r1426 into r1497;\n    ternary r1497 1u128 0u128 into r1498;\n    add.w r1496 r1488 into r1499;\n    lt r1499 r1496 into r1500;\n    ternary r1500 1u128 0u128 into r1501;\n    add.w r1499 r1495 into r1502;\n    lt r1502 r1499 into r1503;\n    ternary r1503 1u128 0u128 into r1504;\n    add r1498 r1501 into r1505;\n    add r1505 r1504 into r1506;\n    add.w r1486 r1506 into r1507;\n    cast r1507 r1502 into r1508 as U256__8JquwLopp8;\n    cast r1492 r1398 into r1509 as U256__8JquwLopp8;\n    gt r1509.lo 0u128 into r1510;\n    is.eq r1509.hi 340282366920938463463374607431768211455u128 into r1511;\n    and r1510 r1511 into r1512;\n    is.neq r1508.hi 0u128 into r1513;\n    is.neq r1508.lo 0u128 into r1514;\n    or r1513 r1514 into r1515;\n    or r1515 r1512 into r1516;\n    gt r1509.lo 0u128 into r1517;\n    lt r1509.hi 340282366920938463463374607431768211455u128 into r1518;\n    and r1517 r1518 into r1519;\n    add.w r1509.hi 1u128 into r1520;\n    ternary r1519 r1520 r1509.hi into r1521;\n    ternary r10 r1344.lo r1521 into r1522;\n    ternary r10 r1345 r1516 into r1523;\n    not r1523 into r1524;\n    gte r109 r1522 into r1525;\n    and r1524 r1525 into r1526;\n    not r10 into r1527;\n    and r1527 r32 into r1528;\n    and r1528 r1526 into r1529;\n    lt r29.lo 1u128 into r1530;\n    ternary r1530 1u128 0u128 into r1531;\n    sub.w r29.lo 1u128 into r1532;\n    sub.w r29.hi r1531 into r1533;\n    cast r1533 r1532 into r1534 as U256__8JquwLopp8;\n    ternary r1529 r1534.hi r29.hi into r1535;\n    ternary r1529 r1534.lo r29.lo into r1536;\n    cast r1535 r1536 into r1537 as U256__8JquwLopp8;\n    gt r1 0u128 into r1538;\n    ternary r1538 r1 1u128 into r1539;\n    is.eq r109 0u128 into r1540;\n    cast 0u128 r1539 into r1541 as U256__8JquwLopp8;\n    shr r1541.lo 64u8 into r1542;\n    and r1541.lo 18446744073709551615u128 into r1543;\n    shr r1541.lo 64u8 into r1544;\n    and r1543 18446744073709551615u128 into r1545;\n    shr r1543 64u8 into r1546;\n    and r1544 18446744073709551615u128 into r1547;\n    add r1546 r1547 into r1548;\n    and r1548 18446744073709551615u128 into r1549;\n    shr r1548 64u8 into r1550;\n    shr r1544 64u8 into r1551;\n    add r1551 r1550 into r1552;\n    and r1552 18446744073709551615u128 into r1553;\n    shr r1552 64u8 into r1554;\n    shl r1554 64u8 into r1555;\n    add r1555 r1553 into r1556;\n    shl r1549 64u8 into r1557;\n    add r1557 r1545 into r1558;\n    shr r1541.hi 64u8 into r1559;\n    and r1541.hi 18446744073709551615u128 into r1560;\n    shr r1541.hi 64u8 into r1561;\n    and r1560 18446744073709551615u128 into r1562;\n    shr r1560 64u8 into r1563;\n    and r1561 18446744073709551615u128 into r1564;\n    add r1563 r1564 into r1565;\n    and r1565 18446744073709551615u128 into r1566;\n    shr r1565 64u8 into r1567;\n    shr r1561 64u8 into r1568;\n    add r1568 r1567 into r1569;\n    and r1569 18446744073709551615u128 into r1570;\n    shr r1569 64u8 into r1571;\n    shl r1571 64u8 into r1572;\n    add r1572 r1570 into r1573;\n    shl r1566 64u8 into r1574;\n    add r1574 r1562 into r1575;\n    lt r1558 0u128 into r1576;\n    ternary r1576 1u128 0u128 into r1577;\n    lt r1558 r1558 into r1578;\n    ternary r1578 1u128 0u128 into r1579;\n    add r1577 r1579 into r1580;\n    lt r1556 r1556 into r1581;\n    ternary r1581 1u128 0u128 into r1582;\n    add.w r1556 r1575 into r1583;\n    lt r1583 r1556 into r1584;\n    ternary r1584 1u128 0u128 into r1585;\n    add.w r1583 r1580 into r1586;\n    lt r1586 r1583 into r1587;\n    ternary r1587 1u128 0u128 into r1588;\n    add r1582 r1585 into r1589;\n    add r1589 r1588 into r1590;\n    add.w r1573 r1590 into r1591;\n    cast r1591 r1586 into r1592 as U256__8JquwLopp8;\n    cast r1558 0u128 into r1593 as U256__8JquwLopp8;\n    lt r1592.hi r0.hi into r1594;\n    gt r1592.hi r0.hi into r1595;\n    lt r1592.lo r0.lo into r1596;\n    ternary r1595 false r1596 into r1597;\n    ternary r1594 true r1597 into r1598;\n    assert.eq r1598 true;\n    gt r0.hi 0u128 into r1599;\n    ternary r1599 r0.hi r0.lo into r1600;\n    ternary r1599 128u32 0u32 into r1601;\n    gte r1600 18446744073709551616u128 into r1602;\n    shr r1600 64u8 into r1603;\n    ternary r1602 r1603 r1600 into r1604;\n    ternary r1602 64u32 0u32 into r1605;\n    gte r1604 4294967296u128 into r1606;\n    shr r1604 32u8 into r1607;\n    add r1605 32u32 into r1608;\n    ternary r1606 r1607 r1604 into r1609;\n    ternary r1606 r1608 r1605 into r1610;\n    gte r1609 65536u128 into r1611;\n    shr r1609 16u8 into r1612;\n    add r1610 16u32 into r1613;\n    ternary r1611 r1612 r1609 into r1614;\n    ternary r1611 r1613 r1610 into r1615;\n    gte r1614 256u128 into r1616;\n    shr r1614 8u8 into r1617;\n    add r1615 8u32 into r1618;\n    ternary r1616 r1617 r1614 into r1619;\n    ternary r1616 r1618 r1615 into r1620;\n    gte r1619 16u128 into r1621;\n    shr r1619 4u8 into r1622;\n    add r1620 4u32 into r1623;\n    ternary r1621 r1622 r1619 into r1624;\n    ternary r1621 r1623 r1620 into r1625;\n    gte r1624 4u128 into r1626;\n    shr r1624 2u8 into r1627;\n    add r1625 2u32 into r1628;\n    ternary r1626 r1627 r1624 into r1629;\n    ternary r1626 r1628 r1625 into r1630;\n    gte r1629 2u128 into r1631;\n    add r1630 1u32 into r1632;\n    ternary r1631 r1632 r1630 into r1633;\n    add r1601 r1633 into r1634;\n    sub 255u32 r1634 into r1635;\n    cast r1635 into r1636 as u16;\n    and r1636 127u16 into r1637;\n    cast r1637 into r1638 as u8;\n    is.eq r1638 0u8 into r1639;\n    sub 128u8 r1638 into r1640;\n    shr.w r0.lo r1640 into r1641;\n    ternary r1639 0u128 r1641 into r1642;\n    shl.w r0.hi r1638 into r1643;\n    or r1643 r1642 into r1644;\n    shl.w r0.lo r1638 into r1645;\n    shl.w r0.lo r1638 into r1646;\n    gte r1636 128u16 into r1647;\n    ternary r1647 r1646 r1644 into r1648;\n    ternary r1647 0u128 r1645 into r1649;\n    cast r1648 r1649 into r1650 as U256__8JquwLopp8;\n    and r1650.lo 18446744073709551615u128 into r1651;\n    shr r1650.lo 64u8 into r1652;\n    and r1650.hi 18446744073709551615u128 into r1653;\n    shr r1650.hi 64u8 into r1654;\n    cast r1637 into r1655 as u8;\n    is.eq r1655 0u8 into r1656;\n    sub 128u8 r1655 into r1657;\n    shr.w r1593.lo r1657 into r1658;\n    ternary r1656 0u128 r1658 into r1659;\n    shl.w r1593.hi r1655 into r1660;\n    or r1660 r1659 into r1661;\n    shl.w r1593.lo r1655 into r1662;\n    shl.w r1593.lo r1655 into r1663;\n    ternary r1647 r1663 r1661 into r1664;\n    ternary r1647 0u128 r1662 into r1665;\n    cast r1664 r1665 into r1666 as U256__8JquwLopp8;\n    is.eq r1636 0u16 into r1667;\n    sub 256u16 r1636 into r1668;\n    and r1668 127u16 into r1669;\n    cast r1669 into r1670 as u8;\n    is.eq r1670 0u8 into r1671;\n    sub 128u8 r1670 into r1672;\n    shl.w r1593.hi r1672 into r1673;\n    ternary r1671 0u128 r1673 into r1674;\n    shr r1593.lo r1670 into r1675;\n    or r1675 r1674 into r1676;\n    shr r1593.hi r1670 into r1677;\n    shr r1593.hi r1670 into r1678;\n    gte r1668 128u16 into r1679;\n    ternary r1679 0u128 r1677 into r1680;\n    ternary r1679 r1678 r1676 into r1681;\n    cast r1680 r1681 into r1682 as U256__8JquwLopp8;\n    ternary r1667 0u128 r1682.hi into r1683;\n    ternary r1667 0u128 r1682.lo into r1684;\n    cast r1683 r1684 into r1685 as U256__8JquwLopp8;\n    cast r1637 into r1686 as u8;\n    is.eq r1686 0u8 into r1687;\n    sub 128u8 r1686 into r1688;\n    shr.w r1592.lo r1688 into r1689;\n    ternary r1687 0u128 r1689 into r1690;\n    shl.w r1592.hi r1686 into r1691;\n    or r1691 r1690 into r1692;\n    shl.w r1592.lo r1686 into r1693;\n    shl.w r1592.lo r1686 into r1694;\n    ternary r1647 r1694 r1692 into r1695;\n    ternary r1647 0u128 r1693 into r1696;\n    cast r1695 r1696 into r1697 as U256__8JquwLopp8;\n    add.w r1697.lo r1685.lo into r1698;\n    lt r1698 r1697.lo into r1699;\n    ternary r1699 1u128 0u128 into r1700;\n    add.w r1697.hi r1685.hi into r1701;\n    add.w r1701 r1700 into r1702;\n    cast r1702 r1698 into r1703 as U256__8JquwLopp8;\n    and r1666.lo 18446744073709551615u128 into r1704;\n    shr r1666.lo 64u8 into r1705;\n    and r1666.hi 18446744073709551615u128 into r1706;\n    shr r1666.hi 64u8 into r1707;\n    and r1703.lo 18446744073709551615u128 into r1708;\n    shr r1703.lo 64u8 into r1709;\n    and r1703.hi 18446744073709551615u128 into r1710;\n    shr r1703.hi 64u8 into r1711;\n    shl r1711 64u8 into r1712;\n    add r1712 r1710 into r1713;\n    div r1713 r1654 into r1714;\n    gt r1714 18446744073709551615u128 into r1715;\n    ternary r1715 18446744073709551615u128 r1714 into r1716;\n    mul r1716 r1654 into r1717;\n    sub r1713 r1717 into r1718;\n    lte r1718 18446744073709551615u128 into r1719;\n    mul r1716 r1653 into r1720;\n    and r1718 18446744073709551615u128 into r1721;\n    shl r1721 64u8 into r1722;\n    add r1722 r1709 into r1723;\n    gt r1720 r1723 into r1724;\n    and r1719 r1724 into r1725;\n    sub.w r1716 1u128 into r1726;\n    ternary r1725 r1726 r1716 into r1727;\n    add r1718 r1654 into r1728;\n    ternary r1725 r1728 r1718 into r1729;\n    lte r1729 18446744073709551615u128 into r1730;\n    and r1725 r1730 into r1731;\n    mul r1727 r1653 into r1732;\n    and r1729 18446744073709551615u128 into r1733;\n    shl r1733 64u8 into r1734;\n    add r1734 r1709 into r1735;\n    gt r1732 r1735 into r1736;\n    and r1731 r1736 into r1737;\n    sub.w r1727 1u128 into r1738;\n    ternary r1737 r1738 r1727 into r1739;\n    mul r1739 r1651 into r1740;\n    and r1740 18446744073709551615u128 into r1741;\n    lt r1707 r1741 into r1742;\n    add r1707 18446744073709551616u128 into r1743;\n    sub r1743 r1741 into r1744;\n    and r1744 18446744073709551615u128 into r1745;\n    shr r1740 64u8 into r1746;\n    ternary r1742 1u128 0u128 into r1747;\n    add r1746 r1747 into r1748;\n    mul r1739 r1652 into r1749;\n    add r1749 r1748 into r1750;\n    and r1750 18446744073709551615u128 into r1751;\n    lt r1708 r1751 into r1752;\n    add r1708 18446744073709551616u128 into r1753;\n    sub r1753 r1751 into r1754;\n    and r1754 18446744073709551615u128 into r1755;\n    shr r1750 64u8 into r1756;\n    ternary r1752 1u128 0u128 into r1757;\n    add r1756 r1757 into r1758;\n    mul r1739 r1653 into r1759;\n    add r1759 r1758 into r1760;\n    and r1760 18446744073709551615u128 into r1761;\n    lt r1709 r1761 into r1762;\n    add r1709 18446744073709551616u128 into r1763;\n    sub r1763 r1761 into r1764;\n    and r1764 18446744073709551615u128 into r1765;\n    shr r1760 64u8 into r1766;\n    ternary r1762 1u128 0u128 into r1767;\n    add r1766 r1767 into r1768;\n    mul r1739 r1654 into r1769;\n    add r1769 r1768 into r1770;\n    and r1770 18446744073709551615u128 into r1771;\n    lt r1710 r1771 into r1772;\n    add r1710 18446744073709551616u128 into r1773;\n    sub r1773 r1771 into r1774;\n    and r1774 18446744073709551615u128 into r1775;\n    shr r1770 64u8 into r1776;\n    ternary r1772 1u128 0u128 into r1777;\n    add r1776 r1777 into r1778;\n    lt r1711 r1778 into r1779;\n    add r1711 18446744073709551616u128 into r1780;\n    sub r1780 r1778 into r1781;\n    and r1781 18446744073709551615u128 into r1782;\n    sub.w r1739 1u128 into r1783;\n    ternary r1779 r1783 r1739 into r1784;\n    add r1745 r1651 into r1785;\n    and r1785 18446744073709551615u128 into r1786;\n    ternary r1779 r1786 r1745 into r1787;\n    shr r1785 64u8 into r1788;\n    ternary r1779 r1788 0u128 into r1789;\n    add r1755 r1652 into r1790;\n    add r1790 r1789 into r1791;\n    and r1791 18446744073709551615u128 into r1792;\n    ternary r1779 r1792 r1755 into r1793;\n    shr r1791 64u8 into r1794;\n    ternary r1779 r1794 0u128 into r1795;\n    add r1765 r1653 into r1796;\n    add r1796 r1795 into r1797;\n    and r1797 18446744073709551615u128 into r1798;\n    ternary r1779 r1798 r1765 into r1799;\n    shr r1797 64u8 into r1800;\n    ternary r1779 r1800 0u128 into r1801;\n    add r1775 r1654 into r1802;\n    add r1802 r1801 into r1803;\n    and r1803 18446744073709551615u128 into r1804;\n    ternary r1779 r1804 r1775 into r1805;\n    shr r1803 64u8 into r1806;\n    ternary r1779 r1806 0u128 into r1807;\n    add r1782 r1807 into r1808;\n    shl r1805 64u8 into r1809;\n    add r1809 r1799 into r1810;\n    div r1810 r1654 into r1811;\n    gt r1811 18446744073709551615u128 into r1812;\n    ternary r1812 18446744073709551615u128 r1811 into r1813;\n    mul r1813 r1654 into r1814;\n    sub r1810 r1814 into r1815;\n    lte r1815 18446744073709551615u128 into r1816;\n    mul r1813 r1653 into r1817;\n    and r1815 18446744073709551615u128 into r1818;\n    shl r1818 64u8 into r1819;\n    add r1819 r1793 into r1820;\n    gt r1817 r1820 into r1821;\n    and r1816 r1821 into r1822;\n    sub.w r1813 1u128 into r1823;\n    ternary r1822 r1823 r1813 into r1824;\n    add r1815 r1654 into r1825;\n    ternary r1822 r1825 r1815 into r1826;\n    lte r1826 18446744073709551615u128 into r1827;\n    and r1822 r1827 into r1828;\n    mul r1824 r1653 into r1829;\n    and r1826 18446744073709551615u128 into r1830;\n    shl r1830 64u8 into r1831;\n    add r1831 r1793 into r1832;\n    gt r1829 r1832 into r1833;\n    and r1828 r1833 into r1834;\n    sub.w r1824 1u128 into r1835;\n    ternary r1834 r1835 r1824 into r1836;\n    mul r1836 r1651 into r1837;\n    and r1837 18446744073709551615u128 into r1838;\n    lt r1706 r1838 into r1839;\n    add r1706 18446744073709551616u128 into r1840;\n    sub r1840 r1838 into r1841;\n    and r1841 18446744073709551615u128 into r1842;\n    shr r1837 64u8 into r1843;\n    ternary r1839 1u128 0u128 into r1844;\n    add r1843 r1844 into r1845;\n    mul r1836 r1652 into r1846;\n    add r1846 r1845 into r1847;\n    and r1847 18446744073709551615u128 into r1848;\n    lt r1787 r1848 into r1849;\n    add r1787 18446744073709551616u128 into r1850;\n    sub r1850 r1848 into r1851;\n    and r1851 18446744073709551615u128 into r1852;\n    shr r1847 64u8 into r1853;\n    ternary r1849 1u128 0u128 into r1854;\n    add r1853 r1854 into r1855;\n    mul r1836 r1653 into r1856;\n    add r1856 r1855 into r1857;\n    and r1857 18446744073709551615u128 into r1858;\n    lt r1793 r1858 into r1859;\n    add r1793 18446744073709551616u128 into r1860;\n    sub r1860 r1858 into r1861;\n    and r1861 18446744073709551615u128 into r1862;\n    shr r1857 64u8 into r1863;\n    ternary r1859 1u128 0u128 into r1864;\n    add r1863 r1864 into r1865;\n    mul r1836 r1654 into r1866;\n    add r1866 r1865 into r1867;\n    and r1867 18446744073709551615u128 into r1868;\n    lt r1799 r1868 into r1869;\n    add r1799 18446744073709551616u128 into r1870;\n    sub r1870 r1868 into r1871;\n    and r1871 18446744073709551615u128 into r1872;\n    shr r1867 64u8 into r1873;\n    ternary r1869 1u128 0u128 into r1874;\n    add r1873 r1874 into r1875;\n    lt r1805 r1875 into r1876;\n    add r1805 18446744073709551616u128 into r1877;\n    sub r1877 r1875 into r1878;\n    and r1878 18446744073709551615u128 into r1879;\n    sub.w r1836 1u128 into r1880;\n    ternary r1876 r1880 r1836 into r1881;\n    add r1842 r1651 into r1882;\n    and r1882 18446744073709551615u128 into r1883;\n    ternary r1876 r1883 r1842 into r1884;\n    shr r1882 64u8 into r1885;\n    ternary r1876 r1885 0u128 into r1886;\n    add r1852 r1652 into r1887;\n    add r1887 r1886 into r1888;\n    and r1888 18446744073709551615u128 into r1889;\n    ternary r1876 r1889 r1852 into r1890;\n    shr r1888 64u8 into r1891;\n    ternary r1876 r1891 0u128 into r1892;\n    add r1862 r1653 into r1893;\n    add r1893 r1892 into r1894;\n    and r1894 18446744073709551615u128 into r1895;\n    ternary r1876 r1895 r1862 into r1896;\n    shr r1894 64u8 into r1897;\n    ternary r1876 r1897 0u128 into r1898;\n    add r1872 r1654 into r1899;\n    add r1899 r1898 into r1900;\n    and r1900 18446744073709551615u128 into r1901;\n    ternary r1876 r1901 r1872 into r1902;\n    shr r1900 64u8 into r1903;\n    ternary r1876 r1903 0u128 into r1904;\n    add r1879 r1904 into r1905;\n    shl r1902 64u8 into r1906;\n    add r1906 r1896 into r1907;\n    div r1907 r1654 into r1908;\n    gt r1908 18446744073709551615u128 into r1909;\n    ternary r1909 18446744073709551615u128 r1908 into r1910;\n    mul r1910 r1654 into r1911;\n    sub r1907 r1911 into r1912;\n    lte r1912 18446744073709551615u128 into r1913;\n    mul r1910 r1653 into r1914;\n    and r1912 18446744073709551615u128 into r1915;\n    shl r1915 64u8 into r1916;\n    add r1916 r1890 into r1917;\n    gt r1914 r1917 into r1918;\n    and r1913 r1918 into r1919;\n    sub.w r1910 1u128 into r1920;\n    ternary r1919 r1920 r1910 into r1921;\n    add r1912 r1654 into r1922;\n    ternary r1919 r1922 r1912 into r1923;\n    lte r1923 18446744073709551615u128 into r1924;\n    and r1919 r1924 into r1925;\n    mul r1921 r1653 into r1926;\n    and r1923 18446744073709551615u128 into r1927;\n    shl r1927 64u8 into r1928;\n    add r1928 r1890 into r1929;\n    gt r1926 r1929 into r1930;\n    and r1925 r1930 into r1931;\n    sub.w r1921 1u128 into r1932;\n    ternary r1931 r1932 r1921 into r1933;\n    mul r1933 r1651 into r1934;\n    and r1934 18446744073709551615u128 into r1935;\n    lt r1705 r1935 into r1936;\n    add r1705 18446744073709551616u128 into r1937;\n    sub r1937 r1935 into r1938;\n    and r1938 18446744073709551615u128 into r1939;\n    shr r1934 64u8 into r1940;\n    ternary r1936 1u128 0u128 into r1941;\n    add r1940 r1941 into r1942;\n    mul r1933 r1652 into r1943;\n    add r1943 r1942 into r1944;\n    and r1944 18446744073709551615u128 into r1945;\n    lt r1884 r1945 into r1946;\n    add r1884 18446744073709551616u128 into r1947;\n    sub r1947 r1945 into r1948;\n    and r1948 18446744073709551615u128 into r1949;\n    shr r1944 64u8 into r1950;\n    ternary r1946 1u128 0u128 into r1951;\n    add r1950 r1951 into r1952;\n    mul r1933 r1653 into r1953;\n    add r1953 r1952 into r1954;\n    and r1954 18446744073709551615u128 into r1955;\n    lt r1890 r1955 into r1956;\n    add r1890 18446744073709551616u128 into r1957;\n    sub r1957 r1955 into r1958;\n    and r1958 18446744073709551615u128 into r1959;\n    shr r1954 64u8 into r1960;\n    ternary r1956 1u128 0u128 into r1961;\n    add r1960 r1961 into r1962;\n    mul r1933 r1654 into r1963;\n    add r1963 r1962 into r1964;\n    and r1964 18446744073709551615u128 into r1965;\n    lt r1896 r1965 into r1966;\n    add r1896 18446744073709551616u128 into r1967;\n    sub r1967 r1965 into r1968;\n    and r1968 18446744073709551615u128 into r1969;\n    shr r1964 64u8 into r1970;\n    ternary r1966 1u128 0u128 into r1971;\n    add r1970 r1971 into r1972;\n    lt r1902 r1972 into r1973;\n    add r1902 18446744073709551616u128 into r1974;\n    sub r1974 r1972 into r1975;\n    and r1975 18446744073709551615u128 into r1976;\n    sub.w r1933 1u128 into r1977;\n    ternary r1973 r1977 r1933 into r1978;\n    add r1939 r1651 into r1979;\n    and r1979 18446744073709551615u128 into r1980;\n    ternary r1973 r1980 r1939 into r1981;\n    shr r1979 64u8 into r1982;\n    ternary r1973 r1982 0u128 into r1983;\n    add r1949 r1652 into r1984;\n    add r1984 r1983 into r1985;\n    and r1985 18446744073709551615u128 into r1986;\n    ternary r1973 r1986 r1949 into r1987;\n    shr r1985 64u8 into r1988;\n    ternary r1973 r1988 0u128 into r1989;\n    add r1959 r1653 into r1990;\n    add r1990 r1989 into r1991;\n    and r1991 18446744073709551615u128 into r1992;\n    ternary r1973 r1992 r1959 into r1993;\n    shr r1991 64u8 into r1994;\n    ternary r1973 r1994 0u128 into r1995;\n    add r1969 r1654 into r1996;\n    add r1996 r1995 into r1997;\n    and r1997 18446744073709551615u128 into r1998;\n    ternary r1973 r1998 r1969 into r1999;\n    shr r1997 64u8 into r2000;\n    ternary r1973 r2000 0u128 into r2001;\n    add r1976 r2001 into r2002;\n    shl r1999 64u8 into r2003;\n    add r2003 r1993 into r2004;\n    div r2004 r1654 into r2005;\n    gt r2005 18446744073709551615u128 into r2006;\n    ternary r2006 18446744073709551615u128 r2005 into r2007;\n    mul r2007 r1654 into r2008;\n    sub r2004 r2008 into r2009;\n    lte r2009 18446744073709551615u128 into r2010;\n    mul r2007 r1653 into r2011;\n    and r2009 18446744073709551615u128 into r2012;\n    shl r2012 64u8 into r2013;\n    add r2013 r1987 into r2014;\n    gt r2011 r2014 into r2015;\n    and r2010 r2015 into r2016;\n    sub.w r2007 1u128 into r2017;\n    ternary r2016 r2017 r2007 into r2018;\n    add r2009 r1654 into r2019;\n    ternary r2016 r2019 r2009 into r2020;\n    lte r2020 18446744073709551615u128 into r2021;\n    and r2016 r2021 into r2022;\n    mul r2018 r1653 into r2023;\n    and r2020 18446744073709551615u128 into r2024;\n    shl r2024 64u8 into r2025;\n    add r2025 r1987 into r2026;\n    gt r2023 r2026 into r2027;\n    and r2022 r2027 into r2028;\n    sub.w r2018 1u128 into r2029;\n    ternary r2028 r2029 r2018 into r2030;\n    mul r2030 r1651 into r2031;\n    and r2031 18446744073709551615u128 into r2032;\n    lt r1704 r2032 into r2033;\n    add r1704 18446744073709551616u128 into r2034;\n    sub r2034 r2032 into r2035;\n    and r2035 18446744073709551615u128 into r2036;\n    shr r2031 64u8 into r2037;\n    ternary r2033 1u128 0u128 into r2038;\n    add r2037 r2038 into r2039;\n    mul r2030 r1652 into r2040;\n    add r2040 r2039 into r2041;\n    and r2041 18446744073709551615u128 into r2042;\n    lt r1981 r2042 into r2043;\n    add r1981 18446744073709551616u128 into r2044;\n    sub r2044 r2042 into r2045;\n    and r2045 18446744073709551615u128 into r2046;\n    shr r2041 64u8 into r2047;\n    ternary r2043 1u128 0u128 into r2048;\n    add r2047 r2048 into r2049;\n    mul r2030 r1653 into r2050;\n    add r2050 r2049 into r2051;\n    and r2051 18446744073709551615u128 into r2052;\n    lt r1987 r2052 into r2053;\n    add r1987 18446744073709551616u128 into r2054;\n    sub r2054 r2052 into r2055;\n    and r2055 18446744073709551615u128 into r2056;\n    shr r2051 64u8 into r2057;\n    ternary r2053 1u128 0u128 into r2058;\n    add r2057 r2058 into r2059;\n    mul r2030 r1654 into r2060;\n    add r2060 r2059 into r2061;\n    and r2061 18446744073709551615u128 into r2062;\n    lt r1993 r2062 into r2063;\n    add r1993 18446744073709551616u128 into r2064;\n    sub r2064 r2062 into r2065;\n    and r2065 18446744073709551615u128 into r2066;\n    shr r2061 64u8 into r2067;\n    ternary r2063 1u128 0u128 into r2068;\n    add r2067 r2068 into r2069;\n    lt r1999 r2069 into r2070;\n    add r1999 18446744073709551616u128 into r2071;\n    sub r2071 r2069 into r2072;\n    and r2072 18446744073709551615u128 into r2073;\n    sub.w r2030 1u128 into r2074;\n    ternary r2070 r2074 r2030 into r2075;\n    add r2036 r1651 into r2076;\n    and r2076 18446744073709551615u128 into r2077;\n    ternary r2070 r2077 r2036 into r2078;\n    shr r2076 64u8 into r2079;\n    ternary r2070 r2079 0u128 into r2080;\n    add r2046 r1652 into r2081;\n    add r2081 r2080 into r2082;\n    and r2082 18446744073709551615u128 into r2083;\n    ternary r2070 r2083 r2046 into r2084;\n    shr r2082 64u8 into r2085;\n    ternary r2070 r2085 0u128 into r2086;\n    add r2056 r1653 into r2087;\n    add r2087 r2086 into r2088;\n    and r2088 18446744073709551615u128 into r2089;\n    ternary r2070 r2089 r2056 into r2090;\n    shr r2088 64u8 into r2091;\n    ternary r2070 r2091 0u128 into r2092;\n    add r2066 r1654 into r2093;\n    add r2093 r2092 into r2094;\n    and r2094 18446744073709551615u128 into r2095;\n    ternary r2070 r2095 r2066 into r2096;\n    shr r2094 64u8 into r2097;\n    ternary r2070 r2097 0u128 into r2098;\n    add r2073 r2098 into r2099;\n    shl r1784 64u8 into r2100;\n    add r2100 r1881 into r2101;\n    shl r1978 64u8 into r2102;\n    add r2102 r2075 into r2103;\n    cast r2101 r2103 into r2104 as U256__8JquwLopp8;\n    shl r2096 64u8 into r2105;\n    add r2105 r2090 into r2106;\n    shl r2084 64u8 into r2107;\n    add r2107 r2078 into r2108;\n    cast r1637 into r2109 as u8;\n    sub 128u8 r2109 into r2110;\n    shr r2108 r2109 into r2111;\n    shr r2106 r2109 into r2112;\n    cast r2104.hi r2104.lo into r2113 as U256__8JquwLopp8;\n    cast 0u128 r109 into r2114 as U256__8JquwLopp8;\n    add.w r2113.lo r2114.lo into r2115;\n    lt r2115 r2113.lo into r2116;\n    ternary r2116 1u128 0u128 into r2117;\n    add.w r2113.hi r2114.hi into r2118;\n    add.w r2118 r2117 into r2119;\n    cast r2119 r2115 into r2120 as U256__8JquwLopp8;\n    cast r2120.hi r2120.lo into r2121 as U256__8JquwLopp8;\n    is.eq r2121.hi 0u128 into r2122;\n    is.eq r2121.lo 0u128 into r2123;\n    and r2122 r2123 into r2124;\n    ternary r2124 0u128 r2121.hi into r2125;\n    ternary r2124 1u128 r2121.lo into r2126;\n    cast r2125 r2126 into r2127 as U256__8JquwLopp8;\n    cast 0u128 r1539 into r2128 as U256__8JquwLopp8;\n    shr r2128.lo 64u8 into r2129;\n    and r2128.lo 18446744073709551615u128 into r2130;\n    shr r2128.lo 64u8 into r2131;\n    and r2130 18446744073709551615u128 into r2132;\n    shr r2130 64u8 into r2133;\n    and r2131 18446744073709551615u128 into r2134;\n    add r2133 r2134 into r2135;\n    and r2135 18446744073709551615u128 into r2136;\n    shr r2135 64u8 into r2137;\n    shr r2131 64u8 into r2138;\n    add r2138 r2137 into r2139;\n    and r2139 18446744073709551615u128 into r2140;\n    shr r2139 64u8 into r2141;\n    shl r2141 64u8 into r2142;\n    add r2142 r2140 into r2143;\n    shl r2136 64u8 into r2144;\n    add r2144 r2132 into r2145;\n    shr r2128.hi 64u8 into r2146;\n    and r2128.hi 18446744073709551615u128 into r2147;\n    shr r2128.hi 64u8 into r2148;\n    and r2147 18446744073709551615u128 into r2149;\n    shr r2147 64u8 into r2150;\n    and r2148 18446744073709551615u128 into r2151;\n    add r2150 r2151 into r2152;\n    and r2152 18446744073709551615u128 into r2153;\n    shr r2152 64u8 into r2154;\n    shr r2148 64u8 into r2155;\n    add r2155 r2154 into r2156;\n    and r2156 18446744073709551615u128 into r2157;\n    shr r2156 64u8 into r2158;\n    shl r2158 64u8 into r2159;\n    add r2159 r2157 into r2160;\n    shl r2153 64u8 into r2161;\n    add r2161 r2149 into r2162;\n    lt r2145 0u128 into r2163;\n    ternary r2163 1u128 0u128 into r2164;\n    lt r2145 r2145 into r2165;\n    ternary r2165 1u128 0u128 into r2166;\n    add r2164 r2166 into r2167;\n    lt r2143 r2143 into r2168;\n    ternary r2168 1u128 0u128 into r2169;\n    add.w r2143 r2162 into r2170;\n    lt r2170 r2143 into r2171;\n    ternary r2171 1u128 0u128 into r2172;\n    add.w r2170 r2167 into r2173;\n    lt r2173 r2170 into r2174;\n    ternary r2174 1u128 0u128 into r2175;\n    add r2169 r2172 into r2176;\n    add r2176 r2175 into r2177;\n    add.w r2160 r2177 into r2178;\n    cast r2178 r2173 into r2179 as U256__8JquwLopp8;\n    cast r2145 0u128 into r2180 as U256__8JquwLopp8;\n    lt r2179.hi r2127.hi into r2181;\n    gt r2179.hi r2127.hi into r2182;\n    lt r2179.lo r2127.lo into r2183;\n    ternary r2182 false r2183 into r2184;\n    ternary r2181 true r2184 into r2185;\n    assert.eq r2185 true;\n    gt r2127.hi 0u128 into r2186;\n    ternary r2186 r2127.hi r2127.lo into r2187;\n    ternary r2186 128u32 0u32 into r2188;\n    gte r2187 18446744073709551616u128 into r2189;\n    shr r2187 64u8 into r2190;\n    ternary r2189 r2190 r2187 into r2191;\n    ternary r2189 64u32 0u32 into r2192;\n    gte r2191 4294967296u128 into r2193;\n    shr r2191 32u8 into r2194;\n    add r2192 32u32 into r2195;\n    ternary r2193 r2194 r2191 into r2196;\n    ternary r2193 r2195 r2192 into r2197;\n    gte r2196 65536u128 into r2198;\n    shr r2196 16u8 into r2199;\n    add r2197 16u32 into r2200;\n    ternary r2198 r2199 r2196 into r2201;\n    ternary r2198 r2200 r2197 into r2202;\n    gte r2201 256u128 into r2203;\n    shr r2201 8u8 into r2204;\n    add r2202 8u32 into r2205;\n    ternary r2203 r2204 r2201 into r2206;\n    ternary r2203 r2205 r2202 into r2207;\n    gte r2206 16u128 into r2208;\n    shr r2206 4u8 into r2209;\n    add r2207 4u32 into r2210;\n    ternary r2208 r2209 r2206 into r2211;\n    ternary r2208 r2210 r2207 into r2212;\n    gte r2211 4u128 into r2213;\n    shr r2211 2u8 into r2214;\n    add r2212 2u32 into r2215;\n    ternary r2213 r2214 r2211 into r2216;\n    ternary r2213 r2215 r2212 into r2217;\n    gte r2216 2u128 into r2218;\n    add r2217 1u32 into r2219;\n    ternary r2218 r2219 r2217 into r2220;\n    add r2188 r2220 into r2221;\n    sub 255u32 r2221 into r2222;\n    cast r2222 into r2223 as u16;\n    and r2223 127u16 into r2224;\n    cast r2224 into r2225 as u8;\n    is.eq r2225 0u8 into r2226;\n    sub 128u8 r2225 into r2227;\n    shr.w r2127.lo r2227 into r2228;\n    ternary r2226 0u128 r2228 into r2229;\n    shl.w r2127.hi r2225 into r2230;\n    or r2230 r2229 into r2231;\n    shl.w r2127.lo r2225 into r2232;\n    shl.w r2127.lo r2225 into r2233;\n    gte r2223 128u16 into r2234;\n    ternary r2234 r2233 r2231 into r2235;\n    ternary r2234 0u128 r2232 into r2236;\n    cast r2235 r2236 into r2237 as U256__8JquwLopp8;\n    and r2237.lo 18446744073709551615u128 into r2238;\n    shr r2237.lo 64u8 into r2239;\n    and r2237.hi 18446744073709551615u128 into r2240;\n    shr r2237.hi 64u8 into r2241;\n    cast r2224 into r2242 as u8;\n    is.eq r2242 0u8 into r2243;\n    sub 128u8 r2242 into r2244;\n    shr.w r2180.lo r2244 into r2245;\n    ternary r2243 0u128 r2245 into r2246;\n    shl.w r2180.hi r2242 into r2247;\n    or r2247 r2246 into r2248;\n    shl.w r2180.lo r2242 into r2249;\n    shl.w r2180.lo r2242 into r2250;\n    ternary r2234 r2250 r2248 into r2251;\n    ternary r2234 0u128 r2249 into r2252;\n    cast r2251 r2252 into r2253 as U256__8JquwLopp8;\n    is.eq r2223 0u16 into r2254;\n    sub 256u16 r2223 into r2255;\n    and r2255 127u16 into r2256;\n    cast r2256 into r2257 as u8;\n    is.eq r2257 0u8 into r2258;\n    sub 128u8 r2257 into r2259;\n    shl.w r2180.hi r2259 into r2260;\n    ternary r2258 0u128 r2260 into r2261;\n    shr r2180.lo r2257 into r2262;\n    or r2262 r2261 into r2263;\n    shr r2180.hi r2257 into r2264;\n    shr r2180.hi r2257 into r2265;\n    gte r2255 128u16 into r2266;\n    ternary r2266 0u128 r2264 into r2267;\n    ternary r2266 r2265 r2263 into r2268;\n    cast r2267 r2268 into r2269 as U256__8JquwLopp8;\n    ternary r2254 0u128 r2269.hi into r2270;\n    ternary r2254 0u128 r2269.lo into r2271;\n    cast r2270 r2271 into r2272 as U256__8JquwLopp8;\n    cast r2224 into r2273 as u8;\n    is.eq r2273 0u8 into r2274;\n    sub 128u8 r2273 into r2275;\n    shr.w r2179.lo r2275 into r2276;\n    ternary r2274 0u128 r2276 into r2277;\n    shl.w r2179.hi r2273 into r2278;\n    or r2278 r2277 into r2279;\n    shl.w r2179.lo r2273 into r2280;\n    shl.w r2179.lo r2273 into r2281;\n    ternary r2234 r2281 r2279 into r2282;\n    ternary r2234 0u128 r2280 into r2283;\n    cast r2282 r2283 into r2284 as U256__8JquwLopp8;\n    add.w r2284.lo r2272.lo into r2285;\n    lt r2285 r2284.lo into r2286;\n    ternary r2286 1u128 0u128 into r2287;\n    add.w r2284.hi r2272.hi into r2288;\n    add.w r2288 r2287 into r2289;\n    cast r2289 r2285 into r2290 as U256__8JquwLopp8;\n    and r2253.lo 18446744073709551615u128 into r2291;\n    shr r2253.lo 64u8 into r2292;\n    and r2253.hi 18446744073709551615u128 into r2293;\n    shr r2253.hi 64u8 into r2294;\n    and r2290.lo 18446744073709551615u128 into r2295;\n    shr r2290.lo 64u8 into r2296;\n    and r2290.hi 18446744073709551615u128 into r2297;\n    shr r2290.hi 64u8 into r2298;\n    shl r2298 64u8 into r2299;\n    add r2299 r2297 into r2300;\n    div r2300 r2241 into r2301;\n    gt r2301 18446744073709551615u128 into r2302;\n    ternary r2302 18446744073709551615u128 r2301 into r2303;\n    mul r2303 r2241 into r2304;\n    sub r2300 r2304 into r2305;\n    lte r2305 18446744073709551615u128 into r2306;\n    mul r2303 r2240 into r2307;\n    and r2305 18446744073709551615u128 into r2308;\n    shl r2308 64u8 into r2309;\n    add r2309 r2296 into r2310;\n    gt r2307 r2310 into r2311;\n    and r2306 r2311 into r2312;\n    sub.w r2303 1u128 into r2313;\n    ternary r2312 r2313 r2303 into r2314;\n    add r2305 r2241 into r2315;\n    ternary r2312 r2315 r2305 into r2316;\n    lte r2316 18446744073709551615u128 into r2317;\n    and r2312 r2317 into r2318;\n    mul r2314 r2240 into r2319;\n    and r2316 18446744073709551615u128 into r2320;\n    shl r2320 64u8 into r2321;\n    add r2321 r2296 into r2322;\n    gt r2319 r2322 into r2323;\n    and r2318 r2323 into r2324;\n    sub.w r2314 1u128 into r2325;\n    ternary r2324 r2325 r2314 into r2326;\n    mul r2326 r2238 into r2327;\n    and r2327 18446744073709551615u128 into r2328;\n    lt r2294 r2328 into r2329;\n    add r2294 18446744073709551616u128 into r2330;\n    sub r2330 r2328 into r2331;\n    and r2331 18446744073709551615u128 into r2332;\n    shr r2327 64u8 into r2333;\n    ternary r2329 1u128 0u128 into r2334;\n    add r2333 r2334 into r2335;\n    mul r2326 r2239 into r2336;\n    add r2336 r2335 into r2337;\n    and r2337 18446744073709551615u128 into r2338;\n    lt r2295 r2338 into r2339;\n    add r2295 18446744073709551616u128 into r2340;\n    sub r2340 r2338 into r2341;\n    and r2341 18446744073709551615u128 into r2342;\n    shr r2337 64u8 into r2343;\n    ternary r2339 1u128 0u128 into r2344;\n    add r2343 r2344 into r2345;\n    mul r2326 r2240 into r2346;\n    add r2346 r2345 into r2347;\n    and r2347 18446744073709551615u128 into r2348;\n    lt r2296 r2348 into r2349;\n    add r2296 18446744073709551616u128 into r2350;\n    sub r2350 r2348 into r2351;\n    and r2351 18446744073709551615u128 into r2352;\n    shr r2347 64u8 into r2353;\n    ternary r2349 1u128 0u128 into r2354;\n    add r2353 r2354 into r2355;\n    mul r2326 r2241 into r2356;\n    add r2356 r2355 into r2357;\n    and r2357 18446744073709551615u128 into r2358;\n    lt r2297 r2358 into r2359;\n    add r2297 18446744073709551616u128 into r2360;\n    sub r2360 r2358 into r2361;\n    and r2361 18446744073709551615u128 into r2362;\n    shr r2357 64u8 into r2363;\n    ternary r2359 1u128 0u128 into r2364;\n    add r2363 r2364 into r2365;\n    lt r2298 r2365 into r2366;\n    add r2298 18446744073709551616u128 into r2367;\n    sub r2367 r2365 into r2368;\n    and r2368 18446744073709551615u128 into r2369;\n    sub.w r2326 1u128 into r2370;\n    ternary r2366 r2370 r2326 into r2371;\n    add r2332 r2238 into r2372;\n    and r2372 18446744073709551615u128 into r2373;\n    ternary r2366 r2373 r2332 into r2374;\n    shr r2372 64u8 into r2375;\n    ternary r2366 r2375 0u128 into r2376;\n    add r2342 r2239 into r2377;\n    add r2377 r2376 into r2378;\n    and r2378 18446744073709551615u128 into r2379;\n    ternary r2366 r2379 r2342 into r2380;\n    shr r2378 64u8 into r2381;\n    ternary r2366 r2381 0u128 into r2382;\n    add r2352 r2240 into r2383;\n    add r2383 r2382 into r2384;\n    and r2384 18446744073709551615u128 into r2385;\n    ternary r2366 r2385 r2352 into r2386;\n    shr r2384 64u8 into r2387;\n    ternary r2366 r2387 0u128 into r2388;\n    add r2362 r2241 into r2389;\n    add r2389 r2388 into r2390;\n    and r2390 18446744073709551615u128 into r2391;\n    ternary r2366 r2391 r2362 into r2392;\n    shr r2390 64u8 into r2393;\n    ternary r2366 r2393 0u128 into r2394;\n    add r2369 r2394 into r2395;\n    shl r2392 64u8 into r2396;\n    add r2396 r2386 into r2397;\n    div r2397 r2241 into r2398;\n    gt r2398 18446744073709551615u128 into r2399;\n    ternary r2399 18446744073709551615u128 r2398 into r2400;\n    mul r2400 r2241 into r2401;\n    sub r2397 r2401 into r2402;\n    lte r2402 18446744073709551615u128 into r2403;\n    mul r2400 r2240 into r2404;\n    and r2402 18446744073709551615u128 into r2405;\n    shl r2405 64u8 into r2406;\n    add r2406 r2380 into r2407;\n    gt r2404 r2407 into r2408;\n    and r2403 r2408 into r2409;\n    sub.w r2400 1u128 into r2410;\n    ternary r2409 r2410 r2400 into r2411;\n    add r2402 r2241 into r2412;\n    ternary r2409 r2412 r2402 into r2413;\n    lte r2413 18446744073709551615u128 into r2414;\n    and r2409 r2414 into r2415;\n    mul r2411 r2240 into r2416;\n    and r2413 18446744073709551615u128 into r2417;\n    shl r2417 64u8 into r2418;\n    add r2418 r2380 into r2419;\n    gt r2416 r2419 into r2420;\n    and r2415 r2420 into r2421;\n    sub.w r2411 1u128 into r2422;\n    ternary r2421 r2422 r2411 into r2423;\n    mul r2423 r2238 into r2424;\n    and r2424 18446744073709551615u128 into r2425;\n    lt r2293 r2425 into r2426;\n    add r2293 18446744073709551616u128 into r2427;\n    sub r2427 r2425 into r2428;\n    and r2428 18446744073709551615u128 into r2429;\n    shr r2424 64u8 into r2430;\n    ternary r2426 1u128 0u128 into r2431;\n    add r2430 r2431 into r2432;\n    mul r2423 r2239 into r2433;\n    add r2433 r2432 into r2434;\n    and r2434 18446744073709551615u128 into r2435;\n    lt r2374 r2435 into r2436;\n    add r2374 18446744073709551616u128 into r2437;\n    sub r2437 r2435 into r2438;\n    and r2438 18446744073709551615u128 into r2439;\n    shr r2434 64u8 into r2440;\n    ternary r2436 1u128 0u128 into r2441;\n    add r2440 r2441 into r2442;\n    mul r2423 r2240 into r2443;\n    add r2443 r2442 into r2444;\n    and r2444 18446744073709551615u128 into r2445;\n    lt r2380 r2445 into r2446;\n    add r2380 18446744073709551616u128 into r2447;\n    sub r2447 r2445 into r2448;\n    and r2448 18446744073709551615u128 into r2449;\n    shr r2444 64u8 into r2450;\n    ternary r2446 1u128 0u128 into r2451;\n    add r2450 r2451 into r2452;\n    mul r2423 r2241 into r2453;\n    add r2453 r2452 into r2454;\n    and r2454 18446744073709551615u128 into r2455;\n    lt r2386 r2455 into r2456;\n    add r2386 18446744073709551616u128 into r2457;\n    sub r2457 r2455 into r2458;\n    and r2458 18446744073709551615u128 into r2459;\n    shr r2454 64u8 into r2460;\n    ternary r2456 1u128 0u128 into r2461;\n    add r2460 r2461 into r2462;\n    lt r2392 r2462 into r2463;\n    add r2392 18446744073709551616u128 into r2464;\n    sub r2464 r2462 into r2465;\n    and r2465 18446744073709551615u128 into r2466;\n    sub.w r2423 1u128 into r2467;\n    ternary r2463 r2467 r2423 into r2468;\n    add r2429 r2238 into r2469;\n    and r2469 18446744073709551615u128 into r2470;\n    ternary r2463 r2470 r2429 into r2471;\n    shr r2469 64u8 into r2472;\n    ternary r2463 r2472 0u128 into r2473;\n    add r2439 r2239 into r2474;\n    add r2474 r2473 into r2475;\n    and r2475 18446744073709551615u128 into r2476;\n    ternary r2463 r2476 r2439 into r2477;\n    shr r2475 64u8 into r2478;\n    ternary r2463 r2478 0u128 into r2479;\n    add r2449 r2240 into r2480;\n    add r2480 r2479 into r2481;\n    and r2481 18446744073709551615u128 into r2482;\n    ternary r2463 r2482 r2449 into r2483;\n    shr r2481 64u8 into r2484;\n    ternary r2463 r2484 0u128 into r2485;\n    add r2459 r2241 into r2486;\n    add r2486 r2485 into r2487;\n    and r2487 18446744073709551615u128 into r2488;\n    ternary r2463 r2488 r2459 into r2489;\n    shr r2487 64u8 into r2490;\n    ternary r2463 r2490 0u128 into r2491;\n    add r2466 r2491 into r2492;\n    shl r2489 64u8 into r2493;\n    add r2493 r2483 into r2494;\n    div r2494 r2241 into r2495;\n    gt r2495 18446744073709551615u128 into r2496;\n    ternary r2496 18446744073709551615u128 r2495 into r2497;\n    mul r2497 r2241 into r2498;\n    sub r2494 r2498 into r2499;\n    lte r2499 18446744073709551615u128 into r2500;\n    mul r2497 r2240 into r2501;\n    and r2499 18446744073709551615u128 into r2502;\n    shl r2502 64u8 into r2503;\n    add r2503 r2477 into r2504;\n    gt r2501 r2504 into r2505;\n    and r2500 r2505 into r2506;\n    sub.w r2497 1u128 into r2507;\n    ternary r2506 r2507 r2497 into r2508;\n    add r2499 r2241 into r2509;\n    ternary r2506 r2509 r2499 into r2510;\n    lte r2510 18446744073709551615u128 into r2511;\n    and r2506 r2511 into r2512;\n    mul r2508 r2240 into r2513;\n    and r2510 18446744073709551615u128 into r2514;\n    shl r2514 64u8 into r2515;\n    add r2515 r2477 into r2516;\n    gt r2513 r2516 into r2517;\n    and r2512 r2517 into r2518;\n    sub.w r2508 1u128 into r2519;\n    ternary r2518 r2519 r2508 into r2520;\n    mul r2520 r2238 into r2521;\n    and r2521 18446744073709551615u128 into r2522;\n    lt r2292 r2522 into r2523;\n    add r2292 18446744073709551616u128 into r2524;\n    sub r2524 r2522 into r2525;\n    and r2525 18446744073709551615u128 into r2526;\n    shr r2521 64u8 into r2527;\n    ternary r2523 1u128 0u128 into r2528;\n    add r2527 r2528 into r2529;\n    mul r2520 r2239 into r2530;\n    add r2530 r2529 into r2531;\n    and r2531 18446744073709551615u128 into r2532;\n    lt r2471 r2532 into r2533;\n    add r2471 18446744073709551616u128 into r2534;\n    sub r2534 r2532 into r2535;\n    and r2535 18446744073709551615u128 into r2536;\n    shr r2531 64u8 into r2537;\n    ternary r2533 1u128 0u128 into r2538;\n    add r2537 r2538 into r2539;\n    mul r2520 r2240 into r2540;\n    add r2540 r2539 into r2541;\n    and r2541 18446744073709551615u128 into r2542;\n    lt r2477 r2542 into r2543;\n    add r2477 18446744073709551616u128 into r2544;\n    sub r2544 r2542 into r2545;\n    and r2545 18446744073709551615u128 into r2546;\n    shr r2541 64u8 into r2547;\n    ternary r2543 1u128 0u128 into r2548;\n    add r2547 r2548 into r2549;\n    mul r2520 r2241 into r2550;\n    add r2550 r2549 into r2551;\n    and r2551 18446744073709551615u128 into r2552;\n    lt r2483 r2552 into r2553;\n    add r2483 18446744073709551616u128 into r2554;\n    sub r2554 r2552 into r2555;\n    and r2555 18446744073709551615u128 into r2556;\n    shr r2551 64u8 into r2557;\n    ternary r2553 1u128 0u128 into r2558;\n    add r2557 r2558 into r2559;\n    lt r2489 r2559 into r2560;\n    add r2489 18446744073709551616u128 into r2561;\n    sub r2561 r2559 into r2562;\n    and r2562 18446744073709551615u128 into r2563;\n    sub.w r2520 1u128 into r2564;\n    ternary r2560 r2564 r2520 into r2565;\n    add r2526 r2238 into r2566;\n    and r2566 18446744073709551615u128 into r2567;\n    ternary r2560 r2567 r2526 into r2568;\n    shr r2566 64u8 into r2569;\n    ternary r2560 r2569 0u128 into r2570;\n    add r2536 r2239 into r2571;\n    add r2571 r2570 into r2572;\n    and r2572 18446744073709551615u128 into r2573;\n    ternary r2560 r2573 r2536 into r2574;\n    shr r2572 64u8 into r2575;\n    ternary r2560 r2575 0u128 into r2576;\n    add r2546 r2240 into r2577;\n    add r2577 r2576 into r2578;\n    and r2578 18446744073709551615u128 into r2579;\n    ternary r2560 r2579 r2546 into r2580;\n    shr r2578 64u8 into r2581;\n    ternary r2560 r2581 0u128 into r2582;\n    add r2556 r2241 into r2583;\n    add r2583 r2582 into r2584;\n    and r2584 18446744073709551615u128 into r2585;\n    ternary r2560 r2585 r2556 into r2586;\n    shr r2584 64u8 into r2587;\n    ternary r2560 r2587 0u128 into r2588;\n    add r2563 r2588 into r2589;\n    shl r2586 64u8 into r2590;\n    add r2590 r2580 into r2591;\n    div r2591 r2241 into r2592;\n    gt r2592 18446744073709551615u128 into r2593;\n    ternary r2593 18446744073709551615u128 r2592 into r2594;\n    mul r2594 r2241 into r2595;\n    sub r2591 r2595 into r2596;\n    lte r2596 18446744073709551615u128 into r2597;\n    mul r2594 r2240 into r2598;\n    and r2596 18446744073709551615u128 into r2599;\n    shl r2599 64u8 into r2600;\n    add r2600 r2574 into r2601;\n    gt r2598 r2601 into r2602;\n    and r2597 r2602 into r2603;\n    sub.w r2594 1u128 into r2604;\n    ternary r2603 r2604 r2594 into r2605;\n    add r2596 r2241 into r2606;\n    ternary r2603 r2606 r2596 into r2607;\n    lte r2607 18446744073709551615u128 into r2608;\n    and r2603 r2608 into r2609;\n    mul r2605 r2240 into r2610;\n    and r2607 18446744073709551615u128 into r2611;\n    shl r2611 64u8 into r2612;\n    add r2612 r2574 into r2613;\n    gt r2610 r2613 into r2614;\n    and r2609 r2614 into r2615;\n    sub.w r2605 1u128 into r2616;\n    ternary r2615 r2616 r2605 into r2617;\n    mul r2617 r2238 into r2618;\n    and r2618 18446744073709551615u128 into r2619;\n    lt r2291 r2619 into r2620;\n    add r2291 18446744073709551616u128 into r2621;\n    sub r2621 r2619 into r2622;\n    and r2622 18446744073709551615u128 into r2623;\n    shr r2618 64u8 into r2624;\n    ternary r2620 1u128 0u128 into r2625;\n    add r2624 r2625 into r2626;\n    mul r2617 r2239 into r2627;\n    add r2627 r2626 into r2628;\n    and r2628 18446744073709551615u128 into r2629;\n    lt r2568 r2629 into r2630;\n    add r2568 18446744073709551616u128 into r2631;\n    sub r2631 r2629 into r2632;\n    and r2632 18446744073709551615u128 into r2633;\n    shr r2628 64u8 into r2634;\n    ternary r2630 1u128 0u128 into r2635;\n    add r2634 r2635 into r2636;\n    mul r2617 r2240 into r2637;\n    add r2637 r2636 into r2638;\n    and r2638 18446744073709551615u128 into r2639;\n    lt r2574 r2639 into r2640;\n    add r2574 18446744073709551616u128 into r2641;\n    sub r2641 r2639 into r2642;\n    and r2642 18446744073709551615u128 into r2643;\n    shr r2638 64u8 into r2644;\n    ternary r2640 1u128 0u128 into r2645;\n    add r2644 r2645 into r2646;\n    mul r2617 r2241 into r2647;\n    add r2647 r2646 into r2648;\n    and r2648 18446744073709551615u128 into r2649;\n    lt r2580 r2649 into r2650;\n    add r2580 18446744073709551616u128 into r2651;\n    sub r2651 r2649 into r2652;\n    and r2652 18446744073709551615u128 into r2653;\n    shr r2648 64u8 into r2654;\n    ternary r2650 1u128 0u128 into r2655;\n    add r2654 r2655 into r2656;\n    lt r2586 r2656 into r2657;\n    add r2586 18446744073709551616u128 into r2658;\n    sub r2658 r2656 into r2659;\n    and r2659 18446744073709551615u128 into r2660;\n    sub.w r2617 1u128 into r2661;\n    ternary r2657 r2661 r2617 into r2662;\n    add r2623 r2238 into r2663;\n    and r2663 18446744073709551615u128 into r2664;\n    ternary r2657 r2664 r2623 into r2665;\n    shr r2663 64u8 into r2666;\n    ternary r2657 r2666 0u128 into r2667;\n    add r2633 r2239 into r2668;\n    add r2668 r2667 into r2669;\n    and r2669 18446744073709551615u128 into r2670;\n    ternary r2657 r2670 r2633 into r2671;\n    shr r2669 64u8 into r2672;\n    ternary r2657 r2672 0u128 into r2673;\n    add r2643 r2240 into r2674;\n    add r2674 r2673 into r2675;\n    and r2675 18446744073709551615u128 into r2676;\n    ternary r2657 r2676 r2643 into r2677;\n    shr r2675 64u8 into r2678;\n    ternary r2657 r2678 0u128 into r2679;\n    add r2653 r2241 into r2680;\n    add r2680 r2679 into r2681;\n    and r2681 18446744073709551615u128 into r2682;\n    ternary r2657 r2682 r2653 into r2683;\n    shr r2681 64u8 into r2684;\n    ternary r2657 r2684 0u128 into r2685;\n    add r2660 r2685 into r2686;\n    shl r2371 64u8 into r2687;\n    add r2687 r2468 into r2688;\n    shl r2565 64u8 into r2689;\n    add r2689 r2662 into r2690;\n    cast r2688 r2690 into r2691 as U256__8JquwLopp8;\n    shl r2683 64u8 into r2692;\n    add r2692 r2677 into r2693;\n    shl r2671 64u8 into r2694;\n    add r2694 r2665 into r2695;\n    cast r2224 into r2696 as u8;\n    is.eq r2696 0u8 into r2697;\n    sub 128u8 r2696 into r2698;\n    shl.w r2693 r2698 into r2699;\n    ternary r2697 0u128 r2699 into r2700;\n    shr r2695 r2696 into r2701;\n    or r2701 r2700 into r2702;\n    shr r2693 r2696 into r2703;\n    ternary r2234 0u128 r2703 into r2704;\n    ternary r2234 r2703 r2702 into r2705;\n    cast r2704 r2705 into r2706 as U256__8JquwLopp8;\n    is.eq r2706.hi 0u128 into r2707;\n    is.eq r2706.lo 0u128 into r2708;\n    and r2707 r2708 into r2709;\n    not r2709 into r2710;\n    is.eq r2691.hi 340282366920938463463374607431768211455u128 into r2711;\n    is.eq r2691.lo 340282366920938463463374607431768211455u128 into r2712;\n    and r2711 r2712 into r2713;\n    and r2710 r2713 into r2714;\n    not r2714 into r2715;\n    assert.eq r2715 true;\n    add.w r2691.lo 1u128 into r2716;\n    lt r2716 r2691.lo into r2717;\n    ternary r2717 1u128 0u128 into r2718;\n    add.w r2691.hi r2718 into r2719;\n    cast r2719 r2716 into r2720 as U256__8JquwLopp8;\n    ternary r2710 r2720.hi r2691.hi into r2721;\n    ternary r2710 r2720.lo r2691.lo into r2722;\n    cast r2721 r2722 into r2723 as U256__8JquwLopp8;\n    ternary r1540 r0.hi r2723.hi into r2724;\n    ternary r1540 r0.lo r2723.lo into r2725;\n    cast r2724 r2725 into r2726 as U256__8JquwLopp8;\n    cast 0u128 r109 into r2727 as U256__8JquwLopp8;\n    cast 0u128 r1539 into r2728 as U256__8JquwLopp8;\n    shr r2727.lo 64u8 into r2729;\n    and r2727.lo 18446744073709551615u128 into r2730;\n    shr r2727.lo 64u8 into r2731;\n    and r2730 18446744073709551615u128 into r2732;\n    shr r2730 64u8 into r2733;\n    and r2731 18446744073709551615u128 into r2734;\n    add r2733 r2734 into r2735;\n    and r2735 18446744073709551615u128 into r2736;\n    shr r2735 64u8 into r2737;\n    shr r2731 64u8 into r2738;\n    add r2738 r2737 into r2739;\n    and r2739 18446744073709551615u128 into r2740;\n    shr r2739 64u8 into r2741;\n    shl r2741 64u8 into r2742;\n    add r2742 r2740 into r2743;\n    shl r2736 64u8 into r2744;\n    add r2744 r2732 into r2745;\n    shr r2727.hi 64u8 into r2746;\n    and r2727.hi 18446744073709551615u128 into r2747;\n    shr r2727.hi 64u8 into r2748;\n    and r2747 18446744073709551615u128 into r2749;\n    shr r2747 64u8 into r2750;\n    and r2748 18446744073709551615u128 into r2751;\n    add r2750 r2751 into r2752;\n    and r2752 18446744073709551615u128 into r2753;\n    shr r2752 64u8 into r2754;\n    shr r2748 64u8 into r2755;\n    add r2755 r2754 into r2756;\n    and r2756 18446744073709551615u128 into r2757;\n    shr r2756 64u8 into r2758;\n    shl r2758 64u8 into r2759;\n    add r2759 r2757 into r2760;\n    shl r2753 64u8 into r2761;\n    add r2761 r2749 into r2762;\n    lt r2745 0u128 into r2763;\n    ternary r2763 1u128 0u128 into r2764;\n    lt r2745 r2745 into r2765;\n    ternary r2765 1u128 0u128 into r2766;\n    add r2764 r2766 into r2767;\n    lt r2743 r2743 into r2768;\n    ternary r2768 1u128 0u128 into r2769;\n    add.w r2743 r2762 into r2770;\n    lt r2770 r2743 into r2771;\n    ternary r2771 1u128 0u128 into r2772;\n    add.w r2770 r2767 into r2773;\n    lt r2773 r2770 into r2774;\n    ternary r2774 1u128 0u128 into r2775;\n    add r2769 r2772 into r2776;\n    add r2776 r2775 into r2777;\n    add.w r2760 r2777 into r2778;\n    cast r2778 r2773 into r2779 as U256__8JquwLopp8;\n    cast r2745 0u128 into r2780 as U256__8JquwLopp8;\n    lt r2779.hi r2728.hi into r2781;\n    gt r2779.hi r2728.hi into r2782;\n    lt r2779.lo r2728.lo into r2783;\n    ternary r2782 false r2783 into r2784;\n    ternary r2781 true r2784 into r2785;\n    assert.eq r2785 true;\n    gt r2728.hi 0u128 into r2786;\n    ternary r2786 r2728.hi r2728.lo into r2787;\n    ternary r2786 128u32 0u32 into r2788;\n    gte r2787 18446744073709551616u128 into r2789;\n    shr r2787 64u8 into r2790;\n    ternary r2789 r2790 r2787 into r2791;\n    ternary r2789 64u32 0u32 into r2792;\n    gte r2791 4294967296u128 into r2793;\n    shr r2791 32u8 into r2794;\n    add r2792 32u32 into r2795;\n    ternary r2793 r2794 r2791 into r2796;\n    ternary r2793 r2795 r2792 into r2797;\n    gte r2796 65536u128 into r2798;\n    shr r2796 16u8 into r2799;\n    add r2797 16u32 into r2800;\n    ternary r2798 r2799 r2796 into r2801;\n    ternary r2798 r2800 r2797 into r2802;\n    gte r2801 256u128 into r2803;\n    shr r2801 8u8 into r2804;\n    add r2802 8u32 into r2805;\n    ternary r2803 r2804 r2801 into r2806;\n    ternary r2803 r2805 r2802 into r2807;\n    gte r2806 16u128 into r2808;\n    shr r2806 4u8 into r2809;\n    add r2807 4u32 into r2810;\n    ternary r2808 r2809 r2806 into r2811;\n    ternary r2808 r2810 r2807 into r2812;\n    gte r2811 4u128 into r2813;\n    shr r2811 2u8 into r2814;\n    add r2812 2u32 into r2815;\n    ternary r2813 r2814 r2811 into r2816;\n    ternary r2813 r2815 r2812 into r2817;\n    gte r2816 2u128 into r2818;\n    add r2817 1u32 into r2819;\n    ternary r2818 r2819 r2817 into r2820;\n    add r2788 r2820 into r2821;\n    sub 255u32 r2821 into r2822;\n    cast r2822 into r2823 as u16;\n    and r2823 127u16 into r2824;\n    cast r2824 into r2825 as u8;\n    is.eq r2825 0u8 into r2826;\n    sub 128u8 r2825 into r2827;\n    shr.w r2728.lo r2827 into r2828;\n    ternary r2826 0u128 r2828 into r2829;\n    shl.w r2728.hi r2825 into r2830;\n    or r2830 r2829 into r2831;\n    shl.w r2728.lo r2825 into r2832;\n    shl.w r2728.lo r2825 into r2833;\n    gte r2823 128u16 into r2834;\n    ternary r2834 r2833 r2831 into r2835;\n    ternary r2834 0u128 r2832 into r2836;\n    cast r2835 r2836 into r2837 as U256__8JquwLopp8;\n    and r2837.lo 18446744073709551615u128 into r2838;\n    shr r2837.lo 64u8 into r2839;\n    and r2837.hi 18446744073709551615u128 into r2840;\n    shr r2837.hi 64u8 into r2841;\n    cast r2824 into r2842 as u8;\n    is.eq r2842 0u8 into r2843;\n    sub 128u8 r2842 into r2844;\n    shr.w r2780.lo r2844 into r2845;\n    ternary r2843 0u128 r2845 into r2846;\n    shl.w r2780.hi r2842 into r2847;\n    or r2847 r2846 into r2848;\n    shl.w r2780.lo r2842 into r2849;\n    shl.w r2780.lo r2842 into r2850;\n    ternary r2834 r2850 r2848 into r2851;\n    ternary r2834 0u128 r2849 into r2852;\n    cast r2851 r2852 into r2853 as U256__8JquwLopp8;\n    is.eq r2823 0u16 into r2854;\n    sub 256u16 r2823 into r2855;\n    and r2855 127u16 into r2856;\n    cast r2856 into r2857 as u8;\n    is.eq r2857 0u8 into r2858;\n    sub 128u8 r2857 into r2859;\n    shl.w r2780.hi r2859 into r2860;\n    ternary r2858 0u128 r2860 into r2861;\n    shr r2780.lo r2857 into r2862;\n    or r2862 r2861 into r2863;\n    shr r2780.hi r2857 into r2864;\n    shr r2780.hi r2857 into r2865;\n    gte r2855 128u16 into r2866;\n    ternary r2866 0u128 r2864 into r2867;\n    ternary r2866 r2865 r2863 into r2868;\n    cast r2867 r2868 into r2869 as U256__8JquwLopp8;\n    ternary r2854 0u128 r2869.hi into r2870;\n    ternary r2854 0u128 r2869.lo into r2871;\n    cast r2870 r2871 into r2872 as U256__8JquwLopp8;\n    cast r2824 into r2873 as u8;\n    is.eq r2873 0u8 into r2874;\n    sub 128u8 r2873 into r2875;\n    shr.w r2779.lo r2875 into r2876;\n    ternary r2874 0u128 r2876 into r2877;\n    shl.w r2779.hi r2873 into r2878;\n    or r2878 r2877 into r2879;\n    shl.w r2779.lo r2873 into r2880;\n    shl.w r2779.lo r2873 into r2881;\n    ternary r2834 r2881 r2879 into r2882;\n    ternary r2834 0u128 r2880 into r2883;\n    cast r2882 r2883 into r2884 as U256__8JquwLopp8;\n    add.w r2884.lo r2872.lo into r2885;\n    lt r2885 r2884.lo into r2886;\n    ternary r2886 1u128 0u128 into r2887;\n    add.w r2884.hi r2872.hi into r2888;\n    add.w r2888 r2887 into r2889;\n    cast r2889 r2885 into r2890 as U256__8JquwLopp8;\n    and r2853.lo 18446744073709551615u128 into r2891;\n    shr r2853.lo 64u8 into r2892;\n    and r2853.hi 18446744073709551615u128 into r2893;\n    shr r2853.hi 64u8 into r2894;\n    and r2890.lo 18446744073709551615u128 into r2895;\n    shr r2890.lo 64u8 into r2896;\n    and r2890.hi 18446744073709551615u128 into r2897;\n    shr r2890.hi 64u8 into r2898;\n    shl r2898 64u8 into r2899;\n    add r2899 r2897 into r2900;\n    div r2900 r2841 into r2901;\n    gt r2901 18446744073709551615u128 into r2902;\n    ternary r2902 18446744073709551615u128 r2901 into r2903;\n    mul r2903 r2841 into r2904;\n    sub r2900 r2904 into r2905;\n    lte r2905 18446744073709551615u128 into r2906;\n    mul r2903 r2840 into r2907;\n    and r2905 18446744073709551615u128 into r2908;\n    shl r2908 64u8 into r2909;\n    add r2909 r2896 into r2910;\n    gt r2907 r2910 into r2911;\n    and r2906 r2911 into r2912;\n    sub.w r2903 1u128 into r2913;\n    ternary r2912 r2913 r2903 into r2914;\n    add r2905 r2841 into r2915;\n    ternary r2912 r2915 r2905 into r2916;\n    lte r2916 18446744073709551615u128 into r2917;\n    and r2912 r2917 into r2918;\n    mul r2914 r2840 into r2919;\n    and r2916 18446744073709551615u128 into r2920;\n    shl r2920 64u8 into r2921;\n    add r2921 r2896 into r2922;\n    gt r2919 r2922 into r2923;\n    and r2918 r2923 into r2924;\n    sub.w r2914 1u128 into r2925;\n    ternary r2924 r2925 r2914 into r2926;\n    mul r2926 r2838 into r2927;\n    and r2927 18446744073709551615u128 into r2928;\n    lt r2894 r2928 into r2929;\n    add r2894 18446744073709551616u128 into r2930;\n    sub r2930 r2928 into r2931;\n    and r2931 18446744073709551615u128 into r2932;\n    shr r2927 64u8 into r2933;\n    ternary r2929 1u128 0u128 into r2934;\n    add r2933 r2934 into r2935;\n    mul r2926 r2839 into r2936;\n    add r2936 r2935 into r2937;\n    and r2937 18446744073709551615u128 into r2938;\n    lt r2895 r2938 into r2939;\n    add r2895 18446744073709551616u128 into r2940;\n    sub r2940 r2938 into r2941;\n    and r2941 18446744073709551615u128 into r2942;\n    shr r2937 64u8 into r2943;\n    ternary r2939 1u128 0u128 into r2944;\n    add r2943 r2944 into r2945;\n    mul r2926 r2840 into r2946;\n    add r2946 r2945 into r2947;\n    and r2947 18446744073709551615u128 into r2948;\n    lt r2896 r2948 into r2949;\n    add r2896 18446744073709551616u128 into r2950;\n    sub r2950 r2948 into r2951;\n    and r2951 18446744073709551615u128 into r2952;\n    shr r2947 64u8 into r2953;\n    ternary r2949 1u128 0u128 into r2954;\n    add r2953 r2954 into r2955;\n    mul r2926 r2841 into r2956;\n    add r2956 r2955 into r2957;\n    and r2957 18446744073709551615u128 into r2958;\n    lt r2897 r2958 into r2959;\n    add r2897 18446744073709551616u128 into r2960;\n    sub r2960 r2958 into r2961;\n    and r2961 18446744073709551615u128 into r2962;\n    shr r2957 64u8 into r2963;\n    ternary r2959 1u128 0u128 into r2964;\n    add r2963 r2964 into r2965;\n    lt r2898 r2965 into r2966;\n    add r2898 18446744073709551616u128 into r2967;\n    sub r2967 r2965 into r2968;\n    and r2968 18446744073709551615u128 into r2969;\n    sub.w r2926 1u128 into r2970;\n    ternary r2966 r2970 r2926 into r2971;\n    add r2932 r2838 into r2972;\n    and r2972 18446744073709551615u128 into r2973;\n    ternary r2966 r2973 r2932 into r2974;\n    shr r2972 64u8 into r2975;\n    ternary r2966 r2975 0u128 into r2976;\n    add r2942 r2839 into r2977;\n    add r2977 r2976 into r2978;\n    and r2978 18446744073709551615u128 into r2979;\n    ternary r2966 r2979 r2942 into r2980;\n    shr r2978 64u8 into r2981;\n    ternary r2966 r2981 0u128 into r2982;\n    add r2952 r2840 into r2983;\n    add r2983 r2982 into r2984;\n    and r2984 18446744073709551615u128 into r2985;\n    ternary r2966 r2985 r2952 into r2986;\n    shr r2984 64u8 into r2987;\n    ternary r2966 r2987 0u128 into r2988;\n    add r2962 r2841 into r2989;\n    add r2989 r2988 into r2990;\n    and r2990 18446744073709551615u128 into r2991;\n    ternary r2966 r2991 r2962 into r2992;\n    shr r2990 64u8 into r2993;\n    ternary r2966 r2993 0u128 into r2994;\n    add r2969 r2994 into r2995;\n    shl r2992 64u8 into r2996;\n    add r2996 r2986 into r2997;\n    div r2997 r2841 into r2998;\n    gt r2998 18446744073709551615u128 into r2999;\n    ternary r2999 18446744073709551615u128 r2998 into r3000;\n    mul r3000 r2841 into r3001;\n    sub r2997 r3001 into r3002;\n    lte r3002 18446744073709551615u128 into r3003;\n    mul r3000 r2840 into r3004;\n    and r3002 18446744073709551615u128 into r3005;\n    shl r3005 64u8 into r3006;\n    add r3006 r2980 into r3007;\n    gt r3004 r3007 into r3008;\n    and r3003 r3008 into r3009;\n    sub.w r3000 1u128 into r3010;\n    ternary r3009 r3010 r3000 into r3011;\n    add r3002 r2841 into r3012;\n    ternary r3009 r3012 r3002 into r3013;\n    lte r3013 18446744073709551615u128 into r3014;\n    and r3009 r3014 into r3015;\n    mul r3011 r2840 into r3016;\n    and r3013 18446744073709551615u128 into r3017;\n    shl r3017 64u8 into r3018;\n    add r3018 r2980 into r3019;\n    gt r3016 r3019 into r3020;\n    and r3015 r3020 into r3021;\n    sub.w r3011 1u128 into r3022;\n    ternary r3021 r3022 r3011 into r3023;\n    mul r3023 r2838 into r3024;\n    and r3024 18446744073709551615u128 into r3025;\n    lt r2893 r3025 into r3026;\n    add r2893 18446744073709551616u128 into r3027;\n    sub r3027 r3025 into r3028;\n    and r3028 18446744073709551615u128 into r3029;\n    shr r3024 64u8 into r3030;\n    ternary r3026 1u128 0u128 into r3031;\n    add r3030 r3031 into r3032;\n    mul r3023 r2839 into r3033;\n    add r3033 r3032 into r3034;\n    and r3034 18446744073709551615u128 into r3035;\n    lt r2974 r3035 into r3036;\n    add r2974 18446744073709551616u128 into r3037;\n    sub r3037 r3035 into r3038;\n    and r3038 18446744073709551615u128 into r3039;\n    shr r3034 64u8 into r3040;\n    ternary r3036 1u128 0u128 into r3041;\n    add r3040 r3041 into r3042;\n    mul r3023 r2840 into r3043;\n    add r3043 r3042 into r3044;\n    and r3044 18446744073709551615u128 into r3045;\n    lt r2980 r3045 into r3046;\n    add r2980 18446744073709551616u128 into r3047;\n    sub r3047 r3045 into r3048;\n    and r3048 18446744073709551615u128 into r3049;\n    shr r3044 64u8 into r3050;\n    ternary r3046 1u128 0u128 into r3051;\n    add r3050 r3051 into r3052;\n    mul r3023 r2841 into r3053;\n    add r3053 r3052 into r3054;\n    and r3054 18446744073709551615u128 into r3055;\n    lt r2986 r3055 into r3056;\n    add r2986 18446744073709551616u128 into r3057;\n    sub r3057 r3055 into r3058;\n    and r3058 18446744073709551615u128 into r3059;\n    shr r3054 64u8 into r3060;\n    ternary r3056 1u128 0u128 into r3061;\n    add r3060 r3061 into r3062;\n    lt r2992 r3062 into r3063;\n    add r2992 18446744073709551616u128 into r3064;\n    sub r3064 r3062 into r3065;\n    and r3065 18446744073709551615u128 into r3066;\n    sub.w r3023 1u128 into r3067;\n    ternary r3063 r3067 r3023 into r3068;\n    add r3029 r2838 into r3069;\n    and r3069 18446744073709551615u128 into r3070;\n    ternary r3063 r3070 r3029 into r3071;\n    shr r3069 64u8 into r3072;\n    ternary r3063 r3072 0u128 into r3073;\n    add r3039 r2839 into r3074;\n    add r3074 r3073 into r3075;\n    and r3075 18446744073709551615u128 into r3076;\n    ternary r3063 r3076 r3039 into r3077;\n    shr r3075 64u8 into r3078;\n    ternary r3063 r3078 0u128 into r3079;\n    add r3049 r2840 into r3080;\n    add r3080 r3079 into r3081;\n    and r3081 18446744073709551615u128 into r3082;\n    ternary r3063 r3082 r3049 into r3083;\n    shr r3081 64u8 into r3084;\n    ternary r3063 r3084 0u128 into r3085;\n    add r3059 r2841 into r3086;\n    add r3086 r3085 into r3087;\n    and r3087 18446744073709551615u128 into r3088;\n    ternary r3063 r3088 r3059 into r3089;\n    shr r3087 64u8 into r3090;\n    ternary r3063 r3090 0u128 into r3091;\n    add r3066 r3091 into r3092;\n    shl r3089 64u8 into r3093;\n    add r3093 r3083 into r3094;\n    div r3094 r2841 into r3095;\n    gt r3095 18446744073709551615u128 into r3096;\n    ternary r3096 18446744073709551615u128 r3095 into r3097;\n    mul r3097 r2841 into r3098;\n    sub r3094 r3098 into r3099;\n    lte r3099 18446744073709551615u128 into r3100;\n    mul r3097 r2840 into r3101;\n    and r3099 18446744073709551615u128 into r3102;\n    shl r3102 64u8 into r3103;\n    add r3103 r3077 into r3104;\n    gt r3101 r3104 into r3105;\n    and r3100 r3105 into r3106;\n    sub.w r3097 1u128 into r3107;\n    ternary r3106 r3107 r3097 into r3108;\n    add r3099 r2841 into r3109;\n    ternary r3106 r3109 r3099 into r3110;\n    lte r3110 18446744073709551615u128 into r3111;\n    and r3106 r3111 into r3112;\n    mul r3108 r2840 into r3113;\n    and r3110 18446744073709551615u128 into r3114;\n    shl r3114 64u8 into r3115;\n    add r3115 r3077 into r3116;\n    gt r3113 r3116 into r3117;\n    and r3112 r3117 into r3118;\n    sub.w r3108 1u128 into r3119;\n    ternary r3118 r3119 r3108 into r3120;\n    mul r3120 r2838 into r3121;\n    and r3121 18446744073709551615u128 into r3122;\n    lt r2892 r3122 into r3123;\n    add r2892 18446744073709551616u128 into r3124;\n    sub r3124 r3122 into r3125;\n    and r3125 18446744073709551615u128 into r3126;\n    shr r3121 64u8 into r3127;\n    ternary r3123 1u128 0u128 into r3128;\n    add r3127 r3128 into r3129;\n    mul r3120 r2839 into r3130;\n    add r3130 r3129 into r3131;\n    and r3131 18446744073709551615u128 into r3132;\n    lt r3071 r3132 into r3133;\n    add r3071 18446744073709551616u128 into r3134;\n    sub r3134 r3132 into r3135;\n    and r3135 18446744073709551615u128 into r3136;\n    shr r3131 64u8 into r3137;\n    ternary r3133 1u128 0u128 into r3138;\n    add r3137 r3138 into r3139;\n    mul r3120 r2840 into r3140;\n    add r3140 r3139 into r3141;\n    and r3141 18446744073709551615u128 into r3142;\n    lt r3077 r3142 into r3143;\n    add r3077 18446744073709551616u128 into r3144;\n    sub r3144 r3142 into r3145;\n    and r3145 18446744073709551615u128 into r3146;\n    shr r3141 64u8 into r3147;\n    ternary r3143 1u128 0u128 into r3148;\n    add r3147 r3148 into r3149;\n    mul r3120 r2841 into r3150;\n    add r3150 r3149 into r3151;\n    and r3151 18446744073709551615u128 into r3152;\n    lt r3083 r3152 into r3153;\n    add r3083 18446744073709551616u128 into r3154;\n    sub r3154 r3152 into r3155;\n    and r3155 18446744073709551615u128 into r3156;\n    shr r3151 64u8 into r3157;\n    ternary r3153 1u128 0u128 into r3158;\n    add r3157 r3158 into r3159;\n    lt r3089 r3159 into r3160;\n    add r3089 18446744073709551616u128 into r3161;\n    sub r3161 r3159 into r3162;\n    and r3162 18446744073709551615u128 into r3163;\n    sub.w r3120 1u128 into r3164;\n    ternary r3160 r3164 r3120 into r3165;\n    add r3126 r2838 into r3166;\n    and r3166 18446744073709551615u128 into r3167;\n    ternary r3160 r3167 r3126 into r3168;\n    shr r3166 64u8 into r3169;\n    ternary r3160 r3169 0u128 into r3170;\n    add r3136 r2839 into r3171;\n    add r3171 r3170 into r3172;\n    and r3172 18446744073709551615u128 into r3173;\n    ternary r3160 r3173 r3136 into r3174;\n    shr r3172 64u8 into r3175;\n    ternary r3160 r3175 0u128 into r3176;\n    add r3146 r2840 into r3177;\n    add r3177 r3176 into r3178;\n    and r3178 18446744073709551615u128 into r3179;\n    ternary r3160 r3179 r3146 into r3180;\n    shr r3178 64u8 into r3181;\n    ternary r3160 r3181 0u128 into r3182;\n    add r3156 r2841 into r3183;\n    add r3183 r3182 into r3184;\n    and r3184 18446744073709551615u128 into r3185;\n    ternary r3160 r3185 r3156 into r3186;\n    shr r3184 64u8 into r3187;\n    ternary r3160 r3187 0u128 into r3188;\n    add r3163 r3188 into r3189;\n    shl r3186 64u8 into r3190;\n    add r3190 r3180 into r3191;\n    div r3191 r2841 into r3192;\n    gt r3192 18446744073709551615u128 into r3193;\n    ternary r3193 18446744073709551615u128 r3192 into r3194;\n    mul r3194 r2841 into r3195;\n    sub r3191 r3195 into r3196;\n    lte r3196 18446744073709551615u128 into r3197;\n    mul r3194 r2840 into r3198;\n    and r3196 18446744073709551615u128 into r3199;\n    shl r3199 64u8 into r3200;\n    add r3200 r3174 into r3201;\n    gt r3198 r3201 into r3202;\n    and r3197 r3202 into r3203;\n    sub.w r3194 1u128 into r3204;\n    ternary r3203 r3204 r3194 into r3205;\n    add r3196 r2841 into r3206;\n    ternary r3203 r3206 r3196 into r3207;\n    lte r3207 18446744073709551615u128 into r3208;\n    and r3203 r3208 into r3209;\n    mul r3205 r2840 into r3210;\n    and r3207 18446744073709551615u128 into r3211;\n    shl r3211 64u8 into r3212;\n    add r3212 r3174 into r3213;\n    gt r3210 r3213 into r3214;\n    and r3209 r3214 into r3215;\n    sub.w r3205 1u128 into r3216;\n    ternary r3215 r3216 r3205 into r3217;\n    mul r3217 r2838 into r3218;\n    and r3218 18446744073709551615u128 into r3219;\n    lt r2891 r3219 into r3220;\n    add r2891 18446744073709551616u128 into r3221;\n    sub r3221 r3219 into r3222;\n    and r3222 18446744073709551615u128 into r3223;\n    shr r3218 64u8 into r3224;\n    ternary r3220 1u128 0u128 into r3225;\n    add r3224 r3225 into r3226;\n    mul r3217 r2839 into r3227;\n    add r3227 r3226 into r3228;\n    and r3228 18446744073709551615u128 into r3229;\n    lt r3168 r3229 into r3230;\n    add r3168 18446744073709551616u128 into r3231;\n    sub r3231 r3229 into r3232;\n    and r3232 18446744073709551615u128 into r3233;\n    shr r3228 64u8 into r3234;\n    ternary r3230 1u128 0u128 into r3235;\n    add r3234 r3235 into r3236;\n    mul r3217 r2840 into r3237;\n    add r3237 r3236 into r3238;\n    and r3238 18446744073709551615u128 into r3239;\n    lt r3174 r3239 into r3240;\n    add r3174 18446744073709551616u128 into r3241;\n    sub r3241 r3239 into r3242;\n    and r3242 18446744073709551615u128 into r3243;\n    shr r3238 64u8 into r3244;\n    ternary r3240 1u128 0u128 into r3245;\n    add r3244 r3245 into r3246;\n    mul r3217 r2841 into r3247;\n    add r3247 r3246 into r3248;\n    and r3248 18446744073709551615u128 into r3249;\n    lt r3180 r3249 into r3250;\n    add r3180 18446744073709551616u128 into r3251;\n    sub r3251 r3249 into r3252;\n    and r3252 18446744073709551615u128 into r3253;\n    shr r3248 64u8 into r3254;\n    ternary r3250 1u128 0u128 into r3255;\n    add r3254 r3255 into r3256;\n    lt r3186 r3256 into r3257;\n    add r3186 18446744073709551616u128 into r3258;\n    sub r3258 r3256 into r3259;\n    and r3259 18446744073709551615u128 into r3260;\n    sub.w r3217 1u128 into r3261;\n    ternary r3257 r3261 r3217 into r3262;\n    add r3223 r2838 into r3263;\n    and r3263 18446744073709551615u128 into r3264;\n    ternary r3257 r3264 r3223 into r3265;\n    shr r3263 64u8 into r3266;\n    ternary r3257 r3266 0u128 into r3267;\n    add r3233 r2839 into r3268;\n    add r3268 r3267 into r3269;\n    and r3269 18446744073709551615u128 into r3270;\n    ternary r3257 r3270 r3233 into r3271;\n    shr r3269 64u8 into r3272;\n    ternary r3257 r3272 0u128 into r3273;\n    add r3243 r2840 into r3274;\n    add r3274 r3273 into r3275;\n    and r3275 18446744073709551615u128 into r3276;\n    ternary r3257 r3276 r3243 into r3277;\n    shr r3275 64u8 into r3278;\n    ternary r3257 r3278 0u128 into r3279;\n    add r3253 r2841 into r3280;\n    add r3280 r3279 into r3281;\n    and r3281 18446744073709551615u128 into r3282;\n    ternary r3257 r3282 r3253 into r3283;\n    shr r3281 64u8 into r3284;\n    ternary r3257 r3284 0u128 into r3285;\n    add r3260 r3285 into r3286;\n    shl r2971 64u8 into r3287;\n    add r3287 r3068 into r3288;\n    shl r3165 64u8 into r3289;\n    add r3289 r3262 into r3290;\n    cast r3288 r3290 into r3291 as U256__8JquwLopp8;\n    shl r3283 64u8 into r3292;\n    add r3292 r3277 into r3293;\n    shl r3271 64u8 into r3294;\n    add r3294 r3265 into r3295;\n    cast r2824 into r3296 as u8;\n    sub 128u8 r3296 into r3297;\n    shr r3295 r3296 into r3298;\n    shr r3293 r3296 into r3299;\n    cast r3291.hi r3291.lo into r3300 as U256__8JquwLopp8;\n    add.w r0.lo r3300.lo into r3301;\n    lt r3301 r0.lo into r3302;\n    ternary r3302 1u128 0u128 into r3303;\n    add.w r0.hi r3300.hi into r3304;\n    add.w r3304 r3303 into r3305;\n    cast r3305 r3301 into r3306 as U256__8JquwLopp8;\n    cast r3306.hi r3306.lo into r3307 as U256__8JquwLopp8;\n    ternary r10 r2726.hi r3307.hi into r3308;\n    ternary r10 r2726.lo r3307.lo into r3309;\n    cast r3308 r3309 into r3310 as U256__8JquwLopp8;\n    ternary r1526 r1537.hi r3310.hi into r3311;\n    ternary r1526 r1537.lo r3310.lo into r3312;\n    cast r3311 r3312 into r3313 as U256__8JquwLopp8;\n    lt r0.hi r3313.hi into r3314;\n    gt r0.hi r3313.hi into r3315;\n    lt r0.lo r3313.lo into r3316;\n    ternary r3315 false r3316 into r3317;\n    ternary r3314 true r3317 into r3318;\n    ternary r3318 r0.hi r3313.hi into r3319;\n    ternary r3318 r0.lo r3313.lo into r3320;\n    cast r3319 r3320 into r3321 as U256__8JquwLopp8;\n    lt r0.hi r3313.hi into r3322;\n    gt r0.hi r3313.hi into r3323;\n    lt r0.lo r3313.lo into r3324;\n    ternary r3323 false r3324 into r3325;\n    ternary r3322 true r3325 into r3326;\n    ternary r3326 r3313.hi r0.hi into r3327;\n    ternary r3326 r3313.lo r0.lo into r3328;\n    cast r3327 r3328 into r3329 as U256__8JquwLopp8;\n    lt r3329.lo r3321.lo into r3330;\n    ternary r3330 1u128 0u128 into r3331;\n    sub.w r3329.lo r3321.lo into r3332;\n    sub.w r3329.hi r3321.hi into r3333;\n    sub.w r3333 r3331 into r3334;\n    cast r3334 r3332 into r3335 as U256__8JquwLopp8;\n    cast 0u128 r1 into r3336 as U256__8JquwLopp8;\n    and r3336.lo 18446744073709551615u128 into r3337;\n    shr r3336.lo 64u8 into r3338;\n    and r3335.lo 18446744073709551615u128 into r3339;\n    shr r3335.lo 64u8 into r3340;\n    mul r3337 r3339 into r3341;\n    mul r3337 r3340 into r3342;\n    mul r3338 r3339 into r3343;\n    mul r3338 r3340 into r3344;\n    and r3341 18446744073709551615u128 into r3345;\n    shr r3341 64u8 into r3346;\n    and r3342 18446744073709551615u128 into r3347;\n    add r3346 r3347 into r3348;\n    and r3343 18446744073709551615u128 into r3349;\n    add r3348 r3349 into r3350;\n    and r3350 18446744073709551615u128 into r3351;\n    shr r3350 64u8 into r3352;\n    shr r3342 64u8 into r3353;\n    shr r3343 64u8 into r3354;\n    add r3353 r3354 into r3355;\n    and r3344 18446744073709551615u128 into r3356;\n    add r3355 r3356 into r3357;\n    add r3357 r3352 into r3358;\n    and r3358 18446744073709551615u128 into r3359;\n    shr r3358 64u8 into r3360;\n    shr r3344 64u8 into r3361;\n    add r3361 r3360 into r3362;\n    shl r3362 64u8 into r3363;\n    add r3363 r3359 into r3364;\n    shl r3351 64u8 into r3365;\n    add r3365 r3345 into r3366;\n    and r3336.lo 18446744073709551615u128 into r3367;\n    shr r3336.lo 64u8 into r3368;\n    and r3335.hi 18446744073709551615u128 into r3369;\n    shr r3335.hi 64u8 into r3370;\n    mul r3367 r3369 into r3371;\n    mul r3367 r3370 into r3372;\n    mul r3368 r3369 into r3373;\n    mul r3368 r3370 into r3374;\n    and r3371 18446744073709551615u128 into r3375;\n    shr r3371 64u8 into r3376;\n    and r3372 18446744073709551615u128 into r3377;\n    add r3376 r3377 into r3378;\n    and r3373 18446744073709551615u128 into r3379;\n    add r3378 r3379 into r3380;\n    and r3380 18446744073709551615u128 into r3381;\n    shr r3380 64u8 into r3382;\n    shr r3372 64u8 into r3383;\n    shr r3373 64u8 into r3384;\n    add r3383 r3384 into r3385;\n    and r3374 18446744073709551615u128 into r3386;\n    add r3385 r3386 into r3387;\n    add r3387 r3382 into r3388;\n    and r3388 18446744073709551615u128 into r3389;\n    shr r3388 64u8 into r3390;\n    shr r3374 64u8 into r3391;\n    add r3391 r3390 into r3392;\n    shl r3392 64u8 into r3393;\n    add r3393 r3389 into r3394;\n    shl r3381 64u8 into r3395;\n    add r3395 r3375 into r3396;\n    and r3336.hi 18446744073709551615u128 into r3397;\n    shr r3336.hi 64u8 into r3398;\n    and r3335.lo 18446744073709551615u128 into r3399;\n    shr r3335.lo 64u8 into r3400;\n    mul r3397 r3399 into r3401;\n    mul r3397 r3400 into r3402;\n    mul r3398 r3399 into r3403;\n    mul r3398 r3400 into r3404;\n    and r3401 18446744073709551615u128 into r3405;\n    shr r3401 64u8 into r3406;\n    and r3402 18446744073709551615u128 into r3407;\n    add r3406 r3407 into r3408;\n    and r3403 18446744073709551615u128 into r3409;\n    add r3408 r3409 into r3410;\n    and r3410 18446744073709551615u128 into r3411;\n    shr r3410 64u8 into r3412;\n    shr r3402 64u8 into r3413;\n    shr r3403 64u8 into r3414;\n    add r3413 r3414 into r3415;\n    and r3404 18446744073709551615u128 into r3416;\n    add r3415 r3416 into r3417;\n    add r3417 r3412 into r3418;\n    and r3418 18446744073709551615u128 into r3419;\n    shr r3418 64u8 into r3420;\n    shr r3404 64u8 into r3421;\n    add r3421 r3420 into r3422;\n    shl r3422 64u8 into r3423;\n    add r3423 r3419 into r3424;\n    shl r3411 64u8 into r3425;\n    add r3425 r3405 into r3426;\n    and r3336.hi 18446744073709551615u128 into r3427;\n    shr r3336.hi 64u8 into r3428;\n    and r3335.hi 18446744073709551615u128 into r3429;\n    shr r3335.hi 64u8 into r3430;\n    mul r3427 r3429 into r3431;\n    mul r3427 r3430 into r3432;\n    mul r3428 r3429 into r3433;\n    mul r3428 r3430 into r3434;\n    and r3431 18446744073709551615u128 into r3435;\n    shr r3431 64u8 into r3436;\n    and r3432 18446744073709551615u128 into r3437;\n    add r3436 r3437 into r3438;\n    and r3433 18446744073709551615u128 into r3439;\n    add r3438 r3439 into r3440;\n    and r3440 18446744073709551615u128 into r3441;\n    shr r3440 64u8 into r3442;\n    shr r3432 64u8 into r3443;\n    shr r3433 64u8 into r3444;\n    add r3443 r3444 into r3445;\n    and r3434 18446744073709551615u128 into r3446;\n    add r3445 r3446 into r3447;\n    add r3447 r3442 into r3448;\n    and r3448 18446744073709551615u128 into r3449;\n    shr r3448 64u8 into r3450;\n    shr r3434 64u8 into r3451;\n    add r3451 r3450 into r3452;\n    shl r3452 64u8 into r3453;\n    add r3453 r3449 into r3454;\n    shl r3441 64u8 into r3455;\n    add r3455 r3435 into r3456;\n    add.w r3364 r3396 into r3457;\n    lt r3457 r3364 into r3458;\n    ternary r3458 1u128 0u128 into r3459;\n    add.w r3457 r3426 into r3460;\n    lt r3460 r3457 into r3461;\n    ternary r3461 1u128 0u128 into r3462;\n    add r3459 r3462 into r3463;\n    add.w r3394 r3424 into r3464;\n    lt r3464 r3394 into r3465;\n    ternary r3465 1u128 0u128 into r3466;\n    add.w r3464 r3456 into r3467;\n    lt r3467 r3464 into r3468;\n    ternary r3468 1u128 0u128 into r3469;\n    add.w r3467 r3463 into r3470;\n    lt r3470 r3467 into r3471;\n    ternary r3471 1u128 0u128 into r3472;\n    add r3466 r3469 into r3473;\n    add r3473 r3472 into r3474;\n    add.w r3454 r3474 into r3475;\n    cast r3475 r3470 into r3476 as U256__8JquwLopp8;\n    cast r3460 r3366 into r3477 as U256__8JquwLopp8;\n    is.neq r3476.hi 0u128 into r3478;\n    is.neq r3476.lo 0u128 into r3479;\n    or r3478 r3479 into r3480;\n    lt r0.hi r3313.hi into r3481;\n    gt r0.hi r3313.hi into r3482;\n    lt r0.lo r3313.lo into r3483;\n    ternary r3482 false r3483 into r3484;\n    ternary r3481 true r3484 into r3485;\n    ternary r3485 r0.hi r3313.hi into r3486;\n    ternary r3485 r0.lo r3313.lo into r3487;\n    cast r3486 r3487 into r3488 as U256__8JquwLopp8;\n    lt r0.hi r3313.hi into r3489;\n    gt r0.hi r3313.hi into r3490;\n    lt r0.lo r3313.lo into r3491;\n    ternary r3490 false r3491 into r3492;\n    ternary r3489 true r3492 into r3493;\n    ternary r3493 r3313.hi r0.hi into r3494;\n    ternary r3493 r3313.lo r0.lo into r3495;\n    cast r3494 r3495 into r3496 as U256__8JquwLopp8;\n    lt r3496.lo r3488.lo into r3497;\n    ternary r3497 1u128 0u128 into r3498;\n    sub.w r3496.lo r3488.lo into r3499;\n    sub.w r3496.hi r3488.hi into r3500;\n    sub.w r3500 r3498 into r3501;\n    cast r3501 r3499 into r3502 as U256__8JquwLopp8;\n    shr r3502.lo 64u8 into r3503;\n    shr r3502.hi 64u8 into r3504;\n    and r3502.lo 18446744073709551615u128 into r3505;\n    shr r3502.lo 64u8 into r3506;\n    mul r135 r3505 into r3507;\n    mul r135 r3506 into r3508;\n    mul r136 r3505 into r3509;\n    mul r136 r3506 into r3510;\n    and r3507 18446744073709551615u128 into r3511;\n    shr r3507 64u8 into r3512;\n    and r3508 18446744073709551615u128 into r3513;\n    add r3512 r3513 into r3514;\n    and r3509 18446744073709551615u128 into r3515;\n    add r3514 r3515 into r3516;\n    and r3516 18446744073709551615u128 into r3517;\n    shr r3516 64u8 into r3518;\n    shr r3508 64u8 into r3519;\n    shr r3509 64u8 into r3520;\n    add r3519 r3520 into r3521;\n    and r3510 18446744073709551615u128 into r3522;\n    add r3521 r3522 into r3523;\n    add r3523 r3518 into r3524;\n    and r3524 18446744073709551615u128 into r3525;\n    shr r3524 64u8 into r3526;\n    shr r3510 64u8 into r3527;\n    add r3527 r3526 into r3528;\n    shl r3528 64u8 into r3529;\n    add r3529 r3525 into r3530;\n    shl r3517 64u8 into r3531;\n    add r3531 r3511 into r3532;\n    and r3502.hi 18446744073709551615u128 into r3533;\n    shr r3502.hi 64u8 into r3534;\n    mul r135 r3533 into r3535;\n    mul r135 r3534 into r3536;\n    mul r136 r3533 into r3537;\n    mul r136 r3534 into r3538;\n    and r3535 18446744073709551615u128 into r3539;\n    shr r3535 64u8 into r3540;\n    and r3536 18446744073709551615u128 into r3541;\n    add r3540 r3541 into r3542;\n    and r3537 18446744073709551615u128 into r3543;\n    add r3542 r3543 into r3544;\n    and r3544 18446744073709551615u128 into r3545;\n    shr r3544 64u8 into r3546;\n    shr r3536 64u8 into r3547;\n    shr r3537 64u8 into r3548;\n    add r3547 r3548 into r3549;\n    and r3538 18446744073709551615u128 into r3550;\n    add r3549 r3550 into r3551;\n    add r3551 r3546 into r3552;\n    and r3552 18446744073709551615u128 into r3553;\n    shr r3552 64u8 into r3554;\n    shr r3538 64u8 into r3555;\n    add r3555 r3554 into r3556;\n    shl r3556 64u8 into r3557;\n    add r3557 r3553 into r3558;\n    shl r3545 64u8 into r3559;\n    add r3559 r3539 into r3560;\n    lt r3532 0u128 into r3561;\n    ternary r3561 1u128 0u128 into r3562;\n    lt r3530 0u128 into r3563;\n    ternary r3563 1u128 0u128 into r3564;\n    add.w r3530 r3560 into r3565;\n    lt r3565 r3530 into r3566;\n    ternary r3566 1u128 0u128 into r3567;\n    add.w r3565 r3562 into r3568;\n    lt r3568 r3565 into r3569;\n    ternary r3569 1u128 0u128 into r3570;\n    add r3564 r3567 into r3571;\n    add r3571 r3570 into r3572;\n    add.w r3558 r3572 into r3573;\n    cast r3573 r3568 into r3574 as U256__8JquwLopp8;\n    cast r3532 0u128 into r3575 as U256__8JquwLopp8;\n    lt r3574.hi r3496.hi into r3576;\n    gt r3574.hi r3496.hi into r3577;\n    lt r3574.lo r3496.lo into r3578;\n    ternary r3577 false r3578 into r3579;\n    ternary r3576 true r3579 into r3580;\n    assert.eq r3580 true;\n    gt r3496.hi 0u128 into r3581;\n    ternary r3581 r3496.hi r3496.lo into r3582;\n    ternary r3581 128u32 0u32 into r3583;\n    gte r3582 18446744073709551616u128 into r3584;\n    shr r3582 64u8 into r3585;\n    ternary r3584 r3585 r3582 into r3586;\n    ternary r3584 64u32 0u32 into r3587;\n    gte r3586 4294967296u128 into r3588;\n    shr r3586 32u8 into r3589;\n    add r3587 32u32 into r3590;\n    ternary r3588 r3589 r3586 into r3591;\n    ternary r3588 r3590 r3587 into r3592;\n    gte r3591 65536u128 into r3593;\n    shr r3591 16u8 into r3594;\n    add r3592 16u32 into r3595;\n    ternary r3593 r3594 r3591 into r3596;\n    ternary r3593 r3595 r3592 into r3597;\n    gte r3596 256u128 into r3598;\n    shr r3596 8u8 into r3599;\n    add r3597 8u32 into r3600;\n    ternary r3598 r3599 r3596 into r3601;\n    ternary r3598 r3600 r3597 into r3602;\n    gte r3601 16u128 into r3603;\n    shr r3601 4u8 into r3604;\n    add r3602 4u32 into r3605;\n    ternary r3603 r3604 r3601 into r3606;\n    ternary r3603 r3605 r3602 into r3607;\n    gte r3606 4u128 into r3608;\n    shr r3606 2u8 into r3609;\n    add r3607 2u32 into r3610;\n    ternary r3608 r3609 r3606 into r3611;\n    ternary r3608 r3610 r3607 into r3612;\n    gte r3611 2u128 into r3613;\n    add r3612 1u32 into r3614;\n    ternary r3613 r3614 r3612 into r3615;\n    add r3583 r3615 into r3616;\n    sub 255u32 r3616 into r3617;\n    cast r3617 into r3618 as u16;\n    and r3618 127u16 into r3619;\n    cast r3619 into r3620 as u8;\n    is.eq r3620 0u8 into r3621;\n    sub 128u8 r3620 into r3622;\n    shr.w r3496.lo r3622 into r3623;\n    ternary r3621 0u128 r3623 into r3624;\n    shl.w r3496.hi r3620 into r3625;\n    or r3625 r3624 into r3626;\n    shl.w r3496.lo r3620 into r3627;\n    shl.w r3496.lo r3620 into r3628;\n    gte r3618 128u16 into r3629;\n    ternary r3629 r3628 r3626 into r3630;\n    ternary r3629 0u128 r3627 into r3631;\n    cast r3630 r3631 into r3632 as U256__8JquwLopp8;\n    and r3632.lo 18446744073709551615u128 into r3633;\n    shr r3632.lo 64u8 into r3634;\n    and r3632.hi 18446744073709551615u128 into r3635;\n    shr r3632.hi 64u8 into r3636;\n    cast r3619 into r3637 as u8;\n    is.eq r3637 0u8 into r3638;\n    sub 128u8 r3637 into r3639;\n    shr.w r3575.lo r3639 into r3640;\n    ternary r3638 0u128 r3640 into r3641;\n    shl.w r3575.hi r3637 into r3642;\n    or r3642 r3641 into r3643;\n    shl.w r3575.lo r3637 into r3644;\n    shl.w r3575.lo r3637 into r3645;\n    ternary r3629 r3645 r3643 into r3646;\n    ternary r3629 0u128 r3644 into r3647;\n    cast r3646 r3647 into r3648 as U256__8JquwLopp8;\n    is.eq r3618 0u16 into r3649;\n    sub 256u16 r3618 into r3650;\n    and r3650 127u16 into r3651;\n    cast r3651 into r3652 as u8;\n    is.eq r3652 0u8 into r3653;\n    sub 128u8 r3652 into r3654;\n    shl.w r3575.hi r3654 into r3655;\n    ternary r3653 0u128 r3655 into r3656;\n    shr r3575.lo r3652 into r3657;\n    or r3657 r3656 into r3658;\n    shr r3575.hi r3652 into r3659;\n    shr r3575.hi r3652 into r3660;\n    gte r3650 128u16 into r3661;\n    ternary r3661 0u128 r3659 into r3662;\n    ternary r3661 r3660 r3658 into r3663;\n    cast r3662 r3663 into r3664 as U256__8JquwLopp8;\n    ternary r3649 0u128 r3664.hi into r3665;\n    ternary r3649 0u128 r3664.lo into r3666;\n    cast r3665 r3666 into r3667 as U256__8JquwLopp8;\n    cast r3619 into r3668 as u8;\n    is.eq r3668 0u8 into r3669;\n    sub 128u8 r3668 into r3670;\n    shr.w r3574.lo r3670 into r3671;\n    ternary r3669 0u128 r3671 into r3672;\n    shl.w r3574.hi r3668 into r3673;\n    or r3673 r3672 into r3674;\n    shl.w r3574.lo r3668 into r3675;\n    shl.w r3574.lo r3668 into r3676;\n    ternary r3629 r3676 r3674 into r3677;\n    ternary r3629 0u128 r3675 into r3678;\n    cast r3677 r3678 into r3679 as U256__8JquwLopp8;\n    add.w r3679.lo r3667.lo into r3680;\n    lt r3680 r3679.lo into r3681;\n    ternary r3681 1u128 0u128 into r3682;\n    add.w r3679.hi r3667.hi into r3683;\n    add.w r3683 r3682 into r3684;\n    cast r3684 r3680 into r3685 as U256__8JquwLopp8;\n    and r3648.lo 18446744073709551615u128 into r3686;\n    shr r3648.lo 64u8 into r3687;\n    and r3648.hi 18446744073709551615u128 into r3688;\n    shr r3648.hi 64u8 into r3689;\n    and r3685.lo 18446744073709551615u128 into r3690;\n    shr r3685.lo 64u8 into r3691;\n    and r3685.hi 18446744073709551615u128 into r3692;\n    shr r3685.hi 64u8 into r3693;\n    shl r3693 64u8 into r3694;\n    add r3694 r3692 into r3695;\n    div r3695 r3636 into r3696;\n    gt r3696 18446744073709551615u128 into r3697;\n    ternary r3697 18446744073709551615u128 r3696 into r3698;\n    mul r3698 r3636 into r3699;\n    sub r3695 r3699 into r3700;\n    lte r3700 18446744073709551615u128 into r3701;\n    mul r3698 r3635 into r3702;\n    and r3700 18446744073709551615u128 into r3703;\n    shl r3703 64u8 into r3704;\n    add r3704 r3691 into r3705;\n    gt r3702 r3705 into r3706;\n    and r3701 r3706 into r3707;\n    sub.w r3698 1u128 into r3708;\n    ternary r3707 r3708 r3698 into r3709;\n    add r3700 r3636 into r3710;\n    ternary r3707 r3710 r3700 into r3711;\n    lte r3711 18446744073709551615u128 into r3712;\n    and r3707 r3712 into r3713;\n    mul r3709 r3635 into r3714;\n    and r3711 18446744073709551615u128 into r3715;\n    shl r3715 64u8 into r3716;\n    add r3716 r3691 into r3717;\n    gt r3714 r3717 into r3718;\n    and r3713 r3718 into r3719;\n    sub.w r3709 1u128 into r3720;\n    ternary r3719 r3720 r3709 into r3721;\n    mul r3721 r3633 into r3722;\n    and r3722 18446744073709551615u128 into r3723;\n    lt r3689 r3723 into r3724;\n    add r3689 18446744073709551616u128 into r3725;\n    sub r3725 r3723 into r3726;\n    and r3726 18446744073709551615u128 into r3727;\n    shr r3722 64u8 into r3728;\n    ternary r3724 1u128 0u128 into r3729;\n    add r3728 r3729 into r3730;\n    mul r3721 r3634 into r3731;\n    add r3731 r3730 into r3732;\n    and r3732 18446744073709551615u128 into r3733;\n    lt r3690 r3733 into r3734;\n    add r3690 18446744073709551616u128 into r3735;\n    sub r3735 r3733 into r3736;\n    and r3736 18446744073709551615u128 into r3737;\n    shr r3732 64u8 into r3738;\n    ternary r3734 1u128 0u128 into r3739;\n    add r3738 r3739 into r3740;\n    mul r3721 r3635 into r3741;\n    add r3741 r3740 into r3742;\n    and r3742 18446744073709551615u128 into r3743;\n    lt r3691 r3743 into r3744;\n    add r3691 18446744073709551616u128 into r3745;\n    sub r3745 r3743 into r3746;\n    and r3746 18446744073709551615u128 into r3747;\n    shr r3742 64u8 into r3748;\n    ternary r3744 1u128 0u128 into r3749;\n    add r3748 r3749 into r3750;\n    mul r3721 r3636 into r3751;\n    add r3751 r3750 into r3752;\n    and r3752 18446744073709551615u128 into r3753;\n    lt r3692 r3753 into r3754;\n    add r3692 18446744073709551616u128 into r3755;\n    sub r3755 r3753 into r3756;\n    and r3756 18446744073709551615u128 into r3757;\n    shr r3752 64u8 into r3758;\n    ternary r3754 1u128 0u128 into r3759;\n    add r3758 r3759 into r3760;\n    lt r3693 r3760 into r3761;\n    add r3693 18446744073709551616u128 into r3762;\n    sub r3762 r3760 into r3763;\n    and r3763 18446744073709551615u128 into r3764;\n    sub.w r3721 1u128 into r3765;\n    ternary r3761 r3765 r3721 into r3766;\n    add r3727 r3633 into r3767;\n    and r3767 18446744073709551615u128 into r3768;\n    ternary r3761 r3768 r3727 into r3769;\n    shr r3767 64u8 into r3770;\n    ternary r3761 r3770 0u128 into r3771;\n    add r3737 r3634 into r3772;\n    add r3772 r3771 into r3773;\n    and r3773 18446744073709551615u128 into r3774;\n    ternary r3761 r3774 r3737 into r3775;\n    shr r3773 64u8 into r3776;\n    ternary r3761 r3776 0u128 into r3777;\n    add r3747 r3635 into r3778;\n    add r3778 r3777 into r3779;\n    and r3779 18446744073709551615u128 into r3780;\n    ternary r3761 r3780 r3747 into r3781;\n    shr r3779 64u8 into r3782;\n    ternary r3761 r3782 0u128 into r3783;\n    add r3757 r3636 into r3784;\n    add r3784 r3783 into r3785;\n    and r3785 18446744073709551615u128 into r3786;\n    ternary r3761 r3786 r3757 into r3787;\n    shr r3785 64u8 into r3788;\n    ternary r3761 r3788 0u128 into r3789;\n    add r3764 r3789 into r3790;\n    shl r3787 64u8 into r3791;\n    add r3791 r3781 into r3792;\n    div r3792 r3636 into r3793;\n    gt r3793 18446744073709551615u128 into r3794;\n    ternary r3794 18446744073709551615u128 r3793 into r3795;\n    mul r3795 r3636 into r3796;\n    sub r3792 r3796 into r3797;\n    lte r3797 18446744073709551615u128 into r3798;\n    mul r3795 r3635 into r3799;\n    and r3797 18446744073709551615u128 into r3800;\n    shl r3800 64u8 into r3801;\n    add r3801 r3775 into r3802;\n    gt r3799 r3802 into r3803;\n    and r3798 r3803 into r3804;\n    sub.w r3795 1u128 into r3805;\n    ternary r3804 r3805 r3795 into r3806;\n    add r3797 r3636 into r3807;\n    ternary r3804 r3807 r3797 into r3808;\n    lte r3808 18446744073709551615u128 into r3809;\n    and r3804 r3809 into r3810;\n    mul r3806 r3635 into r3811;\n    and r3808 18446744073709551615u128 into r3812;\n    shl r3812 64u8 into r3813;\n    add r3813 r3775 into r3814;\n    gt r3811 r3814 into r3815;\n    and r3810 r3815 into r3816;\n    sub.w r3806 1u128 into r3817;\n    ternary r3816 r3817 r3806 into r3818;\n    mul r3818 r3633 into r3819;\n    and r3819 18446744073709551615u128 into r3820;\n    lt r3688 r3820 into r3821;\n    add r3688 18446744073709551616u128 into r3822;\n    sub r3822 r3820 into r3823;\n    and r3823 18446744073709551615u128 into r3824;\n    shr r3819 64u8 into r3825;\n    ternary r3821 1u128 0u128 into r3826;\n    add r3825 r3826 into r3827;\n    mul r3818 r3634 into r3828;\n    add r3828 r3827 into r3829;\n    and r3829 18446744073709551615u128 into r3830;\n    lt r3769 r3830 into r3831;\n    add r3769 18446744073709551616u128 into r3832;\n    sub r3832 r3830 into r3833;\n    and r3833 18446744073709551615u128 into r3834;\n    shr r3829 64u8 into r3835;\n    ternary r3831 1u128 0u128 into r3836;\n    add r3835 r3836 into r3837;\n    mul r3818 r3635 into r3838;\n    add r3838 r3837 into r3839;\n    and r3839 18446744073709551615u128 into r3840;\n    lt r3775 r3840 into r3841;\n    add r3775 18446744073709551616u128 into r3842;\n    sub r3842 r3840 into r3843;\n    and r3843 18446744073709551615u128 into r3844;\n    shr r3839 64u8 into r3845;\n    ternary r3841 1u128 0u128 into r3846;\n    add r3845 r3846 into r3847;\n    mul r3818 r3636 into r3848;\n    add r3848 r3847 into r3849;\n    and r3849 18446744073709551615u128 into r3850;\n    lt r3781 r3850 into r3851;\n    add r3781 18446744073709551616u128 into r3852;\n    sub r3852 r3850 into r3853;\n    and r3853 18446744073709551615u128 into r3854;\n    shr r3849 64u8 into r3855;\n    ternary r3851 1u128 0u128 into r3856;\n    add r3855 r3856 into r3857;\n    lt r3787 r3857 into r3858;\n    add r3787 18446744073709551616u128 into r3859;\n    sub r3859 r3857 into r3860;\n    and r3860 18446744073709551615u128 into r3861;\n    sub.w r3818 1u128 into r3862;\n    ternary r3858 r3862 r3818 into r3863;\n    add r3824 r3633 into r3864;\n    and r3864 18446744073709551615u128 into r3865;\n    ternary r3858 r3865 r3824 into r3866;\n    shr r3864 64u8 into r3867;\n    ternary r3858 r3867 0u128 into r3868;\n    add r3834 r3634 into r3869;\n    add r3869 r3868 into r3870;\n    and r3870 18446744073709551615u128 into r3871;\n    ternary r3858 r3871 r3834 into r3872;\n    shr r3870 64u8 into r3873;\n    ternary r3858 r3873 0u128 into r3874;\n    add r3844 r3635 into r3875;\n    add r3875 r3874 into r3876;\n    and r3876 18446744073709551615u128 into r3877;\n    ternary r3858 r3877 r3844 into r3878;\n    shr r3876 64u8 into r3879;\n    ternary r3858 r3879 0u128 into r3880;\n    add r3854 r3636 into r3881;\n    add r3881 r3880 into r3882;\n    and r3882 18446744073709551615u128 into r3883;\n    ternary r3858 r3883 r3854 into r3884;\n    shr r3882 64u8 into r3885;\n    ternary r3858 r3885 0u128 into r3886;\n    add r3861 r3886 into r3887;\n    shl r3884 64u8 into r3888;\n    add r3888 r3878 into r3889;\n    div r3889 r3636 into r3890;\n    gt r3890 18446744073709551615u128 into r3891;\n    ternary r3891 18446744073709551615u128 r3890 into r3892;\n    mul r3892 r3636 into r3893;\n    sub r3889 r3893 into r3894;\n    lte r3894 18446744073709551615u128 into r3895;\n    mul r3892 r3635 into r3896;\n    and r3894 18446744073709551615u128 into r3897;\n    shl r3897 64u8 into r3898;\n    add r3898 r3872 into r3899;\n    gt r3896 r3899 into r3900;\n    and r3895 r3900 into r3901;\n    sub.w r3892 1u128 into r3902;\n    ternary r3901 r3902 r3892 into r3903;\n    add r3894 r3636 into r3904;\n    ternary r3901 r3904 r3894 into r3905;\n    lte r3905 18446744073709551615u128 into r3906;\n    and r3901 r3906 into r3907;\n    mul r3903 r3635 into r3908;\n    and r3905 18446744073709551615u128 into r3909;\n    shl r3909 64u8 into r3910;\n    add r3910 r3872 into r3911;\n    gt r3908 r3911 into r3912;\n    and r3907 r3912 into r3913;\n    sub.w r3903 1u128 into r3914;\n    ternary r3913 r3914 r3903 into r3915;\n    mul r3915 r3633 into r3916;\n    and r3916 18446744073709551615u128 into r3917;\n    lt r3687 r3917 into r3918;\n    add r3687 18446744073709551616u128 into r3919;\n    sub r3919 r3917 into r3920;\n    and r3920 18446744073709551615u128 into r3921;\n    shr r3916 64u8 into r3922;\n    ternary r3918 1u128 0u128 into r3923;\n    add r3922 r3923 into r3924;\n    mul r3915 r3634 into r3925;\n    add r3925 r3924 into r3926;\n    and r3926 18446744073709551615u128 into r3927;\n    lt r3866 r3927 into r3928;\n    add r3866 18446744073709551616u128 into r3929;\n    sub r3929 r3927 into r3930;\n    and r3930 18446744073709551615u128 into r3931;\n    shr r3926 64u8 into r3932;\n    ternary r3928 1u128 0u128 into r3933;\n    add r3932 r3933 into r3934;\n    mul r3915 r3635 into r3935;\n    add r3935 r3934 into r3936;\n    and r3936 18446744073709551615u128 into r3937;\n    lt r3872 r3937 into r3938;\n    add r3872 18446744073709551616u128 into r3939;\n    sub r3939 r3937 into r3940;\n    and r3940 18446744073709551615u128 into r3941;\n    shr r3936 64u8 into r3942;\n    ternary r3938 1u128 0u128 into r3943;\n    add r3942 r3943 into r3944;\n    mul r3915 r3636 into r3945;\n    add r3945 r3944 into r3946;\n    and r3946 18446744073709551615u128 into r3947;\n    lt r3878 r3947 into r3948;\n    add r3878 18446744073709551616u128 into r3949;\n    sub r3949 r3947 into r3950;\n    and r3950 18446744073709551615u128 into r3951;\n    shr r3946 64u8 into r3952;\n    ternary r3948 1u128 0u128 into r3953;\n    add r3952 r3953 into r3954;\n    lt r3884 r3954 into r3955;\n    add r3884 18446744073709551616u128 into r3956;\n    sub r3956 r3954 into r3957;\n    and r3957 18446744073709551615u128 into r3958;\n    sub.w r3915 1u128 into r3959;\n    ternary r3955 r3959 r3915 into r3960;\n    add r3921 r3633 into r3961;\n    and r3961 18446744073709551615u128 into r3962;\n    ternary r3955 r3962 r3921 into r3963;\n    shr r3961 64u8 into r3964;\n    ternary r3955 r3964 0u128 into r3965;\n    add r3931 r3634 into r3966;\n    add r3966 r3965 into r3967;\n    and r3967 18446744073709551615u128 into r3968;\n    ternary r3955 r3968 r3931 into r3969;\n    shr r3967 64u8 into r3970;\n    ternary r3955 r3970 0u128 into r3971;\n    add r3941 r3635 into r3972;\n    add r3972 r3971 into r3973;\n    and r3973 18446744073709551615u128 into r3974;\n    ternary r3955 r3974 r3941 into r3975;\n    shr r3973 64u8 into r3976;\n    ternary r3955 r3976 0u128 into r3977;\n    add r3951 r3636 into r3978;\n    add r3978 r3977 into r3979;\n    and r3979 18446744073709551615u128 into r3980;\n    ternary r3955 r3980 r3951 into r3981;\n    shr r3979 64u8 into r3982;\n    ternary r3955 r3982 0u128 into r3983;\n    add r3958 r3983 into r3984;\n    shl r3981 64u8 into r3985;\n    add r3985 r3975 into r3986;\n    div r3986 r3636 into r3987;\n    gt r3987 18446744073709551615u128 into r3988;\n    ternary r3988 18446744073709551615u128 r3987 into r3989;\n    mul r3989 r3636 into r3990;\n    sub r3986 r3990 into r3991;\n    lte r3991 18446744073709551615u128 into r3992;\n    mul r3989 r3635 into r3993;\n    and r3991 18446744073709551615u128 into r3994;\n    shl r3994 64u8 into r3995;\n    add r3995 r3969 into r3996;\n    gt r3993 r3996 into r3997;\n    and r3992 r3997 into r3998;\n    sub.w r3989 1u128 into r3999;\n    ternary r3998 r3999 r3989 into r4000;\n    add r3991 r3636 into r4001;\n    ternary r3998 r4001 r3991 into r4002;\n    lte r4002 18446744073709551615u128 into r4003;\n    and r3998 r4003 into r4004;\n    mul r4000 r3635 into r4005;\n    and r4002 18446744073709551615u128 into r4006;\n    shl r4006 64u8 into r4007;\n    add r4007 r3969 into r4008;\n    gt r4005 r4008 into r4009;\n    and r4004 r4009 into r4010;\n    sub.w r4000 1u128 into r4011;\n    ternary r4010 r4011 r4000 into r4012;\n    mul r4012 r3633 into r4013;\n    and r4013 18446744073709551615u128 into r4014;\n    lt r3686 r4014 into r4015;\n    add r3686 18446744073709551616u128 into r4016;\n    sub r4016 r4014 into r4017;\n    and r4017 18446744073709551615u128 into r4018;\n    shr r4013 64u8 into r4019;\n    ternary r4015 1u128 0u128 into r4020;\n    add r4019 r4020 into r4021;\n    mul r4012 r3634 into r4022;\n    add r4022 r4021 into r4023;\n    and r4023 18446744073709551615u128 into r4024;\n    lt r3963 r4024 into r4025;\n    add r3963 18446744073709551616u128 into r4026;\n    sub r4026 r4024 into r4027;\n    and r4027 18446744073709551615u128 into r4028;\n    shr r4023 64u8 into r4029;\n    ternary r4025 1u128 0u128 into r4030;\n    add r4029 r4030 into r4031;\n    mul r4012 r3635 into r4032;\n    add r4032 r4031 into r4033;\n    and r4033 18446744073709551615u128 into r4034;\n    lt r3969 r4034 into r4035;\n    add r3969 18446744073709551616u128 into r4036;\n    sub r4036 r4034 into r4037;\n    and r4037 18446744073709551615u128 into r4038;\n    shr r4033 64u8 into r4039;\n    ternary r4035 1u128 0u128 into r4040;\n    add r4039 r4040 into r4041;\n    mul r4012 r3636 into r4042;\n    add r4042 r4041 into r4043;\n    and r4043 18446744073709551615u128 into r4044;\n    lt r3975 r4044 into r4045;\n    add r3975 18446744073709551616u128 into r4046;\n    sub r4046 r4044 into r4047;\n    and r4047 18446744073709551615u128 into r4048;\n    shr r4043 64u8 into r4049;\n    ternary r4045 1u128 0u128 into r4050;\n    add r4049 r4050 into r4051;\n    lt r3981 r4051 into r4052;\n    add r3981 18446744073709551616u128 into r4053;\n    sub r4053 r4051 into r4054;\n    and r4054 18446744073709551615u128 into r4055;\n    sub.w r4012 1u128 into r4056;\n    ternary r4052 r4056 r4012 into r4057;\n    add r4018 r3633 into r4058;\n    and r4058 18446744073709551615u128 into r4059;\n    ternary r4052 r4059 r4018 into r4060;\n    shr r4058 64u8 into r4061;\n    ternary r4052 r4061 0u128 into r4062;\n    add r4028 r3634 into r4063;\n    add r4063 r4062 into r4064;\n    and r4064 18446744073709551615u128 into r4065;\n    ternary r4052 r4065 r4028 into r4066;\n    shr r4064 64u8 into r4067;\n    ternary r4052 r4067 0u128 into r4068;\n    add r4038 r3635 into r4069;\n    add r4069 r4068 into r4070;\n    and r4070 18446744073709551615u128 into r4071;\n    ternary r4052 r4071 r4038 into r4072;\n    shr r4070 64u8 into r4073;\n    ternary r4052 r4073 0u128 into r4074;\n    add r4048 r3636 into r4075;\n    add r4075 r4074 into r4076;\n    and r4076 18446744073709551615u128 into r4077;\n    ternary r4052 r4077 r4048 into r4078;\n    shr r4076 64u8 into r4079;\n    ternary r4052 r4079 0u128 into r4080;\n    add r4055 r4080 into r4081;\n    shl r3766 64u8 into r4082;\n    add r4082 r3863 into r4083;\n    shl r3960 64u8 into r4084;\n    add r4084 r4057 into r4085;\n    cast r4083 r4085 into r4086 as U256__8JquwLopp8;\n    shl r4078 64u8 into r4087;\n    add r4087 r4072 into r4088;\n    shl r4066 64u8 into r4089;\n    add r4089 r4060 into r4090;\n    cast r3619 into r4091 as u8;\n    sub 128u8 r4091 into r4092;\n    shr r4090 r4091 into r4093;\n    shr r4088 r4091 into r4094;\n    cast r4086.hi r4086.lo into r4095 as U256__8JquwLopp8;\n    and r4095.lo 18446744073709551615u128 into r4096;\n    shr r4095.lo 64u8 into r4097;\n    and r4096 18446744073709551615u128 into r4098;\n    shr r4096 64u8 into r4099;\n    and r4097 18446744073709551615u128 into r4100;\n    add r4099 r4100 into r4101;\n    and r4101 18446744073709551615u128 into r4102;\n    shr r4101 64u8 into r4103;\n    shr r4097 64u8 into r4104;\n    add r4104 r4103 into r4105;\n    and r4105 18446744073709551615u128 into r4106;\n    shr r4105 64u8 into r4107;\n    shl r4107 64u8 into r4108;\n    add r4108 r4106 into r4109;\n    shl r4102 64u8 into r4110;\n    add r4110 r4098 into r4111;\n    shr r4095.lo 64u8 into r4112;\n    and r4095.hi 18446744073709551615u128 into r4113;\n    shr r4095.hi 64u8 into r4114;\n    and r4113 18446744073709551615u128 into r4115;\n    shr r4113 64u8 into r4116;\n    and r4114 18446744073709551615u128 into r4117;\n    add r4116 r4117 into r4118;\n    and r4118 18446744073709551615u128 into r4119;\n    shr r4118 64u8 into r4120;\n    shr r4114 64u8 into r4121;\n    add r4121 r4120 into r4122;\n    and r4122 18446744073709551615u128 into r4123;\n    shr r4122 64u8 into r4124;\n    shl r4124 64u8 into r4125;\n    add r4125 r4123 into r4126;\n    shl r4119 64u8 into r4127;\n    add r4127 r4115 into r4128;\n    shr r4095.hi 64u8 into r4129;\n    lt r4109 r4109 into r4130;\n    ternary r4130 1u128 0u128 into r4131;\n    add.w r4109 r4128 into r4132;\n    lt r4132 r4109 into r4133;\n    ternary r4133 1u128 0u128 into r4134;\n    add r4131 r4134 into r4135;\n    lt r4126 0u128 into r4136;\n    ternary r4136 1u128 0u128 into r4137;\n    lt r4126 r4126 into r4138;\n    ternary r4138 1u128 0u128 into r4139;\n    add.w r4126 r4135 into r4140;\n    lt r4140 r4126 into r4141;\n    ternary r4141 1u128 0u128 into r4142;\n    add r4137 r4139 into r4143;\n    add r4143 r4142 into r4144;\n    cast r4144 r4140 into r4145 as U256__8JquwLopp8;\n    cast r4132 r4111 into r4146 as U256__8JquwLopp8;\n    lt r4145.hi r3488.hi into r4147;\n    gt r4145.hi r3488.hi into r4148;\n    lt r4145.lo r3488.lo into r4149;\n    ternary r4148 false r4149 into r4150;\n    ternary r4147 true r4150 into r4151;\n    assert.eq r4151 true;\n    gt r3488.hi 0u128 into r4152;\n    ternary r4152 r3488.hi r3488.lo into r4153;\n    ternary r4152 128u32 0u32 into r4154;\n    gte r4153 18446744073709551616u128 into r4155;\n    shr r4153 64u8 into r4156;\n    ternary r4155 r4156 r4153 into r4157;\n    ternary r4155 64u32 0u32 into r4158;\n    gte r4157 4294967296u128 into r4159;\n    shr r4157 32u8 into r4160;\n    add r4158 32u32 into r4161;\n    ternary r4159 r4160 r4157 into r4162;\n    ternary r4159 r4161 r4158 into r4163;\n    gte r4162 65536u128 into r4164;\n    shr r4162 16u8 into r4165;\n    add r4163 16u32 into r4166;\n    ternary r4164 r4165 r4162 into r4167;\n    ternary r4164 r4166 r4163 into r4168;\n    gte r4167 256u128 into r4169;\n    shr r4167 8u8 into r4170;\n    add r4168 8u32 into r4171;\n    ternary r4169 r4170 r4167 into r4172;\n    ternary r4169 r4171 r4168 into r4173;\n    gte r4172 16u128 into r4174;\n    shr r4172 4u8 into r4175;\n    add r4173 4u32 into r4176;\n    ternary r4174 r4175 r4172 into r4177;\n    ternary r4174 r4176 r4173 into r4178;\n    gte r4177 4u128 into r4179;\n    shr r4177 2u8 into r4180;\n    add r4178 2u32 into r4181;\n    ternary r4179 r4180 r4177 into r4182;\n    ternary r4179 r4181 r4178 into r4183;\n    gte r4182 2u128 into r4184;\n    add r4183 1u32 into r4185;\n    ternary r4184 r4185 r4183 into r4186;\n    add r4154 r4186 into r4187;\n    sub 255u32 r4187 into r4188;\n    cast r4188 into r4189 as u16;\n    and r4189 127u16 into r4190;\n    cast r4190 into r4191 as u8;\n    is.eq r4191 0u8 into r4192;\n    sub 128u8 r4191 into r4193;\n    shr.w r3488.lo r4193 into r4194;\n    ternary r4192 0u128 r4194 into r4195;\n    shl.w r3488.hi r4191 into r4196;\n    or r4196 r4195 into r4197;\n    shl.w r3488.lo r4191 into r4198;\n    shl.w r3488.lo r4191 into r4199;\n    gte r4189 128u16 into r4200;\n    ternary r4200 r4199 r4197 into r4201;\n    ternary r4200 0u128 r4198 into r4202;\n    cast r4201 r4202 into r4203 as U256__8JquwLopp8;\n    and r4203.lo 18446744073709551615u128 into r4204;\n    shr r4203.lo 64u8 into r4205;\n    and r4203.hi 18446744073709551615u128 into r4206;\n    shr r4203.hi 64u8 into r4207;\n    cast r4190 into r4208 as u8;\n    is.eq r4208 0u8 into r4209;\n    sub 128u8 r4208 into r4210;\n    shr.w r4146.lo r4210 into r4211;\n    ternary r4209 0u128 r4211 into r4212;\n    shl.w r4146.hi r4208 into r4213;\n    or r4213 r4212 into r4214;\n    shl.w r4146.lo r4208 into r4215;\n    shl.w r4146.lo r4208 into r4216;\n    ternary r4200 r4216 r4214 into r4217;\n    ternary r4200 0u128 r4215 into r4218;\n    cast r4217 r4218 into r4219 as U256__8JquwLopp8;\n    is.eq r4189 0u16 into r4220;\n    sub 256u16 r4189 into r4221;\n    and r4221 127u16 into r4222;\n    cast r4222 into r4223 as u8;\n    is.eq r4223 0u8 into r4224;\n    sub 128u8 r4223 into r4225;\n    shl.w r4146.hi r4225 into r4226;\n    ternary r4224 0u128 r4226 into r4227;\n    shr r4146.lo r4223 into r4228;\n    or r4228 r4227 into r4229;\n    shr r4146.hi r4223 into r4230;\n    shr r4146.hi r4223 into r4231;\n    gte r4221 128u16 into r4232;\n    ternary r4232 0u128 r4230 into r4233;\n    ternary r4232 r4231 r4229 into r4234;\n    cast r4233 r4234 into r4235 as U256__8JquwLopp8;\n    ternary r4220 0u128 r4235.hi into r4236;\n    ternary r4220 0u128 r4235.lo into r4237;\n    cast r4236 r4237 into r4238 as U256__8JquwLopp8;\n    cast r4190 into r4239 as u8;\n    is.eq r4239 0u8 into r4240;\n    sub 128u8 r4239 into r4241;\n    shr.w r4145.lo r4241 into r4242;\n    ternary r4240 0u128 r4242 into r4243;\n    shl.w r4145.hi r4239 into r4244;\n    or r4244 r4243 into r4245;\n    shl.w r4145.lo r4239 into r4246;\n    shl.w r4145.lo r4239 into r4247;\n    ternary r4200 r4247 r4245 into r4248;\n    ternary r4200 0u128 r4246 into r4249;\n    cast r4248 r4249 into r4250 as U256__8JquwLopp8;\n    add.w r4250.lo r4238.lo into r4251;\n    lt r4251 r4250.lo into r4252;\n    ternary r4252 1u128 0u128 into r4253;\n    add.w r4250.hi r4238.hi into r4254;\n    add.w r4254 r4253 into r4255;\n    cast r4255 r4251 into r4256 as U256__8JquwLopp8;\n    and r4219.lo 18446744073709551615u128 into r4257;\n    shr r4219.lo 64u8 into r4258;\n    and r4219.hi 18446744073709551615u128 into r4259;\n    shr r4219.hi 64u8 into r4260;\n    and r4256.lo 18446744073709551615u128 into r4261;\n    shr r4256.lo 64u8 into r4262;\n    and r4256.hi 18446744073709551615u128 into r4263;\n    shr r4256.hi 64u8 into r4264;\n    shl r4264 64u8 into r4265;\n    add r4265 r4263 into r4266;\n    div r4266 r4207 into r4267;\n    gt r4267 18446744073709551615u128 into r4268;\n    ternary r4268 18446744073709551615u128 r4267 into r4269;\n    mul r4269 r4207 into r4270;\n    sub r4266 r4270 into r4271;\n    lte r4271 18446744073709551615u128 into r4272;\n    mul r4269 r4206 into r4273;\n    and r4271 18446744073709551615u128 into r4274;\n    shl r4274 64u8 into r4275;\n    add r4275 r4262 into r4276;\n    gt r4273 r4276 into r4277;\n    and r4272 r4277 into r4278;\n    sub.w r4269 1u128 into r4279;\n    ternary r4278 r4279 r4269 into r4280;\n    add r4271 r4207 into r4281;\n    ternary r4278 r4281 r4271 into r4282;\n    lte r4282 18446744073709551615u128 into r4283;\n    and r4278 r4283 into r4284;\n    mul r4280 r4206 into r4285;\n    and r4282 18446744073709551615u128 into r4286;\n    shl r4286 64u8 into r4287;\n    add r4287 r4262 into r4288;\n    gt r4285 r4288 into r4289;\n    and r4284 r4289 into r4290;\n    sub.w r4280 1u128 into r4291;\n    ternary r4290 r4291 r4280 into r4292;\n    mul r4292 r4204 into r4293;\n    and r4293 18446744073709551615u128 into r4294;\n    lt r4260 r4294 into r4295;\n    add r4260 18446744073709551616u128 into r4296;\n    sub r4296 r4294 into r4297;\n    and r4297 18446744073709551615u128 into r4298;\n    shr r4293 64u8 into r4299;\n    ternary r4295 1u128 0u128 into r4300;\n    add r4299 r4300 into r4301;\n    mul r4292 r4205 into r4302;\n    add r4302 r4301 into r4303;\n    and r4303 18446744073709551615u128 into r4304;\n    lt r4261 r4304 into r4305;\n    add r4261 18446744073709551616u128 into r4306;\n    sub r4306 r4304 into r4307;\n    and r4307 18446744073709551615u128 into r4308;\n    shr r4303 64u8 into r4309;\n    ternary r4305 1u128 0u128 into r4310;\n    add r4309 r4310 into r4311;\n    mul r4292 r4206 into r4312;\n    add r4312 r4311 into r4313;\n    and r4313 18446744073709551615u128 into r4314;\n    lt r4262 r4314 into r4315;\n    add r4262 18446744073709551616u128 into r4316;\n    sub r4316 r4314 into r4317;\n    and r4317 18446744073709551615u128 into r4318;\n    shr r4313 64u8 into r4319;\n    ternary r4315 1u128 0u128 into r4320;\n    add r4319 r4320 into r4321;\n    mul r4292 r4207 into r4322;\n    add r4322 r4321 into r4323;\n    and r4323 18446744073709551615u128 into r4324;\n    lt r4263 r4324 into r4325;\n    add r4263 18446744073709551616u128 into r4326;\n    sub r4326 r4324 into r4327;\n    and r4327 18446744073709551615u128 into r4328;\n    shr r4323 64u8 into r4329;\n    ternary r4325 1u128 0u128 into r4330;\n    add r4329 r4330 into r4331;\n    lt r4264 r4331 into r4332;\n    add r4264 18446744073709551616u128 into r4333;\n    sub r4333 r4331 into r4334;\n    and r4334 18446744073709551615u128 into r4335;\n    sub.w r4292 1u128 into r4336;\n    ternary r4332 r4336 r4292 into r4337;\n    add r4298 r4204 into r4338;\n    and r4338 18446744073709551615u128 into r4339;\n    ternary r4332 r4339 r4298 into r4340;\n    shr r4338 64u8 into r4341;\n    ternary r4332 r4341 0u128 into r4342;\n    add r4308 r4205 into r4343;\n    add r4343 r4342 into r4344;\n    and r4344 18446744073709551615u128 into r4345;\n    ternary r4332 r4345 r4308 into r4346;\n    shr r4344 64u8 into r4347;\n    ternary r4332 r4347 0u128 into r4348;\n    add r4318 r4206 into r4349;\n    add r4349 r4348 into r4350;\n    and r4350 18446744073709551615u128 into r4351;\n    ternary r4332 r4351 r4318 into r4352;\n    shr r4350 64u8 into r4353;\n    ternary r4332 r4353 0u128 into r4354;\n    add r4328 r4207 into r4355;\n    add r4355 r4354 into r4356;\n    and r4356 18446744073709551615u128 into r4357;\n    ternary r4332 r4357 r4328 into r4358;\n    shr r4356 64u8 into r4359;\n    ternary r4332 r4359 0u128 into r4360;\n    add r4335 r4360 into r4361;\n    shl r4358 64u8 into r4362;\n    add r4362 r4352 into r4363;\n    div r4363 r4207 into r4364;\n    gt r4364 18446744073709551615u128 into r4365;\n    ternary r4365 18446744073709551615u128 r4364 into r4366;\n    mul r4366 r4207 into r4367;\n    sub r4363 r4367 into r4368;\n    lte r4368 18446744073709551615u128 into r4369;\n    mul r4366 r4206 into r4370;\n    and r4368 18446744073709551615u128 into r4371;\n    shl r4371 64u8 into r4372;\n    add r4372 r4346 into r4373;\n    gt r4370 r4373 into r4374;\n    and r4369 r4374 into r4375;\n    sub.w r4366 1u128 into r4376;\n    ternary r4375 r4376 r4366 into r4377;\n    add r4368 r4207 into r4378;\n    ternary r4375 r4378 r4368 into r4379;\n    lte r4379 18446744073709551615u128 into r4380;\n    and r4375 r4380 into r4381;\n    mul r4377 r4206 into r4382;\n    and r4379 18446744073709551615u128 into r4383;\n    shl r4383 64u8 into r4384;\n    add r4384 r4346 into r4385;\n    gt r4382 r4385 into r4386;\n    and r4381 r4386 into r4387;\n    sub.w r4377 1u128 into r4388;\n    ternary r4387 r4388 r4377 into r4389;\n    mul r4389 r4204 into r4390;\n    and r4390 18446744073709551615u128 into r4391;\n    lt r4259 r4391 into r4392;\n    add r4259 18446744073709551616u128 into r4393;\n    sub r4393 r4391 into r4394;\n    and r4394 18446744073709551615u128 into r4395;\n    shr r4390 64u8 into r4396;\n    ternary r4392 1u128 0u128 into r4397;\n    add r4396 r4397 into r4398;\n    mul r4389 r4205 into r4399;\n    add r4399 r4398 into r4400;\n    and r4400 18446744073709551615u128 into r4401;\n    lt r4340 r4401 into r4402;\n    add r4340 18446744073709551616u128 into r4403;\n    sub r4403 r4401 into r4404;\n    and r4404 18446744073709551615u128 into r4405;\n    shr r4400 64u8 into r4406;\n    ternary r4402 1u128 0u128 into r4407;\n    add r4406 r4407 into r4408;\n    mul r4389 r4206 into r4409;\n    add r4409 r4408 into r4410;\n    and r4410 18446744073709551615u128 into r4411;\n    lt r4346 r4411 into r4412;\n    add r4346 18446744073709551616u128 into r4413;\n    sub r4413 r4411 into r4414;\n    and r4414 18446744073709551615u128 into r4415;\n    shr r4410 64u8 into r4416;\n    ternary r4412 1u128 0u128 into r4417;\n    add r4416 r4417 into r4418;\n    mul r4389 r4207 into r4419;\n    add r4419 r4418 into r4420;\n    and r4420 18446744073709551615u128 into r4421;\n    lt r4352 r4421 into r4422;\n    add r4352 18446744073709551616u128 into r4423;\n    sub r4423 r4421 into r4424;\n    and r4424 18446744073709551615u128 into r4425;\n    shr r4420 64u8 into r4426;\n    ternary r4422 1u128 0u128 into r4427;\n    add r4426 r4427 into r4428;\n    lt r4358 r4428 into r4429;\n    add r4358 18446744073709551616u128 into r4430;\n    sub r4430 r4428 into r4431;\n    and r4431 18446744073709551615u128 into r4432;\n    sub.w r4389 1u128 into r4433;\n    ternary r4429 r4433 r4389 into r4434;\n    add r4395 r4204 into r4435;\n    and r4435 18446744073709551615u128 into r4436;\n    ternary r4429 r4436 r4395 into r4437;\n    shr r4435 64u8 into r4438;\n    ternary r4429 r4438 0u128 into r4439;\n    add r4405 r4205 into r4440;\n    add r4440 r4439 into r4441;\n    and r4441 18446744073709551615u128 into r4442;\n    ternary r4429 r4442 r4405 into r4443;\n    shr r4441 64u8 into r4444;\n    ternary r4429 r4444 0u128 into r4445;\n    add r4415 r4206 into r4446;\n    add r4446 r4445 into r4447;\n    and r4447 18446744073709551615u128 into r4448;\n    ternary r4429 r4448 r4415 into r4449;\n    shr r4447 64u8 into r4450;\n    ternary r4429 r4450 0u128 into r4451;\n    add r4425 r4207 into r4452;\n    add r4452 r4451 into r4453;\n    and r4453 18446744073709551615u128 into r4454;\n    ternary r4429 r4454 r4425 into r4455;\n    shr r4453 64u8 into r4456;\n    ternary r4429 r4456 0u128 into r4457;\n    add r4432 r4457 into r4458;\n    shl r4455 64u8 into r4459;\n    add r4459 r4449 into r4460;\n    div r4460 r4207 into r4461;\n    gt r4461 18446744073709551615u128 into r4462;\n    ternary r4462 18446744073709551615u128 r4461 into r4463;\n    mul r4463 r4207 into r4464;\n    sub r4460 r4464 into r4465;\n    lte r4465 18446744073709551615u128 into r4466;\n    mul r4463 r4206 into r4467;\n    and r4465 18446744073709551615u128 into r4468;\n    shl r4468 64u8 into r4469;\n    add r4469 r4443 into r4470;\n    gt r4467 r4470 into r4471;\n    and r4466 r4471 into r4472;\n    sub.w r4463 1u128 into r4473;\n    ternary r4472 r4473 r4463 into r4474;\n    add r4465 r4207 into r4475;\n    ternary r4472 r4475 r4465 into r4476;\n    lte r4476 18446744073709551615u128 into r4477;\n    and r4472 r4477 into r4478;\n    mul r4474 r4206 into r4479;\n    and r4476 18446744073709551615u128 into r4480;\n    shl r4480 64u8 into r4481;\n    add r4481 r4443 into r4482;\n    gt r4479 r4482 into r4483;\n    and r4478 r4483 into r4484;\n    sub.w r4474 1u128 into r4485;\n    ternary r4484 r4485 r4474 into r4486;\n    mul r4486 r4204 into r4487;\n    and r4487 18446744073709551615u128 into r4488;\n    lt r4258 r4488 into r4489;\n    add r4258 18446744073709551616u128 into r4490;\n    sub r4490 r4488 into r4491;\n    and r4491 18446744073709551615u128 into r4492;\n    shr r4487 64u8 into r4493;\n    ternary r4489 1u128 0u128 into r4494;\n    add r4493 r4494 into r4495;\n    mul r4486 r4205 into r4496;\n    add r4496 r4495 into r4497;\n    and r4497 18446744073709551615u128 into r4498;\n    lt r4437 r4498 into r4499;\n    add r4437 18446744073709551616u128 into r4500;\n    sub r4500 r4498 into r4501;\n    and r4501 18446744073709551615u128 into r4502;\n    shr r4497 64u8 into r4503;\n    ternary r4499 1u128 0u128 into r4504;\n    add r4503 r4504 into r4505;\n    mul r4486 r4206 into r4506;\n    add r4506 r4505 into r4507;\n    and r4507 18446744073709551615u128 into r4508;\n    lt r4443 r4508 into r4509;\n    add r4443 18446744073709551616u128 into r4510;\n    sub r4510 r4508 into r4511;\n    and r4511 18446744073709551615u128 into r4512;\n    shr r4507 64u8 into r4513;\n    ternary r4509 1u128 0u128 into r4514;\n    add r4513 r4514 into r4515;\n    mul r4486 r4207 into r4516;\n    add r4516 r4515 into r4517;\n    and r4517 18446744073709551615u128 into r4518;\n    lt r4449 r4518 into r4519;\n    add r4449 18446744073709551616u128 into r4520;\n    sub r4520 r4518 into r4521;\n    and r4521 18446744073709551615u128 into r4522;\n    shr r4517 64u8 into r4523;\n    ternary r4519 1u128 0u128 into r4524;\n    add r4523 r4524 into r4525;\n    lt r4455 r4525 into r4526;\n    add r4455 18446744073709551616u128 into r4527;\n    sub r4527 r4525 into r4528;\n    and r4528 18446744073709551615u128 into r4529;\n    sub.w r4486 1u128 into r4530;\n    ternary r4526 r4530 r4486 into r4531;\n    add r4492 r4204 into r4532;\n    and r4532 18446744073709551615u128 into r4533;\n    ternary r4526 r4533 r4492 into r4534;\n    shr r4532 64u8 into r4535;\n    ternary r4526 r4535 0u128 into r4536;\n    add r4502 r4205 into r4537;\n    add r4537 r4536 into r4538;\n    and r4538 18446744073709551615u128 into r4539;\n    ternary r4526 r4539 r4502 into r4540;\n    shr r4538 64u8 into r4541;\n    ternary r4526 r4541 0u128 into r4542;\n    add r4512 r4206 into r4543;\n    add r4543 r4542 into r4544;\n    and r4544 18446744073709551615u128 into r4545;\n    ternary r4526 r4545 r4512 into r4546;\n    shr r4544 64u8 into r4547;\n    ternary r4526 r4547 0u128 into r4548;\n    add r4522 r4207 into r4549;\n    add r4549 r4548 into r4550;\n    and r4550 18446744073709551615u128 into r4551;\n    ternary r4526 r4551 r4522 into r4552;\n    shr r4550 64u8 into r4553;\n    ternary r4526 r4553 0u128 into r4554;\n    add r4529 r4554 into r4555;\n    shl r4552 64u8 into r4556;\n    add r4556 r4546 into r4557;\n    div r4557 r4207 into r4558;\n    gt r4558 18446744073709551615u128 into r4559;\n    ternary r4559 18446744073709551615u128 r4558 into r4560;\n    mul r4560 r4207 into r4561;\n    sub r4557 r4561 into r4562;\n    lte r4562 18446744073709551615u128 into r4563;\n    mul r4560 r4206 into r4564;\n    and r4562 18446744073709551615u128 into r4565;\n    shl r4565 64u8 into r4566;\n    add r4566 r4540 into r4567;\n    gt r4564 r4567 into r4568;\n    and r4563 r4568 into r4569;\n    sub.w r4560 1u128 into r4570;\n    ternary r4569 r4570 r4560 into r4571;\n    add r4562 r4207 into r4572;\n    ternary r4569 r4572 r4562 into r4573;\n    lte r4573 18446744073709551615u128 into r4574;\n    and r4569 r4574 into r4575;\n    mul r4571 r4206 into r4576;\n    and r4573 18446744073709551615u128 into r4577;\n    shl r4577 64u8 into r4578;\n    add r4578 r4540 into r4579;\n    gt r4576 r4579 into r4580;\n    and r4575 r4580 into r4581;\n    sub.w r4571 1u128 into r4582;\n    ternary r4581 r4582 r4571 into r4583;\n    mul r4583 r4204 into r4584;\n    and r4584 18446744073709551615u128 into r4585;\n    lt r4257 r4585 into r4586;\n    add r4257 18446744073709551616u128 into r4587;\n    sub r4587 r4585 into r4588;\n    and r4588 18446744073709551615u128 into r4589;\n    shr r4584 64u8 into r4590;\n    ternary r4586 1u128 0u128 into r4591;\n    add r4590 r4591 into r4592;\n    mul r4583 r4205 into r4593;\n    add r4593 r4592 into r4594;\n    and r4594 18446744073709551615u128 into r4595;\n    lt r4534 r4595 into r4596;\n    add r4534 18446744073709551616u128 into r4597;\n    sub r4597 r4595 into r4598;\n    and r4598 18446744073709551615u128 into r4599;\n    shr r4594 64u8 into r4600;\n    ternary r4596 1u128 0u128 into r4601;\n    add r4600 r4601 into r4602;\n    mul r4583 r4206 into r4603;\n    add r4603 r4602 into r4604;\n    and r4604 18446744073709551615u128 into r4605;\n    lt r4540 r4605 into r4606;\n    add r4540 18446744073709551616u128 into r4607;\n    sub r4607 r4605 into r4608;\n    and r4608 18446744073709551615u128 into r4609;\n    shr r4604 64u8 into r4610;\n    ternary r4606 1u128 0u128 into r4611;\n    add r4610 r4611 into r4612;\n    mul r4583 r4207 into r4613;\n    add r4613 r4612 into r4614;\n    and r4614 18446744073709551615u128 into r4615;\n    lt r4546 r4615 into r4616;\n    add r4546 18446744073709551616u128 into r4617;\n    sub r4617 r4615 into r4618;\n    and r4618 18446744073709551615u128 into r4619;\n    shr r4614 64u8 into r4620;\n    ternary r4616 1u128 0u128 into r4621;\n    add r4620 r4621 into r4622;\n    lt r4552 r4622 into r4623;\n    add r4552 18446744073709551616u128 into r4624;\n    sub r4624 r4622 into r4625;\n    and r4625 18446744073709551615u128 into r4626;\n    sub.w r4583 1u128 into r4627;\n    ternary r4623 r4627 r4583 into r4628;\n    add r4589 r4204 into r4629;\n    and r4629 18446744073709551615u128 into r4630;\n    ternary r4623 r4630 r4589 into r4631;\n    shr r4629 64u8 into r4632;\n    ternary r4623 r4632 0u128 into r4633;\n    add r4599 r4205 into r4634;\n    add r4634 r4633 into r4635;\n    and r4635 18446744073709551615u128 into r4636;\n    ternary r4623 r4636 r4599 into r4637;\n    shr r4635 64u8 into r4638;\n    ternary r4623 r4638 0u128 into r4639;\n    add r4609 r4206 into r4640;\n    add r4640 r4639 into r4641;\n    and r4641 18446744073709551615u128 into r4642;\n    ternary r4623 r4642 r4609 into r4643;\n    shr r4641 64u8 into r4644;\n    ternary r4623 r4644 0u128 into r4645;\n    add r4619 r4207 into r4646;\n    add r4646 r4645 into r4647;\n    and r4647 18446744073709551615u128 into r4648;\n    ternary r4623 r4648 r4619 into r4649;\n    shr r4647 64u8 into r4650;\n    ternary r4623 r4650 0u128 into r4651;\n    add r4626 r4651 into r4652;\n    shl r4337 64u8 into r4653;\n    add r4653 r4434 into r4654;\n    shl r4531 64u8 into r4655;\n    add r4655 r4628 into r4656;\n    cast r4654 r4656 into r4657 as U256__8JquwLopp8;\n    shl r4649 64u8 into r4658;\n    add r4658 r4643 into r4659;\n    shl r4637 64u8 into r4660;\n    add r4660 r4631 into r4661;\n    cast r4190 into r4662 as u8;\n    sub 128u8 r4662 into r4663;\n    shr r4661 r4662 into r4664;\n    shr r4659 r4662 into r4665;\n    cast r4657.hi r4657.lo into r4666 as U256__8JquwLopp8;\n    is.neq r4666.hi 0u128 into r4667;\n    ternary r10 r3477.hi r4666.lo into r4668;\n    ternary r10 r3480 r4667 into r4669;\n    not r4669 into r4670;\n    and r47 r4670 into r4671;\n    gt r109 0u128 into r4672;\n    and r4671 r4672 into r4673;\n    ternary r4673 r3313.hi r0.hi into r4674;\n    ternary r4673 r3313.lo r0.lo into r4675;\n    cast r4674 r4675 into r4676 as U256__8JquwLopp8;\n    ternary r4673 r4668 0u128 into r4677;\n    lt r0.hi r1537.hi into r4678;\n    gt r0.hi r1537.hi into r4679;\n    lt r0.lo r1537.lo into r4680;\n    ternary r4679 false r4680 into r4681;\n    ternary r4678 true r4681 into r4682;\n    ternary r4682 r0.hi r1537.hi into r4683;\n    ternary r4682 r0.lo r1537.lo into r4684;\n    cast r4683 r4684 into r4685 as U256__8JquwLopp8;\n    lt r0.hi r1537.hi into r4686;\n    gt r0.hi r1537.hi into r4687;\n    lt r0.lo r1537.lo into r4688;\n    ternary r4687 false r4688 into r4689;\n    ternary r4686 true r4689 into r4690;\n    ternary r4690 r1537.hi r0.hi into r4691;\n    ternary r4690 r1537.lo r0.lo into r4692;\n    cast r4691 r4692 into r4693 as U256__8JquwLopp8;\n    lt r4693.lo r4685.lo into r4694;\n    ternary r4694 1u128 0u128 into r4695;\n    sub.w r4693.lo r4685.lo into r4696;\n    sub.w r4693.hi r4685.hi into r4697;\n    sub.w r4697 r4695 into r4698;\n    cast r4698 r4696 into r4699 as U256__8JquwLopp8;\n    cast 0u128 r1 into r4700 as U256__8JquwLopp8;\n    and r4700.lo 18446744073709551615u128 into r4701;\n    shr r4700.lo 64u8 into r4702;\n    and r4699.lo 18446744073709551615u128 into r4703;\n    shr r4699.lo 64u8 into r4704;\n    mul r4701 r4703 into r4705;\n    mul r4701 r4704 into r4706;\n    mul r4702 r4703 into r4707;\n    mul r4702 r4704 into r4708;\n    and r4705 18446744073709551615u128 into r4709;\n    shr r4705 64u8 into r4710;\n    and r4706 18446744073709551615u128 into r4711;\n    add r4710 r4711 into r4712;\n    and r4707 18446744073709551615u128 into r4713;\n    add r4712 r4713 into r4714;\n    and r4714 18446744073709551615u128 into r4715;\n    shr r4714 64u8 into r4716;\n    shr r4706 64u8 into r4717;\n    shr r4707 64u8 into r4718;\n    add r4717 r4718 into r4719;\n    and r4708 18446744073709551615u128 into r4720;\n    add r4719 r4720 into r4721;\n    add r4721 r4716 into r4722;\n    and r4722 18446744073709551615u128 into r4723;\n    shr r4722 64u8 into r4724;\n    shr r4708 64u8 into r4725;\n    add r4725 r4724 into r4726;\n    shl r4726 64u8 into r4727;\n    add r4727 r4723 into r4728;\n    shl r4715 64u8 into r4729;\n    add r4729 r4709 into r4730;\n    and r4700.lo 18446744073709551615u128 into r4731;\n    shr r4700.lo 64u8 into r4732;\n    and r4699.hi 18446744073709551615u128 into r4733;\n    shr r4699.hi 64u8 into r4734;\n    mul r4731 r4733 into r4735;\n    mul r4731 r4734 into r4736;\n    mul r4732 r4733 into r4737;\n    mul r4732 r4734 into r4738;\n    and r4735 18446744073709551615u128 into r4739;\n    shr r4735 64u8 into r4740;\n    and r4736 18446744073709551615u128 into r4741;\n    add r4740 r4741 into r4742;\n    and r4737 18446744073709551615u128 into r4743;\n    add r4742 r4743 into r4744;\n    and r4744 18446744073709551615u128 into r4745;\n    shr r4744 64u8 into r4746;\n    shr r4736 64u8 into r4747;\n    shr r4737 64u8 into r4748;\n    add r4747 r4748 into r4749;\n    and r4738 18446744073709551615u128 into r4750;\n    add r4749 r4750 into r4751;\n    add r4751 r4746 into r4752;\n    and r4752 18446744073709551615u128 into r4753;\n    shr r4752 64u8 into r4754;\n    shr r4738 64u8 into r4755;\n    add r4755 r4754 into r4756;\n    shl r4756 64u8 into r4757;\n    add r4757 r4753 into r4758;\n    shl r4745 64u8 into r4759;\n    add r4759 r4739 into r4760;\n    and r4700.hi 18446744073709551615u128 into r4761;\n    shr r4700.hi 64u8 into r4762;\n    and r4699.lo 18446744073709551615u128 into r4763;\n    shr r4699.lo 64u8 into r4764;\n    mul r4761 r4763 into r4765;\n    mul r4761 r4764 into r4766;\n    mul r4762 r4763 into r4767;\n    mul r4762 r4764 into r4768;\n    and r4765 18446744073709551615u128 into r4769;\n    shr r4765 64u8 into r4770;\n    and r4766 18446744073709551615u128 into r4771;\n    add r4770 r4771 into r4772;\n    and r4767 18446744073709551615u128 into r4773;\n    add r4772 r4773 into r4774;\n    and r4774 18446744073709551615u128 into r4775;\n    shr r4774 64u8 into r4776;\n    shr r4766 64u8 into r4777;\n    shr r4767 64u8 into r4778;\n    add r4777 r4778 into r4779;\n    and r4768 18446744073709551615u128 into r4780;\n    add r4779 r4780 into r4781;\n    add r4781 r4776 into r4782;\n    and r4782 18446744073709551615u128 into r4783;\n    shr r4782 64u8 into r4784;\n    shr r4768 64u8 into r4785;\n    add r4785 r4784 into r4786;\n    shl r4786 64u8 into r4787;\n    add r4787 r4783 into r4788;\n    shl r4775 64u8 into r4789;\n    add r4789 r4769 into r4790;\n    and r4700.hi 18446744073709551615u128 into r4791;\n    shr r4700.hi 64u8 into r4792;\n    and r4699.hi 18446744073709551615u128 into r4793;\n    shr r4699.hi 64u8 into r4794;\n    mul r4791 r4793 into r4795;\n    mul r4791 r4794 into r4796;\n    mul r4792 r4793 into r4797;\n    mul r4792 r4794 into r4798;\n    and r4795 18446744073709551615u128 into r4799;\n    shr r4795 64u8 into r4800;\n    and r4796 18446744073709551615u128 into r4801;\n    add r4800 r4801 into r4802;\n    and r4797 18446744073709551615u128 into r4803;\n    add r4802 r4803 into r4804;\n    and r4804 18446744073709551615u128 into r4805;\n    shr r4804 64u8 into r4806;\n    shr r4796 64u8 into r4807;\n    shr r4797 64u8 into r4808;\n    add r4807 r4808 into r4809;\n    and r4798 18446744073709551615u128 into r4810;\n    add r4809 r4810 into r4811;\n    add r4811 r4806 into r4812;\n    and r4812 18446744073709551615u128 into r4813;\n    shr r4812 64u8 into r4814;\n    shr r4798 64u8 into r4815;\n    add r4815 r4814 into r4816;\n    shl r4816 64u8 into r4817;\n    add r4817 r4813 into r4818;\n    shl r4805 64u8 into r4819;\n    add r4819 r4799 into r4820;\n    add.w r4728 r4760 into r4821;\n    lt r4821 r4728 into r4822;\n    ternary r4822 1u128 0u128 into r4823;\n    add.w r4821 r4790 into r4824;\n    lt r4824 r4821 into r4825;\n    ternary r4825 1u128 0u128 into r4826;\n    add r4823 r4826 into r4827;\n    add.w r4758 r4788 into r4828;\n    lt r4828 r4758 into r4829;\n    ternary r4829 1u128 0u128 into r4830;\n    add.w r4828 r4820 into r4831;\n    lt r4831 r4828 into r4832;\n    ternary r4832 1u128 0u128 into r4833;\n    add.w r4831 r4827 into r4834;\n    lt r4834 r4831 into r4835;\n    ternary r4835 1u128 0u128 into r4836;\n    add r4830 r4833 into r4837;\n    add r4837 r4836 into r4838;\n    cast r4824 r4730 into r4839 as U256__8JquwLopp8;\n    gt r4839.lo 0u128 into r4840;\n    lt r4839.hi 340282366920938463463374607431768211455u128 into r4841;\n    and r4840 r4841 into r4842;\n    add.w r4839.hi 1u128 into r4843;\n    ternary r4842 r4843 r4839.hi into r4844;\n    ternary r1529 r4844 r1522 into r4845;\n    ternary r1526 r4845 r109 into r4846;\n    ternary r4673 r4846 0u128 into r4847;\n    cast r8 into r4848 as u128;\n    sub 1000000u128 r4848 into r4849;\n    and r4847 18446744073709551615u128 into r4850;\n    shr r4847 64u8 into r4851;\n    mul r4850 1000000u128 into r4852;\n    mul r4851 1000000u128 into r4853;\n    and r4852 18446744073709551615u128 into r4854;\n    shr r4852 64u8 into r4855;\n    and r4853 18446744073709551615u128 into r4856;\n    add r4855 r4856 into r4857;\n    and r4857 18446744073709551615u128 into r4858;\n    shr r4857 64u8 into r4859;\n    shr r4853 64u8 into r4860;\n    add r4860 r4859 into r4861;\n    and r4861 18446744073709551615u128 into r4862;\n    shr r4861 64u8 into r4863;\n    shl r4863 64u8 into r4864;\n    add r4864 r4862 into r4865;\n    shl r4858 64u8 into r4866;\n    add r4866 r4854 into r4867;\n    lt r4865 r4849 into r4868;\n    assert.eq r4868 true;\n    shr r4867 96u8 into r4869;\n    and r4869 4294967295u128 into r4870;\n    shl r4865 32u8 into r4871;\n    add r4871 r4870 into r4872;\n    div r4872 r4849 into r4873;\n    rem r4872 r4849 into r4874;\n    shr r4867 64u8 into r4875;\n    and r4875 4294967295u128 into r4876;\n    shl r4874 32u8 into r4877;\n    add r4877 r4876 into r4878;\n    shl r4873 32u8 into r4879;\n    div r4878 r4849 into r4880;\n    add r4879 r4880 into r4881;\n    rem r4878 r4849 into r4882;\n    shr r4867 32u8 into r4883;\n    and r4883 4294967295u128 into r4884;\n    shl r4882 32u8 into r4885;\n    add r4885 r4884 into r4886;\n    shl r4881 32u8 into r4887;\n    div r4886 r4849 into r4888;\n    add r4887 r4888 into r4889;\n    rem r4886 r4849 into r4890;\n    shr r4867 0u8 into r4891;\n    and r4891 4294967295u128 into r4892;\n    shl r4890 32u8 into r4893;\n    add r4893 r4892 into r4894;\n    shl r4889 32u8 into r4895;\n    div r4894 r4849 into r4896;\n    add r4895 r4896 into r4897;\n    rem r4894 r4849 into r4898;\n    gt r4898 0u128 into r4899;\n    ternary r4899 1u128 0u128 into r4900;\n    add r4897 r4900 into r4901;\n    ternary r1526 r4901 r2 into r4902;\n    ternary r4673 r4902 0u128 into r4903;\n    gt r4903 r2 into r4904;\n    ternary r4904 r2 r4903 into r4905;\n    sub r2 r4905 into r4906;\n    sub r4905 r4847 into r4907;\n    cast r9 into r4908 as u128;\n    mul r4907 r4908 into r4909;\n    div r4909 16u128 into r4910;\n    sub r4907 r4910 into r4911;\n    div r4911 r1539 into r4912;\n    rem r4911 r1539 into r4913;\n    lt r4913 r1539 into r4914;\n    assert.eq r4914 true;\n    gte r4913 170141183460469231731687303715884105728u128 into r4915;\n    add.w r4913 r4913 into r4916;\n    gte r4916 r1539 into r4917;\n    or r4915 r4917 into r4918;\n    sub.w r4916 r1539 into r4919;\n    ternary r4918 r4919 r4916 into r4920;\n    ternary r4918 170141183460469231731687303715884105728u128 0u128 into r4921;\n    gte r4920 170141183460469231731687303715884105728u128 into r4922;\n    add.w r4920 r4920 into r4923;\n    gte r4923 r1539 into r4924;\n    or r4922 r4924 into r4925;\n    sub.w r4923 r1539 into r4926;\n    ternary r4925 r4926 r4923 into r4927;\n    add r4921 85070591730234615865843651857942052864u128 into r4928;\n    ternary r4925 r4928 r4921 into r4929;\n    gte r4927 170141183460469231731687303715884105728u128 into r4930;\n    add.w r4927 r4927 into r4931;\n    gte r4931 r1539 into r4932;\n    or r4930 r4932 into r4933;\n    sub.w r4931 r1539 into r4934;\n    ternary r4933 r4934 r4931 into r4935;\n    add r4929 42535295865117307932921825928971026432u128 into r4936;\n    ternary r4933 r4936 r4929 into r4937;\n    gte r4935 170141183460469231731687303715884105728u128 into r4938;\n    add.w r4935 r4935 into r4939;\n    gte r4939 r1539 into r4940;\n    or r4938 r4940 into r4941;\n    sub.w r4939 r1539 into r4942;\n    ternary r4941 r4942 r4939 into r4943;\n    add r4937 21267647932558653966460912964485513216u128 into r4944;\n    ternary r4941 r4944 r4937 into r4945;\n    gte r4943 170141183460469231731687303715884105728u128 into r4946;\n    add.w r4943 r4943 into r4947;\n    gte r4947 r1539 into r4948;\n    or r4946 r4948 into r4949;\n    sub.w r4947 r1539 into r4950;\n    ternary r4949 r4950 r4947 into r4951;\n    add r4945 10633823966279326983230456482242756608u128 into r4952;\n    ternary r4949 r4952 r4945 into r4953;\n    gte r4951 170141183460469231731687303715884105728u128 into r4954;\n    add.w r4951 r4951 into r4955;\n    gte r4955 r1539 into r4956;\n    or r4954 r4956 into r4957;\n    sub.w r4955 r1539 into r4958;\n    ternary r4957 r4958 r4955 into r4959;\n    add r4953 5316911983139663491615228241121378304u128 into r4960;\n    ternary r4957 r4960 r4953 into r4961;\n    gte r4959 170141183460469231731687303715884105728u128 into r4962;\n    add.w r4959 r4959 into r4963;\n    gte r4963 r1539 into r4964;\n    or r4962 r4964 into r4965;\n    sub.w r4963 r1539 into r4966;\n    ternary r4965 r4966 r4963 into r4967;\n    add r4961 2658455991569831745807614120560689152u128 into r4968;\n    ternary r4965 r4968 r4961 into r4969;\n    gte r4967 170141183460469231731687303715884105728u128 into r4970;\n    add.w r4967 r4967 into r4971;\n    gte r4971 r1539 into r4972;\n    or r4970 r4972 into r4973;\n    sub.w r4971 r1539 into r4974;\n    ternary r4973 r4974 r4971 into r4975;\n    add r4969 1329227995784915872903807060280344576u128 into r4976;\n    ternary r4973 r4976 r4969 into r4977;\n    gte r4975 170141183460469231731687303715884105728u128 into r4978;\n    add.w r4975 r4975 into r4979;\n    gte r4979 r1539 into r4980;\n    or r4978 r4980 into r4981;\n    sub.w r4979 r1539 into r4982;\n    ternary r4981 r4982 r4979 into r4983;\n    add r4977 664613997892457936451903530140172288u128 into r4984;\n    ternary r4981 r4984 r4977 into r4985;\n    gte r4983 170141183460469231731687303715884105728u128 into r4986;\n    add.w r4983 r4983 into r4987;\n    gte r4987 r1539 into r4988;\n    or r4986 r4988 into r4989;\n    sub.w r4987 r1539 into r4990;\n    ternary r4989 r4990 r4987 into r4991;\n    add r4985 332306998946228968225951765070086144u128 into r4992;\n    ternary r4989 r4992 r4985 into r4993;\n    gte r4991 170141183460469231731687303715884105728u128 into r4994;\n    add.w r4991 r4991 into r4995;\n    gte r4995 r1539 into r4996;\n    or r4994 r4996 into r4997;\n    sub.w r4995 r1539 into r4998;\n    ternary r4997 r4998 r4995 into r4999;\n    add r4993 166153499473114484112975882535043072u128 into r5000;\n    ternary r4997 r5000 r4993 into r5001;\n    gte r4999 170141183460469231731687303715884105728u128 into r5002;\n    add.w r4999 r4999 into r5003;\n    gte r5003 r1539 into r5004;\n    or r5002 r5004 into r5005;\n    sub.w r5003 r1539 into r5006;\n    ternary r5005 r5006 r5003 into r5007;\n    add r5001 83076749736557242056487941267521536u128 into r5008;\n    ternary r5005 r5008 r5001 into r5009;\n    gte r5007 170141183460469231731687303715884105728u128 into r5010;\n    add.w r5007 r5007 into r5011;\n    gte r5011 r1539 into r5012;\n    or r5010 r5012 into r5013;\n    sub.w r5011 r1539 into r5014;\n    ternary r5013 r5014 r5011 into r5015;\n    add r5009 41538374868278621028243970633760768u128 into r5016;\n    ternary r5013 r5016 r5009 into r5017;\n    gte r5015 170141183460469231731687303715884105728u128 into r5018;\n    add.w r5015 r5015 into r5019;\n    gte r5019 r1539 into r5020;\n    or r5018 r5020 into r5021;\n    sub.w r5019 r1539 into r5022;\n    ternary r5021 r5022 r5019 into r5023;\n    add r5017 20769187434139310514121985316880384u128 into r5024;\n    ternary r5021 r5024 r5017 into r5025;\n    gte r5023 170141183460469231731687303715884105728u128 into r5026;\n    add.w r5023 r5023 into r5027;\n    gte r5027 r1539 into r5028;\n    or r5026 r5028 into r5029;\n    sub.w r5027 r1539 into r5030;\n    ternary r5029 r5030 r5027 into r5031;\n    add r5025 10384593717069655257060992658440192u128 into r5032;\n    ternary r5029 r5032 r5025 into r5033;\n    gte r5031 170141183460469231731687303715884105728u128 into r5034;\n    add.w r5031 r5031 into r5035;\n    gte r5035 r1539 into r5036;\n    or r5034 r5036 into r5037;\n    sub.w r5035 r1539 into r5038;\n    ternary r5037 r5038 r5035 into r5039;\n    add r5033 5192296858534827628530496329220096u128 into r5040;\n    ternary r5037 r5040 r5033 into r5041;\n    gte r5039 170141183460469231731687303715884105728u128 into r5042;\n    add.w r5039 r5039 into r5043;\n    gte r5043 r1539 into r5044;\n    or r5042 r5044 into r5045;\n    sub.w r5043 r1539 into r5046;\n    ternary r5045 r5046 r5043 into r5047;\n    add r5041 2596148429267413814265248164610048u128 into r5048;\n    ternary r5045 r5048 r5041 into r5049;\n    gte r5047 170141183460469231731687303715884105728u128 into r5050;\n    add.w r5047 r5047 into r5051;\n    gte r5051 r1539 into r5052;\n    or r5050 r5052 into r5053;\n    sub.w r5051 r1539 into r5054;\n    ternary r5053 r5054 r5051 into r5055;\n    add r5049 1298074214633706907132624082305024u128 into r5056;\n    ternary r5053 r5056 r5049 into r5057;\n    gte r5055 170141183460469231731687303715884105728u128 into r5058;\n    add.w r5055 r5055 into r5059;\n    gte r5059 r1539 into r5060;\n    or r5058 r5060 into r5061;\n    sub.w r5059 r1539 into r5062;\n    ternary r5061 r5062 r5059 into r5063;\n    add r5057 649037107316853453566312041152512u128 into r5064;\n    ternary r5061 r5064 r5057 into r5065;\n    gte r5063 170141183460469231731687303715884105728u128 into r5066;\n    add.w r5063 r5063 into r5067;\n    gte r5067 r1539 into r5068;\n    or r5066 r5068 into r5069;\n    sub.w r5067 r1539 into r5070;\n    ternary r5069 r5070 r5067 into r5071;\n    add r5065 324518553658426726783156020576256u128 into r5072;\n    ternary r5069 r5072 r5065 into r5073;\n    gte r5071 170141183460469231731687303715884105728u128 into r5074;\n    add.w r5071 r5071 into r5075;\n    gte r5075 r1539 into r5076;\n    or r5074 r5076 into r5077;\n    sub.w r5075 r1539 into r5078;\n    ternary r5077 r5078 r5075 into r5079;\n    add r5073 162259276829213363391578010288128u128 into r5080;\n    ternary r5077 r5080 r5073 into r5081;\n    gte r5079 170141183460469231731687303715884105728u128 into r5082;\n    add.w r5079 r5079 into r5083;\n    gte r5083 r1539 into r5084;\n    or r5082 r5084 into r5085;\n    sub.w r5083 r1539 into r5086;\n    ternary r5085 r5086 r5083 into r5087;\n    add r5081 81129638414606681695789005144064u128 into r5088;\n    ternary r5085 r5088 r5081 into r5089;\n    gte r5087 170141183460469231731687303715884105728u128 into r5090;\n    add.w r5087 r5087 into r5091;\n    gte r5091 r1539 into r5092;\n    or r5090 r5092 into r5093;\n    sub.w r5091 r1539 into r5094;\n    ternary r5093 r5094 r5091 into r5095;\n    add r5089 40564819207303340847894502572032u128 into r5096;\n    ternary r5093 r5096 r5089 into r5097;\n    gte r5095 170141183460469231731687303715884105728u128 into r5098;\n    add.w r5095 r5095 into r5099;\n    gte r5099 r1539 into r5100;\n    or r5098 r5100 into r5101;\n    sub.w r5099 r1539 into r5102;\n    ternary r5101 r5102 r5099 into r5103;\n    add r5097 20282409603651670423947251286016u128 into r5104;\n    ternary r5101 r5104 r5097 into r5105;\n    gte r5103 170141183460469231731687303715884105728u128 into r5106;\n    add.w r5103 r5103 into r5107;\n    gte r5107 r1539 into r5108;\n    or r5106 r5108 into r5109;\n    sub.w r5107 r1539 into r5110;\n    ternary r5109 r5110 r5107 into r5111;\n    add r5105 10141204801825835211973625643008u128 into r5112;\n    ternary r5109 r5112 r5105 into r5113;\n    gte r5111 170141183460469231731687303715884105728u128 into r5114;\n    add.w r5111 r5111 into r5115;\n    gte r5115 r1539 into r5116;\n    or r5114 r5116 into r5117;\n    sub.w r5115 r1539 into r5118;\n    ternary r5117 r5118 r5115 into r5119;\n    add r5113 5070602400912917605986812821504u128 into r5120;\n    ternary r5117 r5120 r5113 into r5121;\n    gte r5119 170141183460469231731687303715884105728u128 into r5122;\n    add.w r5119 r5119 into r5123;\n    gte r5123 r1539 into r5124;\n    or r5122 r5124 into r5125;\n    sub.w r5123 r1539 into r5126;\n    ternary r5125 r5126 r5123 into r5127;\n    add r5121 2535301200456458802993406410752u128 into r5128;\n    ternary r5125 r5128 r5121 into r5129;\n    gte r5127 170141183460469231731687303715884105728u128 into r5130;\n    add.w r5127 r5127 into r5131;\n    gte r5131 r1539 into r5132;\n    or r5130 r5132 into r5133;\n    sub.w r5131 r1539 into r5134;\n    ternary r5133 r5134 r5131 into r5135;\n    add r5129 1267650600228229401496703205376u128 into r5136;\n    ternary r5133 r5136 r5129 into r5137;\n    gte r5135 170141183460469231731687303715884105728u128 into r5138;\n    add.w r5135 r5135 into r5139;\n    gte r5139 r1539 into r5140;\n    or r5138 r5140 into r5141;\n    sub.w r5139 r1539 into r5142;\n    ternary r5141 r5142 r5139 into r5143;\n    add r5137 633825300114114700748351602688u128 into r5144;\n    ternary r5141 r5144 r5137 into r5145;\n    gte r5143 170141183460469231731687303715884105728u128 into r5146;\n    add.w r5143 r5143 into r5147;\n    gte r5147 r1539 into r5148;\n    or r5146 r5148 into r5149;\n    sub.w r5147 r1539 into r5150;\n    ternary r5149 r5150 r5147 into r5151;\n    add r5145 316912650057057350374175801344u128 into r5152;\n    ternary r5149 r5152 r5145 into r5153;\n    gte r5151 170141183460469231731687303715884105728u128 into r5154;\n    add.w r5151 r5151 into r5155;\n    gte r5155 r1539 into r5156;\n    or r5154 r5156 into r5157;\n    sub.w r5155 r1539 into r5158;\n    ternary r5157 r5158 r5155 into r5159;\n    add r5153 158456325028528675187087900672u128 into r5160;\n    ternary r5157 r5160 r5153 into r5161;\n    gte r5159 170141183460469231731687303715884105728u128 into r5162;\n    add.w r5159 r5159 into r5163;\n    gte r5163 r1539 into r5164;\n    or r5162 r5164 into r5165;\n    sub.w r5163 r1539 into r5166;\n    ternary r5165 r5166 r5163 into r5167;\n    add r5161 79228162514264337593543950336u128 into r5168;\n    ternary r5165 r5168 r5161 into r5169;\n    gte r5167 170141183460469231731687303715884105728u128 into r5170;\n    add.w r5167 r5167 into r5171;\n    gte r5171 r1539 into r5172;\n    or r5170 r5172 into r5173;\n    sub.w r5171 r1539 into r5174;\n    ternary r5173 r5174 r5171 into r5175;\n    add r5169 39614081257132168796771975168u128 into r5176;\n    ternary r5173 r5176 r5169 into r5177;\n    gte r5175 170141183460469231731687303715884105728u128 into r5178;\n    add.w r5175 r5175 into r5179;\n    gte r5179 r1539 into r5180;\n    or r5178 r5180 into r5181;\n    sub.w r5179 r1539 into r5182;\n    ternary r5181 r5182 r5179 into r5183;\n    add r5177 19807040628566084398385987584u128 into r5184;\n    ternary r5181 r5184 r5177 into r5185;\n    gte r5183 170141183460469231731687303715884105728u128 into r5186;\n    add.w r5183 r5183 into r5187;\n    gte r5187 r1539 into r5188;\n    or r5186 r5188 into r5189;\n    sub.w r5187 r1539 into r5190;\n    ternary r5189 r5190 r5187 into r5191;\n    add r5185 9903520314283042199192993792u128 into r5192;\n    ternary r5189 r5192 r5185 into r5193;\n    gte r5191 170141183460469231731687303715884105728u128 into r5194;\n    add.w r5191 r5191 into r5195;\n    gte r5195 r1539 into r5196;\n    or r5194 r5196 into r5197;\n    sub.w r5195 r1539 into r5198;\n    ternary r5197 r5198 r5195 into r5199;\n    add r5193 4951760157141521099596496896u128 into r5200;\n    ternary r5197 r5200 r5193 into r5201;\n    gte r5199 170141183460469231731687303715884105728u128 into r5202;\n    add.w r5199 r5199 into r5203;\n    gte r5203 r1539 into r5204;\n    or r5202 r5204 into r5205;\n    sub.w r5203 r1539 into r5206;\n    ternary r5205 r5206 r5203 into r5207;\n    add r5201 2475880078570760549798248448u128 into r5208;\n    ternary r5205 r5208 r5201 into r5209;\n    gte r5207 170141183460469231731687303715884105728u128 into r5210;\n    add.w r5207 r5207 into r5211;\n    gte r5211 r1539 into r5212;\n    or r5210 r5212 into r5213;\n    sub.w r5211 r1539 into r5214;\n    ternary r5213 r5214 r5211 into r5215;\n    add r5209 1237940039285380274899124224u128 into r5216;\n    ternary r5213 r5216 r5209 into r5217;\n    gte r5215 170141183460469231731687303715884105728u128 into r5218;\n    add.w r5215 r5215 into r5219;\n    gte r5219 r1539 into r5220;\n    or r5218 r5220 into r5221;\n    sub.w r5219 r1539 into r5222;\n    ternary r5221 r5222 r5219 into r5223;\n    add r5217 618970019642690137449562112u128 into r5224;\n    ternary r5221 r5224 r5217 into r5225;\n    gte r5223 170141183460469231731687303715884105728u128 into r5226;\n    add.w r5223 r5223 into r5227;\n    gte r5227 r1539 into r5228;\n    or r5226 r5228 into r5229;\n    sub.w r5227 r1539 into r5230;\n    ternary r5229 r5230 r5227 into r5231;\n    add r5225 309485009821345068724781056u128 into r5232;\n    ternary r5229 r5232 r5225 into r5233;\n    gte r5231 170141183460469231731687303715884105728u128 into r5234;\n    add.w r5231 r5231 into r5235;\n    gte r5235 r1539 into r5236;\n    or r5234 r5236 into r5237;\n    sub.w r5235 r1539 into r5238;\n    ternary r5237 r5238 r5235 into r5239;\n    add r5233 154742504910672534362390528u128 into r5240;\n    ternary r5237 r5240 r5233 into r5241;\n    gte r5239 170141183460469231731687303715884105728u128 into r5242;\n    add.w r5239 r5239 into r5243;\n    gte r5243 r1539 into r5244;\n    or r5242 r5244 into r5245;\n    sub.w r5243 r1539 into r5246;\n    ternary r5245 r5246 r5243 into r5247;\n    add r5241 77371252455336267181195264u128 into r5248;\n    ternary r5245 r5248 r5241 into r5249;\n    gte r5247 170141183460469231731687303715884105728u128 into r5250;\n    add.w r5247 r5247 into r5251;\n    gte r5251 r1539 into r5252;\n    or r5250 r5252 into r5253;\n    sub.w r5251 r1539 into r5254;\n    ternary r5253 r5254 r5251 into r5255;\n    add r5249 38685626227668133590597632u128 into r5256;\n    ternary r5253 r5256 r5249 into r5257;\n    gte r5255 170141183460469231731687303715884105728u128 into r5258;\n    add.w r5255 r5255 into r5259;\n    gte r5259 r1539 into r5260;\n    or r5258 r5260 into r5261;\n    sub.w r5259 r1539 into r5262;\n    ternary r5261 r5262 r5259 into r5263;\n    add r5257 19342813113834066795298816u128 into r5264;\n    ternary r5261 r5264 r5257 into r5265;\n    gte r5263 170141183460469231731687303715884105728u128 into r5266;\n    add.w r5263 r5263 into r5267;\n    gte r5267 r1539 into r5268;\n    or r5266 r5268 into r5269;\n    sub.w r5267 r1539 into r5270;\n    ternary r5269 r5270 r5267 into r5271;\n    add r5265 9671406556917033397649408u128 into r5272;\n    ternary r5269 r5272 r5265 into r5273;\n    gte r5271 170141183460469231731687303715884105728u128 into r5274;\n    add.w r5271 r5271 into r5275;\n    gte r5275 r1539 into r5276;\n    or r5274 r5276 into r5277;\n    sub.w r5275 r1539 into r5278;\n    ternary r5277 r5278 r5275 into r5279;\n    add r5273 4835703278458516698824704u128 into r5280;\n    ternary r5277 r5280 r5273 into r5281;\n    gte r5279 170141183460469231731687303715884105728u128 into r5282;\n    add.w r5279 r5279 into r5283;\n    gte r5283 r1539 into r5284;\n    or r5282 r5284 into r5285;\n    sub.w r5283 r1539 into r5286;\n    ternary r5285 r5286 r5283 into r5287;\n    add r5281 2417851639229258349412352u128 into r5288;\n    ternary r5285 r5288 r5281 into r5289;\n    gte r5287 170141183460469231731687303715884105728u128 into r5290;\n    add.w r5287 r5287 into r5291;\n    gte r5291 r1539 into r5292;\n    or r5290 r5292 into r5293;\n    sub.w r5291 r1539 into r5294;\n    ternary r5293 r5294 r5291 into r5295;\n    add r5289 1208925819614629174706176u128 into r5296;\n    ternary r5293 r5296 r5289 into r5297;\n    gte r5295 170141183460469231731687303715884105728u128 into r5298;\n    add.w r5295 r5295 into r5299;\n    gte r5299 r1539 into r5300;\n    or r5298 r5300 into r5301;\n    sub.w r5299 r1539 into r5302;\n    ternary r5301 r5302 r5299 into r5303;\n    add r5297 604462909807314587353088u128 into r5304;\n    ternary r5301 r5304 r5297 into r5305;\n    gte r5303 170141183460469231731687303715884105728u128 into r5306;\n    add.w r5303 r5303 into r5307;\n    gte r5307 r1539 into r5308;\n    or r5306 r5308 into r5309;\n    sub.w r5307 r1539 into r5310;\n    ternary r5309 r5310 r5307 into r5311;\n    add r5305 302231454903657293676544u128 into r5312;\n    ternary r5309 r5312 r5305 into r5313;\n    gte r5311 170141183460469231731687303715884105728u128 into r5314;\n    add.w r5311 r5311 into r5315;\n    gte r5315 r1539 into r5316;\n    or r5314 r5316 into r5317;\n    sub.w r5315 r1539 into r5318;\n    ternary r5317 r5318 r5315 into r5319;\n    add r5313 151115727451828646838272u128 into r5320;\n    ternary r5317 r5320 r5313 into r5321;\n    gte r5319 170141183460469231731687303715884105728u128 into r5322;\n    add.w r5319 r5319 into r5323;\n    gte r5323 r1539 into r5324;\n    or r5322 r5324 into r5325;\n    sub.w r5323 r1539 into r5326;\n    ternary r5325 r5326 r5323 into r5327;\n    add r5321 75557863725914323419136u128 into r5328;\n    ternary r5325 r5328 r5321 into r5329;\n    gte r5327 170141183460469231731687303715884105728u128 into r5330;\n    add.w r5327 r5327 into r5331;\n    gte r5331 r1539 into r5332;\n    or r5330 r5332 into r5333;\n    sub.w r5331 r1539 into r5334;\n    ternary r5333 r5334 r5331 into r5335;\n    add r5329 37778931862957161709568u128 into r5336;\n    ternary r5333 r5336 r5329 into r5337;\n    gte r5335 170141183460469231731687303715884105728u128 into r5338;\n    add.w r5335 r5335 into r5339;\n    gte r5339 r1539 into r5340;\n    or r5338 r5340 into r5341;\n    sub.w r5339 r1539 into r5342;\n    ternary r5341 r5342 r5339 into r5343;\n    add r5337 18889465931478580854784u128 into r5344;\n    ternary r5341 r5344 r5337 into r5345;\n    gte r5343 170141183460469231731687303715884105728u128 into r5346;\n    add.w r5343 r5343 into r5347;\n    gte r5347 r1539 into r5348;\n    or r5346 r5348 into r5349;\n    sub.w r5347 r1539 into r5350;\n    ternary r5349 r5350 r5347 into r5351;\n    add r5345 9444732965739290427392u128 into r5352;\n    ternary r5349 r5352 r5345 into r5353;\n    gte r5351 170141183460469231731687303715884105728u128 into r5354;\n    add.w r5351 r5351 into r5355;\n    gte r5355 r1539 into r5356;\n    or r5354 r5356 into r5357;\n    sub.w r5355 r1539 into r5358;\n    ternary r5357 r5358 r5355 into r5359;\n    add r5353 4722366482869645213696u128 into r5360;\n    ternary r5357 r5360 r5353 into r5361;\n    gte r5359 170141183460469231731687303715884105728u128 into r5362;\n    add.w r5359 r5359 into r5363;\n    gte r5363 r1539 into r5364;\n    or r5362 r5364 into r5365;\n    sub.w r5363 r1539 into r5366;\n    ternary r5365 r5366 r5363 into r5367;\n    add r5361 2361183241434822606848u128 into r5368;\n    ternary r5365 r5368 r5361 into r5369;\n    gte r5367 170141183460469231731687303715884105728u128 into r5370;\n    add.w r5367 r5367 into r5371;\n    gte r5371 r1539 into r5372;\n    or r5370 r5372 into r5373;\n    sub.w r5371 r1539 into r5374;\n    ternary r5373 r5374 r5371 into r5375;\n    add r5369 1180591620717411303424u128 into r5376;\n    ternary r5373 r5376 r5369 into r5377;\n    gte r5375 170141183460469231731687303715884105728u128 into r5378;\n    add.w r5375 r5375 into r5379;\n    gte r5379 r1539 into r5380;\n    or r5378 r5380 into r5381;\n    sub.w r5379 r1539 into r5382;\n    ternary r5381 r5382 r5379 into r5383;\n    add r5377 590295810358705651712u128 into r5384;\n    ternary r5381 r5384 r5377 into r5385;\n    gte r5383 170141183460469231731687303715884105728u128 into r5386;\n    add.w r5383 r5383 into r5387;\n    gte r5387 r1539 into r5388;\n    or r5386 r5388 into r5389;\n    sub.w r5387 r1539 into r5390;\n    ternary r5389 r5390 r5387 into r5391;\n    add r5385 295147905179352825856u128 into r5392;\n    ternary r5389 r5392 r5385 into r5393;\n    gte r5391 170141183460469231731687303715884105728u128 into r5394;\n    add.w r5391 r5391 into r5395;\n    gte r5395 r1539 into r5396;\n    or r5394 r5396 into r5397;\n    sub.w r5395 r1539 into r5398;\n    ternary r5397 r5398 r5395 into r5399;\n    add r5393 147573952589676412928u128 into r5400;\n    ternary r5397 r5400 r5393 into r5401;\n    gte r5399 170141183460469231731687303715884105728u128 into r5402;\n    add.w r5399 r5399 into r5403;\n    gte r5403 r1539 into r5404;\n    or r5402 r5404 into r5405;\n    sub.w r5403 r1539 into r5406;\n    ternary r5405 r5406 r5403 into r5407;\n    add r5401 73786976294838206464u128 into r5408;\n    ternary r5405 r5408 r5401 into r5409;\n    gte r5407 170141183460469231731687303715884105728u128 into r5410;\n    add.w r5407 r5407 into r5411;\n    gte r5411 r1539 into r5412;\n    or r5410 r5412 into r5413;\n    sub.w r5411 r1539 into r5414;\n    ternary r5413 r5414 r5411 into r5415;\n    add r5409 36893488147419103232u128 into r5416;\n    ternary r5413 r5416 r5409 into r5417;\n    gte r5415 170141183460469231731687303715884105728u128 into r5418;\n    add.w r5415 r5415 into r5419;\n    gte r5419 r1539 into r5420;\n    or r5418 r5420 into r5421;\n    sub.w r5419 r1539 into r5422;\n    ternary r5421 r5422 r5419 into r5423;\n    add r5417 18446744073709551616u128 into r5424;\n    ternary r5421 r5424 r5417 into r5425;\n    gte r5423 170141183460469231731687303715884105728u128 into r5426;\n    add.w r5423 r5423 into r5427;\n    gte r5427 r1539 into r5428;\n    or r5426 r5428 into r5429;\n    sub.w r5427 r1539 into r5430;\n    ternary r5429 r5430 r5427 into r5431;\n    add r5425 9223372036854775808u128 into r5432;\n    ternary r5429 r5432 r5425 into r5433;\n    gte r5431 170141183460469231731687303715884105728u128 into r5434;\n    add.w r5431 r5431 into r5435;\n    gte r5435 r1539 into r5436;\n    or r5434 r5436 into r5437;\n    sub.w r5435 r1539 into r5438;\n    ternary r5437 r5438 r5435 into r5439;\n    add r5433 4611686018427387904u128 into r5440;\n    ternary r5437 r5440 r5433 into r5441;\n    gte r5439 170141183460469231731687303715884105728u128 into r5442;\n    add.w r5439 r5439 into r5443;\n    gte r5443 r1539 into r5444;\n    or r5442 r5444 into r5445;\n    sub.w r5443 r1539 into r5446;\n    ternary r5445 r5446 r5443 into r5447;\n    add r5441 2305843009213693952u128 into r5448;\n    ternary r5445 r5448 r5441 into r5449;\n    gte r5447 170141183460469231731687303715884105728u128 into r5450;\n    add.w r5447 r5447 into r5451;\n    gte r5451 r1539 into r5452;\n    or r5450 r5452 into r5453;\n    sub.w r5451 r1539 into r5454;\n    ternary r5453 r5454 r5451 into r5455;\n    add r5449 1152921504606846976u128 into r5456;\n    ternary r5453 r5456 r5449 into r5457;\n    gte r5455 170141183460469231731687303715884105728u128 into r5458;\n    add.w r5455 r5455 into r5459;\n    gte r5459 r1539 into r5460;\n    or r5458 r5460 into r5461;\n    sub.w r5459 r1539 into r5462;\n    ternary r5461 r5462 r5459 into r5463;\n    add r5457 576460752303423488u128 into r5464;\n    ternary r5461 r5464 r5457 into r5465;\n    gte r5463 170141183460469231731687303715884105728u128 into r5466;\n    add.w r5463 r5463 into r5467;\n    gte r5467 r1539 into r5468;\n    or r5466 r5468 into r5469;\n    sub.w r5467 r1539 into r5470;\n    ternary r5469 r5470 r5467 into r5471;\n    add r5465 288230376151711744u128 into r5472;\n    ternary r5469 r5472 r5465 into r5473;\n    gte r5471 170141183460469231731687303715884105728u128 into r5474;\n    add.w r5471 r5471 into r5475;\n    gte r5475 r1539 into r5476;\n    or r5474 r5476 into r5477;\n    sub.w r5475 r1539 into r5478;\n    ternary r5477 r5478 r5475 into r5479;\n    add r5473 144115188075855872u128 into r5480;\n    ternary r5477 r5480 r5473 into r5481;\n    gte r5479 170141183460469231731687303715884105728u128 into r5482;\n    add.w r5479 r5479 into r5483;\n    gte r5483 r1539 into r5484;\n    or r5482 r5484 into r5485;\n    sub.w r5483 r1539 into r5486;\n    ternary r5485 r5486 r5483 into r5487;\n    add r5481 72057594037927936u128 into r5488;\n    ternary r5485 r5488 r5481 into r5489;\n    gte r5487 170141183460469231731687303715884105728u128 into r5490;\n    add.w r5487 r5487 into r5491;\n    gte r5491 r1539 into r5492;\n    or r5490 r5492 into r5493;\n    sub.w r5491 r1539 into r5494;\n    ternary r5493 r5494 r5491 into r5495;\n    add r5489 36028797018963968u128 into r5496;\n    ternary r5493 r5496 r5489 into r5497;\n    gte r5495 170141183460469231731687303715884105728u128 into r5498;\n    add.w r5495 r5495 into r5499;\n    gte r5499 r1539 into r5500;\n    or r5498 r5500 into r5501;\n    sub.w r5499 r1539 into r5502;\n    ternary r5501 r5502 r5499 into r5503;\n    add r5497 18014398509481984u128 into r5504;\n    ternary r5501 r5504 r5497 into r5505;\n    gte r5503 170141183460469231731687303715884105728u128 into r5506;\n    add.w r5503 r5503 into r5507;\n    gte r5507 r1539 into r5508;\n    or r5506 r5508 into r5509;\n    sub.w r5507 r1539 into r5510;\n    ternary r5509 r5510 r5507 into r5511;\n    add r5505 9007199254740992u128 into r5512;\n    ternary r5509 r5512 r5505 into r5513;\n    gte r5511 170141183460469231731687303715884105728u128 into r5514;\n    add.w r5511 r5511 into r5515;\n    gte r5515 r1539 into r5516;\n    or r5514 r5516 into r5517;\n    sub.w r5515 r1539 into r5518;\n    ternary r5517 r5518 r5515 into r5519;\n    add r5513 4503599627370496u128 into r5520;\n    ternary r5517 r5520 r5513 into r5521;\n    gte r5519 170141183460469231731687303715884105728u128 into r5522;\n    add.w r5519 r5519 into r5523;\n    gte r5523 r1539 into r5524;\n    or r5522 r5524 into r5525;\n    sub.w r5523 r1539 into r5526;\n    ternary r5525 r5526 r5523 into r5527;\n    add r5521 2251799813685248u128 into r5528;\n    ternary r5525 r5528 r5521 into r5529;\n    gte r5527 170141183460469231731687303715884105728u128 into r5530;\n    add.w r5527 r5527 into r5531;\n    gte r5531 r1539 into r5532;\n    or r5530 r5532 into r5533;\n    sub.w r5531 r1539 into r5534;\n    ternary r5533 r5534 r5531 into r5535;\n    add r5529 1125899906842624u128 into r5536;\n    ternary r5533 r5536 r5529 into r5537;\n    gte r5535 170141183460469231731687303715884105728u128 into r5538;\n    add.w r5535 r5535 into r5539;\n    gte r5539 r1539 into r5540;\n    or r5538 r5540 into r5541;\n    sub.w r5539 r1539 into r5542;\n    ternary r5541 r5542 r5539 into r5543;\n    add r5537 562949953421312u128 into r5544;\n    ternary r5541 r5544 r5537 into r5545;\n    gte r5543 170141183460469231731687303715884105728u128 into r5546;\n    add.w r5543 r5543 into r5547;\n    gte r5547 r1539 into r5548;\n    or r5546 r5548 into r5549;\n    sub.w r5547 r1539 into r5550;\n    ternary r5549 r5550 r5547 into r5551;\n    add r5545 281474976710656u128 into r5552;\n    ternary r5549 r5552 r5545 into r5553;\n    gte r5551 170141183460469231731687303715884105728u128 into r5554;\n    add.w r5551 r5551 into r5555;\n    gte r5555 r1539 into r5556;\n    or r5554 r5556 into r5557;\n    sub.w r5555 r1539 into r5558;\n    ternary r5557 r5558 r5555 into r5559;\n    add r5553 140737488355328u128 into r5560;\n    ternary r5557 r5560 r5553 into r5561;\n    gte r5559 170141183460469231731687303715884105728u128 into r5562;\n    add.w r5559 r5559 into r5563;\n    gte r5563 r1539 into r5564;\n    or r5562 r5564 into r5565;\n    sub.w r5563 r1539 into r5566;\n    ternary r5565 r5566 r5563 into r5567;\n    add r5561 70368744177664u128 into r5568;\n    ternary r5565 r5568 r5561 into r5569;\n    gte r5567 170141183460469231731687303715884105728u128 into r5570;\n    add.w r5567 r5567 into r5571;\n    gte r5571 r1539 into r5572;\n    or r5570 r5572 into r5573;\n    sub.w r5571 r1539 into r5574;\n    ternary r5573 r5574 r5571 into r5575;\n    add r5569 35184372088832u128 into r5576;\n    ternary r5573 r5576 r5569 into r5577;\n    gte r5575 170141183460469231731687303715884105728u128 into r5578;\n    add.w r5575 r5575 into r5579;\n    gte r5579 r1539 into r5580;\n    or r5578 r5580 into r5581;\n    sub.w r5579 r1539 into r5582;\n    ternary r5581 r5582 r5579 into r5583;\n    add r5577 17592186044416u128 into r5584;\n    ternary r5581 r5584 r5577 into r5585;\n    gte r5583 170141183460469231731687303715884105728u128 into r5586;\n    add.w r5583 r5583 into r5587;\n    gte r5587 r1539 into r5588;\n    or r5586 r5588 into r5589;\n    sub.w r5587 r1539 into r5590;\n    ternary r5589 r5590 r5587 into r5591;\n    add r5585 8796093022208u128 into r5592;\n    ternary r5589 r5592 r5585 into r5593;\n    gte r5591 170141183460469231731687303715884105728u128 into r5594;\n    add.w r5591 r5591 into r5595;\n    gte r5595 r1539 into r5596;\n    or r5594 r5596 into r5597;\n    sub.w r5595 r1539 into r5598;\n    ternary r5597 r5598 r5595 into r5599;\n    add r5593 4398046511104u128 into r5600;\n    ternary r5597 r5600 r5593 into r5601;\n    gte r5599 170141183460469231731687303715884105728u128 into r5602;\n    add.w r5599 r5599 into r5603;\n    gte r5603 r1539 into r5604;\n    or r5602 r5604 into r5605;\n    sub.w r5603 r1539 into r5606;\n    ternary r5605 r5606 r5603 into r5607;\n    add r5601 2199023255552u128 into r5608;\n    ternary r5605 r5608 r5601 into r5609;\n    gte r5607 170141183460469231731687303715884105728u128 into r5610;\n    add.w r5607 r5607 into r5611;\n    gte r5611 r1539 into r5612;\n    or r5610 r5612 into r5613;\n    sub.w r5611 r1539 into r5614;\n    ternary r5613 r5614 r5611 into r5615;\n    add r5609 1099511627776u128 into r5616;\n    ternary r5613 r5616 r5609 into r5617;\n    gte r5615 170141183460469231731687303715884105728u128 into r5618;\n    add.w r5615 r5615 into r5619;\n    gte r5619 r1539 into r5620;\n    or r5618 r5620 into r5621;\n    sub.w r5619 r1539 into r5622;\n    ternary r5621 r5622 r5619 into r5623;\n    add r5617 549755813888u128 into r5624;\n    ternary r5621 r5624 r5617 into r5625;\n    gte r5623 170141183460469231731687303715884105728u128 into r5626;\n    add.w r5623 r5623 into r5627;\n    gte r5627 r1539 into r5628;\n    or r5626 r5628 into r5629;\n    sub.w r5627 r1539 into r5630;\n    ternary r5629 r5630 r5627 into r5631;\n    add r5625 274877906944u128 into r5632;\n    ternary r5629 r5632 r5625 into r5633;\n    gte r5631 170141183460469231731687303715884105728u128 into r5634;\n    add.w r5631 r5631 into r5635;\n    gte r5635 r1539 into r5636;\n    or r5634 r5636 into r5637;\n    sub.w r5635 r1539 into r5638;\n    ternary r5637 r5638 r5635 into r5639;\n    add r5633 137438953472u128 into r5640;\n    ternary r5637 r5640 r5633 into r5641;\n    gte r5639 170141183460469231731687303715884105728u128 into r5642;\n    add.w r5639 r5639 into r5643;\n    gte r5643 r1539 into r5644;\n    or r5642 r5644 into r5645;\n    sub.w r5643 r1539 into r5646;\n    ternary r5645 r5646 r5643 into r5647;\n    add r5641 68719476736u128 into r5648;\n    ternary r5645 r5648 r5641 into r5649;\n    gte r5647 170141183460469231731687303715884105728u128 into r5650;\n    add.w r5647 r5647 into r5651;\n    gte r5651 r1539 into r5652;\n    or r5650 r5652 into r5653;\n    sub.w r5651 r1539 into r5654;\n    ternary r5653 r5654 r5651 into r5655;\n    add r5649 34359738368u128 into r5656;\n    ternary r5653 r5656 r5649 into r5657;\n    gte r5655 170141183460469231731687303715884105728u128 into r5658;\n    add.w r5655 r5655 into r5659;\n    gte r5659 r1539 into r5660;\n    or r5658 r5660 into r5661;\n    sub.w r5659 r1539 into r5662;\n    ternary r5661 r5662 r5659 into r5663;\n    add r5657 17179869184u128 into r5664;\n    ternary r5661 r5664 r5657 into r5665;\n    gte r5663 170141183460469231731687303715884105728u128 into r5666;\n    add.w r5663 r5663 into r5667;\n    gte r5667 r1539 into r5668;\n    or r5666 r5668 into r5669;\n    sub.w r5667 r1539 into r5670;\n    ternary r5669 r5670 r5667 into r5671;\n    add r5665 8589934592u128 into r5672;\n    ternary r5669 r5672 r5665 into r5673;\n    gte r5671 170141183460469231731687303715884105728u128 into r5674;\n    add.w r5671 r5671 into r5675;\n    gte r5675 r1539 into r5676;\n    or r5674 r5676 into r5677;\n    sub.w r5675 r1539 into r5678;\n    ternary r5677 r5678 r5675 into r5679;\n    add r5673 4294967296u128 into r5680;\n    ternary r5677 r5680 r5673 into r5681;\n    gte r5679 170141183460469231731687303715884105728u128 into r5682;\n    add.w r5679 r5679 into r5683;\n    gte r5683 r1539 into r5684;\n    or r5682 r5684 into r5685;\n    sub.w r5683 r1539 into r5686;\n    ternary r5685 r5686 r5683 into r5687;\n    add r5681 2147483648u128 into r5688;\n    ternary r5685 r5688 r5681 into r5689;\n    gte r5687 170141183460469231731687303715884105728u128 into r5690;\n    add.w r5687 r5687 into r5691;\n    gte r5691 r1539 into r5692;\n    or r5690 r5692 into r5693;\n    sub.w r5691 r1539 into r5694;\n    ternary r5693 r5694 r5691 into r5695;\n    add r5689 1073741824u128 into r5696;\n    ternary r5693 r5696 r5689 into r5697;\n    gte r5695 170141183460469231731687303715884105728u128 into r5698;\n    add.w r5695 r5695 into r5699;\n    gte r5699 r1539 into r5700;\n    or r5698 r5700 into r5701;\n    sub.w r5699 r1539 into r5702;\n    ternary r5701 r5702 r5699 into r5703;\n    add r5697 536870912u128 into r5704;\n    ternary r5701 r5704 r5697 into r5705;\n    gte r5703 170141183460469231731687303715884105728u128 into r5706;\n    add.w r5703 r5703 into r5707;\n    gte r5707 r1539 into r5708;\n    or r5706 r5708 into r5709;\n    sub.w r5707 r1539 into r5710;\n    ternary r5709 r5710 r5707 into r5711;\n    add r5705 268435456u128 into r5712;\n    ternary r5709 r5712 r5705 into r5713;\n    gte r5711 170141183460469231731687303715884105728u128 into r5714;\n    add.w r5711 r5711 into r5715;\n    gte r5715 r1539 into r5716;\n    or r5714 r5716 into r5717;\n    sub.w r5715 r1539 into r5718;\n    ternary r5717 r5718 r5715 into r5719;\n    add r5713 134217728u128 into r5720;\n    ternary r5717 r5720 r5713 into r5721;\n    gte r5719 170141183460469231731687303715884105728u128 into r5722;\n    add.w r5719 r5719 into r5723;\n    gte r5723 r1539 into r5724;\n    or r5722 r5724 into r5725;\n    sub.w r5723 r1539 into r5726;\n    ternary r5725 r5726 r5723 into r5727;\n    add r5721 67108864u128 into r5728;\n    ternary r5725 r5728 r5721 into r5729;\n    gte r5727 170141183460469231731687303715884105728u128 into r5730;\n    add.w r5727 r5727 into r5731;\n    gte r5731 r1539 into r5732;\n    or r5730 r5732 into r5733;\n    sub.w r5731 r1539 into r5734;\n    ternary r5733 r5734 r5731 into r5735;\n    add r5729 33554432u128 into r5736;\n    ternary r5733 r5736 r5729 into r5737;\n    gte r5735 170141183460469231731687303715884105728u128 into r5738;\n    add.w r5735 r5735 into r5739;\n    gte r5739 r1539 into r5740;\n    or r5738 r5740 into r5741;\n    sub.w r5739 r1539 into r5742;\n    ternary r5741 r5742 r5739 into r5743;\n    add r5737 16777216u128 into r5744;\n    ternary r5741 r5744 r5737 into r5745;\n    gte r5743 170141183460469231731687303715884105728u128 into r5746;\n    add.w r5743 r5743 into r5747;\n    gte r5747 r1539 into r5748;\n    or r5746 r5748 into r5749;\n    sub.w r5747 r1539 into r5750;\n    ternary r5749 r5750 r5747 into r5751;\n    add r5745 8388608u128 into r5752;\n    ternary r5749 r5752 r5745 into r5753;\n    gte r5751 170141183460469231731687303715884105728u128 into r5754;\n    add.w r5751 r5751 into r5755;\n    gte r5755 r1539 into r5756;\n    or r5754 r5756 into r5757;\n    sub.w r5755 r1539 into r5758;\n    ternary r5757 r5758 r5755 into r5759;\n    add r5753 4194304u128 into r5760;\n    ternary r5757 r5760 r5753 into r5761;\n    gte r5759 170141183460469231731687303715884105728u128 into r5762;\n    add.w r5759 r5759 into r5763;\n    gte r5763 r1539 into r5764;\n    or r5762 r5764 into r5765;\n    sub.w r5763 r1539 into r5766;\n    ternary r5765 r5766 r5763 into r5767;\n    add r5761 2097152u128 into r5768;\n    ternary r5765 r5768 r5761 into r5769;\n    gte r5767 170141183460469231731687303715884105728u128 into r5770;\n    add.w r5767 r5767 into r5771;\n    gte r5771 r1539 into r5772;\n    or r5770 r5772 into r5773;\n    sub.w r5771 r1539 into r5774;\n    ternary r5773 r5774 r5771 into r5775;\n    add r5769 1048576u128 into r5776;\n    ternary r5773 r5776 r5769 into r5777;\n    gte r5775 170141183460469231731687303715884105728u128 into r5778;\n    add.w r5775 r5775 into r5779;\n    gte r5779 r1539 into r5780;\n    or r5778 r5780 into r5781;\n    sub.w r5779 r1539 into r5782;\n    ternary r5781 r5782 r5779 into r5783;\n    add r5777 524288u128 into r5784;\n    ternary r5781 r5784 r5777 into r5785;\n    gte r5783 170141183460469231731687303715884105728u128 into r5786;\n    add.w r5783 r5783 into r5787;\n    gte r5787 r1539 into r5788;\n    or r5786 r5788 into r5789;\n    sub.w r5787 r1539 into r5790;\n    ternary r5789 r5790 r5787 into r5791;\n    add r5785 262144u128 into r5792;\n    ternary r5789 r5792 r5785 into r5793;\n    gte r5791 170141183460469231731687303715884105728u128 into r5794;\n    add.w r5791 r5791 into r5795;\n    gte r5795 r1539 into r5796;\n    or r5794 r5796 into r5797;\n    sub.w r5795 r1539 into r5798;\n    ternary r5797 r5798 r5795 into r5799;\n    add r5793 131072u128 into r5800;\n    ternary r5797 r5800 r5793 into r5801;\n    gte r5799 170141183460469231731687303715884105728u128 into r5802;\n    add.w r5799 r5799 into r5803;\n    gte r5803 r1539 into r5804;\n    or r5802 r5804 into r5805;\n    sub.w r5803 r1539 into r5806;\n    ternary r5805 r5806 r5803 into r5807;\n    add r5801 65536u128 into r5808;\n    ternary r5805 r5808 r5801 into r5809;\n    gte r5807 170141183460469231731687303715884105728u128 into r5810;\n    add.w r5807 r5807 into r5811;\n    gte r5811 r1539 into r5812;\n    or r5810 r5812 into r5813;\n    sub.w r5811 r1539 into r5814;\n    ternary r5813 r5814 r5811 into r5815;\n    add r5809 32768u128 into r5816;\n    ternary r5813 r5816 r5809 into r5817;\n    gte r5815 170141183460469231731687303715884105728u128 into r5818;\n    add.w r5815 r5815 into r5819;\n    gte r5819 r1539 into r5820;\n    or r5818 r5820 into r5821;\n    sub.w r5819 r1539 into r5822;\n    ternary r5821 r5822 r5819 into r5823;\n    add r5817 16384u128 into r5824;\n    ternary r5821 r5824 r5817 into r5825;\n    gte r5823 170141183460469231731687303715884105728u128 into r5826;\n    add.w r5823 r5823 into r5827;\n    gte r5827 r1539 into r5828;\n    or r5826 r5828 into r5829;\n    sub.w r5827 r1539 into r5830;\n    ternary r5829 r5830 r5827 into r5831;\n    add r5825 8192u128 into r5832;\n    ternary r5829 r5832 r5825 into r5833;\n    gte r5831 170141183460469231731687303715884105728u128 into r5834;\n    add.w r5831 r5831 into r5835;\n    gte r5835 r1539 into r5836;\n    or r5834 r5836 into r5837;\n    sub.w r5835 r1539 into r5838;\n    ternary r5837 r5838 r5835 into r5839;\n    add r5833 4096u128 into r5840;\n    ternary r5837 r5840 r5833 into r5841;\n    gte r5839 170141183460469231731687303715884105728u128 into r5842;\n    add.w r5839 r5839 into r5843;\n    gte r5843 r1539 into r5844;\n    or r5842 r5844 into r5845;\n    sub.w r5843 r1539 into r5846;\n    ternary r5845 r5846 r5843 into r5847;\n    add r5841 2048u128 into r5848;\n    ternary r5845 r5848 r5841 into r5849;\n    gte r5847 170141183460469231731687303715884105728u128 into r5850;\n    add.w r5847 r5847 into r5851;\n    gte r5851 r1539 into r5852;\n    or r5850 r5852 into r5853;\n    sub.w r5851 r1539 into r5854;\n    ternary r5853 r5854 r5851 into r5855;\n    add r5849 1024u128 into r5856;\n    ternary r5853 r5856 r5849 into r5857;\n    gte r5855 170141183460469231731687303715884105728u128 into r5858;\n    add.w r5855 r5855 into r5859;\n    gte r5859 r1539 into r5860;\n    or r5858 r5860 into r5861;\n    sub.w r5859 r1539 into r5862;\n    ternary r5861 r5862 r5859 into r5863;\n    add r5857 512u128 into r5864;\n    ternary r5861 r5864 r5857 into r5865;\n    gte r5863 170141183460469231731687303715884105728u128 into r5866;\n    add.w r5863 r5863 into r5867;\n    gte r5867 r1539 into r5868;\n    or r5866 r5868 into r5869;\n    sub.w r5867 r1539 into r5870;\n    ternary r5869 r5870 r5867 into r5871;\n    add r5865 256u128 into r5872;\n    ternary r5869 r5872 r5865 into r5873;\n    gte r5871 170141183460469231731687303715884105728u128 into r5874;\n    add.w r5871 r5871 into r5875;\n    gte r5875 r1539 into r5876;\n    or r5874 r5876 into r5877;\n    sub.w r5875 r1539 into r5878;\n    ternary r5877 r5878 r5875 into r5879;\n    add r5873 128u128 into r5880;\n    ternary r5877 r5880 r5873 into r5881;\n    gte r5879 170141183460469231731687303715884105728u128 into r5882;\n    add.w r5879 r5879 into r5883;\n    gte r5883 r1539 into r5884;\n    or r5882 r5884 into r5885;\n    sub.w r5883 r1539 into r5886;\n    ternary r5885 r5886 r5883 into r5887;\n    add r5881 64u128 into r5888;\n    ternary r5885 r5888 r5881 into r5889;\n    gte r5887 170141183460469231731687303715884105728u128 into r5890;\n    add.w r5887 r5887 into r5891;\n    gte r5891 r1539 into r5892;\n    or r5890 r5892 into r5893;\n    sub.w r5891 r1539 into r5894;\n    ternary r5893 r5894 r5891 into r5895;\n    add r5889 32u128 into r5896;\n    ternary r5893 r5896 r5889 into r5897;\n    gte r5895 170141183460469231731687303715884105728u128 into r5898;\n    add.w r5895 r5895 into r5899;\n    gte r5899 r1539 into r5900;\n    or r5898 r5900 into r5901;\n    sub.w r5899 r1539 into r5902;\n    ternary r5901 r5902 r5899 into r5903;\n    add r5897 16u128 into r5904;\n    ternary r5901 r5904 r5897 into r5905;\n    gte r5903 170141183460469231731687303715884105728u128 into r5906;\n    add.w r5903 r5903 into r5907;\n    gte r5907 r1539 into r5908;\n    or r5906 r5908 into r5909;\n    sub.w r5907 r1539 into r5910;\n    ternary r5909 r5910 r5907 into r5911;\n    add r5905 8u128 into r5912;\n    ternary r5909 r5912 r5905 into r5913;\n    gte r5911 170141183460469231731687303715884105728u128 into r5914;\n    add.w r5911 r5911 into r5915;\n    gte r5915 r1539 into r5916;\n    or r5914 r5916 into r5917;\n    sub.w r5915 r1539 into r5918;\n    ternary r5917 r5918 r5915 into r5919;\n    add r5913 4u128 into r5920;\n    ternary r5917 r5920 r5913 into r5921;\n    gte r5919 170141183460469231731687303715884105728u128 into r5922;\n    add.w r5919 r5919 into r5923;\n    gte r5923 r1539 into r5924;\n    or r5922 r5924 into r5925;\n    sub.w r5923 r1539 into r5926;\n    ternary r5925 r5926 r5923 into r5927;\n    add r5921 2u128 into r5928;\n    ternary r5925 r5928 r5921 into r5929;\n    gte r5927 170141183460469231731687303715884105728u128 into r5930;\n    add.w r5927 r5927 into r5931;\n    gte r5931 r1539 into r5932;\n    or r5930 r5932 into r5933;\n    add r5929 1u128 into r5934;\n    ternary r5933 r5934 r5929 into r5935;\n    ternary r1538 r4912 0u128 into r5936;\n    ternary r1538 r5935 0u128 into r5937;\n    cast r5936 r5937 into r5938 as U256__8JquwLopp8;\n    add.w r4.lo r5938.lo into r5939;\n    lt r5939 r4.lo into r5940;\n    ternary r5940 1u128 0u128 into r5941;\n    add.w r4.hi r5938.hi into r5942;\n    add.w r5942 r5941 into r5943;\n    cast r5943 r5939 into r5944 as U256__8JquwLopp8;\n    add r3 r4677 into r5945;\n    ternary r4673 r5944.hi r4.hi into r5946;\n    ternary r4673 r5944.lo r4.lo into r5947;\n    cast r5946 r5947 into r5948 as U256__8JquwLopp8;\n    add r5 r4910 into r5949;\n    gt r4676.hi 0u128 into r5950;\n    ternary r5950 r4676.hi r4676.lo into r5951;\n    ternary r5950 128u32 0u32 into r5952;\n    gte r5951 18446744073709551616u128 into r5953;\n    shr r5951 64u8 into r5954;\n    ternary r5953 r5954 r5951 into r5955;\n    ternary r5953 64u32 0u32 into r5956;\n    gte r5955 4294967296u128 into r5957;\n    shr r5955 32u8 into r5958;\n    add r5956 32u32 into r5959;\n    ternary r5957 r5958 r5955 into r5960;\n    ternary r5957 r5959 r5956 into r5961;\n    gte r5960 65536u128 into r5962;\n    shr r5960 16u8 into r5963;\n    add r5961 16u32 into r5964;\n    ternary r5962 r5963 r5960 into r5965;\n    ternary r5962 r5964 r5961 into r5966;\n    gte r5965 256u128 into r5967;\n    shr r5965 8u8 into r5968;\n    add r5966 8u32 into r5969;\n    ternary r5967 r5968 r5965 into r5970;\n    ternary r5967 r5969 r5966 into r5971;\n    gte r5970 16u128 into r5972;\n    shr r5970 4u8 into r5973;\n    add r5971 4u32 into r5974;\n    ternary r5972 r5973 r5970 into r5975;\n    ternary r5972 r5974 r5971 into r5976;\n    gte r5975 4u128 into r5977;\n    shr r5975 2u8 into r5978;\n    add r5976 2u32 into r5979;\n    ternary r5977 r5978 r5975 into r5980;\n    ternary r5977 r5979 r5976 into r5981;\n    gte r5980 2u128 into r5982;\n    add r5981 1u32 into r5983;\n    ternary r5982 r5983 r5981 into r5984;\n    add r5952 r5984 into r5985;\n    gte r5985 127u32 into r5986;\n    ternary r5986 r5985 127u32 into r5987;\n    ternary r5986 127u32 r5985 into r5988;\n    sub r5987 r5988 into r5989;\n    cast r5989 into r5990 as u16;\n    and r5990 127u16 into r5991;\n    cast r5991 into r5992 as u8;\n    is.eq r5992 0u8 into r5993;\n    sub 128u8 r5992 into r5994;\n    shl.w r4676.hi r5994 into r5995;\n    ternary r5993 0u128 r5995 into r5996;\n    shr r4676.lo r5992 into r5997;\n    or r5997 r5996 into r5998;\n    shr r4676.hi r5992 into r5999;\n    shr r4676.hi r5992 into r6000;\n    gte r5990 128u16 into r6001;\n    ternary r6001 0u128 r5999 into r6002;\n    ternary r6001 r6000 r5998 into r6003;\n    cast r6002 r6003 into r6004 as U256__8JquwLopp8;\n    cast r5991 into r6005 as u8;\n    is.eq r6005 0u8 into r6006;\n    sub 128u8 r6005 into r6007;\n    shr.w r4676.lo r6007 into r6008;\n    ternary r6006 0u128 r6008 into r6009;\n    shl.w r4676.hi r6005 into r6010;\n    or r6010 r6009 into r6011;\n    shl.w r4676.lo r6005 into r6012;\n    shl.w r4676.lo r6005 into r6013;\n    ternary r6001 r6013 r6011 into r6014;\n    ternary r6001 0u128 r6012 into r6015;\n    cast r6014 r6015 into r6016 as U256__8JquwLopp8;\n    ternary r5986 r6004.hi r6016.hi into r6017;\n    ternary r5986 r6004.lo r6016.lo into r6018;\n    cast r6017 r6018 into r6019 as U256__8JquwLopp8;\n    shr r6019.lo 64u8 into r6020;\n    mul r6020 r6020 into r6021;\n    shr r6021 63u8 into r6022;\n    shr r6022 64u8 into r6023;\n    shl r6023 63u8 into r6024;\n    cast r6023 into r6025 as u8;\n    shr r6022 r6025 into r6026;\n    mul r6026 r6026 into r6027;\n    shr r6027 63u8 into r6028;\n    shr r6028 64u8 into r6029;\n    shl r6029 62u8 into r6030;\n    or r6024 r6030 into r6031;\n    cast r6029 into r6032 as u8;\n    shr r6028 r6032 into r6033;\n    mul r6033 r6033 into r6034;\n    shr r6034 63u8 into r6035;\n    shr r6035 64u8 into r6036;\n    shl r6036 61u8 into r6037;\n    or r6031 r6037 into r6038;\n    cast r6036 into r6039 as u8;\n    shr r6035 r6039 into r6040;\n    mul r6040 r6040 into r6041;\n    shr r6041 63u8 into r6042;\n    shr r6042 64u8 into r6043;\n    shl r6043 60u8 into r6044;\n    or r6038 r6044 into r6045;\n    cast r6043 into r6046 as u8;\n    shr r6042 r6046 into r6047;\n    mul r6047 r6047 into r6048;\n    shr r6048 63u8 into r6049;\n    shr r6049 64u8 into r6050;\n    shl r6050 59u8 into r6051;\n    or r6045 r6051 into r6052;\n    cast r6050 into r6053 as u8;\n    shr r6049 r6053 into r6054;\n    mul r6054 r6054 into r6055;\n    shr r6055 63u8 into r6056;\n    shr r6056 64u8 into r6057;\n    shl r6057 58u8 into r6058;\n    or r6052 r6058 into r6059;\n    cast r6057 into r6060 as u8;\n    shr r6056 r6060 into r6061;\n    mul r6061 r6061 into r6062;\n    shr r6062 63u8 into r6063;\n    shr r6063 64u8 into r6064;\n    shl r6064 57u8 into r6065;\n    or r6059 r6065 into r6066;\n    cast r6064 into r6067 as u8;\n    shr r6063 r6067 into r6068;\n    mul r6068 r6068 into r6069;\n    shr r6069 63u8 into r6070;\n    shr r6070 64u8 into r6071;\n    shl r6071 56u8 into r6072;\n    or r6066 r6072 into r6073;\n    cast r6071 into r6074 as u8;\n    shr r6070 r6074 into r6075;\n    mul r6075 r6075 into r6076;\n    shr r6076 63u8 into r6077;\n    shr r6077 64u8 into r6078;\n    shl r6078 55u8 into r6079;\n    or r6073 r6079 into r6080;\n    cast r6078 into r6081 as u8;\n    shr r6077 r6081 into r6082;\n    mul r6082 r6082 into r6083;\n    shr r6083 63u8 into r6084;\n    shr r6084 64u8 into r6085;\n    shl r6085 54u8 into r6086;\n    or r6080 r6086 into r6087;\n    cast r6085 into r6088 as u8;\n    shr r6084 r6088 into r6089;\n    mul r6089 r6089 into r6090;\n    shr r6090 63u8 into r6091;\n    shr r6091 64u8 into r6092;\n    shl r6092 53u8 into r6093;\n    or r6087 r6093 into r6094;\n    cast r6092 into r6095 as u8;\n    shr r6091 r6095 into r6096;\n    mul r6096 r6096 into r6097;\n    shr r6097 63u8 into r6098;\n    shr r6098 64u8 into r6099;\n    shl r6099 52u8 into r6100;\n    or r6094 r6100 into r6101;\n    cast r6099 into r6102 as u8;\n    shr r6098 r6102 into r6103;\n    mul r6103 r6103 into r6104;\n    shr r6104 63u8 into r6105;\n    shr r6105 64u8 into r6106;\n    shl r6106 51u8 into r6107;\n    or r6101 r6107 into r6108;\n    cast r6106 into r6109 as u8;\n    shr r6105 r6109 into r6110;\n    mul r6110 r6110 into r6111;\n    shr r6111 63u8 into r6112;\n    shr r6112 64u8 into r6113;\n    shl r6113 50u8 into r6114;\n    or r6108 r6114 into r6115;\n    cast r5985 into r6116 as i128;\n    sub r6116 128i128 into r6117;\n    shl r6117 64u8 into r6118;\n    cast r6115 into r6119 as i128;\n    add r6118 r6119 into r6120;\n    div r6120 1330584781654114i128 into r6121;\n    cast r6121 into r6122 as i32;\n    output r4676 as U256__8JquwLopp8.public;\n    output r5945 as u128.public;\n    output r4906 as u128.public;\n    output r5948 as U256__8JquwLopp8.public;\n    output r5949 as u128.public;\n    output r6122 as i32.public;\n    output r4907 as u128.public;\n\nview resolve_stored_tick:\n    input r0 as U256__8JquwLopp8.public;\n    input r1 as i32.public;\n    input r2 as U256__8JquwLopp8.public;\n    input r3 as i32.public;\n    input r4 as boolean.public;\n    add r3 1i32 into r5;\n    gte r5 -524287i32 into r6;\n    lte r5 524287i32 into r7;\n    and r6 r7 into r8;\n    assert.eq r8 true;\n    lt r5 0i32 into r9;\n    sub 0i32 r5 into r10;\n    ternary r9 r10 r5 into r11;\n    gte r11 0i32 into r12;\n    assert.eq r12 true;\n    cast r11 into r13 as u32;\n    and r13 3u32 into r14;\n    is.eq r14 0u32 into r15;\n    is.eq r14 1u32 into r16;\n    is.eq r14 2u32 into r17;\n    ternary r17 0u128 0u128 into r18;\n    ternary r17 340248342086729790484326174814286782778u128 340231330945450418515964920540021147199u128 into r19;\n    cast r18 r19 into r20 as U256__8JquwLopp8;\n    ternary r16 0u128 r20.hi into r21;\n    ternary r16 340265354078544963557816517032075149313u128 r20.lo into r22;\n    cast r21 r22 into r23 as U256__8JquwLopp8;\n    ternary r15 1u128 r23.hi into r24;\n    ternary r15 0u128 r23.lo into r25;\n    cast r24 r25 into r26 as U256__8JquwLopp8;\n    and r13 4u32 into r27;\n    is.neq r27 0u32 into r28;\n    and r26.lo 18446744073709551615u128 into r29;\n    shr r26.lo 64u8 into r30;\n    mul r29 17226890335427755468u128 into r31;\n    mul r29 18443055278223354162u128 into r32;\n    mul r30 17226890335427755468u128 into r33;\n    mul r30 18443055278223354162u128 into r34;\n    and r31 18446744073709551615u128 into r35;\n    shr r31 64u8 into r36;\n    and r32 18446744073709551615u128 into r37;\n    add r36 r37 into r38;\n    and r33 18446744073709551615u128 into r39;\n    add r38 r39 into r40;\n    and r40 18446744073709551615u128 into r41;\n    shr r40 64u8 into r42;\n    shr r32 64u8 into r43;\n    shr r33 64u8 into r44;\n    add r43 r44 into r45;\n    and r34 18446744073709551615u128 into r46;\n    add r45 r46 into r47;\n    add r47 r42 into r48;\n    and r48 18446744073709551615u128 into r49;\n    shr r48 64u8 into r50;\n    shr r34 64u8 into r51;\n    add r51 r50 into r52;\n    shl r52 64u8 into r53;\n    add r53 r49 into r54;\n    shl r41 64u8 into r55;\n    add r55 r35 into r56;\n    and r26.hi 18446744073709551615u128 into r57;\n    shr r26.hi 64u8 into r58;\n    mul r57 17226890335427755468u128 into r59;\n    mul r57 18443055278223354162u128 into r60;\n    mul r58 17226890335427755468u128 into r61;\n    mul r58 18443055278223354162u128 into r62;\n    and r59 18446744073709551615u128 into r63;\n    shr r59 64u8 into r64;\n    and r60 18446744073709551615u128 into r65;\n    add r64 r65 into r66;\n    and r61 18446744073709551615u128 into r67;\n    add r66 r67 into r68;\n    and r68 18446744073709551615u128 into r69;\n    shr r68 64u8 into r70;\n    shr r60 64u8 into r71;\n    shr r61 64u8 into r72;\n    add r71 r72 into r73;\n    and r62 18446744073709551615u128 into r74;\n    add r73 r74 into r75;\n    add r75 r70 into r76;\n    and r76 18446744073709551615u128 into r77;\n    shr r76 64u8 into r78;\n    shr r62 64u8 into r79;\n    add r79 r78 into r80;\n    shl r80 64u8 into r81;\n    add r81 r77 into r82;\n    shl r69 64u8 into r83;\n    add r83 r63 into r84;\n    add.w r54 r84 into r85;\n    lt r85 r54 into r86;\n    ternary r86 1u128 0u128 into r87;\n    add.w r82 r87 into r88;\n    cast r88 r85 into r89 as U256__8JquwLopp8;\n    ternary r28 r89.hi r26.hi into r90;\n    ternary r28 r89.lo r26.lo into r91;\n    cast r90 r91 into r92 as U256__8JquwLopp8;\n    and r13 8u32 into r93;\n    is.neq r93 0u32 into r94;\n    and r92.lo 18446744073709551615u128 into r95;\n    shr r92.lo 64u8 into r96;\n    mul r95 2032852871939366096u128 into r97;\n    mul r95 18439367220385604838u128 into r98;\n    mul r96 2032852871939366096u128 into r99;\n    mul r96 18439367220385604838u128 into r100;\n    and r97 18446744073709551615u128 into r101;\n    shr r97 64u8 into r102;\n    and r98 18446744073709551615u128 into r103;\n    add r102 r103 into r104;\n    and r99 18446744073709551615u128 into r105;\n    add r104 r105 into r106;\n    and r106 18446744073709551615u128 into r107;\n    shr r106 64u8 into r108;\n    shr r98 64u8 into r109;\n    shr r99 64u8 into r110;\n    add r109 r110 into r111;\n    and r100 18446744073709551615u128 into r112;\n    add r111 r112 into r113;\n    add r113 r108 into r114;\n    and r114 18446744073709551615u128 into r115;\n    shr r114 64u8 into r116;\n    shr r100 64u8 into r117;\n    add r117 r116 into r118;\n    shl r118 64u8 into r119;\n    add r119 r115 into r120;\n    shl r107 64u8 into r121;\n    add r121 r101 into r122;\n    and r92.hi 18446744073709551615u128 into r123;\n    shr r92.hi 64u8 into r124;\n    mul r123 2032852871939366096u128 into r125;\n    mul r123 18439367220385604838u128 into r126;\n    mul r124 2032852871939366096u128 into r127;\n    mul r124 18439367220385604838u128 into r128;\n    and r125 18446744073709551615u128 into r129;\n    shr r125 64u8 into r130;\n    and r126 18446744073709551615u128 into r131;\n    add r130 r131 into r132;\n    and r127 18446744073709551615u128 into r133;\n    add r132 r133 into r134;\n    and r134 18446744073709551615u128 into r135;\n    shr r134 64u8 into r136;\n    shr r126 64u8 into r137;\n    shr r127 64u8 into r138;\n    add r137 r138 into r139;\n    and r128 18446744073709551615u128 into r140;\n    add r139 r140 into r141;\n    add r141 r136 into r142;\n    and r142 18446744073709551615u128 into r143;\n    shr r142 64u8 into r144;\n    shr r128 64u8 into r145;\n    add r145 r144 into r146;\n    shl r146 64u8 into r147;\n    add r147 r143 into r148;\n    shl r135 64u8 into r149;\n    add r149 r129 into r150;\n    add.w r120 r150 into r151;\n    lt r151 r120 into r152;\n    ternary r152 1u128 0u128 into r153;\n    add.w r148 r153 into r154;\n    cast r154 r151 into r155 as U256__8JquwLopp8;\n    ternary r94 r155.hi r92.hi into r156;\n    ternary r94 r155.lo r92.lo into r157;\n    cast r156 r157 into r158 as U256__8JquwLopp8;\n    and r13 16u32 into r159;\n    is.neq r159 0u32 into r160;\n    and r158.lo 18446744073709551615u128 into r161;\n    shr r158.lo 64u8 into r162;\n    mul r161 14545316742740207172u128 into r163;\n    mul r161 18431993317065449817u128 into r164;\n    mul r162 14545316742740207172u128 into r165;\n    mul r162 18431993317065449817u128 into r166;\n    and r163 18446744073709551615u128 into r167;\n    shr r163 64u8 into r168;\n    and r164 18446744073709551615u128 into r169;\n    add r168 r169 into r170;\n    and r165 18446744073709551615u128 into r171;\n    add r170 r171 into r172;\n    and r172 18446744073709551615u128 into r173;\n    shr r172 64u8 into r174;\n    shr r164 64u8 into r175;\n    shr r165 64u8 into r176;\n    add r175 r176 into r177;\n    and r166 18446744073709551615u128 into r178;\n    add r177 r178 into r179;\n    add r179 r174 into r180;\n    and r180 18446744073709551615u128 into r181;\n    shr r180 64u8 into r182;\n    shr r166 64u8 into r183;\n    add r183 r182 into r184;\n    shl r184 64u8 into r185;\n    add r185 r181 into r186;\n    shl r173 64u8 into r187;\n    add r187 r167 into r188;\n    and r158.hi 18446744073709551615u128 into r189;\n    shr r158.hi 64u8 into r190;\n    mul r189 14545316742740207172u128 into r191;\n    mul r189 18431993317065449817u128 into r192;\n    mul r190 14545316742740207172u128 into r193;\n    mul r190 18431993317065449817u128 into r194;\n    and r191 18446744073709551615u128 into r195;\n    shr r191 64u8 into r196;\n    and r192 18446744073709551615u128 into r197;\n    add r196 r197 into r198;\n    and r193 18446744073709551615u128 into r199;\n    add r198 r199 into r200;\n    and r200 18446744073709551615u128 into r201;\n    shr r200 64u8 into r202;\n    shr r192 64u8 into r203;\n    shr r193 64u8 into r204;\n    add r203 r204 into r205;\n    and r194 18446744073709551615u128 into r206;\n    add r205 r206 into r207;\n    add r207 r202 into r208;\n    and r208 18446744073709551615u128 into r209;\n    shr r208 64u8 into r210;\n    shr r194 64u8 into r211;\n    add r211 r210 into r212;\n    shl r212 64u8 into r213;\n    add r213 r209 into r214;\n    shl r201 64u8 into r215;\n    add r215 r195 into r216;\n    add.w r186 r216 into r217;\n    lt r217 r186 into r218;\n    ternary r218 1u128 0u128 into r219;\n    add.w r214 r219 into r220;\n    cast r220 r217 into r221 as U256__8JquwLopp8;\n    ternary r160 r221.hi r158.hi into r222;\n    ternary r160 r221.lo r158.lo into r223;\n    cast r222 r223 into r224 as U256__8JquwLopp8;\n    and r13 32u32 into r225;\n    is.neq r225 0u32 into r226;\n    and r224.lo 18446744073709551615u128 into r227;\n    shr r224.lo 64u8 into r228;\n    mul r227 5129152022828963008u128 into r229;\n    mul r227 18417254355718160513u128 into r230;\n    mul r228 5129152022828963008u128 into r231;\n    mul r228 18417254355718160513u128 into r232;\n    and r229 18446744073709551615u128 into r233;\n    shr r229 64u8 into r234;\n    and r230 18446744073709551615u128 into r235;\n    add r234 r235 into r236;\n    and r231 18446744073709551615u128 into r237;\n    add r236 r237 into r238;\n    and r238 18446744073709551615u128 into r239;\n    shr r238 64u8 into r240;\n    shr r230 64u8 into r241;\n    shr r231 64u8 into r242;\n    add r241 r242 into r243;\n    and r232 18446744073709551615u128 into r244;\n    add r243 r244 into r245;\n    add r245 r240 into r246;\n    and r246 18446744073709551615u128 into r247;\n    shr r246 64u8 into r248;\n    shr r232 64u8 into r249;\n    add r249 r248 into r250;\n    shl r250 64u8 into r251;\n    add r251 r247 into r252;\n    shl r239 64u8 into r253;\n    add r253 r233 into r254;\n    and r224.hi 18446744073709551615u128 into r255;\n    shr r224.hi 64u8 into r256;\n    mul r255 5129152022828963008u128 into r257;\n    mul r255 18417254355718160513u128 into r258;\n    mul r256 5129152022828963008u128 into r259;\n    mul r256 18417254355718160513u128 into r260;\n    and r257 18446744073709551615u128 into r261;\n    shr r257 64u8 into r262;\n    and r258 18446744073709551615u128 into r263;\n    add r262 r263 into r264;\n    and r259 18446744073709551615u128 into r265;\n    add r264 r265 into r266;\n    and r266 18446744073709551615u128 into r267;\n    shr r266 64u8 into r268;\n    shr r258 64u8 into r269;\n    shr r259 64u8 into r270;\n    add r269 r270 into r271;\n    and r260 18446744073709551615u128 into r272;\n    add r271 r272 into r273;\n    add r273 r268 into r274;\n    and r274 18446744073709551615u128 into r275;\n    shr r274 64u8 into r276;\n    shr r260 64u8 into r277;\n    add r277 r276 into r278;\n    shl r278 64u8 into r279;\n    add r279 r275 into r280;\n    shl r267 64u8 into r281;\n    add r281 r261 into r282;\n    add.w r252 r282 into r283;\n    lt r283 r252 into r284;\n    ternary r284 1u128 0u128 into r285;\n    add.w r280 r285 into r286;\n    cast r286 r283 into r287 as U256__8JquwLopp8;\n    ternary r226 r287.hi r224.hi into r288;\n    ternary r226 r287.lo r224.lo into r289;\n    cast r288 r289 into r290 as U256__8JquwLopp8;\n    and r13 64u32 into r291;\n    is.neq r291 0u32 into r292;\n    and r290.lo 18446744073709551615u128 into r293;\n    shr r290.lo 64u8 into r294;\n    mul r293 4894419605888772193u128 into r295;\n    mul r293 18387811781193591352u128 into r296;\n    mul r294 4894419605888772193u128 into r297;\n    mul r294 18387811781193591352u128 into r298;\n    and r295 18446744073709551615u128 into r299;\n    shr r295 64u8 into r300;\n    and r296 18446744073709551615u128 into r301;\n    add r300 r301 into r302;\n    and r297 18446744073709551615u128 into r303;\n    add r302 r303 into r304;\n    and r304 18446744073709551615u128 into r305;\n    shr r304 64u8 into r306;\n    shr r296 64u8 into r307;\n    shr r297 64u8 into r308;\n    add r307 r308 into r309;\n    and r298 18446744073709551615u128 into r310;\n    add r309 r310 into r311;\n    add r311 r306 into r312;\n    and r312 18446744073709551615u128 into r313;\n    shr r312 64u8 into r314;\n    shr r298 64u8 into r315;\n    add r315 r314 into r316;\n    shl r316 64u8 into r317;\n    add r317 r313 into r318;\n    shl r305 64u8 into r319;\n    add r319 r299 into r320;\n    and r290.hi 18446744073709551615u128 into r321;\n    shr r290.hi 64u8 into r322;\n    mul r321 4894419605888772193u128 into r323;\n    mul r321 18387811781193591352u128 into r324;\n    mul r322 4894419605888772193u128 into r325;\n    mul r322 18387811781193591352u128 into r326;\n    and r323 18446744073709551615u128 into r327;\n    shr r323 64u8 into r328;\n    and r324 18446744073709551615u128 into r329;\n    add r328 r329 into r330;\n    and r325 18446744073709551615u128 into r331;\n    add r330 r331 into r332;\n    and r332 18446744073709551615u128 into r333;\n    shr r332 64u8 into r334;\n    shr r324 64u8 into r335;\n    shr r325 64u8 into r336;\n    add r335 r336 into r337;\n    and r326 18446744073709551615u128 into r338;\n    add r337 r338 into r339;\n    add r339 r334 into r340;\n    and r340 18446744073709551615u128 into r341;\n    shr r340 64u8 into r342;\n    shr r326 64u8 into r343;\n    add r343 r342 into r344;\n    shl r344 64u8 into r345;\n    add r345 r341 into r346;\n    shl r333 64u8 into r347;\n    add r347 r327 into r348;\n    add.w r318 r348 into r349;\n    lt r349 r318 into r350;\n    ternary r350 1u128 0u128 into r351;\n    add.w r346 r351 into r352;\n    cast r352 r349 into r353 as U256__8JquwLopp8;\n    ternary r292 r353.hi r290.hi into r354;\n    ternary r292 r353.lo r290.lo into r355;\n    cast r354 r355 into r356 as U256__8JquwLopp8;\n    and r13 128u32 into r357;\n    is.neq r357 0u32 into r358;\n    and r356.lo 18446744073709551615u128 into r359;\n    shr r356.lo 64u8 into r360;\n    mul r359 1280255884321894483u128 into r361;\n    mul r359 18329067761203520168u128 into r362;\n    mul r360 1280255884321894483u128 into r363;\n    mul r360 18329067761203520168u128 into r364;\n    and r361 18446744073709551615u128 into r365;\n    shr r361 64u8 into r366;\n    and r362 18446744073709551615u128 into r367;\n    add r366 r367 into r368;\n    and r363 18446744073709551615u128 into r369;\n    add r368 r369 into r370;\n    and r370 18446744073709551615u128 into r371;\n    shr r370 64u8 into r372;\n    shr r362 64u8 into r373;\n    shr r363 64u8 into r374;\n    add r373 r374 into r375;\n    and r364 18446744073709551615u128 into r376;\n    add r375 r376 into r377;\n    add r377 r372 into r378;\n    and r378 18446744073709551615u128 into r379;\n    shr r378 64u8 into r380;\n    shr r364 64u8 into r381;\n    add r381 r380 into r382;\n    shl r382 64u8 into r383;\n    add r383 r379 into r384;\n    shl r371 64u8 into r385;\n    add r385 r365 into r386;\n    and r356.hi 18446744073709551615u128 into r387;\n    shr r356.hi 64u8 into r388;\n    mul r387 1280255884321894483u128 into r389;\n    mul r387 18329067761203520168u128 into r390;\n    mul r388 1280255884321894483u128 into r391;\n    mul r388 18329067761203520168u128 into r392;\n    and r389 18446744073709551615u128 into r393;\n    shr r389 64u8 into r394;\n    and r390 18446744073709551615u128 into r395;\n    add r394 r395 into r396;\n    and r391 18446744073709551615u128 into r397;\n    add r396 r397 into r398;\n    and r398 18446744073709551615u128 into r399;\n    shr r398 64u8 into r400;\n    shr r390 64u8 into r401;\n    shr r391 64u8 into r402;\n    add r401 r402 into r403;\n    and r392 18446744073709551615u128 into r404;\n    add r403 r404 into r405;\n    add r405 r400 into r406;\n    and r406 18446744073709551615u128 into r407;\n    shr r406 64u8 into r408;\n    shr r392 64u8 into r409;\n    add r409 r408 into r410;\n    shl r410 64u8 into r411;\n    add r411 r407 into r412;\n    shl r399 64u8 into r413;\n    add r413 r393 into r414;\n    add.w r384 r414 into r415;\n    lt r415 r384 into r416;\n    ternary r416 1u128 0u128 into r417;\n    add.w r412 r417 into r418;\n    cast r418 r415 into r419 as U256__8JquwLopp8;\n    ternary r358 r419.hi r356.hi into r420;\n    ternary r358 r419.lo r356.lo into r421;\n    cast r420 r421 into r422 as U256__8JquwLopp8;\n    and r13 256u32 into r423;\n    is.neq r423 0u32 into r424;\n    and r422.lo 18446744073709551615u128 into r425;\n    shr r422.lo 64u8 into r426;\n    mul r425 15924666964335305636u128 into r427;\n    mul r425 18212142134806087854u128 into r428;\n    mul r426 15924666964335305636u128 into r429;\n    mul r426 18212142134806087854u128 into r430;\n    and r427 18446744073709551615u128 into r431;\n    shr r427 64u8 into r432;\n    and r428 18446744073709551615u128 into r433;\n    add r432 r433 into r434;\n    and r429 18446744073709551615u128 into r435;\n    add r434 r435 into r436;\n    and r436 18446744073709551615u128 into r437;\n    shr r436 64u8 into r438;\n    shr r428 64u8 into r439;\n    shr r429 64u8 into r440;\n    add r439 r440 into r441;\n    and r430 18446744073709551615u128 into r442;\n    add r441 r442 into r443;\n    add r443 r438 into r444;\n    and r444 18446744073709551615u128 into r445;\n    shr r444 64u8 into r446;\n    shr r430 64u8 into r447;\n    add r447 r446 into r448;\n    shl r448 64u8 into r449;\n    add r449 r445 into r450;\n    shl r437 64u8 into r451;\n    add r451 r431 into r452;\n    and r422.hi 18446744073709551615u128 into r453;\n    shr r422.hi 64u8 into r454;\n    mul r453 15924666964335305636u128 into r455;\n    mul r453 18212142134806087854u128 into r456;\n    mul r454 15924666964335305636u128 into r457;\n    mul r454 18212142134806087854u128 into r458;\n    and r455 18446744073709551615u128 into r459;\n    shr r455 64u8 into r460;\n    and r456 18446744073709551615u128 into r461;\n    add r460 r461 into r462;\n    and r457 18446744073709551615u128 into r463;\n    add r462 r463 into r464;\n    and r464 18446744073709551615u128 into r465;\n    shr r464 64u8 into r466;\n    shr r456 64u8 into r467;\n    shr r457 64u8 into r468;\n    add r467 r468 into r469;\n    and r458 18446744073709551615u128 into r470;\n    add r469 r470 into r471;\n    add r471 r466 into r472;\n    and r472 18446744073709551615u128 into r473;\n    shr r472 64u8 into r474;\n    shr r458 64u8 into r475;\n    add r475 r474 into r476;\n    shl r476 64u8 into r477;\n    add r477 r473 into r478;\n    shl r465 64u8 into r479;\n    add r479 r459 into r480;\n    add.w r450 r480 into r481;\n    lt r481 r450 into r482;\n    ternary r482 1u128 0u128 into r483;\n    add.w r478 r483 into r484;\n    cast r484 r481 into r485 as U256__8JquwLopp8;\n    ternary r424 r485.hi r422.hi into r486;\n    ternary r424 r485.lo r422.lo into r487;\n    cast r486 r487 into r488 as U256__8JquwLopp8;\n    and r13 512u32 into r489;\n    is.neq r489 0u32 into r490;\n    and r488.lo 18446744073709551615u128 into r491;\n    shr r488.lo 64u8 into r492;\n    mul r491 8010504389359918676u128 into r493;\n    mul r491 17980523815641551639u128 into r494;\n    mul r492 8010504389359918676u128 into r495;\n    mul r492 17980523815641551639u128 into r496;\n    and r493 18446744073709551615u128 into r497;\n    shr r493 64u8 into r498;\n    and r494 18446744073709551615u128 into r499;\n    add r498 r499 into r500;\n    and r495 18446744073709551615u128 into r501;\n    add r500 r501 into r502;\n    and r502 18446744073709551615u128 into r503;\n    shr r502 64u8 into r504;\n    shr r494 64u8 into r505;\n    shr r495 64u8 into r506;\n    add r505 r506 into r507;\n    and r496 18446744073709551615u128 into r508;\n    add r507 r508 into r509;\n    add r509 r504 into r510;\n    and r510 18446744073709551615u128 into r511;\n    shr r510 64u8 into r512;\n    shr r496 64u8 into r513;\n    add r513 r512 into r514;\n    shl r514 64u8 into r515;\n    add r515 r511 into r516;\n    shl r503 64u8 into r517;\n    add r517 r497 into r518;\n    and r488.hi 18446744073709551615u128 into r519;\n    shr r488.hi 64u8 into r520;\n    mul r519 8010504389359918676u128 into r521;\n    mul r519 17980523815641551639u128 into r522;\n    mul r520 8010504389359918676u128 into r523;\n    mul r520 17980523815641551639u128 into r524;\n    and r521 18446744073709551615u128 into r525;\n    shr r521 64u8 into r526;\n    and r522 18446744073709551615u128 into r527;\n    add r526 r527 into r528;\n    and r523 18446744073709551615u128 into r529;\n    add r528 r529 into r530;\n    and r530 18446744073709551615u128 into r531;\n    shr r530 64u8 into r532;\n    shr r522 64u8 into r533;\n    shr r523 64u8 into r534;\n    add r533 r534 into r535;\n    and r524 18446744073709551615u128 into r536;\n    add r535 r536 into r537;\n    add r537 r532 into r538;\n    and r538 18446744073709551615u128 into r539;\n    shr r538 64u8 into r540;\n    shr r524 64u8 into r541;\n    add r541 r540 into r542;\n    shl r542 64u8 into r543;\n    add r543 r539 into r544;\n    shl r531 64u8 into r545;\n    add r545 r525 into r546;\n    add.w r516 r546 into r547;\n    lt r547 r516 into r548;\n    ternary r548 1u128 0u128 into r549;\n    add.w r544 r549 into r550;\n    cast r550 r547 into r551 as U256__8JquwLopp8;\n    ternary r490 r551.hi r488.hi into r552;\n    ternary r490 r551.lo r488.lo into r553;\n    cast r552 r553 into r554 as U256__8JquwLopp8;\n    and r13 1024u32 into r555;\n    is.neq r555 0u32 into r556;\n    and r554.lo 18446744073709551615u128 into r557;\n    shr r554.lo 64u8 into r558;\n    mul r557 10668036004952895731u128 into r559;\n    mul r557 17526086738831147013u128 into r560;\n    mul r558 10668036004952895731u128 into r561;\n    mul r558 17526086738831147013u128 into r562;\n    and r559 18446744073709551615u128 into r563;\n    shr r559 64u8 into r564;\n    and r560 18446744073709551615u128 into r565;\n    add r564 r565 into r566;\n    and r561 18446744073709551615u128 into r567;\n    add r566 r567 into r568;\n    and r568 18446744073709551615u128 into r569;\n    shr r568 64u8 into r570;\n    shr r560 64u8 into r571;\n    shr r561 64u8 into r572;\n    add r571 r572 into r573;\n    and r562 18446744073709551615u128 into r574;\n    add r573 r574 into r575;\n    add r575 r570 into r576;\n    and r576 18446744073709551615u128 into r577;\n    shr r576 64u8 into r578;\n    shr r562 64u8 into r579;\n    add r579 r578 into r580;\n    shl r580 64u8 into r581;\n    add r581 r577 into r582;\n    shl r569 64u8 into r583;\n    add r583 r563 into r584;\n    and r554.hi 18446744073709551615u128 into r585;\n    shr r554.hi 64u8 into r586;\n    mul r585 10668036004952895731u128 into r587;\n    mul r585 17526086738831147013u128 into r588;\n    mul r586 10668036004952895731u128 into r589;\n    mul r586 17526086738831147013u128 into r590;\n    and r587 18446744073709551615u128 into r591;\n    shr r587 64u8 into r592;\n    and r588 18446744073709551615u128 into r593;\n    add r592 r593 into r594;\n    and r589 18446744073709551615u128 into r595;\n    add r594 r595 into r596;\n    and r596 18446744073709551615u128 into r597;\n    shr r596 64u8 into r598;\n    shr r588 64u8 into r599;\n    shr r589 64u8 into r600;\n    add r599 r600 into r601;\n    and r590 18446744073709551615u128 into r602;\n    add r601 r602 into r603;\n    add r603 r598 into r604;\n    and r604 18446744073709551615u128 into r605;\n    shr r604 64u8 into r606;\n    shr r590 64u8 into r607;\n    add r607 r606 into r608;\n    shl r608 64u8 into r609;\n    add r609 r605 into r610;\n    shl r597 64u8 into r611;\n    add r611 r591 into r612;\n    add.w r582 r612 into r613;\n    lt r613 r582 into r614;\n    ternary r614 1u128 0u128 into r615;\n    add.w r610 r615 into r616;\n    cast r616 r613 into r617 as U256__8JquwLopp8;\n    ternary r556 r617.hi r554.hi into r618;\n    ternary r556 r617.lo r554.lo into r619;\n    cast r618 r619 into r620 as U256__8JquwLopp8;\n    and r13 2048u32 into r621;\n    is.neq r621 0u32 into r622;\n    and r620.lo 18446744073709551615u128 into r623;\n    shr r620.lo 64u8 into r624;\n    mul r623 4878133418470705625u128 into r625;\n    mul r623 16651378430235024244u128 into r626;\n    mul r624 4878133418470705625u128 into r627;\n    mul r624 16651378430235024244u128 into r628;\n    and r625 18446744073709551615u128 into r629;\n    shr r625 64u8 into r630;\n    and r626 18446744073709551615u128 into r631;\n    add r630 r631 into r632;\n    and r627 18446744073709551615u128 into r633;\n    add r632 r633 into r634;\n    and r634 18446744073709551615u128 into r635;\n    shr r634 64u8 into r636;\n    shr r626 64u8 into r637;\n    shr r627 64u8 into r638;\n    add r637 r638 into r639;\n    and r628 18446744073709551615u128 into r640;\n    add r639 r640 into r641;\n    add r641 r636 into r642;\n    and r642 18446744073709551615u128 into r643;\n    shr r642 64u8 into r644;\n    shr r628 64u8 into r645;\n    add r645 r644 into r646;\n    shl r646 64u8 into r647;\n    add r647 r643 into r648;\n    shl r635 64u8 into r649;\n    add r649 r629 into r650;\n    and r620.hi 18446744073709551615u128 into r651;\n    shr r620.hi 64u8 into r652;\n    mul r651 4878133418470705625u128 into r653;\n    mul r651 16651378430235024244u128 into r654;\n    mul r652 4878133418470705625u128 into r655;\n    mul r652 16651378430235024244u128 into r656;\n    and r653 18446744073709551615u128 into r657;\n    shr r653 64u8 into r658;\n    and r654 18446744073709551615u128 into r659;\n    add r658 r659 into r660;\n    and r655 18446744073709551615u128 into r661;\n    add r660 r661 into r662;\n    and r662 18446744073709551615u128 into r663;\n    shr r662 64u8 into r664;\n    shr r654 64u8 into r665;\n    shr r655 64u8 into r666;\n    add r665 r666 into r667;\n    and r656 18446744073709551615u128 into r668;\n    add r667 r668 into r669;\n    add r669 r664 into r670;\n    and r670 18446744073709551615u128 into r671;\n    shr r670 64u8 into r672;\n    shr r656 64u8 into r673;\n    add r673 r672 into r674;\n    shl r674 64u8 into r675;\n    add r675 r671 into r676;\n    shl r663 64u8 into r677;\n    add r677 r657 into r678;\n    add.w r648 r678 into r679;\n    lt r679 r648 into r680;\n    ternary r680 1u128 0u128 into r681;\n    add.w r676 r681 into r682;\n    cast r682 r679 into r683 as U256__8JquwLopp8;\n    ternary r622 r683.hi r620.hi into r684;\n    ternary r622 r683.lo r620.lo into r685;\n    cast r684 r685 into r686 as U256__8JquwLopp8;\n    and r13 4096u32 into r687;\n    is.neq r687 0u32 into r688;\n    and r686.lo 18446744073709551615u128 into r689;\n    shr r686.lo 64u8 into r690;\n    mul r689 9537173718739605541u128 into r691;\n    mul r689 15030750278693429944u128 into r692;\n    mul r690 9537173718739605541u128 into r693;\n    mul r690 15030750278693429944u128 into r694;\n    and r691 18446744073709551615u128 into r695;\n    shr r691 64u8 into r696;\n    and r692 18446744073709551615u128 into r697;\n    add r696 r697 into r698;\n    and r693 18446744073709551615u128 into r699;\n    add r698 r699 into r700;\n    and r700 18446744073709551615u128 into r701;\n    shr r700 64u8 into r702;\n    shr r692 64u8 into r703;\n    shr r693 64u8 into r704;\n    add r703 r704 into r705;\n    and r694 18446744073709551615u128 into r706;\n    add r705 r706 into r707;\n    add r707 r702 into r708;\n    and r708 18446744073709551615u128 into r709;\n    shr r708 64u8 into r710;\n    shr r694 64u8 into r711;\n    add r711 r710 into r712;\n    shl r712 64u8 into r713;\n    add r713 r709 into r714;\n    shl r701 64u8 into r715;\n    add r715 r695 into r716;\n    and r686.hi 18446744073709551615u128 into r717;\n    shr r686.hi 64u8 into r718;\n    mul r717 9537173718739605541u128 into r719;\n    mul r717 15030750278693429944u128 into r720;\n    mul r718 9537173718739605541u128 into r721;\n    mul r718 15030750278693429944u128 into r722;\n    and r719 18446744073709551615u128 into r723;\n    shr r719 64u8 into r724;\n    and r720 18446744073709551615u128 into r725;\n    add r724 r725 into r726;\n    and r721 18446744073709551615u128 into r727;\n    add r726 r727 into r728;\n    and r728 18446744073709551615u128 into r729;\n    shr r728 64u8 into r730;\n    shr r720 64u8 into r731;\n    shr r721 64u8 into r732;\n    add r731 r732 into r733;\n    and r722 18446744073709551615u128 into r734;\n    add r733 r734 into r735;\n    add r735 r730 into r736;\n    and r736 18446744073709551615u128 into r737;\n    shr r736 64u8 into r738;\n    shr r722 64u8 into r739;\n    add r739 r738 into r740;\n    shl r740 64u8 into r741;\n    add r741 r737 into r742;\n    shl r729 64u8 into r743;\n    add r743 r723 into r744;\n    add.w r714 r744 into r745;\n    lt r745 r714 into r746;\n    ternary r746 1u128 0u128 into r747;\n    add.w r742 r747 into r748;\n    cast r748 r745 into r749 as U256__8JquwLopp8;\n    ternary r688 r749.hi r686.hi into r750;\n    ternary r688 r749.lo r686.lo into r751;\n    cast r750 r751 into r752 as U256__8JquwLopp8;\n    and r13 8192u32 into r753;\n    is.neq r753 0u32 into r754;\n    and r752.lo 18446744073709551615u128 into r755;\n    shr r752.lo 64u8 into r756;\n    mul r755 9972618978014552549u128 into r757;\n    mul r755 12247334978882834399u128 into r758;\n    mul r756 9972618978014552549u128 into r759;\n    mul r756 12247334978882834399u128 into r760;\n    and r757 18446744073709551615u128 into r761;\n    shr r757 64u8 into r762;\n    and r758 18446744073709551615u128 into r763;\n    add r762 r763 into r764;\n    and r759 18446744073709551615u128 into r765;\n    add r764 r765 into r766;\n    and r766 18446744073709551615u128 into r767;\n    shr r766 64u8 into r768;\n    shr r758 64u8 into r769;\n    shr r759 64u8 into r770;\n    add r769 r770 into r771;\n    and r760 18446744073709551615u128 into r772;\n    add r771 r772 into r773;\n    add r773 r768 into r774;\n    and r774 18446744073709551615u128 into r775;\n    shr r774 64u8 into r776;\n    shr r760 64u8 into r777;\n    add r777 r776 into r778;\n    shl r778 64u8 into r779;\n    add r779 r775 into r780;\n    shl r767 64u8 into r781;\n    add r781 r761 into r782;\n    and r752.hi 18446744073709551615u128 into r783;\n    shr r752.hi 64u8 into r784;\n    mul r783 9972618978014552549u128 into r785;\n    mul r783 12247334978882834399u128 into r786;\n    mul r784 9972618978014552549u128 into r787;\n    mul r784 12247334978882834399u128 into r788;\n    and r785 18446744073709551615u128 into r789;\n    shr r785 64u8 into r790;\n    and r786 18446744073709551615u128 into r791;\n    add r790 r791 into r792;\n    and r787 18446744073709551615u128 into r793;\n    add r792 r793 into r794;\n    and r794 18446744073709551615u128 into r795;\n    shr r794 64u8 into r796;\n    shr r786 64u8 into r797;\n    shr r787 64u8 into r798;\n    add r797 r798 into r799;\n    and r788 18446744073709551615u128 into r800;\n    add r799 r800 into r801;\n    add r801 r796 into r802;\n    and r802 18446744073709551615u128 into r803;\n    shr r802 64u8 into r804;\n    shr r788 64u8 into r805;\n    add r805 r804 into r806;\n    shl r806 64u8 into r807;\n    add r807 r803 into r808;\n    shl r795 64u8 into r809;\n    add r809 r789 into r810;\n    add.w r780 r810 into r811;\n    lt r811 r780 into r812;\n    ternary r812 1u128 0u128 into r813;\n    add.w r808 r813 into r814;\n    cast r814 r811 into r815 as U256__8JquwLopp8;\n    ternary r754 r815.hi r752.hi into r816;\n    ternary r754 r815.lo r752.lo into r817;\n    cast r816 r817 into r818 as U256__8JquwLopp8;\n    and r13 16384u32 into r819;\n    is.neq r819 0u32 into r820;\n    and r818.lo 18446744073709551615u128 into r821;\n    shr r818.lo 64u8 into r822;\n    mul r821 10428997489610666743u128 into r823;\n    mul r821 8131365268884726200u128 into r824;\n    mul r822 10428997489610666743u128 into r825;\n    mul r822 8131365268884726200u128 into r826;\n    and r823 18446744073709551615u128 into r827;\n    shr r823 64u8 into r828;\n    and r824 18446744073709551615u128 into r829;\n    add r828 r829 into r830;\n    and r825 18446744073709551615u128 into r831;\n    add r830 r831 into r832;\n    and r832 18446744073709551615u128 into r833;\n    shr r832 64u8 into r834;\n    shr r824 64u8 into r835;\n    shr r825 64u8 into r836;\n    add r835 r836 into r837;\n    and r826 18446744073709551615u128 into r838;\n    add r837 r838 into r839;\n    add r839 r834 into r840;\n    and r840 18446744073709551615u128 into r841;\n    shr r840 64u8 into r842;\n    shr r826 64u8 into r843;\n    add r843 r842 into r844;\n    shl r844 64u8 into r845;\n    add r845 r841 into r846;\n    shl r833 64u8 into r847;\n    add r847 r827 into r848;\n    and r818.hi 18446744073709551615u128 into r849;\n    shr r818.hi 64u8 into r850;\n    mul r849 10428997489610666743u128 into r851;\n    mul r849 8131365268884726200u128 into r852;\n    mul r850 10428997489610666743u128 into r853;\n    mul r850 8131365268884726200u128 into r854;\n    and r851 18446744073709551615u128 into r855;\n    shr r851 64u8 into r856;\n    and r852 18446744073709551615u128 into r857;\n    add r856 r857 into r858;\n    and r853 18446744073709551615u128 into r859;\n    add r858 r859 into r860;\n    and r860 18446744073709551615u128 into r861;\n    shr r860 64u8 into r862;\n    shr r852 64u8 into r863;\n    shr r853 64u8 into r864;\n    add r863 r864 into r865;\n    and r854 18446744073709551615u128 into r866;\n    add r865 r866 into r867;\n    add r867 r862 into r868;\n    and r868 18446744073709551615u128 into r869;\n    shr r868 64u8 into r870;\n    shr r854 64u8 into r871;\n    add r871 r870 into r872;\n    shl r872 64u8 into r873;\n    add r873 r869 into r874;\n    shl r861 64u8 into r875;\n    add r875 r855 into r876;\n    add.w r846 r876 into r877;\n    lt r877 r846 into r878;\n    ternary r878 1u128 0u128 into r879;\n    add.w r874 r879 into r880;\n    cast r880 r877 into r881 as U256__8JquwLopp8;\n    ternary r820 r881.hi r818.hi into r882;\n    ternary r820 r881.lo r818.lo into r883;\n    cast r882 r883 into r884 as U256__8JquwLopp8;\n    and r13 32768u32 into r885;\n    is.neq r885 0u32 into r886;\n    and r884.lo 18446744073709551615u128 into r887;\n    shr r884.lo 64u8 into r888;\n    mul r887 9305304367709015974u128 into r889;\n    mul r887 3584323654723342297u128 into r890;\n    mul r888 9305304367709015974u128 into r891;\n    mul r888 3584323654723342297u128 into r892;\n    and r889 18446744073709551615u128 into r893;\n    shr r889 64u8 into r894;\n    and r890 18446744073709551615u128 into r895;\n    add r894 r895 into r896;\n    and r891 18446744073709551615u128 into r897;\n    add r896 r897 into r898;\n    and r898 18446744073709551615u128 into r899;\n    shr r898 64u8 into r900;\n    shr r890 64u8 into r901;\n    shr r891 64u8 into r902;\n    add r901 r902 into r903;\n    and r892 18446744073709551615u128 into r904;\n    add r903 r904 into r905;\n    add r905 r900 into r906;\n    and r906 18446744073709551615u128 into r907;\n    shr r906 64u8 into r908;\n    shr r892 64u8 into r909;\n    add r909 r908 into r910;\n    shl r910 64u8 into r911;\n    add r911 r907 into r912;\n    shl r899 64u8 into r913;\n    add r913 r893 into r914;\n    and r884.hi 18446744073709551615u128 into r915;\n    shr r884.hi 64u8 into r916;\n    mul r915 9305304367709015974u128 into r917;\n    mul r915 3584323654723342297u128 into r918;\n    mul r916 9305304367709015974u128 into r919;\n    mul r916 3584323654723342297u128 into r920;\n    and r917 18446744073709551615u128 into r921;\n    shr r917 64u8 into r922;\n    and r918 18446744073709551615u128 into r923;\n    add r922 r923 into r924;\n    and r919 18446744073709551615u128 into r925;\n    add r924 r925 into r926;\n    and r926 18446744073709551615u128 into r927;\n    shr r926 64u8 into r928;\n    shr r918 64u8 into r929;\n    shr r919 64u8 into r930;\n    add r929 r930 into r931;\n    and r920 18446744073709551615u128 into r932;\n    add r931 r932 into r933;\n    add r933 r928 into r934;\n    and r934 18446744073709551615u128 into r935;\n    shr r934 64u8 into r936;\n    shr r920 64u8 into r937;\n    add r937 r936 into r938;\n    shl r938 64u8 into r939;\n    add r939 r935 into r940;\n    shl r927 64u8 into r941;\n    add r941 r921 into r942;\n    add.w r912 r942 into r943;\n    lt r943 r912 into r944;\n    ternary r944 1u128 0u128 into r945;\n    add.w r940 r945 into r946;\n    cast r946 r943 into r947 as U256__8JquwLopp8;\n    ternary r886 r947.hi r884.hi into r948;\n    ternary r886 r947.lo r884.lo into r949;\n    cast r948 r949 into r950 as U256__8JquwLopp8;\n    and r13 65536u32 into r951;\n    is.neq r951 0u32 into r952;\n    and r950.lo 18446744073709551615u128 into r953;\n    shr r950.lo 64u8 into r954;\n    mul r953 14301143598189091785u128 into r955;\n    mul r953 696457651847595233u128 into r956;\n    mul r954 14301143598189091785u128 into r957;\n    mul r954 696457651847595233u128 into r958;\n    and r955 18446744073709551615u128 into r959;\n    shr r955 64u8 into r960;\n    and r956 18446744073709551615u128 into r961;\n    add r960 r961 into r962;\n    and r957 18446744073709551615u128 into r963;\n    add r962 r963 into r964;\n    and r964 18446744073709551615u128 into r965;\n    shr r964 64u8 into r966;\n    shr r956 64u8 into r967;\n    shr r957 64u8 into r968;\n    add r967 r968 into r969;\n    and r958 18446744073709551615u128 into r970;\n    add r969 r970 into r971;\n    add r971 r966 into r972;\n    and r972 18446744073709551615u128 into r973;\n    shr r972 64u8 into r974;\n    shr r958 64u8 into r975;\n    add r975 r974 into r976;\n    shl r976 64u8 into r977;\n    add r977 r973 into r978;\n    shl r965 64u8 into r979;\n    add r979 r959 into r980;\n    and r950.hi 18446744073709551615u128 into r981;\n    shr r950.hi 64u8 into r982;\n    mul r981 14301143598189091785u128 into r983;\n    mul r981 696457651847595233u128 into r984;\n    mul r982 14301143598189091785u128 into r985;\n    mul r982 696457651847595233u128 into r986;\n    and r983 18446744073709551615u128 into r987;\n    shr r983 64u8 into r988;\n    and r984 18446744073709551615u128 into r989;\n    add r988 r989 into r990;\n    and r985 18446744073709551615u128 into r991;\n    add r990 r991 into r992;\n    and r992 18446744073709551615u128 into r993;\n    shr r992 64u8 into r994;\n    shr r984 64u8 into r995;\n    shr r985 64u8 into r996;\n    add r995 r996 into r997;\n    and r986 18446744073709551615u128 into r998;\n    add r997 r998 into r999;\n    add r999 r994 into r1000;\n    and r1000 18446744073709551615u128 into r1001;\n    shr r1000 64u8 into r1002;\n    shr r986 64u8 into r1003;\n    add r1003 r1002 into r1004;\n    shl r1004 64u8 into r1005;\n    add r1005 r1001 into r1006;\n    shl r993 64u8 into r1007;\n    add r1007 r987 into r1008;\n    add.w r978 r1008 into r1009;\n    lt r1009 r978 into r1010;\n    ternary r1010 1u128 0u128 into r1011;\n    add.w r1006 r1011 into r1012;\n    cast r1012 r1009 into r1013 as U256__8JquwLopp8;\n    ternary r952 r1013.hi r950.hi into r1014;\n    ternary r952 r1013.lo r950.lo into r1015;\n    cast r1014 r1015 into r1016 as U256__8JquwLopp8;\n    and r13 131072u32 into r1017;\n    is.neq r1017 0u32 into r1018;\n    and r1016.lo 18446744073709551615u128 into r1019;\n    shr r1016.lo 64u8 into r1020;\n    mul r1019 7393154844743099908u128 into r1021;\n    mul r1019 26294789957452057u128 into r1022;\n    mul r1020 7393154844743099908u128 into r1023;\n    mul r1020 26294789957452057u128 into r1024;\n    and r1021 18446744073709551615u128 into r1025;\n    shr r1021 64u8 into r1026;\n    and r1022 18446744073709551615u128 into r1027;\n    add r1026 r1027 into r1028;\n    and r1023 18446744073709551615u128 into r1029;\n    add r1028 r1029 into r1030;\n    and r1030 18446744073709551615u128 into r1031;\n    shr r1030 64u8 into r1032;\n    shr r1022 64u8 into r1033;\n    shr r1023 64u8 into r1034;\n    add r1033 r1034 into r1035;\n    and r1024 18446744073709551615u128 into r1036;\n    add r1035 r1036 into r1037;\n    add r1037 r1032 into r1038;\n    and r1038 18446744073709551615u128 into r1039;\n    shr r1038 64u8 into r1040;\n    shr r1024 64u8 into r1041;\n    add r1041 r1040 into r1042;\n    shl r1042 64u8 into r1043;\n    add r1043 r1039 into r1044;\n    shl r1031 64u8 into r1045;\n    add r1045 r1025 into r1046;\n    and r1016.hi 18446744073709551615u128 into r1047;\n    shr r1016.hi 64u8 into r1048;\n    mul r1047 7393154844743099908u128 into r1049;\n    mul r1047 26294789957452057u128 into r1050;\n    mul r1048 7393154844743099908u128 into r1051;\n    mul r1048 26294789957452057u128 into r1052;\n    and r1049 18446744073709551615u128 into r1053;\n    shr r1049 64u8 into r1054;\n    and r1050 18446744073709551615u128 into r1055;\n    add r1054 r1055 into r1056;\n    and r1051 18446744073709551615u128 into r1057;\n    add r1056 r1057 into r1058;\n    and r1058 18446744073709551615u128 into r1059;\n    shr r1058 64u8 into r1060;\n    shr r1050 64u8 into r1061;\n    shr r1051 64u8 into r1062;\n    add r1061 r1062 into r1063;\n    and r1052 18446744073709551615u128 into r1064;\n    add r1063 r1064 into r1065;\n    add r1065 r1060 into r1066;\n    and r1066 18446744073709551615u128 into r1067;\n    shr r1066 64u8 into r1068;\n    shr r1052 64u8 into r1069;\n    add r1069 r1068 into r1070;\n    shl r1070 64u8 into r1071;\n    add r1071 r1067 into r1072;\n    shl r1059 64u8 into r1073;\n    add r1073 r1053 into r1074;\n    add.w r1044 r1074 into r1075;\n    lt r1075 r1044 into r1076;\n    ternary r1076 1u128 0u128 into r1077;\n    add.w r1072 r1077 into r1078;\n    cast r1078 r1075 into r1079 as U256__8JquwLopp8;\n    ternary r1018 r1079.hi r1016.hi into r1080;\n    ternary r1018 r1079.lo r1016.lo into r1081;\n    cast r1080 r1081 into r1082 as U256__8JquwLopp8;\n    and r13 262144u32 into r1083;\n    is.neq r1083 0u32 into r1084;\n    and r1082.lo 18446744073709551615u128 into r1085;\n    shr r1082.lo 64u8 into r1086;\n    mul r1085 2209338891292245656u128 into r1087;\n    mul r1085 37481735321082u128 into r1088;\n    mul r1086 2209338891292245656u128 into r1089;\n    mul r1086 37481735321082u128 into r1090;\n    and r1087 18446744073709551615u128 into r1091;\n    shr r1087 64u8 into r1092;\n    and r1088 18446744073709551615u128 into r1093;\n    add r1092 r1093 into r1094;\n    and r1089 18446744073709551615u128 into r1095;\n    add r1094 r1095 into r1096;\n    and r1096 18446744073709551615u128 into r1097;\n    shr r1096 64u8 into r1098;\n    shr r1088 64u8 into r1099;\n    shr r1089 64u8 into r1100;\n    add r1099 r1100 into r1101;\n    and r1090 18446744073709551615u128 into r1102;\n    add r1101 r1102 into r1103;\n    add r1103 r1098 into r1104;\n    and r1104 18446744073709551615u128 into r1105;\n    shr r1104 64u8 into r1106;\n    shr r1090 64u8 into r1107;\n    add r1107 r1106 into r1108;\n    shl r1108 64u8 into r1109;\n    add r1109 r1105 into r1110;\n    shl r1097 64u8 into r1111;\n    add r1111 r1091 into r1112;\n    and r1082.hi 18446744073709551615u128 into r1113;\n    shr r1082.hi 64u8 into r1114;\n    mul r1113 2209338891292245656u128 into r1115;\n    mul r1113 37481735321082u128 into r1116;\n    mul r1114 2209338891292245656u128 into r1117;\n    mul r1114 37481735321082u128 into r1118;\n    and r1115 18446744073709551615u128 into r1119;\n    shr r1115 64u8 into r1120;\n    and r1116 18446744073709551615u128 into r1121;\n    add r1120 r1121 into r1122;\n    and r1117 18446744073709551615u128 into r1123;\n    add r1122 r1123 into r1124;\n    and r1124 18446744073709551615u128 into r1125;\n    shr r1124 64u8 into r1126;\n    shr r1116 64u8 into r1127;\n    shr r1117 64u8 into r1128;\n    add r1127 r1128 into r1129;\n    and r1118 18446744073709551615u128 into r1130;\n    add r1129 r1130 into r1131;\n    add r1131 r1126 into r1132;\n    and r1132 18446744073709551615u128 into r1133;\n    shr r1132 64u8 into r1134;\n    shr r1118 64u8 into r1135;\n    add r1135 r1134 into r1136;\n    shl r1136 64u8 into r1137;\n    add r1137 r1133 into r1138;\n    shl r1125 64u8 into r1139;\n    add r1139 r1119 into r1140;\n    add.w r1110 r1140 into r1141;\n    lt r1141 r1110 into r1142;\n    ternary r1142 1u128 0u128 into r1143;\n    add.w r1138 r1143 into r1144;\n    cast r1144 r1141 into r1145 as U256__8JquwLopp8;\n    ternary r1084 r1145.hi r1082.hi into r1146;\n    ternary r1084 r1145.lo r1082.lo into r1147;\n    cast r1146 r1147 into r1148 as U256__8JquwLopp8;\n    gt r5 0i32 into r1149;\n    is.eq r1148.lo 0u128 into r1150;\n    ternary r1150 1u128 r1148.lo into r1151;\n    div 340282366920938463463374607431768211455u128 r1151 into r1152;\n    rem 340282366920938463463374607431768211455u128 r1151 into r1153;\n    lt r1153 r1151 into r1154;\n    assert.eq r1154 true;\n    gte r1153 170141183460469231731687303715884105728u128 into r1155;\n    add.w r1153 r1153 into r1156;\n    add r1156 1u128 into r1157;\n    gte r1157 r1151 into r1158;\n    or r1155 r1158 into r1159;\n    sub.w r1157 r1151 into r1160;\n    ternary r1159 r1160 r1157 into r1161;\n    ternary r1159 170141183460469231731687303715884105728u128 0u128 into r1162;\n    gte r1161 170141183460469231731687303715884105728u128 into r1163;\n    add.w r1161 r1161 into r1164;\n    add r1164 1u128 into r1165;\n    gte r1165 r1151 into r1166;\n    or r1163 r1166 into r1167;\n    sub.w r1165 r1151 into r1168;\n    ternary r1167 r1168 r1165 into r1169;\n    add r1162 85070591730234615865843651857942052864u128 into r1170;\n    ternary r1167 r1170 r1162 into r1171;\n    gte r1169 170141183460469231731687303715884105728u128 into r1172;\n    add.w r1169 r1169 into r1173;\n    add r1173 1u128 into r1174;\n    gte r1174 r1151 into r1175;\n    or r1172 r1175 into r1176;\n    sub.w r1174 r1151 into r1177;\n    ternary r1176 r1177 r1174 into r1178;\n    add r1171 42535295865117307932921825928971026432u128 into r1179;\n    ternary r1176 r1179 r1171 into r1180;\n    gte r1178 170141183460469231731687303715884105728u128 into r1181;\n    add.w r1178 r1178 into r1182;\n    add r1182 1u128 into r1183;\n    gte r1183 r1151 into r1184;\n    or r1181 r1184 into r1185;\n    sub.w r1183 r1151 into r1186;\n    ternary r1185 r1186 r1183 into r1187;\n    add r1180 21267647932558653966460912964485513216u128 into r1188;\n    ternary r1185 r1188 r1180 into r1189;\n    gte r1187 170141183460469231731687303715884105728u128 into r1190;\n    add.w r1187 r1187 into r1191;\n    add r1191 1u128 into r1192;\n    gte r1192 r1151 into r1193;\n    or r1190 r1193 into r1194;\n    sub.w r1192 r1151 into r1195;\n    ternary r1194 r1195 r1192 into r1196;\n    add r1189 10633823966279326983230456482242756608u128 into r1197;\n    ternary r1194 r1197 r1189 into r1198;\n    gte r1196 170141183460469231731687303715884105728u128 into r1199;\n    add.w r1196 r1196 into r1200;\n    add r1200 1u128 into r1201;\n    gte r1201 r1151 into r1202;\n    or r1199 r1202 into r1203;\n    sub.w r1201 r1151 into r1204;\n    ternary r1203 r1204 r1201 into r1205;\n    add r1198 5316911983139663491615228241121378304u128 into r1206;\n    ternary r1203 r1206 r1198 into r1207;\n    gte r1205 170141183460469231731687303715884105728u128 into r1208;\n    add.w r1205 r1205 into r1209;\n    add r1209 1u128 into r1210;\n    gte r1210 r1151 into r1211;\n    or r1208 r1211 into r1212;\n    sub.w r1210 r1151 into r1213;\n    ternary r1212 r1213 r1210 into r1214;\n    add r1207 2658455991569831745807614120560689152u128 into r1215;\n    ternary r1212 r1215 r1207 into r1216;\n    gte r1214 170141183460469231731687303715884105728u128 into r1217;\n    add.w r1214 r1214 into r1218;\n    add r1218 1u128 into r1219;\n    gte r1219 r1151 into r1220;\n    or r1217 r1220 into r1221;\n    sub.w r1219 r1151 into r1222;\n    ternary r1221 r1222 r1219 into r1223;\n    add r1216 1329227995784915872903807060280344576u128 into r1224;\n    ternary r1221 r1224 r1216 into r1225;\n    gte r1223 170141183460469231731687303715884105728u128 into r1226;\n    add.w r1223 r1223 into r1227;\n    add r1227 1u128 into r1228;\n    gte r1228 r1151 into r1229;\n    or r1226 r1229 into r1230;\n    sub.w r1228 r1151 into r1231;\n    ternary r1230 r1231 r1228 into r1232;\n    add r1225 664613997892457936451903530140172288u128 into r1233;\n    ternary r1230 r1233 r1225 into r1234;\n    gte r1232 170141183460469231731687303715884105728u128 into r1235;\n    add.w r1232 r1232 into r1236;\n    add r1236 1u128 into r1237;\n    gte r1237 r1151 into r1238;\n    or r1235 r1238 into r1239;\n    sub.w r1237 r1151 into r1240;\n    ternary r1239 r1240 r1237 into r1241;\n    add r1234 332306998946228968225951765070086144u128 into r1242;\n    ternary r1239 r1242 r1234 into r1243;\n    gte r1241 170141183460469231731687303715884105728u128 into r1244;\n    add.w r1241 r1241 into r1245;\n    add r1245 1u128 into r1246;\n    gte r1246 r1151 into r1247;\n    or r1244 r1247 into r1248;\n    sub.w r1246 r1151 into r1249;\n    ternary r1248 r1249 r1246 into r1250;\n    add r1243 166153499473114484112975882535043072u128 into r1251;\n    ternary r1248 r1251 r1243 into r1252;\n    gte r1250 170141183460469231731687303715884105728u128 into r1253;\n    add.w r1250 r1250 into r1254;\n    add r1254 1u128 into r1255;\n    gte r1255 r1151 into r1256;\n    or r1253 r1256 into r1257;\n    sub.w r1255 r1151 into r1258;\n    ternary r1257 r1258 r1255 into r1259;\n    add r1252 83076749736557242056487941267521536u128 into r1260;\n    ternary r1257 r1260 r1252 into r1261;\n    gte r1259 170141183460469231731687303715884105728u128 into r1262;\n    add.w r1259 r1259 into r1263;\n    add r1263 1u128 into r1264;\n    gte r1264 r1151 into r1265;\n    or r1262 r1265 into r1266;\n    sub.w r1264 r1151 into r1267;\n    ternary r1266 r1267 r1264 into r1268;\n    add r1261 41538374868278621028243970633760768u128 into r1269;\n    ternary r1266 r1269 r1261 into r1270;\n    gte r1268 170141183460469231731687303715884105728u128 into r1271;\n    add.w r1268 r1268 into r1272;\n    add r1272 1u128 into r1273;\n    gte r1273 r1151 into r1274;\n    or r1271 r1274 into r1275;\n    sub.w r1273 r1151 into r1276;\n    ternary r1275 r1276 r1273 into r1277;\n    add r1270 20769187434139310514121985316880384u128 into r1278;\n    ternary r1275 r1278 r1270 into r1279;\n    gte r1277 170141183460469231731687303715884105728u128 into r1280;\n    add.w r1277 r1277 into r1281;\n    add r1281 1u128 into r1282;\n    gte r1282 r1151 into r1283;\n    or r1280 r1283 into r1284;\n    sub.w r1282 r1151 into r1285;\n    ternary r1284 r1285 r1282 into r1286;\n    add r1279 10384593717069655257060992658440192u128 into r1287;\n    ternary r1284 r1287 r1279 into r1288;\n    gte r1286 170141183460469231731687303715884105728u128 into r1289;\n    add.w r1286 r1286 into r1290;\n    add r1290 1u128 into r1291;\n    gte r1291 r1151 into r1292;\n    or r1289 r1292 into r1293;\n    sub.w r1291 r1151 into r1294;\n    ternary r1293 r1294 r1291 into r1295;\n    add r1288 5192296858534827628530496329220096u128 into r1296;\n    ternary r1293 r1296 r1288 into r1297;\n    gte r1295 170141183460469231731687303715884105728u128 into r1298;\n    add.w r1295 r1295 into r1299;\n    add r1299 1u128 into r1300;\n    gte r1300 r1151 into r1301;\n    or r1298 r1301 into r1302;\n    sub.w r1300 r1151 into r1303;\n    ternary r1302 r1303 r1300 into r1304;\n    add r1297 2596148429267413814265248164610048u128 into r1305;\n    ternary r1302 r1305 r1297 into r1306;\n    gte r1304 170141183460469231731687303715884105728u128 into r1307;\n    add.w r1304 r1304 into r1308;\n    add r1308 1u128 into r1309;\n    gte r1309 r1151 into r1310;\n    or r1307 r1310 into r1311;\n    sub.w r1309 r1151 into r1312;\n    ternary r1311 r1312 r1309 into r1313;\n    add r1306 1298074214633706907132624082305024u128 into r1314;\n    ternary r1311 r1314 r1306 into r1315;\n    gte r1313 170141183460469231731687303715884105728u128 into r1316;\n    add.w r1313 r1313 into r1317;\n    add r1317 1u128 into r1318;\n    gte r1318 r1151 into r1319;\n    or r1316 r1319 into r1320;\n    sub.w r1318 r1151 into r1321;\n    ternary r1320 r1321 r1318 into r1322;\n    add r1315 649037107316853453566312041152512u128 into r1323;\n    ternary r1320 r1323 r1315 into r1324;\n    gte r1322 170141183460469231731687303715884105728u128 into r1325;\n    add.w r1322 r1322 into r1326;\n    add r1326 1u128 into r1327;\n    gte r1327 r1151 into r1328;\n    or r1325 r1328 into r1329;\n    sub.w r1327 r1151 into r1330;\n    ternary r1329 r1330 r1327 into r1331;\n    add r1324 324518553658426726783156020576256u128 into r1332;\n    ternary r1329 r1332 r1324 into r1333;\n    gte r1331 170141183460469231731687303715884105728u128 into r1334;\n    add.w r1331 r1331 into r1335;\n    add r1335 1u128 into r1336;\n    gte r1336 r1151 into r1337;\n    or r1334 r1337 into r1338;\n    sub.w r1336 r1151 into r1339;\n    ternary r1338 r1339 r1336 into r1340;\n    add r1333 162259276829213363391578010288128u128 into r1341;\n    ternary r1338 r1341 r1333 into r1342;\n    gte r1340 170141183460469231731687303715884105728u128 into r1343;\n    add.w r1340 r1340 into r1344;\n    add r1344 1u128 into r1345;\n    gte r1345 r1151 into r1346;\n    or r1343 r1346 into r1347;\n    sub.w r1345 r1151 into r1348;\n    ternary r1347 r1348 r1345 into r1349;\n    add r1342 81129638414606681695789005144064u128 into r1350;\n    ternary r1347 r1350 r1342 into r1351;\n    gte r1349 170141183460469231731687303715884105728u128 into r1352;\n    add.w r1349 r1349 into r1353;\n    add r1353 1u128 into r1354;\n    gte r1354 r1151 into r1355;\n    or r1352 r1355 into r1356;\n    sub.w r1354 r1151 into r1357;\n    ternary r1356 r1357 r1354 into r1358;\n    add r1351 40564819207303340847894502572032u128 into r1359;\n    ternary r1356 r1359 r1351 into r1360;\n    gte r1358 170141183460469231731687303715884105728u128 into r1361;\n    add.w r1358 r1358 into r1362;\n    add r1362 1u128 into r1363;\n    gte r1363 r1151 into r1364;\n    or r1361 r1364 into r1365;\n    sub.w r1363 r1151 into r1366;\n    ternary r1365 r1366 r1363 into r1367;\n    add r1360 20282409603651670423947251286016u128 into r1368;\n    ternary r1365 r1368 r1360 into r1369;\n    gte r1367 170141183460469231731687303715884105728u128 into r1370;\n    add.w r1367 r1367 into r1371;\n    add r1371 1u128 into r1372;\n    gte r1372 r1151 into r1373;\n    or r1370 r1373 into r1374;\n    sub.w r1372 r1151 into r1375;\n    ternary r1374 r1375 r1372 into r1376;\n    add r1369 10141204801825835211973625643008u128 into r1377;\n    ternary r1374 r1377 r1369 into r1378;\n    gte r1376 170141183460469231731687303715884105728u128 into r1379;\n    add.w r1376 r1376 into r1380;\n    add r1380 1u128 into r1381;\n    gte r1381 r1151 into r1382;\n    or r1379 r1382 into r1383;\n    sub.w r1381 r1151 into r1384;\n    ternary r1383 r1384 r1381 into r1385;\n    add r1378 5070602400912917605986812821504u128 into r1386;\n    ternary r1383 r1386 r1378 into r1387;\n    gte r1385 170141183460469231731687303715884105728u128 into r1388;\n    add.w r1385 r1385 into r1389;\n    add r1389 1u128 into r1390;\n    gte r1390 r1151 into r1391;\n    or r1388 r1391 into r1392;\n    sub.w r1390 r1151 into r1393;\n    ternary r1392 r1393 r1390 into r1394;\n    add r1387 2535301200456458802993406410752u128 into r1395;\n    ternary r1392 r1395 r1387 into r1396;\n    gte r1394 170141183460469231731687303715884105728u128 into r1397;\n    add.w r1394 r1394 into r1398;\n    add r1398 1u128 into r1399;\n    gte r1399 r1151 into r1400;\n    or r1397 r1400 into r1401;\n    sub.w r1399 r1151 into r1402;\n    ternary r1401 r1402 r1399 into r1403;\n    add r1396 1267650600228229401496703205376u128 into r1404;\n    ternary r1401 r1404 r1396 into r1405;\n    gte r1403 170141183460469231731687303715884105728u128 into r1406;\n    add.w r1403 r1403 into r1407;\n    add r1407 1u128 into r1408;\n    gte r1408 r1151 into r1409;\n    or r1406 r1409 into r1410;\n    sub.w r1408 r1151 into r1411;\n    ternary r1410 r1411 r1408 into r1412;\n    add r1405 633825300114114700748351602688u128 into r1413;\n    ternary r1410 r1413 r1405 into r1414;\n    gte r1412 170141183460469231731687303715884105728u128 into r1415;\n    add.w r1412 r1412 into r1416;\n    add r1416 1u128 into r1417;\n    gte r1417 r1151 into r1418;\n    or r1415 r1418 into r1419;\n    sub.w r1417 r1151 into r1420;\n    ternary r1419 r1420 r1417 into r1421;\n    add r1414 316912650057057350374175801344u128 into r1422;\n    ternary r1419 r1422 r1414 into r1423;\n    gte r1421 170141183460469231731687303715884105728u128 into r1424;\n    add.w r1421 r1421 into r1425;\n    add r1425 1u128 into r1426;\n    gte r1426 r1151 into r1427;\n    or r1424 r1427 into r1428;\n    sub.w r1426 r1151 into r1429;\n    ternary r1428 r1429 r1426 into r1430;\n    add r1423 158456325028528675187087900672u128 into r1431;\n    ternary r1428 r1431 r1423 into r1432;\n    gte r1430 170141183460469231731687303715884105728u128 into r1433;\n    add.w r1430 r1430 into r1434;\n    add r1434 1u128 into r1435;\n    gte r1435 r1151 into r1436;\n    or r1433 r1436 into r1437;\n    sub.w r1435 r1151 into r1438;\n    ternary r1437 r1438 r1435 into r1439;\n    add r1432 79228162514264337593543950336u128 into r1440;\n    ternary r1437 r1440 r1432 into r1441;\n    gte r1439 170141183460469231731687303715884105728u128 into r1442;\n    add.w r1439 r1439 into r1443;\n    add r1443 1u128 into r1444;\n    gte r1444 r1151 into r1445;\n    or r1442 r1445 into r1446;\n    sub.w r1444 r1151 into r1447;\n    ternary r1446 r1447 r1444 into r1448;\n    add r1441 39614081257132168796771975168u128 into r1449;\n    ternary r1446 r1449 r1441 into r1450;\n    gte r1448 170141183460469231731687303715884105728u128 into r1451;\n    add.w r1448 r1448 into r1452;\n    add r1452 1u128 into r1453;\n    gte r1453 r1151 into r1454;\n    or r1451 r1454 into r1455;\n    sub.w r1453 r1151 into r1456;\n    ternary r1455 r1456 r1453 into r1457;\n    add r1450 19807040628566084398385987584u128 into r1458;\n    ternary r1455 r1458 r1450 into r1459;\n    gte r1457 170141183460469231731687303715884105728u128 into r1460;\n    add.w r1457 r1457 into r1461;\n    add r1461 1u128 into r1462;\n    gte r1462 r1151 into r1463;\n    or r1460 r1463 into r1464;\n    sub.w r1462 r1151 into r1465;\n    ternary r1464 r1465 r1462 into r1466;\n    add r1459 9903520314283042199192993792u128 into r1467;\n    ternary r1464 r1467 r1459 into r1468;\n    gte r1466 170141183460469231731687303715884105728u128 into r1469;\n    add.w r1466 r1466 into r1470;\n    add r1470 1u128 into r1471;\n    gte r1471 r1151 into r1472;\n    or r1469 r1472 into r1473;\n    sub.w r1471 r1151 into r1474;\n    ternary r1473 r1474 r1471 into r1475;\n    add r1468 4951760157141521099596496896u128 into r1476;\n    ternary r1473 r1476 r1468 into r1477;\n    gte r1475 170141183460469231731687303715884105728u128 into r1478;\n    add.w r1475 r1475 into r1479;\n    add r1479 1u128 into r1480;\n    gte r1480 r1151 into r1481;\n    or r1478 r1481 into r1482;\n    sub.w r1480 r1151 into r1483;\n    ternary r1482 r1483 r1480 into r1484;\n    add r1477 2475880078570760549798248448u128 into r1485;\n    ternary r1482 r1485 r1477 into r1486;\n    gte r1484 170141183460469231731687303715884105728u128 into r1487;\n    add.w r1484 r1484 into r1488;\n    add r1488 1u128 into r1489;\n    gte r1489 r1151 into r1490;\n    or r1487 r1490 into r1491;\n    sub.w r1489 r1151 into r1492;\n    ternary r1491 r1492 r1489 into r1493;\n    add r1486 1237940039285380274899124224u128 into r1494;\n    ternary r1491 r1494 r1486 into r1495;\n    gte r1493 170141183460469231731687303715884105728u128 into r1496;\n    add.w r1493 r1493 into r1497;\n    add r1497 1u128 into r1498;\n    gte r1498 r1151 into r1499;\n    or r1496 r1499 into r1500;\n    sub.w r1498 r1151 into r1501;\n    ternary r1500 r1501 r1498 into r1502;\n    add r1495 618970019642690137449562112u128 into r1503;\n    ternary r1500 r1503 r1495 into r1504;\n    gte r1502 170141183460469231731687303715884105728u128 into r1505;\n    add.w r1502 r1502 into r1506;\n    add r1506 1u128 into r1507;\n    gte r1507 r1151 into r1508;\n    or r1505 r1508 into r1509;\n    sub.w r1507 r1151 into r1510;\n    ternary r1509 r1510 r1507 into r1511;\n    add r1504 309485009821345068724781056u128 into r1512;\n    ternary r1509 r1512 r1504 into r1513;\n    gte r1511 170141183460469231731687303715884105728u128 into r1514;\n    add.w r1511 r1511 into r1515;\n    add r1515 1u128 into r1516;\n    gte r1516 r1151 into r1517;\n    or r1514 r1517 into r1518;\n    sub.w r1516 r1151 into r1519;\n    ternary r1518 r1519 r1516 into r1520;\n    add r1513 154742504910672534362390528u128 into r1521;\n    ternary r1518 r1521 r1513 into r1522;\n    gte r1520 170141183460469231731687303715884105728u128 into r1523;\n    add.w r1520 r1520 into r1524;\n    add r1524 1u128 into r1525;\n    gte r1525 r1151 into r1526;\n    or r1523 r1526 into r1527;\n    sub.w r1525 r1151 into r1528;\n    ternary r1527 r1528 r1525 into r1529;\n    add r1522 77371252455336267181195264u128 into r1530;\n    ternary r1527 r1530 r1522 into r1531;\n    gte r1529 170141183460469231731687303715884105728u128 into r1532;\n    add.w r1529 r1529 into r1533;\n    add r1533 1u128 into r1534;\n    gte r1534 r1151 into r1535;\n    or r1532 r1535 into r1536;\n    sub.w r1534 r1151 into r1537;\n    ternary r1536 r1537 r1534 into r1538;\n    add r1531 38685626227668133590597632u128 into r1539;\n    ternary r1536 r1539 r1531 into r1540;\n    gte r1538 170141183460469231731687303715884105728u128 into r1541;\n    add.w r1538 r1538 into r1542;\n    add r1542 1u128 into r1543;\n    gte r1543 r1151 into r1544;\n    or r1541 r1544 into r1545;\n    sub.w r1543 r1151 into r1546;\n    ternary r1545 r1546 r1543 into r1547;\n    add r1540 19342813113834066795298816u128 into r1548;\n    ternary r1545 r1548 r1540 into r1549;\n    gte r1547 170141183460469231731687303715884105728u128 into r1550;\n    add.w r1547 r1547 into r1551;\n    add r1551 1u128 into r1552;\n    gte r1552 r1151 into r1553;\n    or r1550 r1553 into r1554;\n    sub.w r1552 r1151 into r1555;\n    ternary r1554 r1555 r1552 into r1556;\n    add r1549 9671406556917033397649408u128 into r1557;\n    ternary r1554 r1557 r1549 into r1558;\n    gte r1556 170141183460469231731687303715884105728u128 into r1559;\n    add.w r1556 r1556 into r1560;\n    add r1560 1u128 into r1561;\n    gte r1561 r1151 into r1562;\n    or r1559 r1562 into r1563;\n    sub.w r1561 r1151 into r1564;\n    ternary r1563 r1564 r1561 into r1565;\n    add r1558 4835703278458516698824704u128 into r1566;\n    ternary r1563 r1566 r1558 into r1567;\n    gte r1565 170141183460469231731687303715884105728u128 into r1568;\n    add.w r1565 r1565 into r1569;\n    add r1569 1u128 into r1570;\n    gte r1570 r1151 into r1571;\n    or r1568 r1571 into r1572;\n    sub.w r1570 r1151 into r1573;\n    ternary r1572 r1573 r1570 into r1574;\n    add r1567 2417851639229258349412352u128 into r1575;\n    ternary r1572 r1575 r1567 into r1576;\n    gte r1574 170141183460469231731687303715884105728u128 into r1577;\n    add.w r1574 r1574 into r1578;\n    add r1578 1u128 into r1579;\n    gte r1579 r1151 into r1580;\n    or r1577 r1580 into r1581;\n    sub.w r1579 r1151 into r1582;\n    ternary r1581 r1582 r1579 into r1583;\n    add r1576 1208925819614629174706176u128 into r1584;\n    ternary r1581 r1584 r1576 into r1585;\n    gte r1583 170141183460469231731687303715884105728u128 into r1586;\n    add.w r1583 r1583 into r1587;\n    add r1587 1u128 into r1588;\n    gte r1588 r1151 into r1589;\n    or r1586 r1589 into r1590;\n    sub.w r1588 r1151 into r1591;\n    ternary r1590 r1591 r1588 into r1592;\n    add r1585 604462909807314587353088u128 into r1593;\n    ternary r1590 r1593 r1585 into r1594;\n    gte r1592 170141183460469231731687303715884105728u128 into r1595;\n    add.w r1592 r1592 into r1596;\n    add r1596 1u128 into r1597;\n    gte r1597 r1151 into r1598;\n    or r1595 r1598 into r1599;\n    sub.w r1597 r1151 into r1600;\n    ternary r1599 r1600 r1597 into r1601;\n    add r1594 302231454903657293676544u128 into r1602;\n    ternary r1599 r1602 r1594 into r1603;\n    gte r1601 170141183460469231731687303715884105728u128 into r1604;\n    add.w r1601 r1601 into r1605;\n    add r1605 1u128 into r1606;\n    gte r1606 r1151 into r1607;\n    or r1604 r1607 into r1608;\n    sub.w r1606 r1151 into r1609;\n    ternary r1608 r1609 r1606 into r1610;\n    add r1603 151115727451828646838272u128 into r1611;\n    ternary r1608 r1611 r1603 into r1612;\n    gte r1610 170141183460469231731687303715884105728u128 into r1613;\n    add.w r1610 r1610 into r1614;\n    add r1614 1u128 into r1615;\n    gte r1615 r1151 into r1616;\n    or r1613 r1616 into r1617;\n    sub.w r1615 r1151 into r1618;\n    ternary r1617 r1618 r1615 into r1619;\n    add r1612 75557863725914323419136u128 into r1620;\n    ternary r1617 r1620 r1612 into r1621;\n    gte r1619 170141183460469231731687303715884105728u128 into r1622;\n    add.w r1619 r1619 into r1623;\n    add r1623 1u128 into r1624;\n    gte r1624 r1151 into r1625;\n    or r1622 r1625 into r1626;\n    sub.w r1624 r1151 into r1627;\n    ternary r1626 r1627 r1624 into r1628;\n    add r1621 37778931862957161709568u128 into r1629;\n    ternary r1626 r1629 r1621 into r1630;\n    gte r1628 170141183460469231731687303715884105728u128 into r1631;\n    add.w r1628 r1628 into r1632;\n    add r1632 1u128 into r1633;\n    gte r1633 r1151 into r1634;\n    or r1631 r1634 into r1635;\n    sub.w r1633 r1151 into r1636;\n    ternary r1635 r1636 r1633 into r1637;\n    add r1630 18889465931478580854784u128 into r1638;\n    ternary r1635 r1638 r1630 into r1639;\n    gte r1637 170141183460469231731687303715884105728u128 into r1640;\n    add.w r1637 r1637 into r1641;\n    add r1641 1u128 into r1642;\n    gte r1642 r1151 into r1643;\n    or r1640 r1643 into r1644;\n    sub.w r1642 r1151 into r1645;\n    ternary r1644 r1645 r1642 into r1646;\n    add r1639 9444732965739290427392u128 into r1647;\n    ternary r1644 r1647 r1639 into r1648;\n    gte r1646 170141183460469231731687303715884105728u128 into r1649;\n    add.w r1646 r1646 into r1650;\n    add r1650 1u128 into r1651;\n    gte r1651 r1151 into r1652;\n    or r1649 r1652 into r1653;\n    sub.w r1651 r1151 into r1654;\n    ternary r1653 r1654 r1651 into r1655;\n    add r1648 4722366482869645213696u128 into r1656;\n    ternary r1653 r1656 r1648 into r1657;\n    gte r1655 170141183460469231731687303715884105728u128 into r1658;\n    add.w r1655 r1655 into r1659;\n    add r1659 1u128 into r1660;\n    gte r1660 r1151 into r1661;\n    or r1658 r1661 into r1662;\n    sub.w r1660 r1151 into r1663;\n    ternary r1662 r1663 r1660 into r1664;\n    add r1657 2361183241434822606848u128 into r1665;\n    ternary r1662 r1665 r1657 into r1666;\n    gte r1664 170141183460469231731687303715884105728u128 into r1667;\n    add.w r1664 r1664 into r1668;\n    add r1668 1u128 into r1669;\n    gte r1669 r1151 into r1670;\n    or r1667 r1670 into r1671;\n    sub.w r1669 r1151 into r1672;\n    ternary r1671 r1672 r1669 into r1673;\n    add r1666 1180591620717411303424u128 into r1674;\n    ternary r1671 r1674 r1666 into r1675;\n    gte r1673 170141183460469231731687303715884105728u128 into r1676;\n    add.w r1673 r1673 into r1677;\n    add r1677 1u128 into r1678;\n    gte r1678 r1151 into r1679;\n    or r1676 r1679 into r1680;\n    sub.w r1678 r1151 into r1681;\n    ternary r1680 r1681 r1678 into r1682;\n    add r1675 590295810358705651712u128 into r1683;\n    ternary r1680 r1683 r1675 into r1684;\n    gte r1682 170141183460469231731687303715884105728u128 into r1685;\n    add.w r1682 r1682 into r1686;\n    add r1686 1u128 into r1687;\n    gte r1687 r1151 into r1688;\n    or r1685 r1688 into r1689;\n    sub.w r1687 r1151 into r1690;\n    ternary r1689 r1690 r1687 into r1691;\n    add r1684 295147905179352825856u128 into r1692;\n    ternary r1689 r1692 r1684 into r1693;\n    gte r1691 170141183460469231731687303715884105728u128 into r1694;\n    add.w r1691 r1691 into r1695;\n    add r1695 1u128 into r1696;\n    gte r1696 r1151 into r1697;\n    or r1694 r1697 into r1698;\n    sub.w r1696 r1151 into r1699;\n    ternary r1698 r1699 r1696 into r1700;\n    add r1693 147573952589676412928u128 into r1701;\n    ternary r1698 r1701 r1693 into r1702;\n    gte r1700 170141183460469231731687303715884105728u128 into r1703;\n    add.w r1700 r1700 into r1704;\n    add r1704 1u128 into r1705;\n    gte r1705 r1151 into r1706;\n    or r1703 r1706 into r1707;\n    sub.w r1705 r1151 into r1708;\n    ternary r1707 r1708 r1705 into r1709;\n    add r1702 73786976294838206464u128 into r1710;\n    ternary r1707 r1710 r1702 into r1711;\n    gte r1709 170141183460469231731687303715884105728u128 into r1712;\n    add.w r1709 r1709 into r1713;\n    add r1713 1u128 into r1714;\n    gte r1714 r1151 into r1715;\n    or r1712 r1715 into r1716;\n    sub.w r1714 r1151 into r1717;\n    ternary r1716 r1717 r1714 into r1718;\n    add r1711 36893488147419103232u128 into r1719;\n    ternary r1716 r1719 r1711 into r1720;\n    gte r1718 170141183460469231731687303715884105728u128 into r1721;\n    add.w r1718 r1718 into r1722;\n    add r1722 1u128 into r1723;\n    gte r1723 r1151 into r1724;\n    or r1721 r1724 into r1725;\n    sub.w r1723 r1151 into r1726;\n    ternary r1725 r1726 r1723 into r1727;\n    add r1720 18446744073709551616u128 into r1728;\n    ternary r1725 r1728 r1720 into r1729;\n    gte r1727 170141183460469231731687303715884105728u128 into r1730;\n    add.w r1727 r1727 into r1731;\n    add r1731 1u128 into r1732;\n    gte r1732 r1151 into r1733;\n    or r1730 r1733 into r1734;\n    sub.w r1732 r1151 into r1735;\n    ternary r1734 r1735 r1732 into r1736;\n    add r1729 9223372036854775808u128 into r1737;\n    ternary r1734 r1737 r1729 into r1738;\n    gte r1736 170141183460469231731687303715884105728u128 into r1739;\n    add.w r1736 r1736 into r1740;\n    add r1740 1u128 into r1741;\n    gte r1741 r1151 into r1742;\n    or r1739 r1742 into r1743;\n    sub.w r1741 r1151 into r1744;\n    ternary r1743 r1744 r1741 into r1745;\n    add r1738 4611686018427387904u128 into r1746;\n    ternary r1743 r1746 r1738 into r1747;\n    gte r1745 170141183460469231731687303715884105728u128 into r1748;\n    add.w r1745 r1745 into r1749;\n    add r1749 1u128 into r1750;\n    gte r1750 r1151 into r1751;\n    or r1748 r1751 into r1752;\n    sub.w r1750 r1151 into r1753;\n    ternary r1752 r1753 r1750 into r1754;\n    add r1747 2305843009213693952u128 into r1755;\n    ternary r1752 r1755 r1747 into r1756;\n    gte r1754 170141183460469231731687303715884105728u128 into r1757;\n    add.w r1754 r1754 into r1758;\n    add r1758 1u128 into r1759;\n    gte r1759 r1151 into r1760;\n    or r1757 r1760 into r1761;\n    sub.w r1759 r1151 into r1762;\n    ternary r1761 r1762 r1759 into r1763;\n    add r1756 1152921504606846976u128 into r1764;\n    ternary r1761 r1764 r1756 into r1765;\n    gte r1763 170141183460469231731687303715884105728u128 into r1766;\n    add.w r1763 r1763 into r1767;\n    add r1767 1u128 into r1768;\n    gte r1768 r1151 into r1769;\n    or r1766 r1769 into r1770;\n    sub.w r1768 r1151 into r1771;\n    ternary r1770 r1771 r1768 into r1772;\n    add r1765 576460752303423488u128 into r1773;\n    ternary r1770 r1773 r1765 into r1774;\n    gte r1772 170141183460469231731687303715884105728u128 into r1775;\n    add.w r1772 r1772 into r1776;\n    add r1776 1u128 into r1777;\n    gte r1777 r1151 into r1778;\n    or r1775 r1778 into r1779;\n    sub.w r1777 r1151 into r1780;\n    ternary r1779 r1780 r1777 into r1781;\n    add r1774 288230376151711744u128 into r1782;\n    ternary r1779 r1782 r1774 into r1783;\n    gte r1781 170141183460469231731687303715884105728u128 into r1784;\n    add.w r1781 r1781 into r1785;\n    add r1785 1u128 into r1786;\n    gte r1786 r1151 into r1787;\n    or r1784 r1787 into r1788;\n    sub.w r1786 r1151 into r1789;\n    ternary r1788 r1789 r1786 into r1790;\n    add r1783 144115188075855872u128 into r1791;\n    ternary r1788 r1791 r1783 into r1792;\n    gte r1790 170141183460469231731687303715884105728u128 into r1793;\n    add.w r1790 r1790 into r1794;\n    add r1794 1u128 into r1795;\n    gte r1795 r1151 into r1796;\n    or r1793 r1796 into r1797;\n    sub.w r1795 r1151 into r1798;\n    ternary r1797 r1798 r1795 into r1799;\n    add r1792 72057594037927936u128 into r1800;\n    ternary r1797 r1800 r1792 into r1801;\n    gte r1799 170141183460469231731687303715884105728u128 into r1802;\n    add.w r1799 r1799 into r1803;\n    add r1803 1u128 into r1804;\n    gte r1804 r1151 into r1805;\n    or r1802 r1805 into r1806;\n    sub.w r1804 r1151 into r1807;\n    ternary r1806 r1807 r1804 into r1808;\n    add r1801 36028797018963968u128 into r1809;\n    ternary r1806 r1809 r1801 into r1810;\n    gte r1808 170141183460469231731687303715884105728u128 into r1811;\n    add.w r1808 r1808 into r1812;\n    add r1812 1u128 into r1813;\n    gte r1813 r1151 into r1814;\n    or r1811 r1814 into r1815;\n    sub.w r1813 r1151 into r1816;\n    ternary r1815 r1816 r1813 into r1817;\n    add r1810 18014398509481984u128 into r1818;\n    ternary r1815 r1818 r1810 into r1819;\n    gte r1817 170141183460469231731687303715884105728u128 into r1820;\n    add.w r1817 r1817 into r1821;\n    add r1821 1u128 into r1822;\n    gte r1822 r1151 into r1823;\n    or r1820 r1823 into r1824;\n    sub.w r1822 r1151 into r1825;\n    ternary r1824 r1825 r1822 into r1826;\n    add r1819 9007199254740992u128 into r1827;\n    ternary r1824 r1827 r1819 into r1828;\n    gte r1826 170141183460469231731687303715884105728u128 into r1829;\n    add.w r1826 r1826 into r1830;\n    add r1830 1u128 into r1831;\n    gte r1831 r1151 into r1832;\n    or r1829 r1832 into r1833;\n    sub.w r1831 r1151 into r1834;\n    ternary r1833 r1834 r1831 into r1835;\n    add r1828 4503599627370496u128 into r1836;\n    ternary r1833 r1836 r1828 into r1837;\n    gte r1835 170141183460469231731687303715884105728u128 into r1838;\n    add.w r1835 r1835 into r1839;\n    add r1839 1u128 into r1840;\n    gte r1840 r1151 into r1841;\n    or r1838 r1841 into r1842;\n    sub.w r1840 r1151 into r1843;\n    ternary r1842 r1843 r1840 into r1844;\n    add r1837 2251799813685248u128 into r1845;\n    ternary r1842 r1845 r1837 into r1846;\n    gte r1844 170141183460469231731687303715884105728u128 into r1847;\n    add.w r1844 r1844 into r1848;\n    add r1848 1u128 into r1849;\n    gte r1849 r1151 into r1850;\n    or r1847 r1850 into r1851;\n    sub.w r1849 r1151 into r1852;\n    ternary r1851 r1852 r1849 into r1853;\n    add r1846 1125899906842624u128 into r1854;\n    ternary r1851 r1854 r1846 into r1855;\n    gte r1853 170141183460469231731687303715884105728u128 into r1856;\n    add.w r1853 r1853 into r1857;\n    add r1857 1u128 into r1858;\n    gte r1858 r1151 into r1859;\n    or r1856 r1859 into r1860;\n    sub.w r1858 r1151 into r1861;\n    ternary r1860 r1861 r1858 into r1862;\n    add r1855 562949953421312u128 into r1863;\n    ternary r1860 r1863 r1855 into r1864;\n    gte r1862 170141183460469231731687303715884105728u128 into r1865;\n    add.w r1862 r1862 into r1866;\n    add r1866 1u128 into r1867;\n    gte r1867 r1151 into r1868;\n    or r1865 r1868 into r1869;\n    sub.w r1867 r1151 into r1870;\n    ternary r1869 r1870 r1867 into r1871;\n    add r1864 281474976710656u128 into r1872;\n    ternary r1869 r1872 r1864 into r1873;\n    gte r1871 170141183460469231731687303715884105728u128 into r1874;\n    add.w r1871 r1871 into r1875;\n    add r1875 1u128 into r1876;\n    gte r1876 r1151 into r1877;\n    or r1874 r1877 into r1878;\n    sub.w r1876 r1151 into r1879;\n    ternary r1878 r1879 r1876 into r1880;\n    add r1873 140737488355328u128 into r1881;\n    ternary r1878 r1881 r1873 into r1882;\n    gte r1880 170141183460469231731687303715884105728u128 into r1883;\n    add.w r1880 r1880 into r1884;\n    add r1884 1u128 into r1885;\n    gte r1885 r1151 into r1886;\n    or r1883 r1886 into r1887;\n    sub.w r1885 r1151 into r1888;\n    ternary r1887 r1888 r1885 into r1889;\n    add r1882 70368744177664u128 into r1890;\n    ternary r1887 r1890 r1882 into r1891;\n    gte r1889 170141183460469231731687303715884105728u128 into r1892;\n    add.w r1889 r1889 into r1893;\n    add r1893 1u128 into r1894;\n    gte r1894 r1151 into r1895;\n    or r1892 r1895 into r1896;\n    sub.w r1894 r1151 into r1897;\n    ternary r1896 r1897 r1894 into r1898;\n    add r1891 35184372088832u128 into r1899;\n    ternary r1896 r1899 r1891 into r1900;\n    gte r1898 170141183460469231731687303715884105728u128 into r1901;\n    add.w r1898 r1898 into r1902;\n    add r1902 1u128 into r1903;\n    gte r1903 r1151 into r1904;\n    or r1901 r1904 into r1905;\n    sub.w r1903 r1151 into r1906;\n    ternary r1905 r1906 r1903 into r1907;\n    add r1900 17592186044416u128 into r1908;\n    ternary r1905 r1908 r1900 into r1909;\n    gte r1907 170141183460469231731687303715884105728u128 into r1910;\n    add.w r1907 r1907 into r1911;\n    add r1911 1u128 into r1912;\n    gte r1912 r1151 into r1913;\n    or r1910 r1913 into r1914;\n    sub.w r1912 r1151 into r1915;\n    ternary r1914 r1915 r1912 into r1916;\n    add r1909 8796093022208u128 into r1917;\n    ternary r1914 r1917 r1909 into r1918;\n    gte r1916 170141183460469231731687303715884105728u128 into r1919;\n    add.w r1916 r1916 into r1920;\n    add r1920 1u128 into r1921;\n    gte r1921 r1151 into r1922;\n    or r1919 r1922 into r1923;\n    sub.w r1921 r1151 into r1924;\n    ternary r1923 r1924 r1921 into r1925;\n    add r1918 4398046511104u128 into r1926;\n    ternary r1923 r1926 r1918 into r1927;\n    gte r1925 170141183460469231731687303715884105728u128 into r1928;\n    add.w r1925 r1925 into r1929;\n    add r1929 1u128 into r1930;\n    gte r1930 r1151 into r1931;\n    or r1928 r1931 into r1932;\n    sub.w r1930 r1151 into r1933;\n    ternary r1932 r1933 r1930 into r1934;\n    add r1927 2199023255552u128 into r1935;\n    ternary r1932 r1935 r1927 into r1936;\n    gte r1934 170141183460469231731687303715884105728u128 into r1937;\n    add.w r1934 r1934 into r1938;\n    add r1938 1u128 into r1939;\n    gte r1939 r1151 into r1940;\n    or r1937 r1940 into r1941;\n    sub.w r1939 r1151 into r1942;\n    ternary r1941 r1942 r1939 into r1943;\n    add r1936 1099511627776u128 into r1944;\n    ternary r1941 r1944 r1936 into r1945;\n    gte r1943 170141183460469231731687303715884105728u128 into r1946;\n    add.w r1943 r1943 into r1947;\n    add r1947 1u128 into r1948;\n    gte r1948 r1151 into r1949;\n    or r1946 r1949 into r1950;\n    sub.w r1948 r1151 into r1951;\n    ternary r1950 r1951 r1948 into r1952;\n    add r1945 549755813888u128 into r1953;\n    ternary r1950 r1953 r1945 into r1954;\n    gte r1952 170141183460469231731687303715884105728u128 into r1955;\n    add.w r1952 r1952 into r1956;\n    add r1956 1u128 into r1957;\n    gte r1957 r1151 into r1958;\n    or r1955 r1958 into r1959;\n    sub.w r1957 r1151 into r1960;\n    ternary r1959 r1960 r1957 into r1961;\n    add r1954 274877906944u128 into r1962;\n    ternary r1959 r1962 r1954 into r1963;\n    gte r1961 170141183460469231731687303715884105728u128 into r1964;\n    add.w r1961 r1961 into r1965;\n    add r1965 1u128 into r1966;\n    gte r1966 r1151 into r1967;\n    or r1964 r1967 into r1968;\n    sub.w r1966 r1151 into r1969;\n    ternary r1968 r1969 r1966 into r1970;\n    add r1963 137438953472u128 into r1971;\n    ternary r1968 r1971 r1963 into r1972;\n    gte r1970 170141183460469231731687303715884105728u128 into r1973;\n    add.w r1970 r1970 into r1974;\n    add r1974 1u128 into r1975;\n    gte r1975 r1151 into r1976;\n    or r1973 r1976 into r1977;\n    sub.w r1975 r1151 into r1978;\n    ternary r1977 r1978 r1975 into r1979;\n    add r1972 68719476736u128 into r1980;\n    ternary r1977 r1980 r1972 into r1981;\n    gte r1979 170141183460469231731687303715884105728u128 into r1982;\n    add.w r1979 r1979 into r1983;\n    add r1983 1u128 into r1984;\n    gte r1984 r1151 into r1985;\n    or r1982 r1985 into r1986;\n    sub.w r1984 r1151 into r1987;\n    ternary r1986 r1987 r1984 into r1988;\n    add r1981 34359738368u128 into r1989;\n    ternary r1986 r1989 r1981 into r1990;\n    gte r1988 170141183460469231731687303715884105728u128 into r1991;\n    add.w r1988 r1988 into r1992;\n    add r1992 1u128 into r1993;\n    gte r1993 r1151 into r1994;\n    or r1991 r1994 into r1995;\n    sub.w r1993 r1151 into r1996;\n    ternary r1995 r1996 r1993 into r1997;\n    add r1990 17179869184u128 into r1998;\n    ternary r1995 r1998 r1990 into r1999;\n    gte r1997 170141183460469231731687303715884105728u128 into r2000;\n    add.w r1997 r1997 into r2001;\n    add r2001 1u128 into r2002;\n    gte r2002 r1151 into r2003;\n    or r2000 r2003 into r2004;\n    sub.w r2002 r1151 into r2005;\n    ternary r2004 r2005 r2002 into r2006;\n    add r1999 8589934592u128 into r2007;\n    ternary r2004 r2007 r1999 into r2008;\n    gte r2006 170141183460469231731687303715884105728u128 into r2009;\n    add.w r2006 r2006 into r2010;\n    add r2010 1u128 into r2011;\n    gte r2011 r1151 into r2012;\n    or r2009 r2012 into r2013;\n    sub.w r2011 r1151 into r2014;\n    ternary r2013 r2014 r2011 into r2015;\n    add r2008 4294967296u128 into r2016;\n    ternary r2013 r2016 r2008 into r2017;\n    gte r2015 170141183460469231731687303715884105728u128 into r2018;\n    add.w r2015 r2015 into r2019;\n    add r2019 1u128 into r2020;\n    gte r2020 r1151 into r2021;\n    or r2018 r2021 into r2022;\n    sub.w r2020 r1151 into r2023;\n    ternary r2022 r2023 r2020 into r2024;\n    add r2017 2147483648u128 into r2025;\n    ternary r2022 r2025 r2017 into r2026;\n    gte r2024 170141183460469231731687303715884105728u128 into r2027;\n    add.w r2024 r2024 into r2028;\n    add r2028 1u128 into r2029;\n    gte r2029 r1151 into r2030;\n    or r2027 r2030 into r2031;\n    sub.w r2029 r1151 into r2032;\n    ternary r2031 r2032 r2029 into r2033;\n    add r2026 1073741824u128 into r2034;\n    ternary r2031 r2034 r2026 into r2035;\n    gte r2033 170141183460469231731687303715884105728u128 into r2036;\n    add.w r2033 r2033 into r2037;\n    add r2037 1u128 into r2038;\n    gte r2038 r1151 into r2039;\n    or r2036 r2039 into r2040;\n    sub.w r2038 r1151 into r2041;\n    ternary r2040 r2041 r2038 into r2042;\n    add r2035 536870912u128 into r2043;\n    ternary r2040 r2043 r2035 into r2044;\n    gte r2042 170141183460469231731687303715884105728u128 into r2045;\n    add.w r2042 r2042 into r2046;\n    add r2046 1u128 into r2047;\n    gte r2047 r1151 into r2048;\n    or r2045 r2048 into r2049;\n    sub.w r2047 r1151 into r2050;\n    ternary r2049 r2050 r2047 into r2051;\n    add r2044 268435456u128 into r2052;\n    ternary r2049 r2052 r2044 into r2053;\n    gte r2051 170141183460469231731687303715884105728u128 into r2054;\n    add.w r2051 r2051 into r2055;\n    add r2055 1u128 into r2056;\n    gte r2056 r1151 into r2057;\n    or r2054 r2057 into r2058;\n    sub.w r2056 r1151 into r2059;\n    ternary r2058 r2059 r2056 into r2060;\n    add r2053 134217728u128 into r2061;\n    ternary r2058 r2061 r2053 into r2062;\n    gte r2060 170141183460469231731687303715884105728u128 into r2063;\n    add.w r2060 r2060 into r2064;\n    add r2064 1u128 into r2065;\n    gte r2065 r1151 into r2066;\n    or r2063 r2066 into r2067;\n    sub.w r2065 r1151 into r2068;\n    ternary r2067 r2068 r2065 into r2069;\n    add r2062 67108864u128 into r2070;\n    ternary r2067 r2070 r2062 into r2071;\n    gte r2069 170141183460469231731687303715884105728u128 into r2072;\n    add.w r2069 r2069 into r2073;\n    add r2073 1u128 into r2074;\n    gte r2074 r1151 into r2075;\n    or r2072 r2075 into r2076;\n    sub.w r2074 r1151 into r2077;\n    ternary r2076 r2077 r2074 into r2078;\n    add r2071 33554432u128 into r2079;\n    ternary r2076 r2079 r2071 into r2080;\n    gte r2078 170141183460469231731687303715884105728u128 into r2081;\n    add.w r2078 r2078 into r2082;\n    add r2082 1u128 into r2083;\n    gte r2083 r1151 into r2084;\n    or r2081 r2084 into r2085;\n    sub.w r2083 r1151 into r2086;\n    ternary r2085 r2086 r2083 into r2087;\n    add r2080 16777216u128 into r2088;\n    ternary r2085 r2088 r2080 into r2089;\n    gte r2087 170141183460469231731687303715884105728u128 into r2090;\n    add.w r2087 r2087 into r2091;\n    add r2091 1u128 into r2092;\n    gte r2092 r1151 into r2093;\n    or r2090 r2093 into r2094;\n    sub.w r2092 r1151 into r2095;\n    ternary r2094 r2095 r2092 into r2096;\n    add r2089 8388608u128 into r2097;\n    ternary r2094 r2097 r2089 into r2098;\n    gte r2096 170141183460469231731687303715884105728u128 into r2099;\n    add.w r2096 r2096 into r2100;\n    add r2100 1u128 into r2101;\n    gte r2101 r1151 into r2102;\n    or r2099 r2102 into r2103;\n    sub.w r2101 r1151 into r2104;\n    ternary r2103 r2104 r2101 into r2105;\n    add r2098 4194304u128 into r2106;\n    ternary r2103 r2106 r2098 into r2107;\n    gte r2105 170141183460469231731687303715884105728u128 into r2108;\n    add.w r2105 r2105 into r2109;\n    add r2109 1u128 into r2110;\n    gte r2110 r1151 into r2111;\n    or r2108 r2111 into r2112;\n    sub.w r2110 r1151 into r2113;\n    ternary r2112 r2113 r2110 into r2114;\n    add r2107 2097152u128 into r2115;\n    ternary r2112 r2115 r2107 into r2116;\n    gte r2114 170141183460469231731687303715884105728u128 into r2117;\n    add.w r2114 r2114 into r2118;\n    add r2118 1u128 into r2119;\n    gte r2119 r1151 into r2120;\n    or r2117 r2120 into r2121;\n    sub.w r2119 r1151 into r2122;\n    ternary r2121 r2122 r2119 into r2123;\n    add r2116 1048576u128 into r2124;\n    ternary r2121 r2124 r2116 into r2125;\n    gte r2123 170141183460469231731687303715884105728u128 into r2126;\n    add.w r2123 r2123 into r2127;\n    add r2127 1u128 into r2128;\n    gte r2128 r1151 into r2129;\n    or r2126 r2129 into r2130;\n    sub.w r2128 r1151 into r2131;\n    ternary r2130 r2131 r2128 into r2132;\n    add r2125 524288u128 into r2133;\n    ternary r2130 r2133 r2125 into r2134;\n    gte r2132 170141183460469231731687303715884105728u128 into r2135;\n    add.w r2132 r2132 into r2136;\n    add r2136 1u128 into r2137;\n    gte r2137 r1151 into r2138;\n    or r2135 r2138 into r2139;\n    sub.w r2137 r1151 into r2140;\n    ternary r2139 r2140 r2137 into r2141;\n    add r2134 262144u128 into r2142;\n    ternary r2139 r2142 r2134 into r2143;\n    gte r2141 170141183460469231731687303715884105728u128 into r2144;\n    add.w r2141 r2141 into r2145;\n    add r2145 1u128 into r2146;\n    gte r2146 r1151 into r2147;\n    or r2144 r2147 into r2148;\n    sub.w r2146 r1151 into r2149;\n    ternary r2148 r2149 r2146 into r2150;\n    add r2143 131072u128 into r2151;\n    ternary r2148 r2151 r2143 into r2152;\n    gte r2150 170141183460469231731687303715884105728u128 into r2153;\n    add.w r2150 r2150 into r2154;\n    add r2154 1u128 into r2155;\n    gte r2155 r1151 into r2156;\n    or r2153 r2156 into r2157;\n    sub.w r2155 r1151 into r2158;\n    ternary r2157 r2158 r2155 into r2159;\n    add r2152 65536u128 into r2160;\n    ternary r2157 r2160 r2152 into r2161;\n    gte r2159 170141183460469231731687303715884105728u128 into r2162;\n    add.w r2159 r2159 into r2163;\n    add r2163 1u128 into r2164;\n    gte r2164 r1151 into r2165;\n    or r2162 r2165 into r2166;\n    sub.w r2164 r1151 into r2167;\n    ternary r2166 r2167 r2164 into r2168;\n    add r2161 32768u128 into r2169;\n    ternary r2166 r2169 r2161 into r2170;\n    gte r2168 170141183460469231731687303715884105728u128 into r2171;\n    add.w r2168 r2168 into r2172;\n    add r2172 1u128 into r2173;\n    gte r2173 r1151 into r2174;\n    or r2171 r2174 into r2175;\n    sub.w r2173 r1151 into r2176;\n    ternary r2175 r2176 r2173 into r2177;\n    add r2170 16384u128 into r2178;\n    ternary r2175 r2178 r2170 into r2179;\n    gte r2177 170141183460469231731687303715884105728u128 into r2180;\n    add.w r2177 r2177 into r2181;\n    add r2181 1u128 into r2182;\n    gte r2182 r1151 into r2183;\n    or r2180 r2183 into r2184;\n    sub.w r2182 r1151 into r2185;\n    ternary r2184 r2185 r2182 into r2186;\n    add r2179 8192u128 into r2187;\n    ternary r2184 r2187 r2179 into r2188;\n    gte r2186 170141183460469231731687303715884105728u128 into r2189;\n    add.w r2186 r2186 into r2190;\n    add r2190 1u128 into r2191;\n    gte r2191 r1151 into r2192;\n    or r2189 r2192 into r2193;\n    sub.w r2191 r1151 into r2194;\n    ternary r2193 r2194 r2191 into r2195;\n    add r2188 4096u128 into r2196;\n    ternary r2193 r2196 r2188 into r2197;\n    gte r2195 170141183460469231731687303715884105728u128 into r2198;\n    add.w r2195 r2195 into r2199;\n    add r2199 1u128 into r2200;\n    gte r2200 r1151 into r2201;\n    or r2198 r2201 into r2202;\n    sub.w r2200 r1151 into r2203;\n    ternary r2202 r2203 r2200 into r2204;\n    add r2197 2048u128 into r2205;\n    ternary r2202 r2205 r2197 into r2206;\n    gte r2204 170141183460469231731687303715884105728u128 into r2207;\n    add.w r2204 r2204 into r2208;\n    add r2208 1u128 into r2209;\n    gte r2209 r1151 into r2210;\n    or r2207 r2210 into r2211;\n    sub.w r2209 r1151 into r2212;\n    ternary r2211 r2212 r2209 into r2213;\n    add r2206 1024u128 into r2214;\n    ternary r2211 r2214 r2206 into r2215;\n    gte r2213 170141183460469231731687303715884105728u128 into r2216;\n    add.w r2213 r2213 into r2217;\n    add r2217 1u128 into r2218;\n    gte r2218 r1151 into r2219;\n    or r2216 r2219 into r2220;\n    sub.w r2218 r1151 into r2221;\n    ternary r2220 r2221 r2218 into r2222;\n    add r2215 512u128 into r2223;\n    ternary r2220 r2223 r2215 into r2224;\n    gte r2222 170141183460469231731687303715884105728u128 into r2225;\n    add.w r2222 r2222 into r2226;\n    add r2226 1u128 into r2227;\n    gte r2227 r1151 into r2228;\n    or r2225 r2228 into r2229;\n    sub.w r2227 r1151 into r2230;\n    ternary r2229 r2230 r2227 into r2231;\n    add r2224 256u128 into r2232;\n    ternary r2229 r2232 r2224 into r2233;\n    gte r2231 170141183460469231731687303715884105728u128 into r2234;\n    add.w r2231 r2231 into r2235;\n    add r2235 1u128 into r2236;\n    gte r2236 r1151 into r2237;\n    or r2234 r2237 into r2238;\n    sub.w r2236 r1151 into r2239;\n    ternary r2238 r2239 r2236 into r2240;\n    add r2233 128u128 into r2241;\n    ternary r2238 r2241 r2233 into r2242;\n    gte r2240 170141183460469231731687303715884105728u128 into r2243;\n    add.w r2240 r2240 into r2244;\n    add r2244 1u128 into r2245;\n    gte r2245 r1151 into r2246;\n    or r2243 r2246 into r2247;\n    sub.w r2245 r1151 into r2248;\n    ternary r2247 r2248 r2245 into r2249;\n    add r2242 64u128 into r2250;\n    ternary r2247 r2250 r2242 into r2251;\n    gte r2249 170141183460469231731687303715884105728u128 into r2252;\n    add.w r2249 r2249 into r2253;\n    add r2253 1u128 into r2254;\n    gte r2254 r1151 into r2255;\n    or r2252 r2255 into r2256;\n    sub.w r2254 r1151 into r2257;\n    ternary r2256 r2257 r2254 into r2258;\n    add r2251 32u128 into r2259;\n    ternary r2256 r2259 r2251 into r2260;\n    gte r2258 170141183460469231731687303715884105728u128 into r2261;\n    add.w r2258 r2258 into r2262;\n    add r2262 1u128 into r2263;\n    gte r2263 r1151 into r2264;\n    or r2261 r2264 into r2265;\n    sub.w r2263 r1151 into r2266;\n    ternary r2265 r2266 r2263 into r2267;\n    add r2260 16u128 into r2268;\n    ternary r2265 r2268 r2260 into r2269;\n    gte r2267 170141183460469231731687303715884105728u128 into r2270;\n    add.w r2267 r2267 into r2271;\n    add r2271 1u128 into r2272;\n    gte r2272 r1151 into r2273;\n    or r2270 r2273 into r2274;\n    sub.w r2272 r1151 into r2275;\n    ternary r2274 r2275 r2272 into r2276;\n    add r2269 8u128 into r2277;\n    ternary r2274 r2277 r2269 into r2278;\n    gte r2276 170141183460469231731687303715884105728u128 into r2279;\n    add.w r2276 r2276 into r2280;\n    add r2280 1u128 into r2281;\n    gte r2281 r1151 into r2282;\n    or r2279 r2282 into r2283;\n    sub.w r2281 r1151 into r2284;\n    ternary r2283 r2284 r2281 into r2285;\n    add r2278 4u128 into r2286;\n    ternary r2283 r2286 r2278 into r2287;\n    gte r2285 170141183460469231731687303715884105728u128 into r2288;\n    add.w r2285 r2285 into r2289;\n    add r2289 1u128 into r2290;\n    gte r2290 r1151 into r2291;\n    or r2288 r2291 into r2292;\n    sub.w r2290 r1151 into r2293;\n    ternary r2292 r2293 r2290 into r2294;\n    add r2287 2u128 into r2295;\n    ternary r2292 r2295 r2287 into r2296;\n    gte r2294 170141183460469231731687303715884105728u128 into r2297;\n    add.w r2294 r2294 into r2298;\n    add r2298 1u128 into r2299;\n    gte r2299 r1151 into r2300;\n    or r2297 r2300 into r2301;\n    add r2296 1u128 into r2302;\n    ternary r2301 r2302 r2296 into r2303;\n    cast r1152 r2303 into r2304 as U256__8JquwLopp8;\n    ternary r1149 r2304.hi r1148.hi into r2305;\n    ternary r1149 r2304.lo r1148.lo into r2306;\n    cast r2305 r2306 into r2307 as U256__8JquwLopp8;\n    lt r2.hi r2307.hi into r2308;\n    gt r2.hi r2307.hi into r2309;\n    lt r2.lo r2307.lo into r2310;\n    ternary r2309 false r2310 into r2311;\n    ternary r2308 true r2311 into r2312;\n    not r2312 into r2313;\n    ternary r2313 r5 r3 into r2314;\n    gte r2314 -524287i32 into r2315;\n    lte r2314 524287i32 into r2316;\n    and r2315 r2316 into r2317;\n    assert.eq r2317 true;\n    lt r2314 0i32 into r2318;\n    sub 0i32 r2314 into r2319;\n    ternary r2318 r2319 r2314 into r2320;\n    gte r2320 0i32 into r2321;\n    assert.eq r2321 true;\n    cast r2320 into r2322 as u32;\n    and r2322 3u32 into r2323;\n    is.eq r2323 0u32 into r2324;\n    is.eq r2323 1u32 into r2325;\n    is.eq r2323 2u32 into r2326;\n    ternary r2326 0u128 0u128 into r2327;\n    ternary r2326 340248342086729790484326174814286782778u128 340231330945450418515964920540021147199u128 into r2328;\n    cast r2327 r2328 into r2329 as U256__8JquwLopp8;\n    ternary r2325 0u128 r2329.hi into r2330;\n    ternary r2325 340265354078544963557816517032075149313u128 r2329.lo into r2331;\n    cast r2330 r2331 into r2332 as U256__8JquwLopp8;\n    ternary r2324 1u128 r2332.hi into r2333;\n    ternary r2324 0u128 r2332.lo into r2334;\n    cast r2333 r2334 into r2335 as U256__8JquwLopp8;\n    and r2322 4u32 into r2336;\n    is.neq r2336 0u32 into r2337;\n    and r2335.lo 18446744073709551615u128 into r2338;\n    shr r2335.lo 64u8 into r2339;\n    mul r2338 17226890335427755468u128 into r2340;\n    mul r2338 18443055278223354162u128 into r2341;\n    mul r2339 17226890335427755468u128 into r2342;\n    mul r2339 18443055278223354162u128 into r2343;\n    and r2340 18446744073709551615u128 into r2344;\n    shr r2340 64u8 into r2345;\n    and r2341 18446744073709551615u128 into r2346;\n    add r2345 r2346 into r2347;\n    and r2342 18446744073709551615u128 into r2348;\n    add r2347 r2348 into r2349;\n    and r2349 18446744073709551615u128 into r2350;\n    shr r2349 64u8 into r2351;\n    shr r2341 64u8 into r2352;\n    shr r2342 64u8 into r2353;\n    add r2352 r2353 into r2354;\n    and r2343 18446744073709551615u128 into r2355;\n    add r2354 r2355 into r2356;\n    add r2356 r2351 into r2357;\n    and r2357 18446744073709551615u128 into r2358;\n    shr r2357 64u8 into r2359;\n    shr r2343 64u8 into r2360;\n    add r2360 r2359 into r2361;\n    shl r2361 64u8 into r2362;\n    add r2362 r2358 into r2363;\n    shl r2350 64u8 into r2364;\n    add r2364 r2344 into r2365;\n    and r2335.hi 18446744073709551615u128 into r2366;\n    shr r2335.hi 64u8 into r2367;\n    mul r2366 17226890335427755468u128 into r2368;\n    mul r2366 18443055278223354162u128 into r2369;\n    mul r2367 17226890335427755468u128 into r2370;\n    mul r2367 18443055278223354162u128 into r2371;\n    and r2368 18446744073709551615u128 into r2372;\n    shr r2368 64u8 into r2373;\n    and r2369 18446744073709551615u128 into r2374;\n    add r2373 r2374 into r2375;\n    and r2370 18446744073709551615u128 into r2376;\n    add r2375 r2376 into r2377;\n    and r2377 18446744073709551615u128 into r2378;\n    shr r2377 64u8 into r2379;\n    shr r2369 64u8 into r2380;\n    shr r2370 64u8 into r2381;\n    add r2380 r2381 into r2382;\n    and r2371 18446744073709551615u128 into r2383;\n    add r2382 r2383 into r2384;\n    add r2384 r2379 into r2385;\n    and r2385 18446744073709551615u128 into r2386;\n    shr r2385 64u8 into r2387;\n    shr r2371 64u8 into r2388;\n    add r2388 r2387 into r2389;\n    shl r2389 64u8 into r2390;\n    add r2390 r2386 into r2391;\n    shl r2378 64u8 into r2392;\n    add r2392 r2372 into r2393;\n    add.w r2363 r2393 into r2394;\n    lt r2394 r2363 into r2395;\n    ternary r2395 1u128 0u128 into r2396;\n    add.w r2391 r2396 into r2397;\n    cast r2397 r2394 into r2398 as U256__8JquwLopp8;\n    ternary r2337 r2398.hi r2335.hi into r2399;\n    ternary r2337 r2398.lo r2335.lo into r2400;\n    cast r2399 r2400 into r2401 as U256__8JquwLopp8;\n    and r2322 8u32 into r2402;\n    is.neq r2402 0u32 into r2403;\n    and r2401.lo 18446744073709551615u128 into r2404;\n    shr r2401.lo 64u8 into r2405;\n    mul r2404 2032852871939366096u128 into r2406;\n    mul r2404 18439367220385604838u128 into r2407;\n    mul r2405 2032852871939366096u128 into r2408;\n    mul r2405 18439367220385604838u128 into r2409;\n    and r2406 18446744073709551615u128 into r2410;\n    shr r2406 64u8 into r2411;\n    and r2407 18446744073709551615u128 into r2412;\n    add r2411 r2412 into r2413;\n    and r2408 18446744073709551615u128 into r2414;\n    add r2413 r2414 into r2415;\n    and r2415 18446744073709551615u128 into r2416;\n    shr r2415 64u8 into r2417;\n    shr r2407 64u8 into r2418;\n    shr r2408 64u8 into r2419;\n    add r2418 r2419 into r2420;\n    and r2409 18446744073709551615u128 into r2421;\n    add r2420 r2421 into r2422;\n    add r2422 r2417 into r2423;\n    and r2423 18446744073709551615u128 into r2424;\n    shr r2423 64u8 into r2425;\n    shr r2409 64u8 into r2426;\n    add r2426 r2425 into r2427;\n    shl r2427 64u8 into r2428;\n    add r2428 r2424 into r2429;\n    shl r2416 64u8 into r2430;\n    add r2430 r2410 into r2431;\n    and r2401.hi 18446744073709551615u128 into r2432;\n    shr r2401.hi 64u8 into r2433;\n    mul r2432 2032852871939366096u128 into r2434;\n    mul r2432 18439367220385604838u128 into r2435;\n    mul r2433 2032852871939366096u128 into r2436;\n    mul r2433 18439367220385604838u128 into r2437;\n    and r2434 18446744073709551615u128 into r2438;\n    shr r2434 64u8 into r2439;\n    and r2435 18446744073709551615u128 into r2440;\n    add r2439 r2440 into r2441;\n    and r2436 18446744073709551615u128 into r2442;\n    add r2441 r2442 into r2443;\n    and r2443 18446744073709551615u128 into r2444;\n    shr r2443 64u8 into r2445;\n    shr r2435 64u8 into r2446;\n    shr r2436 64u8 into r2447;\n    add r2446 r2447 into r2448;\n    and r2437 18446744073709551615u128 into r2449;\n    add r2448 r2449 into r2450;\n    add r2450 r2445 into r2451;\n    and r2451 18446744073709551615u128 into r2452;\n    shr r2451 64u8 into r2453;\n    shr r2437 64u8 into r2454;\n    add r2454 r2453 into r2455;\n    shl r2455 64u8 into r2456;\n    add r2456 r2452 into r2457;\n    shl r2444 64u8 into r2458;\n    add r2458 r2438 into r2459;\n    add.w r2429 r2459 into r2460;\n    lt r2460 r2429 into r2461;\n    ternary r2461 1u128 0u128 into r2462;\n    add.w r2457 r2462 into r2463;\n    cast r2463 r2460 into r2464 as U256__8JquwLopp8;\n    ternary r2403 r2464.hi r2401.hi into r2465;\n    ternary r2403 r2464.lo r2401.lo into r2466;\n    cast r2465 r2466 into r2467 as U256__8JquwLopp8;\n    and r2322 16u32 into r2468;\n    is.neq r2468 0u32 into r2469;\n    and r2467.lo 18446744073709551615u128 into r2470;\n    shr r2467.lo 64u8 into r2471;\n    mul r2470 14545316742740207172u128 into r2472;\n    mul r2470 18431993317065449817u128 into r2473;\n    mul r2471 14545316742740207172u128 into r2474;\n    mul r2471 18431993317065449817u128 into r2475;\n    and r2472 18446744073709551615u128 into r2476;\n    shr r2472 64u8 into r2477;\n    and r2473 18446744073709551615u128 into r2478;\n    add r2477 r2478 into r2479;\n    and r2474 18446744073709551615u128 into r2480;\n    add r2479 r2480 into r2481;\n    and r2481 18446744073709551615u128 into r2482;\n    shr r2481 64u8 into r2483;\n    shr r2473 64u8 into r2484;\n    shr r2474 64u8 into r2485;\n    add r2484 r2485 into r2486;\n    and r2475 18446744073709551615u128 into r2487;\n    add r2486 r2487 into r2488;\n    add r2488 r2483 into r2489;\n    and r2489 18446744073709551615u128 into r2490;\n    shr r2489 64u8 into r2491;\n    shr r2475 64u8 into r2492;\n    add r2492 r2491 into r2493;\n    shl r2493 64u8 into r2494;\n    add r2494 r2490 into r2495;\n    shl r2482 64u8 into r2496;\n    add r2496 r2476 into r2497;\n    and r2467.hi 18446744073709551615u128 into r2498;\n    shr r2467.hi 64u8 into r2499;\n    mul r2498 14545316742740207172u128 into r2500;\n    mul r2498 18431993317065449817u128 into r2501;\n    mul r2499 14545316742740207172u128 into r2502;\n    mul r2499 18431993317065449817u128 into r2503;\n    and r2500 18446744073709551615u128 into r2504;\n    shr r2500 64u8 into r2505;\n    and r2501 18446744073709551615u128 into r2506;\n    add r2505 r2506 into r2507;\n    and r2502 18446744073709551615u128 into r2508;\n    add r2507 r2508 into r2509;\n    and r2509 18446744073709551615u128 into r2510;\n    shr r2509 64u8 into r2511;\n    shr r2501 64u8 into r2512;\n    shr r2502 64u8 into r2513;\n    add r2512 r2513 into r2514;\n    and r2503 18446744073709551615u128 into r2515;\n    add r2514 r2515 into r2516;\n    add r2516 r2511 into r2517;\n    and r2517 18446744073709551615u128 into r2518;\n    shr r2517 64u8 into r2519;\n    shr r2503 64u8 into r2520;\n    add r2520 r2519 into r2521;\n    shl r2521 64u8 into r2522;\n    add r2522 r2518 into r2523;\n    shl r2510 64u8 into r2524;\n    add r2524 r2504 into r2525;\n    add.w r2495 r2525 into r2526;\n    lt r2526 r2495 into r2527;\n    ternary r2527 1u128 0u128 into r2528;\n    add.w r2523 r2528 into r2529;\n    cast r2529 r2526 into r2530 as U256__8JquwLopp8;\n    ternary r2469 r2530.hi r2467.hi into r2531;\n    ternary r2469 r2530.lo r2467.lo into r2532;\n    cast r2531 r2532 into r2533 as U256__8JquwLopp8;\n    and r2322 32u32 into r2534;\n    is.neq r2534 0u32 into r2535;\n    and r2533.lo 18446744073709551615u128 into r2536;\n    shr r2533.lo 64u8 into r2537;\n    mul r2536 5129152022828963008u128 into r2538;\n    mul r2536 18417254355718160513u128 into r2539;\n    mul r2537 5129152022828963008u128 into r2540;\n    mul r2537 18417254355718160513u128 into r2541;\n    and r2538 18446744073709551615u128 into r2542;\n    shr r2538 64u8 into r2543;\n    and r2539 18446744073709551615u128 into r2544;\n    add r2543 r2544 into r2545;\n    and r2540 18446744073709551615u128 into r2546;\n    add r2545 r2546 into r2547;\n    and r2547 18446744073709551615u128 into r2548;\n    shr r2547 64u8 into r2549;\n    shr r2539 64u8 into r2550;\n    shr r2540 64u8 into r2551;\n    add r2550 r2551 into r2552;\n    and r2541 18446744073709551615u128 into r2553;\n    add r2552 r2553 into r2554;\n    add r2554 r2549 into r2555;\n    and r2555 18446744073709551615u128 into r2556;\n    shr r2555 64u8 into r2557;\n    shr r2541 64u8 into r2558;\n    add r2558 r2557 into r2559;\n    shl r2559 64u8 into r2560;\n    add r2560 r2556 into r2561;\n    shl r2548 64u8 into r2562;\n    add r2562 r2542 into r2563;\n    and r2533.hi 18446744073709551615u128 into r2564;\n    shr r2533.hi 64u8 into r2565;\n    mul r2564 5129152022828963008u128 into r2566;\n    mul r2564 18417254355718160513u128 into r2567;\n    mul r2565 5129152022828963008u128 into r2568;\n    mul r2565 18417254355718160513u128 into r2569;\n    and r2566 18446744073709551615u128 into r2570;\n    shr r2566 64u8 into r2571;\n    and r2567 18446744073709551615u128 into r2572;\n    add r2571 r2572 into r2573;\n    and r2568 18446744073709551615u128 into r2574;\n    add r2573 r2574 into r2575;\n    and r2575 18446744073709551615u128 into r2576;\n    shr r2575 64u8 into r2577;\n    shr r2567 64u8 into r2578;\n    shr r2568 64u8 into r2579;\n    add r2578 r2579 into r2580;\n    and r2569 18446744073709551615u128 into r2581;\n    add r2580 r2581 into r2582;\n    add r2582 r2577 into r2583;\n    and r2583 18446744073709551615u128 into r2584;\n    shr r2583 64u8 into r2585;\n    shr r2569 64u8 into r2586;\n    add r2586 r2585 into r2587;\n    shl r2587 64u8 into r2588;\n    add r2588 r2584 into r2589;\n    shl r2576 64u8 into r2590;\n    add r2590 r2570 into r2591;\n    add.w r2561 r2591 into r2592;\n    lt r2592 r2561 into r2593;\n    ternary r2593 1u128 0u128 into r2594;\n    add.w r2589 r2594 into r2595;\n    cast r2595 r2592 into r2596 as U256__8JquwLopp8;\n    ternary r2535 r2596.hi r2533.hi into r2597;\n    ternary r2535 r2596.lo r2533.lo into r2598;\n    cast r2597 r2598 into r2599 as U256__8JquwLopp8;\n    and r2322 64u32 into r2600;\n    is.neq r2600 0u32 into r2601;\n    and r2599.lo 18446744073709551615u128 into r2602;\n    shr r2599.lo 64u8 into r2603;\n    mul r2602 4894419605888772193u128 into r2604;\n    mul r2602 18387811781193591352u128 into r2605;\n    mul r2603 4894419605888772193u128 into r2606;\n    mul r2603 18387811781193591352u128 into r2607;\n    and r2604 18446744073709551615u128 into r2608;\n    shr r2604 64u8 into r2609;\n    and r2605 18446744073709551615u128 into r2610;\n    add r2609 r2610 into r2611;\n    and r2606 18446744073709551615u128 into r2612;\n    add r2611 r2612 into r2613;\n    and r2613 18446744073709551615u128 into r2614;\n    shr r2613 64u8 into r2615;\n    shr r2605 64u8 into r2616;\n    shr r2606 64u8 into r2617;\n    add r2616 r2617 into r2618;\n    and r2607 18446744073709551615u128 into r2619;\n    add r2618 r2619 into r2620;\n    add r2620 r2615 into r2621;\n    and r2621 18446744073709551615u128 into r2622;\n    shr r2621 64u8 into r2623;\n    shr r2607 64u8 into r2624;\n    add r2624 r2623 into r2625;\n    shl r2625 64u8 into r2626;\n    add r2626 r2622 into r2627;\n    shl r2614 64u8 into r2628;\n    add r2628 r2608 into r2629;\n    and r2599.hi 18446744073709551615u128 into r2630;\n    shr r2599.hi 64u8 into r2631;\n    mul r2630 4894419605888772193u128 into r2632;\n    mul r2630 18387811781193591352u128 into r2633;\n    mul r2631 4894419605888772193u128 into r2634;\n    mul r2631 18387811781193591352u128 into r2635;\n    and r2632 18446744073709551615u128 into r2636;\n    shr r2632 64u8 into r2637;\n    and r2633 18446744073709551615u128 into r2638;\n    add r2637 r2638 into r2639;\n    and r2634 18446744073709551615u128 into r2640;\n    add r2639 r2640 into r2641;\n    and r2641 18446744073709551615u128 into r2642;\n    shr r2641 64u8 into r2643;\n    shr r2633 64u8 into r2644;\n    shr r2634 64u8 into r2645;\n    add r2644 r2645 into r2646;\n    and r2635 18446744073709551615u128 into r2647;\n    add r2646 r2647 into r2648;\n    add r2648 r2643 into r2649;\n    and r2649 18446744073709551615u128 into r2650;\n    shr r2649 64u8 into r2651;\n    shr r2635 64u8 into r2652;\n    add r2652 r2651 into r2653;\n    shl r2653 64u8 into r2654;\n    add r2654 r2650 into r2655;\n    shl r2642 64u8 into r2656;\n    add r2656 r2636 into r2657;\n    add.w r2627 r2657 into r2658;\n    lt r2658 r2627 into r2659;\n    ternary r2659 1u128 0u128 into r2660;\n    add.w r2655 r2660 into r2661;\n    cast r2661 r2658 into r2662 as U256__8JquwLopp8;\n    ternary r2601 r2662.hi r2599.hi into r2663;\n    ternary r2601 r2662.lo r2599.lo into r2664;\n    cast r2663 r2664 into r2665 as U256__8JquwLopp8;\n    and r2322 128u32 into r2666;\n    is.neq r2666 0u32 into r2667;\n    and r2665.lo 18446744073709551615u128 into r2668;\n    shr r2665.lo 64u8 into r2669;\n    mul r2668 1280255884321894483u128 into r2670;\n    mul r2668 18329067761203520168u128 into r2671;\n    mul r2669 1280255884321894483u128 into r2672;\n    mul r2669 18329067761203520168u128 into r2673;\n    and r2670 18446744073709551615u128 into r2674;\n    shr r2670 64u8 into r2675;\n    and r2671 18446744073709551615u128 into r2676;\n    add r2675 r2676 into r2677;\n    and r2672 18446744073709551615u128 into r2678;\n    add r2677 r2678 into r2679;\n    and r2679 18446744073709551615u128 into r2680;\n    shr r2679 64u8 into r2681;\n    shr r2671 64u8 into r2682;\n    shr r2672 64u8 into r2683;\n    add r2682 r2683 into r2684;\n    and r2673 18446744073709551615u128 into r2685;\n    add r2684 r2685 into r2686;\n    add r2686 r2681 into r2687;\n    and r2687 18446744073709551615u128 into r2688;\n    shr r2687 64u8 into r2689;\n    shr r2673 64u8 into r2690;\n    add r2690 r2689 into r2691;\n    shl r2691 64u8 into r2692;\n    add r2692 r2688 into r2693;\n    shl r2680 64u8 into r2694;\n    add r2694 r2674 into r2695;\n    and r2665.hi 18446744073709551615u128 into r2696;\n    shr r2665.hi 64u8 into r2697;\n    mul r2696 1280255884321894483u128 into r2698;\n    mul r2696 18329067761203520168u128 into r2699;\n    mul r2697 1280255884321894483u128 into r2700;\n    mul r2697 18329067761203520168u128 into r2701;\n    and r2698 18446744073709551615u128 into r2702;\n    shr r2698 64u8 into r2703;\n    and r2699 18446744073709551615u128 into r2704;\n    add r2703 r2704 into r2705;\n    and r2700 18446744073709551615u128 into r2706;\n    add r2705 r2706 into r2707;\n    and r2707 18446744073709551615u128 into r2708;\n    shr r2707 64u8 into r2709;\n    shr r2699 64u8 into r2710;\n    shr r2700 64u8 into r2711;\n    add r2710 r2711 into r2712;\n    and r2701 18446744073709551615u128 into r2713;\n    add r2712 r2713 into r2714;\n    add r2714 r2709 into r2715;\n    and r2715 18446744073709551615u128 into r2716;\n    shr r2715 64u8 into r2717;\n    shr r2701 64u8 into r2718;\n    add r2718 r2717 into r2719;\n    shl r2719 64u8 into r2720;\n    add r2720 r2716 into r2721;\n    shl r2708 64u8 into r2722;\n    add r2722 r2702 into r2723;\n    add.w r2693 r2723 into r2724;\n    lt r2724 r2693 into r2725;\n    ternary r2725 1u128 0u128 into r2726;\n    add.w r2721 r2726 into r2727;\n    cast r2727 r2724 into r2728 as U256__8JquwLopp8;\n    ternary r2667 r2728.hi r2665.hi into r2729;\n    ternary r2667 r2728.lo r2665.lo into r2730;\n    cast r2729 r2730 into r2731 as U256__8JquwLopp8;\n    and r2322 256u32 into r2732;\n    is.neq r2732 0u32 into r2733;\n    and r2731.lo 18446744073709551615u128 into r2734;\n    shr r2731.lo 64u8 into r2735;\n    mul r2734 15924666964335305636u128 into r2736;\n    mul r2734 18212142134806087854u128 into r2737;\n    mul r2735 15924666964335305636u128 into r2738;\n    mul r2735 18212142134806087854u128 into r2739;\n    and r2736 18446744073709551615u128 into r2740;\n    shr r2736 64u8 into r2741;\n    and r2737 18446744073709551615u128 into r2742;\n    add r2741 r2742 into r2743;\n    and r2738 18446744073709551615u128 into r2744;\n    add r2743 r2744 into r2745;\n    and r2745 18446744073709551615u128 into r2746;\n    shr r2745 64u8 into r2747;\n    shr r2737 64u8 into r2748;\n    shr r2738 64u8 into r2749;\n    add r2748 r2749 into r2750;\n    and r2739 18446744073709551615u128 into r2751;\n    add r2750 r2751 into r2752;\n    add r2752 r2747 into r2753;\n    and r2753 18446744073709551615u128 into r2754;\n    shr r2753 64u8 into r2755;\n    shr r2739 64u8 into r2756;\n    add r2756 r2755 into r2757;\n    shl r2757 64u8 into r2758;\n    add r2758 r2754 into r2759;\n    shl r2746 64u8 into r2760;\n    add r2760 r2740 into r2761;\n    and r2731.hi 18446744073709551615u128 into r2762;\n    shr r2731.hi 64u8 into r2763;\n    mul r2762 15924666964335305636u128 into r2764;\n    mul r2762 18212142134806087854u128 into r2765;\n    mul r2763 15924666964335305636u128 into r2766;\n    mul r2763 18212142134806087854u128 into r2767;\n    and r2764 18446744073709551615u128 into r2768;\n    shr r2764 64u8 into r2769;\n    and r2765 18446744073709551615u128 into r2770;\n    add r2769 r2770 into r2771;\n    and r2766 18446744073709551615u128 into r2772;\n    add r2771 r2772 into r2773;\n    and r2773 18446744073709551615u128 into r2774;\n    shr r2773 64u8 into r2775;\n    shr r2765 64u8 into r2776;\n    shr r2766 64u8 into r2777;\n    add r2776 r2777 into r2778;\n    and r2767 18446744073709551615u128 into r2779;\n    add r2778 r2779 into r2780;\n    add r2780 r2775 into r2781;\n    and r2781 18446744073709551615u128 into r2782;\n    shr r2781 64u8 into r2783;\n    shr r2767 64u8 into r2784;\n    add r2784 r2783 into r2785;\n    shl r2785 64u8 into r2786;\n    add r2786 r2782 into r2787;\n    shl r2774 64u8 into r2788;\n    add r2788 r2768 into r2789;\n    add.w r2759 r2789 into r2790;\n    lt r2790 r2759 into r2791;\n    ternary r2791 1u128 0u128 into r2792;\n    add.w r2787 r2792 into r2793;\n    cast r2793 r2790 into r2794 as U256__8JquwLopp8;\n    ternary r2733 r2794.hi r2731.hi into r2795;\n    ternary r2733 r2794.lo r2731.lo into r2796;\n    cast r2795 r2796 into r2797 as U256__8JquwLopp8;\n    and r2322 512u32 into r2798;\n    is.neq r2798 0u32 into r2799;\n    and r2797.lo 18446744073709551615u128 into r2800;\n    shr r2797.lo 64u8 into r2801;\n    mul r2800 8010504389359918676u128 into r2802;\n    mul r2800 17980523815641551639u128 into r2803;\n    mul r2801 8010504389359918676u128 into r2804;\n    mul r2801 17980523815641551639u128 into r2805;\n    and r2802 18446744073709551615u128 into r2806;\n    shr r2802 64u8 into r2807;\n    and r2803 18446744073709551615u128 into r2808;\n    add r2807 r2808 into r2809;\n    and r2804 18446744073709551615u128 into r2810;\n    add r2809 r2810 into r2811;\n    and r2811 18446744073709551615u128 into r2812;\n    shr r2811 64u8 into r2813;\n    shr r2803 64u8 into r2814;\n    shr r2804 64u8 into r2815;\n    add r2814 r2815 into r2816;\n    and r2805 18446744073709551615u128 into r2817;\n    add r2816 r2817 into r2818;\n    add r2818 r2813 into r2819;\n    and r2819 18446744073709551615u128 into r2820;\n    shr r2819 64u8 into r2821;\n    shr r2805 64u8 into r2822;\n    add r2822 r2821 into r2823;\n    shl r2823 64u8 into r2824;\n    add r2824 r2820 into r2825;\n    shl r2812 64u8 into r2826;\n    add r2826 r2806 into r2827;\n    and r2797.hi 18446744073709551615u128 into r2828;\n    shr r2797.hi 64u8 into r2829;\n    mul r2828 8010504389359918676u128 into r2830;\n    mul r2828 17980523815641551639u128 into r2831;\n    mul r2829 8010504389359918676u128 into r2832;\n    mul r2829 17980523815641551639u128 into r2833;\n    and r2830 18446744073709551615u128 into r2834;\n    shr r2830 64u8 into r2835;\n    and r2831 18446744073709551615u128 into r2836;\n    add r2835 r2836 into r2837;\n    and r2832 18446744073709551615u128 into r2838;\n    add r2837 r2838 into r2839;\n    and r2839 18446744073709551615u128 into r2840;\n    shr r2839 64u8 into r2841;\n    shr r2831 64u8 into r2842;\n    shr r2832 64u8 into r2843;\n    add r2842 r2843 into r2844;\n    and r2833 18446744073709551615u128 into r2845;\n    add r2844 r2845 into r2846;\n    add r2846 r2841 into r2847;\n    and r2847 18446744073709551615u128 into r2848;\n    shr r2847 64u8 into r2849;\n    shr r2833 64u8 into r2850;\n    add r2850 r2849 into r2851;\n    shl r2851 64u8 into r2852;\n    add r2852 r2848 into r2853;\n    shl r2840 64u8 into r2854;\n    add r2854 r2834 into r2855;\n    add.w r2825 r2855 into r2856;\n    lt r2856 r2825 into r2857;\n    ternary r2857 1u128 0u128 into r2858;\n    add.w r2853 r2858 into r2859;\n    cast r2859 r2856 into r2860 as U256__8JquwLopp8;\n    ternary r2799 r2860.hi r2797.hi into r2861;\n    ternary r2799 r2860.lo r2797.lo into r2862;\n    cast r2861 r2862 into r2863 as U256__8JquwLopp8;\n    and r2322 1024u32 into r2864;\n    is.neq r2864 0u32 into r2865;\n    and r2863.lo 18446744073709551615u128 into r2866;\n    shr r2863.lo 64u8 into r2867;\n    mul r2866 10668036004952895731u128 into r2868;\n    mul r2866 17526086738831147013u128 into r2869;\n    mul r2867 10668036004952895731u128 into r2870;\n    mul r2867 17526086738831147013u128 into r2871;\n    and r2868 18446744073709551615u128 into r2872;\n    shr r2868 64u8 into r2873;\n    and r2869 18446744073709551615u128 into r2874;\n    add r2873 r2874 into r2875;\n    and r2870 18446744073709551615u128 into r2876;\n    add r2875 r2876 into r2877;\n    and r2877 18446744073709551615u128 into r2878;\n    shr r2877 64u8 into r2879;\n    shr r2869 64u8 into r2880;\n    shr r2870 64u8 into r2881;\n    add r2880 r2881 into r2882;\n    and r2871 18446744073709551615u128 into r2883;\n    add r2882 r2883 into r2884;\n    add r2884 r2879 into r2885;\n    and r2885 18446744073709551615u128 into r2886;\n    shr r2885 64u8 into r2887;\n    shr r2871 64u8 into r2888;\n    add r2888 r2887 into r2889;\n    shl r2889 64u8 into r2890;\n    add r2890 r2886 into r2891;\n    shl r2878 64u8 into r2892;\n    add r2892 r2872 into r2893;\n    and r2863.hi 18446744073709551615u128 into r2894;\n    shr r2863.hi 64u8 into r2895;\n    mul r2894 10668036004952895731u128 into r2896;\n    mul r2894 17526086738831147013u128 into r2897;\n    mul r2895 10668036004952895731u128 into r2898;\n    mul r2895 17526086738831147013u128 into r2899;\n    and r2896 18446744073709551615u128 into r2900;\n    shr r2896 64u8 into r2901;\n    and r2897 18446744073709551615u128 into r2902;\n    add r2901 r2902 into r2903;\n    and r2898 18446744073709551615u128 into r2904;\n    add r2903 r2904 into r2905;\n    and r2905 18446744073709551615u128 into r2906;\n    shr r2905 64u8 into r2907;\n    shr r2897 64u8 into r2908;\n    shr r2898 64u8 into r2909;\n    add r2908 r2909 into r2910;\n    and r2899 18446744073709551615u128 into r2911;\n    add r2910 r2911 into r2912;\n    add r2912 r2907 into r2913;\n    and r2913 18446744073709551615u128 into r2914;\n    shr r2913 64u8 into r2915;\n    shr r2899 64u8 into r2916;\n    add r2916 r2915 into r2917;\n    shl r2917 64u8 into r2918;\n    add r2918 r2914 into r2919;\n    shl r2906 64u8 into r2920;\n    add r2920 r2900 into r2921;\n    add.w r2891 r2921 into r2922;\n    lt r2922 r2891 into r2923;\n    ternary r2923 1u128 0u128 into r2924;\n    add.w r2919 r2924 into r2925;\n    cast r2925 r2922 into r2926 as U256__8JquwLopp8;\n    ternary r2865 r2926.hi r2863.hi into r2927;\n    ternary r2865 r2926.lo r2863.lo into r2928;\n    cast r2927 r2928 into r2929 as U256__8JquwLopp8;\n    and r2322 2048u32 into r2930;\n    is.neq r2930 0u32 into r2931;\n    and r2929.lo 18446744073709551615u128 into r2932;\n    shr r2929.lo 64u8 into r2933;\n    mul r2932 4878133418470705625u128 into r2934;\n    mul r2932 16651378430235024244u128 into r2935;\n    mul r2933 4878133418470705625u128 into r2936;\n    mul r2933 16651378430235024244u128 into r2937;\n    and r2934 18446744073709551615u128 into r2938;\n    shr r2934 64u8 into r2939;\n    and r2935 18446744073709551615u128 into r2940;\n    add r2939 r2940 into r2941;\n    and r2936 18446744073709551615u128 into r2942;\n    add r2941 r2942 into r2943;\n    and r2943 18446744073709551615u128 into r2944;\n    shr r2943 64u8 into r2945;\n    shr r2935 64u8 into r2946;\n    shr r2936 64u8 into r2947;\n    add r2946 r2947 into r2948;\n    and r2937 18446744073709551615u128 into r2949;\n    add r2948 r2949 into r2950;\n    add r2950 r2945 into r2951;\n    and r2951 18446744073709551615u128 into r2952;\n    shr r2951 64u8 into r2953;\n    shr r2937 64u8 into r2954;\n    add r2954 r2953 into r2955;\n    shl r2955 64u8 into r2956;\n    add r2956 r2952 into r2957;\n    shl r2944 64u8 into r2958;\n    add r2958 r2938 into r2959;\n    and r2929.hi 18446744073709551615u128 into r2960;\n    shr r2929.hi 64u8 into r2961;\n    mul r2960 4878133418470705625u128 into r2962;\n    mul r2960 16651378430235024244u128 into r2963;\n    mul r2961 4878133418470705625u128 into r2964;\n    mul r2961 16651378430235024244u128 into r2965;\n    and r2962 18446744073709551615u128 into r2966;\n    shr r2962 64u8 into r2967;\n    and r2963 18446744073709551615u128 into r2968;\n    add r2967 r2968 into r2969;\n    and r2964 18446744073709551615u128 into r2970;\n    add r2969 r2970 into r2971;\n    and r2971 18446744073709551615u128 into r2972;\n    shr r2971 64u8 into r2973;\n    shr r2963 64u8 into r2974;\n    shr r2964 64u8 into r2975;\n    add r2974 r2975 into r2976;\n    and r2965 18446744073709551615u128 into r2977;\n    add r2976 r2977 into r2978;\n    add r2978 r2973 into r2979;\n    and r2979 18446744073709551615u128 into r2980;\n    shr r2979 64u8 into r2981;\n    shr r2965 64u8 into r2982;\n    add r2982 r2981 into r2983;\n    shl r2983 64u8 into r2984;\n    add r2984 r2980 into r2985;\n    shl r2972 64u8 into r2986;\n    add r2986 r2966 into r2987;\n    add.w r2957 r2987 into r2988;\n    lt r2988 r2957 into r2989;\n    ternary r2989 1u128 0u128 into r2990;\n    add.w r2985 r2990 into r2991;\n    cast r2991 r2988 into r2992 as U256__8JquwLopp8;\n    ternary r2931 r2992.hi r2929.hi into r2993;\n    ternary r2931 r2992.lo r2929.lo into r2994;\n    cast r2993 r2994 into r2995 as U256__8JquwLopp8;\n    and r2322 4096u32 into r2996;\n    is.neq r2996 0u32 into r2997;\n    and r2995.lo 18446744073709551615u128 into r2998;\n    shr r2995.lo 64u8 into r2999;\n    mul r2998 9537173718739605541u128 into r3000;\n    mul r2998 15030750278693429944u128 into r3001;\n    mul r2999 9537173718739605541u128 into r3002;\n    mul r2999 15030750278693429944u128 into r3003;\n    and r3000 18446744073709551615u128 into r3004;\n    shr r3000 64u8 into r3005;\n    and r3001 18446744073709551615u128 into r3006;\n    add r3005 r3006 into r3007;\n    and r3002 18446744073709551615u128 into r3008;\n    add r3007 r3008 into r3009;\n    and r3009 18446744073709551615u128 into r3010;\n    shr r3009 64u8 into r3011;\n    shr r3001 64u8 into r3012;\n    shr r3002 64u8 into r3013;\n    add r3012 r3013 into r3014;\n    and r3003 18446744073709551615u128 into r3015;\n    add r3014 r3015 into r3016;\n    add r3016 r3011 into r3017;\n    and r3017 18446744073709551615u128 into r3018;\n    shr r3017 64u8 into r3019;\n    shr r3003 64u8 into r3020;\n    add r3020 r3019 into r3021;\n    shl r3021 64u8 into r3022;\n    add r3022 r3018 into r3023;\n    shl r3010 64u8 into r3024;\n    add r3024 r3004 into r3025;\n    and r2995.hi 18446744073709551615u128 into r3026;\n    shr r2995.hi 64u8 into r3027;\n    mul r3026 9537173718739605541u128 into r3028;\n    mul r3026 15030750278693429944u128 into r3029;\n    mul r3027 9537173718739605541u128 into r3030;\n    mul r3027 15030750278693429944u128 into r3031;\n    and r3028 18446744073709551615u128 into r3032;\n    shr r3028 64u8 into r3033;\n    and r3029 18446744073709551615u128 into r3034;\n    add r3033 r3034 into r3035;\n    and r3030 18446744073709551615u128 into r3036;\n    add r3035 r3036 into r3037;\n    and r3037 18446744073709551615u128 into r3038;\n    shr r3037 64u8 into r3039;\n    shr r3029 64u8 into r3040;\n    shr r3030 64u8 into r3041;\n    add r3040 r3041 into r3042;\n    and r3031 18446744073709551615u128 into r3043;\n    add r3042 r3043 into r3044;\n    add r3044 r3039 into r3045;\n    and r3045 18446744073709551615u128 into r3046;\n    shr r3045 64u8 into r3047;\n    shr r3031 64u8 into r3048;\n    add r3048 r3047 into r3049;\n    shl r3049 64u8 into r3050;\n    add r3050 r3046 into r3051;\n    shl r3038 64u8 into r3052;\n    add r3052 r3032 into r3053;\n    add.w r3023 r3053 into r3054;\n    lt r3054 r3023 into r3055;\n    ternary r3055 1u128 0u128 into r3056;\n    add.w r3051 r3056 into r3057;\n    cast r3057 r3054 into r3058 as U256__8JquwLopp8;\n    ternary r2997 r3058.hi r2995.hi into r3059;\n    ternary r2997 r3058.lo r2995.lo into r3060;\n    cast r3059 r3060 into r3061 as U256__8JquwLopp8;\n    and r2322 8192u32 into r3062;\n    is.neq r3062 0u32 into r3063;\n    and r3061.lo 18446744073709551615u128 into r3064;\n    shr r3061.lo 64u8 into r3065;\n    mul r3064 9972618978014552549u128 into r3066;\n    mul r3064 12247334978882834399u128 into r3067;\n    mul r3065 9972618978014552549u128 into r3068;\n    mul r3065 12247334978882834399u128 into r3069;\n    and r3066 18446744073709551615u128 into r3070;\n    shr r3066 64u8 into r3071;\n    and r3067 18446744073709551615u128 into r3072;\n    add r3071 r3072 into r3073;\n    and r3068 18446744073709551615u128 into r3074;\n    add r3073 r3074 into r3075;\n    and r3075 18446744073709551615u128 into r3076;\n    shr r3075 64u8 into r3077;\n    shr r3067 64u8 into r3078;\n    shr r3068 64u8 into r3079;\n    add r3078 r3079 into r3080;\n    and r3069 18446744073709551615u128 into r3081;\n    add r3080 r3081 into r3082;\n    add r3082 r3077 into r3083;\n    and r3083 18446744073709551615u128 into r3084;\n    shr r3083 64u8 into r3085;\n    shr r3069 64u8 into r3086;\n    add r3086 r3085 into r3087;\n    shl r3087 64u8 into r3088;\n    add r3088 r3084 into r3089;\n    shl r3076 64u8 into r3090;\n    add r3090 r3070 into r3091;\n    and r3061.hi 18446744073709551615u128 into r3092;\n    shr r3061.hi 64u8 into r3093;\n    mul r3092 9972618978014552549u128 into r3094;\n    mul r3092 12247334978882834399u128 into r3095;\n    mul r3093 9972618978014552549u128 into r3096;\n    mul r3093 12247334978882834399u128 into r3097;\n    and r3094 18446744073709551615u128 into r3098;\n    shr r3094 64u8 into r3099;\n    and r3095 18446744073709551615u128 into r3100;\n    add r3099 r3100 into r3101;\n    and r3096 18446744073709551615u128 into r3102;\n    add r3101 r3102 into r3103;\n    and r3103 18446744073709551615u128 into r3104;\n    shr r3103 64u8 into r3105;\n    shr r3095 64u8 into r3106;\n    shr r3096 64u8 into r3107;\n    add r3106 r3107 into r3108;\n    and r3097 18446744073709551615u128 into r3109;\n    add r3108 r3109 into r3110;\n    add r3110 r3105 into r3111;\n    and r3111 18446744073709551615u128 into r3112;\n    shr r3111 64u8 into r3113;\n    shr r3097 64u8 into r3114;\n    add r3114 r3113 into r3115;\n    shl r3115 64u8 into r3116;\n    add r3116 r3112 into r3117;\n    shl r3104 64u8 into r3118;\n    add r3118 r3098 into r3119;\n    add.w r3089 r3119 into r3120;\n    lt r3120 r3089 into r3121;\n    ternary r3121 1u128 0u128 into r3122;\n    add.w r3117 r3122 into r3123;\n    cast r3123 r3120 into r3124 as U256__8JquwLopp8;\n    ternary r3063 r3124.hi r3061.hi into r3125;\n    ternary r3063 r3124.lo r3061.lo into r3126;\n    cast r3125 r3126 into r3127 as U256__8JquwLopp8;\n    and r2322 16384u32 into r3128;\n    is.neq r3128 0u32 into r3129;\n    and r3127.lo 18446744073709551615u128 into r3130;\n    shr r3127.lo 64u8 into r3131;\n    mul r3130 10428997489610666743u128 into r3132;\n    mul r3130 8131365268884726200u128 into r3133;\n    mul r3131 10428997489610666743u128 into r3134;\n    mul r3131 8131365268884726200u128 into r3135;\n    and r3132 18446744073709551615u128 into r3136;\n    shr r3132 64u8 into r3137;\n    and r3133 18446744073709551615u128 into r3138;\n    add r3137 r3138 into r3139;\n    and r3134 18446744073709551615u128 into r3140;\n    add r3139 r3140 into r3141;\n    and r3141 18446744073709551615u128 into r3142;\n    shr r3141 64u8 into r3143;\n    shr r3133 64u8 into r3144;\n    shr r3134 64u8 into r3145;\n    add r3144 r3145 into r3146;\n    and r3135 18446744073709551615u128 into r3147;\n    add r3146 r3147 into r3148;\n    add r3148 r3143 into r3149;\n    and r3149 18446744073709551615u128 into r3150;\n    shr r3149 64u8 into r3151;\n    shr r3135 64u8 into r3152;\n    add r3152 r3151 into r3153;\n    shl r3153 64u8 into r3154;\n    add r3154 r3150 into r3155;\n    shl r3142 64u8 into r3156;\n    add r3156 r3136 into r3157;\n    and r3127.hi 18446744073709551615u128 into r3158;\n    shr r3127.hi 64u8 into r3159;\n    mul r3158 10428997489610666743u128 into r3160;\n    mul r3158 8131365268884726200u128 into r3161;\n    mul r3159 10428997489610666743u128 into r3162;\n    mul r3159 8131365268884726200u128 into r3163;\n    and r3160 18446744073709551615u128 into r3164;\n    shr r3160 64u8 into r3165;\n    and r3161 18446744073709551615u128 into r3166;\n    add r3165 r3166 into r3167;\n    and r3162 18446744073709551615u128 into r3168;\n    add r3167 r3168 into r3169;\n    and r3169 18446744073709551615u128 into r3170;\n    shr r3169 64u8 into r3171;\n    shr r3161 64u8 into r3172;\n    shr r3162 64u8 into r3173;\n    add r3172 r3173 into r3174;\n    and r3163 18446744073709551615u128 into r3175;\n    add r3174 r3175 into r3176;\n    add r3176 r3171 into r3177;\n    and r3177 18446744073709551615u128 into r3178;\n    shr r3177 64u8 into r3179;\n    shr r3163 64u8 into r3180;\n    add r3180 r3179 into r3181;\n    shl r3181 64u8 into r3182;\n    add r3182 r3178 into r3183;\n    shl r3170 64u8 into r3184;\n    add r3184 r3164 into r3185;\n    add.w r3155 r3185 into r3186;\n    lt r3186 r3155 into r3187;\n    ternary r3187 1u128 0u128 into r3188;\n    add.w r3183 r3188 into r3189;\n    cast r3189 r3186 into r3190 as U256__8JquwLopp8;\n    ternary r3129 r3190.hi r3127.hi into r3191;\n    ternary r3129 r3190.lo r3127.lo into r3192;\n    cast r3191 r3192 into r3193 as U256__8JquwLopp8;\n    and r2322 32768u32 into r3194;\n    is.neq r3194 0u32 into r3195;\n    and r3193.lo 18446744073709551615u128 into r3196;\n    shr r3193.lo 64u8 into r3197;\n    mul r3196 9305304367709015974u128 into r3198;\n    mul r3196 3584323654723342297u128 into r3199;\n    mul r3197 9305304367709015974u128 into r3200;\n    mul r3197 3584323654723342297u128 into r3201;\n    and r3198 18446744073709551615u128 into r3202;\n    shr r3198 64u8 into r3203;\n    and r3199 18446744073709551615u128 into r3204;\n    add r3203 r3204 into r3205;\n    and r3200 18446744073709551615u128 into r3206;\n    add r3205 r3206 into r3207;\n    and r3207 18446744073709551615u128 into r3208;\n    shr r3207 64u8 into r3209;\n    shr r3199 64u8 into r3210;\n    shr r3200 64u8 into r3211;\n    add r3210 r3211 into r3212;\n    and r3201 18446744073709551615u128 into r3213;\n    add r3212 r3213 into r3214;\n    add r3214 r3209 into r3215;\n    and r3215 18446744073709551615u128 into r3216;\n    shr r3215 64u8 into r3217;\n    shr r3201 64u8 into r3218;\n    add r3218 r3217 into r3219;\n    shl r3219 64u8 into r3220;\n    add r3220 r3216 into r3221;\n    shl r3208 64u8 into r3222;\n    add r3222 r3202 into r3223;\n    and r3193.hi 18446744073709551615u128 into r3224;\n    shr r3193.hi 64u8 into r3225;\n    mul r3224 9305304367709015974u128 into r3226;\n    mul r3224 3584323654723342297u128 into r3227;\n    mul r3225 9305304367709015974u128 into r3228;\n    mul r3225 3584323654723342297u128 into r3229;\n    and r3226 18446744073709551615u128 into r3230;\n    shr r3226 64u8 into r3231;\n    and r3227 18446744073709551615u128 into r3232;\n    add r3231 r3232 into r3233;\n    and r3228 18446744073709551615u128 into r3234;\n    add r3233 r3234 into r3235;\n    and r3235 18446744073709551615u128 into r3236;\n    shr r3235 64u8 into r3237;\n    shr r3227 64u8 into r3238;\n    shr r3228 64u8 into r3239;\n    add r3238 r3239 into r3240;\n    and r3229 18446744073709551615u128 into r3241;\n    add r3240 r3241 into r3242;\n    add r3242 r3237 into r3243;\n    and r3243 18446744073709551615u128 into r3244;\n    shr r3243 64u8 into r3245;\n    shr r3229 64u8 into r3246;\n    add r3246 r3245 into r3247;\n    shl r3247 64u8 into r3248;\n    add r3248 r3244 into r3249;\n    shl r3236 64u8 into r3250;\n    add r3250 r3230 into r3251;\n    add.w r3221 r3251 into r3252;\n    lt r3252 r3221 into r3253;\n    ternary r3253 1u128 0u128 into r3254;\n    add.w r3249 r3254 into r3255;\n    cast r3255 r3252 into r3256 as U256__8JquwLopp8;\n    ternary r3195 r3256.hi r3193.hi into r3257;\n    ternary r3195 r3256.lo r3193.lo into r3258;\n    cast r3257 r3258 into r3259 as U256__8JquwLopp8;\n    and r2322 65536u32 into r3260;\n    is.neq r3260 0u32 into r3261;\n    and r3259.lo 18446744073709551615u128 into r3262;\n    shr r3259.lo 64u8 into r3263;\n    mul r3262 14301143598189091785u128 into r3264;\n    mul r3262 696457651847595233u128 into r3265;\n    mul r3263 14301143598189091785u128 into r3266;\n    mul r3263 696457651847595233u128 into r3267;\n    and r3264 18446744073709551615u128 into r3268;\n    shr r3264 64u8 into r3269;\n    and r3265 18446744073709551615u128 into r3270;\n    add r3269 r3270 into r3271;\n    and r3266 18446744073709551615u128 into r3272;\n    add r3271 r3272 into r3273;\n    and r3273 18446744073709551615u128 into r3274;\n    shr r3273 64u8 into r3275;\n    shr r3265 64u8 into r3276;\n    shr r3266 64u8 into r3277;\n    add r3276 r3277 into r3278;\n    and r3267 18446744073709551615u128 into r3279;\n    add r3278 r3279 into r3280;\n    add r3280 r3275 into r3281;\n    and r3281 18446744073709551615u128 into r3282;\n    shr r3281 64u8 into r3283;\n    shr r3267 64u8 into r3284;\n    add r3284 r3283 into r3285;\n    shl r3285 64u8 into r3286;\n    add r3286 r3282 into r3287;\n    shl r3274 64u8 into r3288;\n    add r3288 r3268 into r3289;\n    and r3259.hi 18446744073709551615u128 into r3290;\n    shr r3259.hi 64u8 into r3291;\n    mul r3290 14301143598189091785u128 into r3292;\n    mul r3290 696457651847595233u128 into r3293;\n    mul r3291 14301143598189091785u128 into r3294;\n    mul r3291 696457651847595233u128 into r3295;\n    and r3292 18446744073709551615u128 into r3296;\n    shr r3292 64u8 into r3297;\n    and r3293 18446744073709551615u128 into r3298;\n    add r3297 r3298 into r3299;\n    and r3294 18446744073709551615u128 into r3300;\n    add r3299 r3300 into r3301;\n    and r3301 18446744073709551615u128 into r3302;\n    shr r3301 64u8 into r3303;\n    shr r3293 64u8 into r3304;\n    shr r3294 64u8 into r3305;\n    add r3304 r3305 into r3306;\n    and r3295 18446744073709551615u128 into r3307;\n    add r3306 r3307 into r3308;\n    add r3308 r3303 into r3309;\n    and r3309 18446744073709551615u128 into r3310;\n    shr r3309 64u8 into r3311;\n    shr r3295 64u8 into r3312;\n    add r3312 r3311 into r3313;\n    shl r3313 64u8 into r3314;\n    add r3314 r3310 into r3315;\n    shl r3302 64u8 into r3316;\n    add r3316 r3296 into r3317;\n    add.w r3287 r3317 into r3318;\n    lt r3318 r3287 into r3319;\n    ternary r3319 1u128 0u128 into r3320;\n    add.w r3315 r3320 into r3321;\n    cast r3321 r3318 into r3322 as U256__8JquwLopp8;\n    ternary r3261 r3322.hi r3259.hi into r3323;\n    ternary r3261 r3322.lo r3259.lo into r3324;\n    cast r3323 r3324 into r3325 as U256__8JquwLopp8;\n    and r2322 131072u32 into r3326;\n    is.neq r3326 0u32 into r3327;\n    and r3325.lo 18446744073709551615u128 into r3328;\n    shr r3325.lo 64u8 into r3329;\n    mul r3328 7393154844743099908u128 into r3330;\n    mul r3328 26294789957452057u128 into r3331;\n    mul r3329 7393154844743099908u128 into r3332;\n    mul r3329 26294789957452057u128 into r3333;\n    and r3330 18446744073709551615u128 into r3334;\n    shr r3330 64u8 into r3335;\n    and r3331 18446744073709551615u128 into r3336;\n    add r3335 r3336 into r3337;\n    and r3332 18446744073709551615u128 into r3338;\n    add r3337 r3338 into r3339;\n    and r3339 18446744073709551615u128 into r3340;\n    shr r3339 64u8 into r3341;\n    shr r3331 64u8 into r3342;\n    shr r3332 64u8 into r3343;\n    add r3342 r3343 into r3344;\n    and r3333 18446744073709551615u128 into r3345;\n    add r3344 r3345 into r3346;\n    add r3346 r3341 into r3347;\n    and r3347 18446744073709551615u128 into r3348;\n    shr r3347 64u8 into r3349;\n    shr r3333 64u8 into r3350;\n    add r3350 r3349 into r3351;\n    shl r3351 64u8 into r3352;\n    add r3352 r3348 into r3353;\n    shl r3340 64u8 into r3354;\n    add r3354 r3334 into r3355;\n    and r3325.hi 18446744073709551615u128 into r3356;\n    shr r3325.hi 64u8 into r3357;\n    mul r3356 7393154844743099908u128 into r3358;\n    mul r3356 26294789957452057u128 into r3359;\n    mul r3357 7393154844743099908u128 into r3360;\n    mul r3357 26294789957452057u128 into r3361;\n    and r3358 18446744073709551615u128 into r3362;\n    shr r3358 64u8 into r3363;\n    and r3359 18446744073709551615u128 into r3364;\n    add r3363 r3364 into r3365;\n    and r3360 18446744073709551615u128 into r3366;\n    add r3365 r3366 into r3367;\n    and r3367 18446744073709551615u128 into r3368;\n    shr r3367 64u8 into r3369;\n    shr r3359 64u8 into r3370;\n    shr r3360 64u8 into r3371;\n    add r3370 r3371 into r3372;\n    and r3361 18446744073709551615u128 into r3373;\n    add r3372 r3373 into r3374;\n    add r3374 r3369 into r3375;\n    and r3375 18446744073709551615u128 into r3376;\n    shr r3375 64u8 into r3377;\n    shr r3361 64u8 into r3378;\n    add r3378 r3377 into r3379;\n    shl r3379 64u8 into r3380;\n    add r3380 r3376 into r3381;\n    shl r3368 64u8 into r3382;\n    add r3382 r3362 into r3383;\n    add.w r3353 r3383 into r3384;\n    lt r3384 r3353 into r3385;\n    ternary r3385 1u128 0u128 into r3386;\n    add.w r3381 r3386 into r3387;\n    cast r3387 r3384 into r3388 as U256__8JquwLopp8;\n    ternary r3327 r3388.hi r3325.hi into r3389;\n    ternary r3327 r3388.lo r3325.lo into r3390;\n    cast r3389 r3390 into r3391 as U256__8JquwLopp8;\n    and r2322 262144u32 into r3392;\n    is.neq r3392 0u32 into r3393;\n    and r3391.lo 18446744073709551615u128 into r3394;\n    shr r3391.lo 64u8 into r3395;\n    mul r3394 2209338891292245656u128 into r3396;\n    mul r3394 37481735321082u128 into r3397;\n    mul r3395 2209338891292245656u128 into r3398;\n    mul r3395 37481735321082u128 into r3399;\n    and r3396 18446744073709551615u128 into r3400;\n    shr r3396 64u8 into r3401;\n    and r3397 18446744073709551615u128 into r3402;\n    add r3401 r3402 into r3403;\n    and r3398 18446744073709551615u128 into r3404;\n    add r3403 r3404 into r3405;\n    and r3405 18446744073709551615u128 into r3406;\n    shr r3405 64u8 into r3407;\n    shr r3397 64u8 into r3408;\n    shr r3398 64u8 into r3409;\n    add r3408 r3409 into r3410;\n    and r3399 18446744073709551615u128 into r3411;\n    add r3410 r3411 into r3412;\n    add r3412 r3407 into r3413;\n    and r3413 18446744073709551615u128 into r3414;\n    shr r3413 64u8 into r3415;\n    shr r3399 64u8 into r3416;\n    add r3416 r3415 into r3417;\n    shl r3417 64u8 into r3418;\n    add r3418 r3414 into r3419;\n    shl r3406 64u8 into r3420;\n    add r3420 r3400 into r3421;\n    and r3391.hi 18446744073709551615u128 into r3422;\n    shr r3391.hi 64u8 into r3423;\n    mul r3422 2209338891292245656u128 into r3424;\n    mul r3422 37481735321082u128 into r3425;\n    mul r3423 2209338891292245656u128 into r3426;\n    mul r3423 37481735321082u128 into r3427;\n    and r3424 18446744073709551615u128 into r3428;\n    shr r3424 64u8 into r3429;\n    and r3425 18446744073709551615u128 into r3430;\n    add r3429 r3430 into r3431;\n    and r3426 18446744073709551615u128 into r3432;\n    add r3431 r3432 into r3433;\n    and r3433 18446744073709551615u128 into r3434;\n    shr r3433 64u8 into r3435;\n    shr r3425 64u8 into r3436;\n    shr r3426 64u8 into r3437;\n    add r3436 r3437 into r3438;\n    and r3427 18446744073709551615u128 into r3439;\n    add r3438 r3439 into r3440;\n    add r3440 r3435 into r3441;\n    and r3441 18446744073709551615u128 into r3442;\n    shr r3441 64u8 into r3443;\n    shr r3427 64u8 into r3444;\n    add r3444 r3443 into r3445;\n    shl r3445 64u8 into r3446;\n    add r3446 r3442 into r3447;\n    shl r3434 64u8 into r3448;\n    add r3448 r3428 into r3449;\n    add.w r3419 r3449 into r3450;\n    lt r3450 r3419 into r3451;\n    ternary r3451 1u128 0u128 into r3452;\n    add.w r3447 r3452 into r3453;\n    cast r3453 r3450 into r3454 as U256__8JquwLopp8;\n    ternary r3393 r3454.hi r3391.hi into r3455;\n    ternary r3393 r3454.lo r3391.lo into r3456;\n    cast r3455 r3456 into r3457 as U256__8JquwLopp8;\n    gt r2314 0i32 into r3458;\n    is.eq r3457.lo 0u128 into r3459;\n    ternary r3459 1u128 r3457.lo into r3460;\n    div 340282366920938463463374607431768211455u128 r3460 into r3461;\n    rem 340282366920938463463374607431768211455u128 r3460 into r3462;\n    lt r3462 r3460 into r3463;\n    assert.eq r3463 true;\n    gte r3462 170141183460469231731687303715884105728u128 into r3464;\n    add.w r3462 r3462 into r3465;\n    add r3465 1u128 into r3466;\n    gte r3466 r3460 into r3467;\n    or r3464 r3467 into r3468;\n    sub.w r3466 r3460 into r3469;\n    ternary r3468 r3469 r3466 into r3470;\n    ternary r3468 170141183460469231731687303715884105728u128 0u128 into r3471;\n    gte r3470 170141183460469231731687303715884105728u128 into r3472;\n    add.w r3470 r3470 into r3473;\n    add r3473 1u128 into r3474;\n    gte r3474 r3460 into r3475;\n    or r3472 r3475 into r3476;\n    sub.w r3474 r3460 into r3477;\n    ternary r3476 r3477 r3474 into r3478;\n    add r3471 85070591730234615865843651857942052864u128 into r3479;\n    ternary r3476 r3479 r3471 into r3480;\n    gte r3478 170141183460469231731687303715884105728u128 into r3481;\n    add.w r3478 r3478 into r3482;\n    add r3482 1u128 into r3483;\n    gte r3483 r3460 into r3484;\n    or r3481 r3484 into r3485;\n    sub.w r3483 r3460 into r3486;\n    ternary r3485 r3486 r3483 into r3487;\n    add r3480 42535295865117307932921825928971026432u128 into r3488;\n    ternary r3485 r3488 r3480 into r3489;\n    gte r3487 170141183460469231731687303715884105728u128 into r3490;\n    add.w r3487 r3487 into r3491;\n    add r3491 1u128 into r3492;\n    gte r3492 r3460 into r3493;\n    or r3490 r3493 into r3494;\n    sub.w r3492 r3460 into r3495;\n    ternary r3494 r3495 r3492 into r3496;\n    add r3489 21267647932558653966460912964485513216u128 into r3497;\n    ternary r3494 r3497 r3489 into r3498;\n    gte r3496 170141183460469231731687303715884105728u128 into r3499;\n    add.w r3496 r3496 into r3500;\n    add r3500 1u128 into r3501;\n    gte r3501 r3460 into r3502;\n    or r3499 r3502 into r3503;\n    sub.w r3501 r3460 into r3504;\n    ternary r3503 r3504 r3501 into r3505;\n    add r3498 10633823966279326983230456482242756608u128 into r3506;\n    ternary r3503 r3506 r3498 into r3507;\n    gte r3505 170141183460469231731687303715884105728u128 into r3508;\n    add.w r3505 r3505 into r3509;\n    add r3509 1u128 into r3510;\n    gte r3510 r3460 into r3511;\n    or r3508 r3511 into r3512;\n    sub.w r3510 r3460 into r3513;\n    ternary r3512 r3513 r3510 into r3514;\n    add r3507 5316911983139663491615228241121378304u128 into r3515;\n    ternary r3512 r3515 r3507 into r3516;\n    gte r3514 170141183460469231731687303715884105728u128 into r3517;\n    add.w r3514 r3514 into r3518;\n    add r3518 1u128 into r3519;\n    gte r3519 r3460 into r3520;\n    or r3517 r3520 into r3521;\n    sub.w r3519 r3460 into r3522;\n    ternary r3521 r3522 r3519 into r3523;\n    add r3516 2658455991569831745807614120560689152u128 into r3524;\n    ternary r3521 r3524 r3516 into r3525;\n    gte r3523 170141183460469231731687303715884105728u128 into r3526;\n    add.w r3523 r3523 into r3527;\n    add r3527 1u128 into r3528;\n    gte r3528 r3460 into r3529;\n    or r3526 r3529 into r3530;\n    sub.w r3528 r3460 into r3531;\n    ternary r3530 r3531 r3528 into r3532;\n    add r3525 1329227995784915872903807060280344576u128 into r3533;\n    ternary r3530 r3533 r3525 into r3534;\n    gte r3532 170141183460469231731687303715884105728u128 into r3535;\n    add.w r3532 r3532 into r3536;\n    add r3536 1u128 into r3537;\n    gte r3537 r3460 into r3538;\n    or r3535 r3538 into r3539;\n    sub.w r3537 r3460 into r3540;\n    ternary r3539 r3540 r3537 into r3541;\n    add r3534 664613997892457936451903530140172288u128 into r3542;\n    ternary r3539 r3542 r3534 into r3543;\n    gte r3541 170141183460469231731687303715884105728u128 into r3544;\n    add.w r3541 r3541 into r3545;\n    add r3545 1u128 into r3546;\n    gte r3546 r3460 into r3547;\n    or r3544 r3547 into r3548;\n    sub.w r3546 r3460 into r3549;\n    ternary r3548 r3549 r3546 into r3550;\n    add r3543 332306998946228968225951765070086144u128 into r3551;\n    ternary r3548 r3551 r3543 into r3552;\n    gte r3550 170141183460469231731687303715884105728u128 into r3553;\n    add.w r3550 r3550 into r3554;\n    add r3554 1u128 into r3555;\n    gte r3555 r3460 into r3556;\n    or r3553 r3556 into r3557;\n    sub.w r3555 r3460 into r3558;\n    ternary r3557 r3558 r3555 into r3559;\n    add r3552 166153499473114484112975882535043072u128 into r3560;\n    ternary r3557 r3560 r3552 into r3561;\n    gte r3559 170141183460469231731687303715884105728u128 into r3562;\n    add.w r3559 r3559 into r3563;\n    add r3563 1u128 into r3564;\n    gte r3564 r3460 into r3565;\n    or r3562 r3565 into r3566;\n    sub.w r3564 r3460 into r3567;\n    ternary r3566 r3567 r3564 into r3568;\n    add r3561 83076749736557242056487941267521536u128 into r3569;\n    ternary r3566 r3569 r3561 into r3570;\n    gte r3568 170141183460469231731687303715884105728u128 into r3571;\n    add.w r3568 r3568 into r3572;\n    add r3572 1u128 into r3573;\n    gte r3573 r3460 into r3574;\n    or r3571 r3574 into r3575;\n    sub.w r3573 r3460 into r3576;\n    ternary r3575 r3576 r3573 into r3577;\n    add r3570 41538374868278621028243970633760768u128 into r3578;\n    ternary r3575 r3578 r3570 into r3579;\n    gte r3577 170141183460469231731687303715884105728u128 into r3580;\n    add.w r3577 r3577 into r3581;\n    add r3581 1u128 into r3582;\n    gte r3582 r3460 into r3583;\n    or r3580 r3583 into r3584;\n    sub.w r3582 r3460 into r3585;\n    ternary r3584 r3585 r3582 into r3586;\n    add r3579 20769187434139310514121985316880384u128 into r3587;\n    ternary r3584 r3587 r3579 into r3588;\n    gte r3586 170141183460469231731687303715884105728u128 into r3589;\n    add.w r3586 r3586 into r3590;\n    add r3590 1u128 into r3591;\n    gte r3591 r3460 into r3592;\n    or r3589 r3592 into r3593;\n    sub.w r3591 r3460 into r3594;\n    ternary r3593 r3594 r3591 into r3595;\n    add r3588 10384593717069655257060992658440192u128 into r3596;\n    ternary r3593 r3596 r3588 into r3597;\n    gte r3595 170141183460469231731687303715884105728u128 into r3598;\n    add.w r3595 r3595 into r3599;\n    add r3599 1u128 into r3600;\n    gte r3600 r3460 into r3601;\n    or r3598 r3601 into r3602;\n    sub.w r3600 r3460 into r3603;\n    ternary r3602 r3603 r3600 into r3604;\n    add r3597 5192296858534827628530496329220096u128 into r3605;\n    ternary r3602 r3605 r3597 into r3606;\n    gte r3604 170141183460469231731687303715884105728u128 into r3607;\n    add.w r3604 r3604 into r3608;\n    add r3608 1u128 into r3609;\n    gte r3609 r3460 into r3610;\n    or r3607 r3610 into r3611;\n    sub.w r3609 r3460 into r3612;\n    ternary r3611 r3612 r3609 into r3613;\n    add r3606 2596148429267413814265248164610048u128 into r3614;\n    ternary r3611 r3614 r3606 into r3615;\n    gte r3613 170141183460469231731687303715884105728u128 into r3616;\n    add.w r3613 r3613 into r3617;\n    add r3617 1u128 into r3618;\n    gte r3618 r3460 into r3619;\n    or r3616 r3619 into r3620;\n    sub.w r3618 r3460 into r3621;\n    ternary r3620 r3621 r3618 into r3622;\n    add r3615 1298074214633706907132624082305024u128 into r3623;\n    ternary r3620 r3623 r3615 into r3624;\n    gte r3622 170141183460469231731687303715884105728u128 into r3625;\n    add.w r3622 r3622 into r3626;\n    add r3626 1u128 into r3627;\n    gte r3627 r3460 into r3628;\n    or r3625 r3628 into r3629;\n    sub.w r3627 r3460 into r3630;\n    ternary r3629 r3630 r3627 into r3631;\n    add r3624 649037107316853453566312041152512u128 into r3632;\n    ternary r3629 r3632 r3624 into r3633;\n    gte r3631 170141183460469231731687303715884105728u128 into r3634;\n    add.w r3631 r3631 into r3635;\n    add r3635 1u128 into r3636;\n    gte r3636 r3460 into r3637;\n    or r3634 r3637 into r3638;\n    sub.w r3636 r3460 into r3639;\n    ternary r3638 r3639 r3636 into r3640;\n    add r3633 324518553658426726783156020576256u128 into r3641;\n    ternary r3638 r3641 r3633 into r3642;\n    gte r3640 170141183460469231731687303715884105728u128 into r3643;\n    add.w r3640 r3640 into r3644;\n    add r3644 1u128 into r3645;\n    gte r3645 r3460 into r3646;\n    or r3643 r3646 into r3647;\n    sub.w r3645 r3460 into r3648;\n    ternary r3647 r3648 r3645 into r3649;\n    add r3642 162259276829213363391578010288128u128 into r3650;\n    ternary r3647 r3650 r3642 into r3651;\n    gte r3649 170141183460469231731687303715884105728u128 into r3652;\n    add.w r3649 r3649 into r3653;\n    add r3653 1u128 into r3654;\n    gte r3654 r3460 into r3655;\n    or r3652 r3655 into r3656;\n    sub.w r3654 r3460 into r3657;\n    ternary r3656 r3657 r3654 into r3658;\n    add r3651 81129638414606681695789005144064u128 into r3659;\n    ternary r3656 r3659 r3651 into r3660;\n    gte r3658 170141183460469231731687303715884105728u128 into r3661;\n    add.w r3658 r3658 into r3662;\n    add r3662 1u128 into r3663;\n    gte r3663 r3460 into r3664;\n    or r3661 r3664 into r3665;\n    sub.w r3663 r3460 into r3666;\n    ternary r3665 r3666 r3663 into r3667;\n    add r3660 40564819207303340847894502572032u128 into r3668;\n    ternary r3665 r3668 r3660 into r3669;\n    gte r3667 170141183460469231731687303715884105728u128 into r3670;\n    add.w r3667 r3667 into r3671;\n    add r3671 1u128 into r3672;\n    gte r3672 r3460 into r3673;\n    or r3670 r3673 into r3674;\n    sub.w r3672 r3460 into r3675;\n    ternary r3674 r3675 r3672 into r3676;\n    add r3669 20282409603651670423947251286016u128 into r3677;\n    ternary r3674 r3677 r3669 into r3678;\n    gte r3676 170141183460469231731687303715884105728u128 into r3679;\n    add.w r3676 r3676 into r3680;\n    add r3680 1u128 into r3681;\n    gte r3681 r3460 into r3682;\n    or r3679 r3682 into r3683;\n    sub.w r3681 r3460 into r3684;\n    ternary r3683 r3684 r3681 into r3685;\n    add r3678 10141204801825835211973625643008u128 into r3686;\n    ternary r3683 r3686 r3678 into r3687;\n    gte r3685 170141183460469231731687303715884105728u128 into r3688;\n    add.w r3685 r3685 into r3689;\n    add r3689 1u128 into r3690;\n    gte r3690 r3460 into r3691;\n    or r3688 r3691 into r3692;\n    sub.w r3690 r3460 into r3693;\n    ternary r3692 r3693 r3690 into r3694;\n    add r3687 5070602400912917605986812821504u128 into r3695;\n    ternary r3692 r3695 r3687 into r3696;\n    gte r3694 170141183460469231731687303715884105728u128 into r3697;\n    add.w r3694 r3694 into r3698;\n    add r3698 1u128 into r3699;\n    gte r3699 r3460 into r3700;\n    or r3697 r3700 into r3701;\n    sub.w r3699 r3460 into r3702;\n    ternary r3701 r3702 r3699 into r3703;\n    add r3696 2535301200456458802993406410752u128 into r3704;\n    ternary r3701 r3704 r3696 into r3705;\n    gte r3703 170141183460469231731687303715884105728u128 into r3706;\n    add.w r3703 r3703 into r3707;\n    add r3707 1u128 into r3708;\n    gte r3708 r3460 into r3709;\n    or r3706 r3709 into r3710;\n    sub.w r3708 r3460 into r3711;\n    ternary r3710 r3711 r3708 into r3712;\n    add r3705 1267650600228229401496703205376u128 into r3713;\n    ternary r3710 r3713 r3705 into r3714;\n    gte r3712 170141183460469231731687303715884105728u128 into r3715;\n    add.w r3712 r3712 into r3716;\n    add r3716 1u128 into r3717;\n    gte r3717 r3460 into r3718;\n    or r3715 r3718 into r3719;\n    sub.w r3717 r3460 into r3720;\n    ternary r3719 r3720 r3717 into r3721;\n    add r3714 633825300114114700748351602688u128 into r3722;\n    ternary r3719 r3722 r3714 into r3723;\n    gte r3721 170141183460469231731687303715884105728u128 into r3724;\n    add.w r3721 r3721 into r3725;\n    add r3725 1u128 into r3726;\n    gte r3726 r3460 into r3727;\n    or r3724 r3727 into r3728;\n    sub.w r3726 r3460 into r3729;\n    ternary r3728 r3729 r3726 into r3730;\n    add r3723 316912650057057350374175801344u128 into r3731;\n    ternary r3728 r3731 r3723 into r3732;\n    gte r3730 170141183460469231731687303715884105728u128 into r3733;\n    add.w r3730 r3730 into r3734;\n    add r3734 1u128 into r3735;\n    gte r3735 r3460 into r3736;\n    or r3733 r3736 into r3737;\n    sub.w r3735 r3460 into r3738;\n    ternary r3737 r3738 r3735 into r3739;\n    add r3732 158456325028528675187087900672u128 into r3740;\n    ternary r3737 r3740 r3732 into r3741;\n    gte r3739 170141183460469231731687303715884105728u128 into r3742;\n    add.w r3739 r3739 into r3743;\n    add r3743 1u128 into r3744;\n    gte r3744 r3460 into r3745;\n    or r3742 r3745 into r3746;\n    sub.w r3744 r3460 into r3747;\n    ternary r3746 r3747 r3744 into r3748;\n    add r3741 79228162514264337593543950336u128 into r3749;\n    ternary r3746 r3749 r3741 into r3750;\n    gte r3748 170141183460469231731687303715884105728u128 into r3751;\n    add.w r3748 r3748 into r3752;\n    add r3752 1u128 into r3753;\n    gte r3753 r3460 into r3754;\n    or r3751 r3754 into r3755;\n    sub.w r3753 r3460 into r3756;\n    ternary r3755 r3756 r3753 into r3757;\n    add r3750 39614081257132168796771975168u128 into r3758;\n    ternary r3755 r3758 r3750 into r3759;\n    gte r3757 170141183460469231731687303715884105728u128 into r3760;\n    add.w r3757 r3757 into r3761;\n    add r3761 1u128 into r3762;\n    gte r3762 r3460 into r3763;\n    or r3760 r3763 into r3764;\n    sub.w r3762 r3460 into r3765;\n    ternary r3764 r3765 r3762 into r3766;\n    add r3759 19807040628566084398385987584u128 into r3767;\n    ternary r3764 r3767 r3759 into r3768;\n    gte r3766 170141183460469231731687303715884105728u128 into r3769;\n    add.w r3766 r3766 into r3770;\n    add r3770 1u128 into r3771;\n    gte r3771 r3460 into r3772;\n    or r3769 r3772 into r3773;\n    sub.w r3771 r3460 into r3774;\n    ternary r3773 r3774 r3771 into r3775;\n    add r3768 9903520314283042199192993792u128 into r3776;\n    ternary r3773 r3776 r3768 into r3777;\n    gte r3775 170141183460469231731687303715884105728u128 into r3778;\n    add.w r3775 r3775 into r3779;\n    add r3779 1u128 into r3780;\n    gte r3780 r3460 into r3781;\n    or r3778 r3781 into r3782;\n    sub.w r3780 r3460 into r3783;\n    ternary r3782 r3783 r3780 into r3784;\n    add r3777 4951760157141521099596496896u128 into r3785;\n    ternary r3782 r3785 r3777 into r3786;\n    gte r3784 170141183460469231731687303715884105728u128 into r3787;\n    add.w r3784 r3784 into r3788;\n    add r3788 1u128 into r3789;\n    gte r3789 r3460 into r3790;\n    or r3787 r3790 into r3791;\n    sub.w r3789 r3460 into r3792;\n    ternary r3791 r3792 r3789 into r3793;\n    add r3786 2475880078570760549798248448u128 into r3794;\n    ternary r3791 r3794 r3786 into r3795;\n    gte r3793 170141183460469231731687303715884105728u128 into r3796;\n    add.w r3793 r3793 into r3797;\n    add r3797 1u128 into r3798;\n    gte r3798 r3460 into r3799;\n    or r3796 r3799 into r3800;\n    sub.w r3798 r3460 into r3801;\n    ternary r3800 r3801 r3798 into r3802;\n    add r3795 1237940039285380274899124224u128 into r3803;\n    ternary r3800 r3803 r3795 into r3804;\n    gte r3802 170141183460469231731687303715884105728u128 into r3805;\n    add.w r3802 r3802 into r3806;\n    add r3806 1u128 into r3807;\n    gte r3807 r3460 into r3808;\n    or r3805 r3808 into r3809;\n    sub.w r3807 r3460 into r3810;\n    ternary r3809 r3810 r3807 into r3811;\n    add r3804 618970019642690137449562112u128 into r3812;\n    ternary r3809 r3812 r3804 into r3813;\n    gte r3811 170141183460469231731687303715884105728u128 into r3814;\n    add.w r3811 r3811 into r3815;\n    add r3815 1u128 into r3816;\n    gte r3816 r3460 into r3817;\n    or r3814 r3817 into r3818;\n    sub.w r3816 r3460 into r3819;\n    ternary r3818 r3819 r3816 into r3820;\n    add r3813 309485009821345068724781056u128 into r3821;\n    ternary r3818 r3821 r3813 into r3822;\n    gte r3820 170141183460469231731687303715884105728u128 into r3823;\n    add.w r3820 r3820 into r3824;\n    add r3824 1u128 into r3825;\n    gte r3825 r3460 into r3826;\n    or r3823 r3826 into r3827;\n    sub.w r3825 r3460 into r3828;\n    ternary r3827 r3828 r3825 into r3829;\n    add r3822 154742504910672534362390528u128 into r3830;\n    ternary r3827 r3830 r3822 into r3831;\n    gte r3829 170141183460469231731687303715884105728u128 into r3832;\n    add.w r3829 r3829 into r3833;\n    add r3833 1u128 into r3834;\n    gte r3834 r3460 into r3835;\n    or r3832 r3835 into r3836;\n    sub.w r3834 r3460 into r3837;\n    ternary r3836 r3837 r3834 into r3838;\n    add r3831 77371252455336267181195264u128 into r3839;\n    ternary r3836 r3839 r3831 into r3840;\n    gte r3838 170141183460469231731687303715884105728u128 into r3841;\n    add.w r3838 r3838 into r3842;\n    add r3842 1u128 into r3843;\n    gte r3843 r3460 into r3844;\n    or r3841 r3844 into r3845;\n    sub.w r3843 r3460 into r3846;\n    ternary r3845 r3846 r3843 into r3847;\n    add r3840 38685626227668133590597632u128 into r3848;\n    ternary r3845 r3848 r3840 into r3849;\n    gte r3847 170141183460469231731687303715884105728u128 into r3850;\n    add.w r3847 r3847 into r3851;\n    add r3851 1u128 into r3852;\n    gte r3852 r3460 into r3853;\n    or r3850 r3853 into r3854;\n    sub.w r3852 r3460 into r3855;\n    ternary r3854 r3855 r3852 into r3856;\n    add r3849 19342813113834066795298816u128 into r3857;\n    ternary r3854 r3857 r3849 into r3858;\n    gte r3856 170141183460469231731687303715884105728u128 into r3859;\n    add.w r3856 r3856 into r3860;\n    add r3860 1u128 into r3861;\n    gte r3861 r3460 into r3862;\n    or r3859 r3862 into r3863;\n    sub.w r3861 r3460 into r3864;\n    ternary r3863 r3864 r3861 into r3865;\n    add r3858 9671406556917033397649408u128 into r3866;\n    ternary r3863 r3866 r3858 into r3867;\n    gte r3865 170141183460469231731687303715884105728u128 into r3868;\n    add.w r3865 r3865 into r3869;\n    add r3869 1u128 into r3870;\n    gte r3870 r3460 into r3871;\n    or r3868 r3871 into r3872;\n    sub.w r3870 r3460 into r3873;\n    ternary r3872 r3873 r3870 into r3874;\n    add r3867 4835703278458516698824704u128 into r3875;\n    ternary r3872 r3875 r3867 into r3876;\n    gte r3874 170141183460469231731687303715884105728u128 into r3877;\n    add.w r3874 r3874 into r3878;\n    add r3878 1u128 into r3879;\n    gte r3879 r3460 into r3880;\n    or r3877 r3880 into r3881;\n    sub.w r3879 r3460 into r3882;\n    ternary r3881 r3882 r3879 into r3883;\n    add r3876 2417851639229258349412352u128 into r3884;\n    ternary r3881 r3884 r3876 into r3885;\n    gte r3883 170141183460469231731687303715884105728u128 into r3886;\n    add.w r3883 r3883 into r3887;\n    add r3887 1u128 into r3888;\n    gte r3888 r3460 into r3889;\n    or r3886 r3889 into r3890;\n    sub.w r3888 r3460 into r3891;\n    ternary r3890 r3891 r3888 into r3892;\n    add r3885 1208925819614629174706176u128 into r3893;\n    ternary r3890 r3893 r3885 into r3894;\n    gte r3892 170141183460469231731687303715884105728u128 into r3895;\n    add.w r3892 r3892 into r3896;\n    add r3896 1u128 into r3897;\n    gte r3897 r3460 into r3898;\n    or r3895 r3898 into r3899;\n    sub.w r3897 r3460 into r3900;\n    ternary r3899 r3900 r3897 into r3901;\n    add r3894 604462909807314587353088u128 into r3902;\n    ternary r3899 r3902 r3894 into r3903;\n    gte r3901 170141183460469231731687303715884105728u128 into r3904;\n    add.w r3901 r3901 into r3905;\n    add r3905 1u128 into r3906;\n    gte r3906 r3460 into r3907;\n    or r3904 r3907 into r3908;\n    sub.w r3906 r3460 into r3909;\n    ternary r3908 r3909 r3906 into r3910;\n    add r3903 302231454903657293676544u128 into r3911;\n    ternary r3908 r3911 r3903 into r3912;\n    gte r3910 170141183460469231731687303715884105728u128 into r3913;\n    add.w r3910 r3910 into r3914;\n    add r3914 1u128 into r3915;\n    gte r3915 r3460 into r3916;\n    or r3913 r3916 into r3917;\n    sub.w r3915 r3460 into r3918;\n    ternary r3917 r3918 r3915 into r3919;\n    add r3912 151115727451828646838272u128 into r3920;\n    ternary r3917 r3920 r3912 into r3921;\n    gte r3919 170141183460469231731687303715884105728u128 into r3922;\n    add.w r3919 r3919 into r3923;\n    add r3923 1u128 into r3924;\n    gte r3924 r3460 into r3925;\n    or r3922 r3925 into r3926;\n    sub.w r3924 r3460 into r3927;\n    ternary r3926 r3927 r3924 into r3928;\n    add r3921 75557863725914323419136u128 into r3929;\n    ternary r3926 r3929 r3921 into r3930;\n    gte r3928 170141183460469231731687303715884105728u128 into r3931;\n    add.w r3928 r3928 into r3932;\n    add r3932 1u128 into r3933;\n    gte r3933 r3460 into r3934;\n    or r3931 r3934 into r3935;\n    sub.w r3933 r3460 into r3936;\n    ternary r3935 r3936 r3933 into r3937;\n    add r3930 37778931862957161709568u128 into r3938;\n    ternary r3935 r3938 r3930 into r3939;\n    gte r3937 170141183460469231731687303715884105728u128 into r3940;\n    add.w r3937 r3937 into r3941;\n    add r3941 1u128 into r3942;\n    gte r3942 r3460 into r3943;\n    or r3940 r3943 into r3944;\n    sub.w r3942 r3460 into r3945;\n    ternary r3944 r3945 r3942 into r3946;\n    add r3939 18889465931478580854784u128 into r3947;\n    ternary r3944 r3947 r3939 into r3948;\n    gte r3946 170141183460469231731687303715884105728u128 into r3949;\n    add.w r3946 r3946 into r3950;\n    add r3950 1u128 into r3951;\n    gte r3951 r3460 into r3952;\n    or r3949 r3952 into r3953;\n    sub.w r3951 r3460 into r3954;\n    ternary r3953 r3954 r3951 into r3955;\n    add r3948 9444732965739290427392u128 into r3956;\n    ternary r3953 r3956 r3948 into r3957;\n    gte r3955 170141183460469231731687303715884105728u128 into r3958;\n    add.w r3955 r3955 into r3959;\n    add r3959 1u128 into r3960;\n    gte r3960 r3460 into r3961;\n    or r3958 r3961 into r3962;\n    sub.w r3960 r3460 into r3963;\n    ternary r3962 r3963 r3960 into r3964;\n    add r3957 4722366482869645213696u128 into r3965;\n    ternary r3962 r3965 r3957 into r3966;\n    gte r3964 170141183460469231731687303715884105728u128 into r3967;\n    add.w r3964 r3964 into r3968;\n    add r3968 1u128 into r3969;\n    gte r3969 r3460 into r3970;\n    or r3967 r3970 into r3971;\n    sub.w r3969 r3460 into r3972;\n    ternary r3971 r3972 r3969 into r3973;\n    add r3966 2361183241434822606848u128 into r3974;\n    ternary r3971 r3974 r3966 into r3975;\n    gte r3973 170141183460469231731687303715884105728u128 into r3976;\n    add.w r3973 r3973 into r3977;\n    add r3977 1u128 into r3978;\n    gte r3978 r3460 into r3979;\n    or r3976 r3979 into r3980;\n    sub.w r3978 r3460 into r3981;\n    ternary r3980 r3981 r3978 into r3982;\n    add r3975 1180591620717411303424u128 into r3983;\n    ternary r3980 r3983 r3975 into r3984;\n    gte r3982 170141183460469231731687303715884105728u128 into r3985;\n    add.w r3982 r3982 into r3986;\n    add r3986 1u128 into r3987;\n    gte r3987 r3460 into r3988;\n    or r3985 r3988 into r3989;\n    sub.w r3987 r3460 into r3990;\n    ternary r3989 r3990 r3987 into r3991;\n    add r3984 590295810358705651712u128 into r3992;\n    ternary r3989 r3992 r3984 into r3993;\n    gte r3991 170141183460469231731687303715884105728u128 into r3994;\n    add.w r3991 r3991 into r3995;\n    add r3995 1u128 into r3996;\n    gte r3996 r3460 into r3997;\n    or r3994 r3997 into r3998;\n    sub.w r3996 r3460 into r3999;\n    ternary r3998 r3999 r3996 into r4000;\n    add r3993 295147905179352825856u128 into r4001;\n    ternary r3998 r4001 r3993 into r4002;\n    gte r4000 170141183460469231731687303715884105728u128 into r4003;\n    add.w r4000 r4000 into r4004;\n    add r4004 1u128 into r4005;\n    gte r4005 r3460 into r4006;\n    or r4003 r4006 into r4007;\n    sub.w r4005 r3460 into r4008;\n    ternary r4007 r4008 r4005 into r4009;\n    add r4002 147573952589676412928u128 into r4010;\n    ternary r4007 r4010 r4002 into r4011;\n    gte r4009 170141183460469231731687303715884105728u128 into r4012;\n    add.w r4009 r4009 into r4013;\n    add r4013 1u128 into r4014;\n    gte r4014 r3460 into r4015;\n    or r4012 r4015 into r4016;\n    sub.w r4014 r3460 into r4017;\n    ternary r4016 r4017 r4014 into r4018;\n    add r4011 73786976294838206464u128 into r4019;\n    ternary r4016 r4019 r4011 into r4020;\n    gte r4018 170141183460469231731687303715884105728u128 into r4021;\n    add.w r4018 r4018 into r4022;\n    add r4022 1u128 into r4023;\n    gte r4023 r3460 into r4024;\n    or r4021 r4024 into r4025;\n    sub.w r4023 r3460 into r4026;\n    ternary r4025 r4026 r4023 into r4027;\n    add r4020 36893488147419103232u128 into r4028;\n    ternary r4025 r4028 r4020 into r4029;\n    gte r4027 170141183460469231731687303715884105728u128 into r4030;\n    add.w r4027 r4027 into r4031;\n    add r4031 1u128 into r4032;\n    gte r4032 r3460 into r4033;\n    or r4030 r4033 into r4034;\n    sub.w r4032 r3460 into r4035;\n    ternary r4034 r4035 r4032 into r4036;\n    add r4029 18446744073709551616u128 into r4037;\n    ternary r4034 r4037 r4029 into r4038;\n    gte r4036 170141183460469231731687303715884105728u128 into r4039;\n    add.w r4036 r4036 into r4040;\n    add r4040 1u128 into r4041;\n    gte r4041 r3460 into r4042;\n    or r4039 r4042 into r4043;\n    sub.w r4041 r3460 into r4044;\n    ternary r4043 r4044 r4041 into r4045;\n    add r4038 9223372036854775808u128 into r4046;\n    ternary r4043 r4046 r4038 into r4047;\n    gte r4045 170141183460469231731687303715884105728u128 into r4048;\n    add.w r4045 r4045 into r4049;\n    add r4049 1u128 into r4050;\n    gte r4050 r3460 into r4051;\n    or r4048 r4051 into r4052;\n    sub.w r4050 r3460 into r4053;\n    ternary r4052 r4053 r4050 into r4054;\n    add r4047 4611686018427387904u128 into r4055;\n    ternary r4052 r4055 r4047 into r4056;\n    gte r4054 170141183460469231731687303715884105728u128 into r4057;\n    add.w r4054 r4054 into r4058;\n    add r4058 1u128 into r4059;\n    gte r4059 r3460 into r4060;\n    or r4057 r4060 into r4061;\n    sub.w r4059 r3460 into r4062;\n    ternary r4061 r4062 r4059 into r4063;\n    add r4056 2305843009213693952u128 into r4064;\n    ternary r4061 r4064 r4056 into r4065;\n    gte r4063 170141183460469231731687303715884105728u128 into r4066;\n    add.w r4063 r4063 into r4067;\n    add r4067 1u128 into r4068;\n    gte r4068 r3460 into r4069;\n    or r4066 r4069 into r4070;\n    sub.w r4068 r3460 into r4071;\n    ternary r4070 r4071 r4068 into r4072;\n    add r4065 1152921504606846976u128 into r4073;\n    ternary r4070 r4073 r4065 into r4074;\n    gte r4072 170141183460469231731687303715884105728u128 into r4075;\n    add.w r4072 r4072 into r4076;\n    add r4076 1u128 into r4077;\n    gte r4077 r3460 into r4078;\n    or r4075 r4078 into r4079;\n    sub.w r4077 r3460 into r4080;\n    ternary r4079 r4080 r4077 into r4081;\n    add r4074 576460752303423488u128 into r4082;\n    ternary r4079 r4082 r4074 into r4083;\n    gte r4081 170141183460469231731687303715884105728u128 into r4084;\n    add.w r4081 r4081 into r4085;\n    add r4085 1u128 into r4086;\n    gte r4086 r3460 into r4087;\n    or r4084 r4087 into r4088;\n    sub.w r4086 r3460 into r4089;\n    ternary r4088 r4089 r4086 into r4090;\n    add r4083 288230376151711744u128 into r4091;\n    ternary r4088 r4091 r4083 into r4092;\n    gte r4090 170141183460469231731687303715884105728u128 into r4093;\n    add.w r4090 r4090 into r4094;\n    add r4094 1u128 into r4095;\n    gte r4095 r3460 into r4096;\n    or r4093 r4096 into r4097;\n    sub.w r4095 r3460 into r4098;\n    ternary r4097 r4098 r4095 into r4099;\n    add r4092 144115188075855872u128 into r4100;\n    ternary r4097 r4100 r4092 into r4101;\n    gte r4099 170141183460469231731687303715884105728u128 into r4102;\n    add.w r4099 r4099 into r4103;\n    add r4103 1u128 into r4104;\n    gte r4104 r3460 into r4105;\n    or r4102 r4105 into r4106;\n    sub.w r4104 r3460 into r4107;\n    ternary r4106 r4107 r4104 into r4108;\n    add r4101 72057594037927936u128 into r4109;\n    ternary r4106 r4109 r4101 into r4110;\n    gte r4108 170141183460469231731687303715884105728u128 into r4111;\n    add.w r4108 r4108 into r4112;\n    add r4112 1u128 into r4113;\n    gte r4113 r3460 into r4114;\n    or r4111 r4114 into r4115;\n    sub.w r4113 r3460 into r4116;\n    ternary r4115 r4116 r4113 into r4117;\n    add r4110 36028797018963968u128 into r4118;\n    ternary r4115 r4118 r4110 into r4119;\n    gte r4117 170141183460469231731687303715884105728u128 into r4120;\n    add.w r4117 r4117 into r4121;\n    add r4121 1u128 into r4122;\n    gte r4122 r3460 into r4123;\n    or r4120 r4123 into r4124;\n    sub.w r4122 r3460 into r4125;\n    ternary r4124 r4125 r4122 into r4126;\n    add r4119 18014398509481984u128 into r4127;\n    ternary r4124 r4127 r4119 into r4128;\n    gte r4126 170141183460469231731687303715884105728u128 into r4129;\n    add.w r4126 r4126 into r4130;\n    add r4130 1u128 into r4131;\n    gte r4131 r3460 into r4132;\n    or r4129 r4132 into r4133;\n    sub.w r4131 r3460 into r4134;\n    ternary r4133 r4134 r4131 into r4135;\n    add r4128 9007199254740992u128 into r4136;\n    ternary r4133 r4136 r4128 into r4137;\n    gte r4135 170141183460469231731687303715884105728u128 into r4138;\n    add.w r4135 r4135 into r4139;\n    add r4139 1u128 into r4140;\n    gte r4140 r3460 into r4141;\n    or r4138 r4141 into r4142;\n    sub.w r4140 r3460 into r4143;\n    ternary r4142 r4143 r4140 into r4144;\n    add r4137 4503599627370496u128 into r4145;\n    ternary r4142 r4145 r4137 into r4146;\n    gte r4144 170141183460469231731687303715884105728u128 into r4147;\n    add.w r4144 r4144 into r4148;\n    add r4148 1u128 into r4149;\n    gte r4149 r3460 into r4150;\n    or r4147 r4150 into r4151;\n    sub.w r4149 r3460 into r4152;\n    ternary r4151 r4152 r4149 into r4153;\n    add r4146 2251799813685248u128 into r4154;\n    ternary r4151 r4154 r4146 into r4155;\n    gte r4153 170141183460469231731687303715884105728u128 into r4156;\n    add.w r4153 r4153 into r4157;\n    add r4157 1u128 into r4158;\n    gte r4158 r3460 into r4159;\n    or r4156 r4159 into r4160;\n    sub.w r4158 r3460 into r4161;\n    ternary r4160 r4161 r4158 into r4162;\n    add r4155 1125899906842624u128 into r4163;\n    ternary r4160 r4163 r4155 into r4164;\n    gte r4162 170141183460469231731687303715884105728u128 into r4165;\n    add.w r4162 r4162 into r4166;\n    add r4166 1u128 into r4167;\n    gte r4167 r3460 into r4168;\n    or r4165 r4168 into r4169;\n    sub.w r4167 r3460 into r4170;\n    ternary r4169 r4170 r4167 into r4171;\n    add r4164 562949953421312u128 into r4172;\n    ternary r4169 r4172 r4164 into r4173;\n    gte r4171 170141183460469231731687303715884105728u128 into r4174;\n    add.w r4171 r4171 into r4175;\n    add r4175 1u128 into r4176;\n    gte r4176 r3460 into r4177;\n    or r4174 r4177 into r4178;\n    sub.w r4176 r3460 into r4179;\n    ternary r4178 r4179 r4176 into r4180;\n    add r4173 281474976710656u128 into r4181;\n    ternary r4178 r4181 r4173 into r4182;\n    gte r4180 170141183460469231731687303715884105728u128 into r4183;\n    add.w r4180 r4180 into r4184;\n    add r4184 1u128 into r4185;\n    gte r4185 r3460 into r4186;\n    or r4183 r4186 into r4187;\n    sub.w r4185 r3460 into r4188;\n    ternary r4187 r4188 r4185 into r4189;\n    add r4182 140737488355328u128 into r4190;\n    ternary r4187 r4190 r4182 into r4191;\n    gte r4189 170141183460469231731687303715884105728u128 into r4192;\n    add.w r4189 r4189 into r4193;\n    add r4193 1u128 into r4194;\n    gte r4194 r3460 into r4195;\n    or r4192 r4195 into r4196;\n    sub.w r4194 r3460 into r4197;\n    ternary r4196 r4197 r4194 into r4198;\n    add r4191 70368744177664u128 into r4199;\n    ternary r4196 r4199 r4191 into r4200;\n    gte r4198 170141183460469231731687303715884105728u128 into r4201;\n    add.w r4198 r4198 into r4202;\n    add r4202 1u128 into r4203;\n    gte r4203 r3460 into r4204;\n    or r4201 r4204 into r4205;\n    sub.w r4203 r3460 into r4206;\n    ternary r4205 r4206 r4203 into r4207;\n    add r4200 35184372088832u128 into r4208;\n    ternary r4205 r4208 r4200 into r4209;\n    gte r4207 170141183460469231731687303715884105728u128 into r4210;\n    add.w r4207 r4207 into r4211;\n    add r4211 1u128 into r4212;\n    gte r4212 r3460 into r4213;\n    or r4210 r4213 into r4214;\n    sub.w r4212 r3460 into r4215;\n    ternary r4214 r4215 r4212 into r4216;\n    add r4209 17592186044416u128 into r4217;\n    ternary r4214 r4217 r4209 into r4218;\n    gte r4216 170141183460469231731687303715884105728u128 into r4219;\n    add.w r4216 r4216 into r4220;\n    add r4220 1u128 into r4221;\n    gte r4221 r3460 into r4222;\n    or r4219 r4222 into r4223;\n    sub.w r4221 r3460 into r4224;\n    ternary r4223 r4224 r4221 into r4225;\n    add r4218 8796093022208u128 into r4226;\n    ternary r4223 r4226 r4218 into r4227;\n    gte r4225 170141183460469231731687303715884105728u128 into r4228;\n    add.w r4225 r4225 into r4229;\n    add r4229 1u128 into r4230;\n    gte r4230 r3460 into r4231;\n    or r4228 r4231 into r4232;\n    sub.w r4230 r3460 into r4233;\n    ternary r4232 r4233 r4230 into r4234;\n    add r4227 4398046511104u128 into r4235;\n    ternary r4232 r4235 r4227 into r4236;\n    gte r4234 170141183460469231731687303715884105728u128 into r4237;\n    add.w r4234 r4234 into r4238;\n    add r4238 1u128 into r4239;\n    gte r4239 r3460 into r4240;\n    or r4237 r4240 into r4241;\n    sub.w r4239 r3460 into r4242;\n    ternary r4241 r4242 r4239 into r4243;\n    add r4236 2199023255552u128 into r4244;\n    ternary r4241 r4244 r4236 into r4245;\n    gte r4243 170141183460469231731687303715884105728u128 into r4246;\n    add.w r4243 r4243 into r4247;\n    add r4247 1u128 into r4248;\n    gte r4248 r3460 into r4249;\n    or r4246 r4249 into r4250;\n    sub.w r4248 r3460 into r4251;\n    ternary r4250 r4251 r4248 into r4252;\n    add r4245 1099511627776u128 into r4253;\n    ternary r4250 r4253 r4245 into r4254;\n    gte r4252 170141183460469231731687303715884105728u128 into r4255;\n    add.w r4252 r4252 into r4256;\n    add r4256 1u128 into r4257;\n    gte r4257 r3460 into r4258;\n    or r4255 r4258 into r4259;\n    sub.w r4257 r3460 into r4260;\n    ternary r4259 r4260 r4257 into r4261;\n    add r4254 549755813888u128 into r4262;\n    ternary r4259 r4262 r4254 into r4263;\n    gte r4261 170141183460469231731687303715884105728u128 into r4264;\n    add.w r4261 r4261 into r4265;\n    add r4265 1u128 into r4266;\n    gte r4266 r3460 into r4267;\n    or r4264 r4267 into r4268;\n    sub.w r4266 r3460 into r4269;\n    ternary r4268 r4269 r4266 into r4270;\n    add r4263 274877906944u128 into r4271;\n    ternary r4268 r4271 r4263 into r4272;\n    gte r4270 170141183460469231731687303715884105728u128 into r4273;\n    add.w r4270 r4270 into r4274;\n    add r4274 1u128 into r4275;\n    gte r4275 r3460 into r4276;\n    or r4273 r4276 into r4277;\n    sub.w r4275 r3460 into r4278;\n    ternary r4277 r4278 r4275 into r4279;\n    add r4272 137438953472u128 into r4280;\n    ternary r4277 r4280 r4272 into r4281;\n    gte r4279 170141183460469231731687303715884105728u128 into r4282;\n    add.w r4279 r4279 into r4283;\n    add r4283 1u128 into r4284;\n    gte r4284 r3460 into r4285;\n    or r4282 r4285 into r4286;\n    sub.w r4284 r3460 into r4287;\n    ternary r4286 r4287 r4284 into r4288;\n    add r4281 68719476736u128 into r4289;\n    ternary r4286 r4289 r4281 into r4290;\n    gte r4288 170141183460469231731687303715884105728u128 into r4291;\n    add.w r4288 r4288 into r4292;\n    add r4292 1u128 into r4293;\n    gte r4293 r3460 into r4294;\n    or r4291 r4294 into r4295;\n    sub.w r4293 r3460 into r4296;\n    ternary r4295 r4296 r4293 into r4297;\n    add r4290 34359738368u128 into r4298;\n    ternary r4295 r4298 r4290 into r4299;\n    gte r4297 170141183460469231731687303715884105728u128 into r4300;\n    add.w r4297 r4297 into r4301;\n    add r4301 1u128 into r4302;\n    gte r4302 r3460 into r4303;\n    or r4300 r4303 into r4304;\n    sub.w r4302 r3460 into r4305;\n    ternary r4304 r4305 r4302 into r4306;\n    add r4299 17179869184u128 into r4307;\n    ternary r4304 r4307 r4299 into r4308;\n    gte r4306 170141183460469231731687303715884105728u128 into r4309;\n    add.w r4306 r4306 into r4310;\n    add r4310 1u128 into r4311;\n    gte r4311 r3460 into r4312;\n    or r4309 r4312 into r4313;\n    sub.w r4311 r3460 into r4314;\n    ternary r4313 r4314 r4311 into r4315;\n    add r4308 8589934592u128 into r4316;\n    ternary r4313 r4316 r4308 into r4317;\n    gte r4315 170141183460469231731687303715884105728u128 into r4318;\n    add.w r4315 r4315 into r4319;\n    add r4319 1u128 into r4320;\n    gte r4320 r3460 into r4321;\n    or r4318 r4321 into r4322;\n    sub.w r4320 r3460 into r4323;\n    ternary r4322 r4323 r4320 into r4324;\n    add r4317 4294967296u128 into r4325;\n    ternary r4322 r4325 r4317 into r4326;\n    gte r4324 170141183460469231731687303715884105728u128 into r4327;\n    add.w r4324 r4324 into r4328;\n    add r4328 1u128 into r4329;\n    gte r4329 r3460 into r4330;\n    or r4327 r4330 into r4331;\n    sub.w r4329 r3460 into r4332;\n    ternary r4331 r4332 r4329 into r4333;\n    add r4326 2147483648u128 into r4334;\n    ternary r4331 r4334 r4326 into r4335;\n    gte r4333 170141183460469231731687303715884105728u128 into r4336;\n    add.w r4333 r4333 into r4337;\n    add r4337 1u128 into r4338;\n    gte r4338 r3460 into r4339;\n    or r4336 r4339 into r4340;\n    sub.w r4338 r3460 into r4341;\n    ternary r4340 r4341 r4338 into r4342;\n    add r4335 1073741824u128 into r4343;\n    ternary r4340 r4343 r4335 into r4344;\n    gte r4342 170141183460469231731687303715884105728u128 into r4345;\n    add.w r4342 r4342 into r4346;\n    add r4346 1u128 into r4347;\n    gte r4347 r3460 into r4348;\n    or r4345 r4348 into r4349;\n    sub.w r4347 r3460 into r4350;\n    ternary r4349 r4350 r4347 into r4351;\n    add r4344 536870912u128 into r4352;\n    ternary r4349 r4352 r4344 into r4353;\n    gte r4351 170141183460469231731687303715884105728u128 into r4354;\n    add.w r4351 r4351 into r4355;\n    add r4355 1u128 into r4356;\n    gte r4356 r3460 into r4357;\n    or r4354 r4357 into r4358;\n    sub.w r4356 r3460 into r4359;\n    ternary r4358 r4359 r4356 into r4360;\n    add r4353 268435456u128 into r4361;\n    ternary r4358 r4361 r4353 into r4362;\n    gte r4360 170141183460469231731687303715884105728u128 into r4363;\n    add.w r4360 r4360 into r4364;\n    add r4364 1u128 into r4365;\n    gte r4365 r3460 into r4366;\n    or r4363 r4366 into r4367;\n    sub.w r4365 r3460 into r4368;\n    ternary r4367 r4368 r4365 into r4369;\n    add r4362 134217728u128 into r4370;\n    ternary r4367 r4370 r4362 into r4371;\n    gte r4369 170141183460469231731687303715884105728u128 into r4372;\n    add.w r4369 r4369 into r4373;\n    add r4373 1u128 into r4374;\n    gte r4374 r3460 into r4375;\n    or r4372 r4375 into r4376;\n    sub.w r4374 r3460 into r4377;\n    ternary r4376 r4377 r4374 into r4378;\n    add r4371 67108864u128 into r4379;\n    ternary r4376 r4379 r4371 into r4380;\n    gte r4378 170141183460469231731687303715884105728u128 into r4381;\n    add.w r4378 r4378 into r4382;\n    add r4382 1u128 into r4383;\n    gte r4383 r3460 into r4384;\n    or r4381 r4384 into r4385;\n    sub.w r4383 r3460 into r4386;\n    ternary r4385 r4386 r4383 into r4387;\n    add r4380 33554432u128 into r4388;\n    ternary r4385 r4388 r4380 into r4389;\n    gte r4387 170141183460469231731687303715884105728u128 into r4390;\n    add.w r4387 r4387 into r4391;\n    add r4391 1u128 into r4392;\n    gte r4392 r3460 into r4393;\n    or r4390 r4393 into r4394;\n    sub.w r4392 r3460 into r4395;\n    ternary r4394 r4395 r4392 into r4396;\n    add r4389 16777216u128 into r4397;\n    ternary r4394 r4397 r4389 into r4398;\n    gte r4396 170141183460469231731687303715884105728u128 into r4399;\n    add.w r4396 r4396 into r4400;\n    add r4400 1u128 into r4401;\n    gte r4401 r3460 into r4402;\n    or r4399 r4402 into r4403;\n    sub.w r4401 r3460 into r4404;\n    ternary r4403 r4404 r4401 into r4405;\n    add r4398 8388608u128 into r4406;\n    ternary r4403 r4406 r4398 into r4407;\n    gte r4405 170141183460469231731687303715884105728u128 into r4408;\n    add.w r4405 r4405 into r4409;\n    add r4409 1u128 into r4410;\n    gte r4410 r3460 into r4411;\n    or r4408 r4411 into r4412;\n    sub.w r4410 r3460 into r4413;\n    ternary r4412 r4413 r4410 into r4414;\n    add r4407 4194304u128 into r4415;\n    ternary r4412 r4415 r4407 into r4416;\n    gte r4414 170141183460469231731687303715884105728u128 into r4417;\n    add.w r4414 r4414 into r4418;\n    add r4418 1u128 into r4419;\n    gte r4419 r3460 into r4420;\n    or r4417 r4420 into r4421;\n    sub.w r4419 r3460 into r4422;\n    ternary r4421 r4422 r4419 into r4423;\n    add r4416 2097152u128 into r4424;\n    ternary r4421 r4424 r4416 into r4425;\n    gte r4423 170141183460469231731687303715884105728u128 into r4426;\n    add.w r4423 r4423 into r4427;\n    add r4427 1u128 into r4428;\n    gte r4428 r3460 into r4429;\n    or r4426 r4429 into r4430;\n    sub.w r4428 r3460 into r4431;\n    ternary r4430 r4431 r4428 into r4432;\n    add r4425 1048576u128 into r4433;\n    ternary r4430 r4433 r4425 into r4434;\n    gte r4432 170141183460469231731687303715884105728u128 into r4435;\n    add.w r4432 r4432 into r4436;\n    add r4436 1u128 into r4437;\n    gte r4437 r3460 into r4438;\n    or r4435 r4438 into r4439;\n    sub.w r4437 r3460 into r4440;\n    ternary r4439 r4440 r4437 into r4441;\n    add r4434 524288u128 into r4442;\n    ternary r4439 r4442 r4434 into r4443;\n    gte r4441 170141183460469231731687303715884105728u128 into r4444;\n    add.w r4441 r4441 into r4445;\n    add r4445 1u128 into r4446;\n    gte r4446 r3460 into r4447;\n    or r4444 r4447 into r4448;\n    sub.w r4446 r3460 into r4449;\n    ternary r4448 r4449 r4446 into r4450;\n    add r4443 262144u128 into r4451;\n    ternary r4448 r4451 r4443 into r4452;\n    gte r4450 170141183460469231731687303715884105728u128 into r4453;\n    add.w r4450 r4450 into r4454;\n    add r4454 1u128 into r4455;\n    gte r4455 r3460 into r4456;\n    or r4453 r4456 into r4457;\n    sub.w r4455 r3460 into r4458;\n    ternary r4457 r4458 r4455 into r4459;\n    add r4452 131072u128 into r4460;\n    ternary r4457 r4460 r4452 into r4461;\n    gte r4459 170141183460469231731687303715884105728u128 into r4462;\n    add.w r4459 r4459 into r4463;\n    add r4463 1u128 into r4464;\n    gte r4464 r3460 into r4465;\n    or r4462 r4465 into r4466;\n    sub.w r4464 r3460 into r4467;\n    ternary r4466 r4467 r4464 into r4468;\n    add r4461 65536u128 into r4469;\n    ternary r4466 r4469 r4461 into r4470;\n    gte r4468 170141183460469231731687303715884105728u128 into r4471;\n    add.w r4468 r4468 into r4472;\n    add r4472 1u128 into r4473;\n    gte r4473 r3460 into r4474;\n    or r4471 r4474 into r4475;\n    sub.w r4473 r3460 into r4476;\n    ternary r4475 r4476 r4473 into r4477;\n    add r4470 32768u128 into r4478;\n    ternary r4475 r4478 r4470 into r4479;\n    gte r4477 170141183460469231731687303715884105728u128 into r4480;\n    add.w r4477 r4477 into r4481;\n    add r4481 1u128 into r4482;\n    gte r4482 r3460 into r4483;\n    or r4480 r4483 into r4484;\n    sub.w r4482 r3460 into r4485;\n    ternary r4484 r4485 r4482 into r4486;\n    add r4479 16384u128 into r4487;\n    ternary r4484 r4487 r4479 into r4488;\n    gte r4486 170141183460469231731687303715884105728u128 into r4489;\n    add.w r4486 r4486 into r4490;\n    add r4490 1u128 into r4491;\n    gte r4491 r3460 into r4492;\n    or r4489 r4492 into r4493;\n    sub.w r4491 r3460 into r4494;\n    ternary r4493 r4494 r4491 into r4495;\n    add r4488 8192u128 into r4496;\n    ternary r4493 r4496 r4488 into r4497;\n    gte r4495 170141183460469231731687303715884105728u128 into r4498;\n    add.w r4495 r4495 into r4499;\n    add r4499 1u128 into r4500;\n    gte r4500 r3460 into r4501;\n    or r4498 r4501 into r4502;\n    sub.w r4500 r3460 into r4503;\n    ternary r4502 r4503 r4500 into r4504;\n    add r4497 4096u128 into r4505;\n    ternary r4502 r4505 r4497 into r4506;\n    gte r4504 170141183460469231731687303715884105728u128 into r4507;\n    add.w r4504 r4504 into r4508;\n    add r4508 1u128 into r4509;\n    gte r4509 r3460 into r4510;\n    or r4507 r4510 into r4511;\n    sub.w r4509 r3460 into r4512;\n    ternary r4511 r4512 r4509 into r4513;\n    add r4506 2048u128 into r4514;\n    ternary r4511 r4514 r4506 into r4515;\n    gte r4513 170141183460469231731687303715884105728u128 into r4516;\n    add.w r4513 r4513 into r4517;\n    add r4517 1u128 into r4518;\n    gte r4518 r3460 into r4519;\n    or r4516 r4519 into r4520;\n    sub.w r4518 r3460 into r4521;\n    ternary r4520 r4521 r4518 into r4522;\n    add r4515 1024u128 into r4523;\n    ternary r4520 r4523 r4515 into r4524;\n    gte r4522 170141183460469231731687303715884105728u128 into r4525;\n    add.w r4522 r4522 into r4526;\n    add r4526 1u128 into r4527;\n    gte r4527 r3460 into r4528;\n    or r4525 r4528 into r4529;\n    sub.w r4527 r3460 into r4530;\n    ternary r4529 r4530 r4527 into r4531;\n    add r4524 512u128 into r4532;\n    ternary r4529 r4532 r4524 into r4533;\n    gte r4531 170141183460469231731687303715884105728u128 into r4534;\n    add.w r4531 r4531 into r4535;\n    add r4535 1u128 into r4536;\n    gte r4536 r3460 into r4537;\n    or r4534 r4537 into r4538;\n    sub.w r4536 r3460 into r4539;\n    ternary r4538 r4539 r4536 into r4540;\n    add r4533 256u128 into r4541;\n    ternary r4538 r4541 r4533 into r4542;\n    gte r4540 170141183460469231731687303715884105728u128 into r4543;\n    add.w r4540 r4540 into r4544;\n    add r4544 1u128 into r4545;\n    gte r4545 r3460 into r4546;\n    or r4543 r4546 into r4547;\n    sub.w r4545 r3460 into r4548;\n    ternary r4547 r4548 r4545 into r4549;\n    add r4542 128u128 into r4550;\n    ternary r4547 r4550 r4542 into r4551;\n    gte r4549 170141183460469231731687303715884105728u128 into r4552;\n    add.w r4549 r4549 into r4553;\n    add r4553 1u128 into r4554;\n    gte r4554 r3460 into r4555;\n    or r4552 r4555 into r4556;\n    sub.w r4554 r3460 into r4557;\n    ternary r4556 r4557 r4554 into r4558;\n    add r4551 64u128 into r4559;\n    ternary r4556 r4559 r4551 into r4560;\n    gte r4558 170141183460469231731687303715884105728u128 into r4561;\n    add.w r4558 r4558 into r4562;\n    add r4562 1u128 into r4563;\n    gte r4563 r3460 into r4564;\n    or r4561 r4564 into r4565;\n    sub.w r4563 r3460 into r4566;\n    ternary r4565 r4566 r4563 into r4567;\n    add r4560 32u128 into r4568;\n    ternary r4565 r4568 r4560 into r4569;\n    gte r4567 170141183460469231731687303715884105728u128 into r4570;\n    add.w r4567 r4567 into r4571;\n    add r4571 1u128 into r4572;\n    gte r4572 r3460 into r4573;\n    or r4570 r4573 into r4574;\n    sub.w r4572 r3460 into r4575;\n    ternary r4574 r4575 r4572 into r4576;\n    add r4569 16u128 into r4577;\n    ternary r4574 r4577 r4569 into r4578;\n    gte r4576 170141183460469231731687303715884105728u128 into r4579;\n    add.w r4576 r4576 into r4580;\n    add r4580 1u128 into r4581;\n    gte r4581 r3460 into r4582;\n    or r4579 r4582 into r4583;\n    sub.w r4581 r3460 into r4584;\n    ternary r4583 r4584 r4581 into r4585;\n    add r4578 8u128 into r4586;\n    ternary r4583 r4586 r4578 into r4587;\n    gte r4585 170141183460469231731687303715884105728u128 into r4588;\n    add.w r4585 r4585 into r4589;\n    add r4589 1u128 into r4590;\n    gte r4590 r3460 into r4591;\n    or r4588 r4591 into r4592;\n    sub.w r4590 r3460 into r4593;\n    ternary r4592 r4593 r4590 into r4594;\n    add r4587 4u128 into r4595;\n    ternary r4592 r4595 r4587 into r4596;\n    gte r4594 170141183460469231731687303715884105728u128 into r4597;\n    add.w r4594 r4594 into r4598;\n    add r4598 1u128 into r4599;\n    gte r4599 r3460 into r4600;\n    or r4597 r4600 into r4601;\n    sub.w r4599 r3460 into r4602;\n    ternary r4601 r4602 r4599 into r4603;\n    add r4596 2u128 into r4604;\n    ternary r4601 r4604 r4596 into r4605;\n    gte r4603 170141183460469231731687303715884105728u128 into r4606;\n    add.w r4603 r4603 into r4607;\n    add r4607 1u128 into r4608;\n    gte r4608 r3460 into r4609;\n    or r4606 r4609 into r4610;\n    add r4605 1u128 into r4611;\n    ternary r4610 r4611 r4605 into r4612;\n    cast r3461 r4612 into r4613 as U256__8JquwLopp8;\n    ternary r3458 r4613.hi r3457.hi into r4614;\n    ternary r3458 r4613.lo r3457.lo into r4615;\n    cast r4614 r4615 into r4616 as U256__8JquwLopp8;\n    lt r2.hi r4616.hi into r4617;\n    gt r2.hi r4616.hi into r4618;\n    lt r2.lo r4616.lo into r4619;\n    ternary r4618 false r4619 into r4620;\n    ternary r4617 true r4620 into r4621;\n    sub r2314 1i32 into r4622;\n    ternary r4621 r4622 r2314 into r4623;\n    is.eq r2.hi r0.hi into r4624;\n    is.eq r2.lo r0.lo into r4625;\n    and r4624 r4625 into r4626;\n    not r4 into r4627;\n    and r4626 r4627 into r4628;\n    ternary r4628 r1 r4623 into r4629;\n    output r4629 as i32.public;\n\nfunction swap:\n    input r0 as dynamic.record;\n    input r1 as field.private;\n    input r2 as address.public;\n    input r3 as field.public;\n    input r4 as boolean.public;\n    input r5 as u128.public;\n    input r6 as u128.public;\n    input r7 as U256__8JquwLopp8.public;\n    input r8 as u64.public;\n    input r9 as u32.public;\n    input r10 as field.public;\n    input r11 as field.public;\n    is.eq self.caller aleo1waeghjttfvzrmk68ckpp4ftnfh7aq6wcm73qxzy0m754x4cu6yxqf38zsq into r12;\n    call verify_blinded_address shield_swap.aleo self.signer r1 r2;\n    cast r3 r4 r5 r6 r7 r2 r8 r9 into r13 as SwapRequest;\n    cast r3 r4 r5 r7 r2 r8 r2 into r14 as SwapKey;\n    hash.bhp256 r14 into r15 as field;\n    ternary r4 r10 r11 into r16;\n    ternary r4 r11 r10 into r17;\n    cast aleo1w0zm05xf0hleydv5w4mj8w4u5matr4q2gmddgj4hucj5yszcn5rqdgd3cj r15 r16 r17 r13 self.caller self.signer r2 into r18 as SwapComplianceRecord.record;\n    call.dynamic r16 'aleo' 'transfer_private_to_public' with r0 shield_swap.aleo r5 (as dynamic.record address.public u128.public) into r19 r20 (as dynamic.record dynamic.future);\n    async swap r20 r13 r10 r11 r15 r16 r17 r2 r12 into r21;\n    output r15 as field.public;\n    output r19 as dynamic.record;\n    output r18 as SwapComplianceRecord.record;\n    output r21 as shield_swap.aleo/swap.future;\n\nfinalize swap:\n    input r0 as dynamic.future;\n    input r1 as SwapRequest.public;\n    input r2 as field.public;\n    input r3 as field.public;\n    input r4 as field.public;\n    input r5 as field.public;\n    input r6 as field.public;\n    input r7 as address.public;\n    input r8 as boolean.public;\n    contains from_wrapper_token_id[r5] into r9;\n    branch.eq r9 false to end_then_0_0;\n    assert.eq r8 true;\n    branch.eq true true to end_otherwise_0_1;\n    position end_then_0_0;\n    position end_otherwise_0_1;\n    await r0;\n    lte block.height r1.deadline into r10;\n    assert.eq r10 true;\n    get.or_use global_paused[true] false into r11;\n    not r11 into r12;\n    assert.eq r12 true;\n    get pools[r1.pool] into r13;\n    assert.eq r13.enabled true;\n    get.or_use token_paused[r13.token0] false into r14;\n    not r14 into r15;\n    assert.eq r15 true;\n    get.or_use token_paused[r13.token1] false into r16;\n    not r16 into r17;\n    assert.eq r17 true;\n    cast r13.token0 r13.token1 into r18 as PairKey;\n    get.or_use pair_paused[r18] false into r19;\n    not r19 into r20;\n    assert.eq r20 true;\n    is.eq r13.token0 r2 into r21;\n    assert.eq r21 true;\n    is.eq r13.token1 r3 into r22;\n    assert.eq r22 true;\n    get slots[r1.pool] into r23;\n    cast r13.fee into r24 as u32;\n    lt r1.sqrt_price_limit.hi 0u128 into r25;\n    gt r1.sqrt_price_limit.hi 0u128 into r26;\n    lt r1.sqrt_price_limit.lo 702075911466779181339691826087u128 into r27;\n    ternary r26 false r27 into r28;\n    ternary r25 true r28 into r29;\n    not r29 into r30;\n    lt 484680305u128 r1.sqrt_price_limit.hi into r31;\n    gt 484680305u128 r1.sqrt_price_limit.hi into r32;\n    lt 8756686347225649145659787327114459760u128 r1.sqrt_price_limit.lo into r33;\n    ternary r32 false r33 into r34;\n    ternary r31 true r34 into r35;\n    not r35 into r36;\n    and r30 r36 into r37;\n    assert.eq r37 true;\n    lt r1.sqrt_price_limit.hi r23.sqrt_price.hi into r38;\n    gt r1.sqrt_price_limit.hi r23.sqrt_price.hi into r39;\n    lt r1.sqrt_price_limit.lo r23.sqrt_price.lo into r40;\n    ternary r39 false r40 into r41;\n    ternary r38 true r41 into r42;\n    lt r23.sqrt_price.hi r1.sqrt_price_limit.hi into r43;\n    gt r23.sqrt_price.hi r1.sqrt_price_limit.hi into r44;\n    lt r23.sqrt_price.lo r1.sqrt_price_limit.lo into r45;\n    ternary r44 false r45 into r46;\n    ternary r43 true r46 into r47;\n    ternary r1.zero_for_one r42 r47 into r48;\n    assert.eq r48 true;\n    gt r1.amount_in 0u128 into r49;\n    assert.eq r49 true;\n    ternary r1.zero_for_one r23.fee_growth_global0_x_128.hi r23.fee_growth_global1_x_128.hi into r50;\n    ternary r1.zero_for_one r23.fee_growth_global0_x_128.lo r23.fee_growth_global1_x_128.lo into r51;\n    cast r50 r51 into r52 as U256__8JquwLopp8;\n    cast r1.zero_for_one r1.sqrt_price_limit r24 r23.fee_protocol r23.fee_growth_global0_x_128 r23.fee_growth_global1_x_128 into r53 as SwapIterCfg;\n    ternary r1.zero_for_one r23.next_init_below r23.next_init_above into r54;\n    cast r1.pool r54 into r55 as TickKey;\n    hash.bhp256 r55 into r56 as field;\n    get ticks[r56] into r57;\n    call view_sqrt_price_at_tick_x128 r54 into r58;\n    cast r23.sqrt_price r1.amount_in 0u128 r52 r23.liquidity r23.tick true 0u128 r23.next_init_below r23.next_init_above into r59 as SwapIterState;\n    call view_swap_iteration_v2 r53 r54 r58 r57 r59 into r60 r61 r62;\n    set r61 into ticks[r56];\n    not r60.crossed into r63;\n    is.eq r60.sp.hi r23.sqrt_price.hi into r64;\n    is.eq r60.sp.lo r23.sqrt_price.lo into r65;\n    and r64 r65 into r66;\n    not r66 into r67;\n    and r63 r67 into r68;\n    ternary r1.zero_for_one r60.nb r60.na into r69;\n    cast r1.pool r69 into r70 as TickKey;\n    hash.bhp256 r70 into r71 as field;\n    get ticks[r71] into r72;\n    call view_sqrt_price_at_tick_x128 r69 into r73;\n    cast r60.sp r60.rem r60.out r60.fg r60.liq r60.tk r60.crossed r60.pf r60.nb r60.na into r74 as SwapIterState;\n    call view_swap_iteration_v2 r53 r69 r73 r72 r74 into r75 r76 r77;\n    set r76 into ticks[r71];\n    not r75.crossed into r78;\n    is.eq r75.sp.hi r60.sp.hi into r79;\n    is.eq r75.sp.lo r60.sp.lo into r80;\n    and r79 r80 into r81;\n    not r81 into r82;\n    and r78 r82 into r83;\n    or r68 r83 into r84;\n    add r62 r77 into r85;\n    ternary r1.zero_for_one r75.nb r75.na into r86;\n    cast r1.pool r86 into r87 as TickKey;\n    hash.bhp256 r87 into r88 as field;\n    get ticks[r88] into r89;\n    call view_sqrt_price_at_tick_x128 r86 into r90;\n    cast r75.sp r75.rem r75.out r75.fg r75.liq r75.tk r75.crossed r75.pf r75.nb r75.na into r91 as SwapIterState;\n    call view_swap_iteration_v2 r53 r86 r90 r89 r91 into r92 r93 r94;\n    set r93 into ticks[r88];\n    not r92.crossed into r95;\n    is.eq r92.sp.hi r75.sp.hi into r96;\n    is.eq r92.sp.lo r75.sp.lo into r97;\n    and r96 r97 into r98;\n    not r98 into r99;\n    and r95 r99 into r100;\n    or r84 r100 into r101;\n    add r85 r94 into r102;\n    ternary r1.zero_for_one r92.nb r92.na into r103;\n    cast r1.pool r103 into r104 as TickKey;\n    hash.bhp256 r104 into r105 as field;\n    get ticks[r105] into r106;\n    call view_sqrt_price_at_tick_x128 r103 into r107;\n    cast r92.sp r92.rem r92.out r92.fg r92.liq r92.tk r92.crossed r92.pf r92.nb r92.na into r108 as SwapIterState;\n    call view_swap_iteration_v2 r53 r103 r107 r106 r108 into r109 r110 r111;\n    set r110 into ticks[r105];\n    not r109.crossed into r112;\n    is.eq r109.sp.hi r92.sp.hi into r113;\n    is.eq r109.sp.lo r92.sp.lo into r114;\n    and r113 r114 into r115;\n    not r115 into r116;\n    and r112 r116 into r117;\n    or r101 r117 into r118;\n    add r102 r111 into r119;\n    ternary r1.zero_for_one r109.nb r109.na into r120;\n    cast r1.pool r120 into r121 as TickKey;\n    hash.bhp256 r121 into r122 as field;\n    get ticks[r122] into r123;\n    call view_sqrt_price_at_tick_x128 r120 into r124;\n    cast r109.sp r109.rem r109.out r109.fg r109.liq r109.tk r109.crossed r109.pf r109.nb r109.na into r125 as SwapIterState;\n    call view_swap_iteration_v2 r53 r120 r124 r123 r125 into r126 r127 r128;\n    set r127 into ticks[r122];\n    not r126.crossed into r129;\n    is.eq r126.sp.hi r109.sp.hi into r130;\n    is.eq r126.sp.lo r109.sp.lo into r131;\n    and r130 r131 into r132;\n    not r132 into r133;\n    and r129 r133 into r134;\n    or r118 r134 into r135;\n    add r119 r128 into r136;\n    ternary r1.zero_for_one r126.nb r126.na into r137;\n    call view_sqrt_price_at_tick_x128 r137 into r138;\n    call view_bounded_partial_v2 r126.sp r126.liq r126.rem r126.out r126.fg r126.pf r138 r1.sqrt_price_limit r24 r23.fee_protocol r1.zero_for_one into r139 r140 r141 r142 r143 r144 r145;\n    call resolve_stored_tick r126.sp r126.tk r139 r144 r135 into r146;\n    add r136 r145 into r147;\n    gt r140 0u128 into r148;\n    is.eq r141 r1.amount_in into r149;\n    or r148 r149 into r150;\n    gte r140 r1.amount_out_min into r151;\n    and r150 r151 into r152;\n    assert.eq r152 true;\n    add r23.protocol_fees0 r143 into r153;\n    ternary r1.zero_for_one r153 r23.protocol_fees0 into r154;\n    add r23.protocol_fees1 r143 into r155;\n    ternary r1.zero_for_one r23.protocol_fees1 r155 into r156;\n    ternary r1.zero_for_one r142.hi r23.fee_growth_global0_x_128.hi into r157;\n    ternary r1.zero_for_one r142.lo r23.fee_growth_global0_x_128.lo into r158;\n    cast r157 r158 into r159 as U256__8JquwLopp8;\n    ternary r1.zero_for_one r23.fee_growth_global1_x_128.hi r142.hi into r160;\n    ternary r1.zero_for_one r23.fee_growth_global1_x_128.lo r142.lo into r161;\n    cast r160 r161 into r162 as U256__8JquwLopp8;\n    cast r146 r23.tick_spacing r139 r23.fee_protocol r126.liq r159 r162 r23.max_liquidity_per_tick r154 r156 r126.nb r126.na into r163 as Slot;\n    set r163 into slots[r1.pool];\n    contains swap_outputs[r4] into r164;\n    not r164 into r165;\n    assert.eq r165 true;\n    contains swap_execution_headers[r4] into r166;\n    not r166 into r167;\n    assert.eq r167 true;\n    cast block.height 1u8 into r168 as SwapExecutionHeader;\n    set r168 into swap_execution_headers[r4];\n    cast r4 0u8 into r169 as SwapExecutionKey;\n    sub r1.amount_in r141 into r170;\n    cast r1.pool r1.zero_for_one r170 r140 r147 r143 r139 r126.liq r146 into r171 as HopExecution;\n    set r171 into swap_execution_hops[r169];\n    cast r1.recipient r7 r5 r6 r140 r141 into r172 as SwapOutput;\n    set r172 into swap_outputs[r4];\n    contains used_blinded_addresses[r7] into r173;\n    not r173 into r174;\n    assert.eq r174 true;\n    set true into used_blinded_addresses[r7];\n\nfunction claim_swap_output:\n    input r0 as field.private;\n    input r1 as address.public;\n    input r2 as field.public;\n    input r3 as field.public;\n    input r4 as field.public;\n    input r5 as u128.public;\n    input r6 as u128.public;\n    input r7 as [MerkleProof; 2u32].private;\n    is.eq self.caller aleo1waeghjttfvzrmk68ckpp4ftnfh7aq6wcm73qxzy0m754x4cu6yxqf38zsq into r8;\n    call verify_blinded_address shield_swap.aleo self.signer r0 r1;\n    and r7[0u32].leaf_index 1u32 into r9;\n    is.eq r9 0u32 into r10;\n    cast 1field r7[0u32].siblings[0u32] r7[0u32].siblings[1u32] into r11 as [field; 3u32];\n    cast 1field r7[0u32].siblings[1u32] r7[0u32].siblings[0u32] into r12 as [field; 3u32];\n    ternary r10 r11[0u32] r12[0u32] into r13;\n    ternary r10 r11[1u32] r12[1u32] into r14;\n    ternary r10 r11[2u32] r12[2u32] into r15;\n    cast r13 r14 r15 into r16 as [field; 3u32];\n    hash.psd4 r16 into r17 as field;\n    is.eq r7[0u32].siblings[2u32] 0field into r18;\n    shr r7[0u32].leaf_index 1u8 into r19;\n    and r19 1u32 into r20;\n    is.eq r20 0u32 into r21;\n    cast 0field r17 r7[0u32].siblings[2u32] into r22 as [field; 3u32];\n    cast 0field r7[0u32].siblings[2u32] r17 into r23 as [field; 3u32];\n    ternary r21 r22[0u32] r23[0u32] into r24;\n    ternary r21 r22[1u32] r23[1u32] into r25;\n    ternary r21 r22[2u32] r23[2u32] into r26;\n    cast r24 r25 r26 into r27 as [field; 3u32];\n    hash.psd4 r27 into r28 as field;\n    is.eq r7[0u32].siblings[3u32] 0field into r29;\n    shr r7[0u32].leaf_index 2u8 into r30;\n    and r30 1u32 into r31;\n    is.eq r31 0u32 into r32;\n    cast 0field r28 r7[0u32].siblings[3u32] into r33 as [field; 3u32];\n    cast 0field r7[0u32].siblings[3u32] r28 into r34 as [field; 3u32];\n    ternary r32 r33[0u32] r34[0u32] into r35;\n    ternary r32 r33[1u32] r34[1u32] into r36;\n    ternary r32 r33[2u32] r34[2u32] into r37;\n    cast r35 r36 r37 into r38 as [field; 3u32];\n    hash.psd4 r38 into r39 as field;\n    is.eq r7[0u32].siblings[4u32] 0field into r40;\n    shr r7[0u32].leaf_index 3u8 into r41;\n    and r41 1u32 into r42;\n    is.eq r42 0u32 into r43;\n    cast 0field r39 r7[0u32].siblings[4u32] into r44 as [field; 3u32];\n    cast 0field r7[0u32].siblings[4u32] r39 into r45 as [field; 3u32];\n    ternary r43 r44[0u32] r45[0u32] into r46;\n    ternary r43 r44[1u32] r45[1u32] into r47;\n    ternary r43 r44[2u32] r45[2u32] into r48;\n    cast r46 r47 r48 into r49 as [field; 3u32];\n    hash.psd4 r49 into r50 as field;\n    is.eq r7[0u32].siblings[5u32] 0field into r51;\n    shr r7[0u32].leaf_index 4u8 into r52;\n    and r52 1u32 into r53;\n    is.eq r53 0u32 into r54;\n    cast 0field r50 r7[0u32].siblings[5u32] into r55 as [field; 3u32];\n    cast 0field r7[0u32].siblings[5u32] r50 into r56 as [field; 3u32];\n    ternary r54 r55[0u32] r56[0u32] into r57;\n    ternary r54 r55[1u32] r56[1u32] into r58;\n    ternary r54 r55[2u32] r56[2u32] into r59;\n    cast r57 r58 r59 into r60 as [field; 3u32];\n    hash.psd4 r60 into r61 as field;\n    is.eq r7[0u32].siblings[6u32] 0field into r62;\n    shr r7[0u32].leaf_index 5u8 into r63;\n    and r63 1u32 into r64;\n    is.eq r64 0u32 into r65;\n    cast 0field r61 r7[0u32].siblings[6u32] into r66 as [field; 3u32];\n    cast 0field r7[0u32].siblings[6u32] r61 into r67 as [field; 3u32];\n    ternary r65 r66[0u32] r67[0u32] into r68;\n    ternary r65 r66[1u32] r67[1u32] into r69;\n    ternary r65 r66[2u32] r67[2u32] into r70;\n    cast r68 r69 r70 into r71 as [field; 3u32];\n    hash.psd4 r71 into r72 as field;\n    is.eq r7[0u32].siblings[7u32] 0field into r73;\n    shr r7[0u32].leaf_index 6u8 into r74;\n    and r74 1u32 into r75;\n    is.eq r75 0u32 into r76;\n    cast 0field r72 r7[0u32].siblings[7u32] into r77 as [field; 3u32];\n    cast 0field r7[0u32].siblings[7u32] r72 into r78 as [field; 3u32];\n    ternary r76 r77[0u32] r78[0u32] into r79;\n    ternary r76 r77[1u32] r78[1u32] into r80;\n    ternary r76 r77[2u32] r78[2u32] into r81;\n    cast r79 r80 r81 into r82 as [field; 3u32];\n    hash.psd4 r82 into r83 as field;\n    is.eq r7[0u32].siblings[8u32] 0field into r84;\n    shr r7[0u32].leaf_index 7u8 into r85;\n    and r85 1u32 into r86;\n    is.eq r86 0u32 into r87;\n    cast 0field r83 r7[0u32].siblings[8u32] into r88 as [field; 3u32];\n    cast 0field r7[0u32].siblings[8u32] r83 into r89 as [field; 3u32];\n    ternary r87 r88[0u32] r89[0u32] into r90;\n    ternary r87 r88[1u32] r89[1u32] into r91;\n    ternary r87 r88[2u32] r89[2u32] into r92;\n    cast r90 r91 r92 into r93 as [field; 3u32];\n    hash.psd4 r93 into r94 as field;\n    is.eq r7[0u32].siblings[9u32] 0field into r95;\n    shr r7[0u32].leaf_index 8u8 into r96;\n    and r96 1u32 into r97;\n    is.eq r97 0u32 into r98;\n    cast 0field r94 r7[0u32].siblings[9u32] into r99 as [field; 3u32];\n    cast 0field r7[0u32].siblings[9u32] r94 into r100 as [field; 3u32];\n    ternary r98 r99[0u32] r100[0u32] into r101;\n    ternary r98 r99[1u32] r100[1u32] into r102;\n    ternary r98 r99[2u32] r100[2u32] into r103;\n    cast r101 r102 r103 into r104 as [field; 3u32];\n    hash.psd4 r104 into r105 as field;\n    is.eq r7[0u32].siblings[10u32] 0field into r106;\n    shr r7[0u32].leaf_index 9u8 into r107;\n    and r107 1u32 into r108;\n    is.eq r108 0u32 into r109;\n    cast 0field r105 r7[0u32].siblings[10u32] into r110 as [field; 3u32];\n    cast 0field r7[0u32].siblings[10u32] r105 into r111 as [field; 3u32];\n    ternary r109 r110[0u32] r111[0u32] into r112;\n    ternary r109 r110[1u32] r111[1u32] into r113;\n    ternary r109 r110[2u32] r111[2u32] into r114;\n    cast r112 r113 r114 into r115 as [field; 3u32];\n    hash.psd4 r115 into r116 as field;\n    is.eq r7[0u32].siblings[11u32] 0field into r117;\n    shr r7[0u32].leaf_index 10u8 into r118;\n    and r118 1u32 into r119;\n    is.eq r119 0u32 into r120;\n    cast 0field r116 r7[0u32].siblings[11u32] into r121 as [field; 3u32];\n    cast 0field r7[0u32].siblings[11u32] r116 into r122 as [field; 3u32];\n    ternary r120 r121[0u32] r122[0u32] into r123;\n    ternary r120 r121[1u32] r122[1u32] into r124;\n    ternary r120 r121[2u32] r122[2u32] into r125;\n    cast r123 r124 r125 into r126 as [field; 3u32];\n    hash.psd4 r126 into r127 as field;\n    is.eq r7[0u32].siblings[12u32] 0field into r128;\n    shr r7[0u32].leaf_index 11u8 into r129;\n    and r129 1u32 into r130;\n    is.eq r130 0u32 into r131;\n    cast 0field r127 r7[0u32].siblings[12u32] into r132 as [field; 3u32];\n    cast 0field r7[0u32].siblings[12u32] r127 into r133 as [field; 3u32];\n    ternary r131 r132[0u32] r133[0u32] into r134;\n    ternary r131 r132[1u32] r133[1u32] into r135;\n    ternary r131 r132[2u32] r133[2u32] into r136;\n    cast r134 r135 r136 into r137 as [field; 3u32];\n    hash.psd4 r137 into r138 as field;\n    is.eq r7[0u32].siblings[13u32] 0field into r139;\n    shr r7[0u32].leaf_index 12u8 into r140;\n    and r140 1u32 into r141;\n    is.eq r141 0u32 into r142;\n    cast 0field r138 r7[0u32].siblings[13u32] into r143 as [field; 3u32];\n    cast 0field r7[0u32].siblings[13u32] r138 into r144 as [field; 3u32];\n    ternary r142 r143[0u32] r144[0u32] into r145;\n    ternary r142 r143[1u32] r144[1u32] into r146;\n    ternary r142 r143[2u32] r144[2u32] into r147;\n    cast r145 r146 r147 into r148 as [field; 3u32];\n    hash.psd4 r148 into r149 as field;\n    is.eq r7[0u32].siblings[14u32] 0field into r150;\n    shr r7[0u32].leaf_index 13u8 into r151;\n    and r151 1u32 into r152;\n    is.eq r152 0u32 into r153;\n    cast 0field r149 r7[0u32].siblings[14u32] into r154 as [field; 3u32];\n    cast 0field r7[0u32].siblings[14u32] r149 into r155 as [field; 3u32];\n    ternary r153 r154[0u32] r155[0u32] into r156;\n    ternary r153 r154[1u32] r155[1u32] into r157;\n    ternary r153 r154[2u32] r155[2u32] into r158;\n    cast r156 r157 r158 into r159 as [field; 3u32];\n    hash.psd4 r159 into r160 as field;\n    is.eq r7[0u32].siblings[15u32] 0field into r161;\n    shr r7[0u32].leaf_index 14u8 into r162;\n    and r162 1u32 into r163;\n    is.eq r163 0u32 into r164;\n    cast 0field r160 r7[0u32].siblings[15u32] into r165 as [field; 3u32];\n    cast 0field r7[0u32].siblings[15u32] r160 into r166 as [field; 3u32];\n    ternary r164 r165[0u32] r166[0u32] into r167;\n    ternary r164 r165[1u32] r166[1u32] into r168;\n    ternary r164 r165[2u32] r166[2u32] into r169;\n    cast r167 r168 r169 into r170 as [field; 3u32];\n    hash.psd4 r170 into r171 as field;\n    ternary r161 r160 r171 into r172;\n    ternary r161 14u8 15u8 into r173;\n    ternary r150 r149 r172 into r174;\n    ternary r150 13u8 r173 into r175;\n    ternary r139 r138 r174 into r176;\n    ternary r139 12u8 r175 into r177;\n    ternary r128 r127 r176 into r178;\n    ternary r128 11u8 r177 into r179;\n    ternary r117 r116 r178 into r180;\n    ternary r117 10u8 r179 into r181;\n    ternary r106 r105 r180 into r182;\n    ternary r106 9u8 r181 into r183;\n    ternary r95 r94 r182 into r184;\n    ternary r95 8u8 r183 into r185;\n    ternary r84 r83 r184 into r186;\n    ternary r84 7u8 r185 into r187;\n    ternary r73 r72 r186 into r188;\n    ternary r73 6u8 r187 into r189;\n    ternary r62 r61 r188 into r190;\n    ternary r62 5u8 r189 into r191;\n    ternary r51 r50 r190 into r192;\n    ternary r51 4u8 r191 into r193;\n    ternary r40 r39 r192 into r194;\n    ternary r40 3u8 r193 into r195;\n    ternary r29 r28 r194 into r196;\n    ternary r29 2u8 r195 into r197;\n    ternary r18 r17 r196 into r198;\n    ternary r18 1u8 r197 into r199;\n    and r7[1u32].leaf_index 1u32 into r200;\n    is.eq r200 0u32 into r201;\n    cast 1field r7[1u32].siblings[0u32] r7[1u32].siblings[1u32] into r202 as [field; 3u32];\n    cast 1field r7[1u32].siblings[1u32] r7[1u32].siblings[0u32] into r203 as [field; 3u32];\n    ternary r201 r202[0u32] r203[0u32] into r204;\n    ternary r201 r202[1u32] r203[1u32] into r205;\n    ternary r201 r202[2u32] r203[2u32] into r206;\n    cast r204 r205 r206 into r207 as [field; 3u32];\n    hash.psd4 r207 into r208 as field;\n    is.eq r7[1u32].siblings[2u32] 0field into r209;\n    shr r7[1u32].leaf_index 1u8 into r210;\n    and r210 1u32 into r211;\n    is.eq r211 0u32 into r212;\n    cast 0field r208 r7[1u32].siblings[2u32] into r213 as [field; 3u32];\n    cast 0field r7[1u32].siblings[2u32] r208 into r214 as [field; 3u32];\n    ternary r212 r213[0u32] r214[0u32] into r215;\n    ternary r212 r213[1u32] r214[1u32] into r216;\n    ternary r212 r213[2u32] r214[2u32] into r217;\n    cast r215 r216 r217 into r218 as [field; 3u32];\n    hash.psd4 r218 into r219 as field;\n    is.eq r7[1u32].siblings[3u32] 0field into r220;\n    shr r7[1u32].leaf_index 2u8 into r221;\n    and r221 1u32 into r222;\n    is.eq r222 0u32 into r223;\n    cast 0field r219 r7[1u32].siblings[3u32] into r224 as [field; 3u32];\n    cast 0field r7[1u32].siblings[3u32] r219 into r225 as [field; 3u32];\n    ternary r223 r224[0u32] r225[0u32] into r226;\n    ternary r223 r224[1u32] r225[1u32] into r227;\n    ternary r223 r224[2u32] r225[2u32] into r228;\n    cast r226 r227 r228 into r229 as [field; 3u32];\n    hash.psd4 r229 into r230 as field;\n    is.eq r7[1u32].siblings[4u32] 0field into r231;\n    shr r7[1u32].leaf_index 3u8 into r232;\n    and r232 1u32 into r233;\n    is.eq r233 0u32 into r234;\n    cast 0field r230 r7[1u32].siblings[4u32] into r235 as [field; 3u32];\n    cast 0field r7[1u32].siblings[4u32] r230 into r236 as [field; 3u32];\n    ternary r234 r235[0u32] r236[0u32] into r237;\n    ternary r234 r235[1u32] r236[1u32] into r238;\n    ternary r234 r235[2u32] r236[2u32] into r239;\n    cast r237 r238 r239 into r240 as [field; 3u32];\n    hash.psd4 r240 into r241 as field;\n    is.eq r7[1u32].siblings[5u32] 0field into r242;\n    shr r7[1u32].leaf_index 4u8 into r243;\n    and r243 1u32 into r244;\n    is.eq r244 0u32 into r245;\n    cast 0field r241 r7[1u32].siblings[5u32] into r246 as [field; 3u32];\n    cast 0field r7[1u32].siblings[5u32] r241 into r247 as [field; 3u32];\n    ternary r245 r246[0u32] r247[0u32] into r248;\n    ternary r245 r246[1u32] r247[1u32] into r249;\n    ternary r245 r246[2u32] r247[2u32] into r250;\n    cast r248 r249 r250 into r251 as [field; 3u32];\n    hash.psd4 r251 into r252 as field;\n    is.eq r7[1u32].siblings[6u32] 0field into r253;\n    shr r7[1u32].leaf_index 5u8 into r254;\n    and r254 1u32 into r255;\n    is.eq r255 0u32 into r256;\n    cast 0field r252 r7[1u32].siblings[6u32] into r257 as [field; 3u32];\n    cast 0field r7[1u32].siblings[6u32] r252 into r258 as [field; 3u32];\n    ternary r256 r257[0u32] r258[0u32] into r259;\n    ternary r256 r257[1u32] r258[1u32] into r260;\n    ternary r256 r257[2u32] r258[2u32] into r261;\n    cast r259 r260 r261 into r262 as [field; 3u32];\n    hash.psd4 r262 into r263 as field;\n    is.eq r7[1u32].siblings[7u32] 0field into r264;\n    shr r7[1u32].leaf_index 6u8 into r265;\n    and r265 1u32 into r266;\n    is.eq r266 0u32 into r267;\n    cast 0field r263 r7[1u32].siblings[7u32] into r268 as [field; 3u32];\n    cast 0field r7[1u32].siblings[7u32] r263 into r269 as [field; 3u32];\n    ternary r267 r268[0u32] r269[0u32] into r270;\n    ternary r267 r268[1u32] r269[1u32] into r271;\n    ternary r267 r268[2u32] r269[2u32] into r272;\n    cast r270 r271 r272 into r273 as [field; 3u32];\n    hash.psd4 r273 into r274 as field;\n    is.eq r7[1u32].siblings[8u32] 0field into r275;\n    shr r7[1u32].leaf_index 7u8 into r276;\n    and r276 1u32 into r277;\n    is.eq r277 0u32 into r278;\n    cast 0field r274 r7[1u32].siblings[8u32] into r279 as [field; 3u32];\n    cast 0field r7[1u32].siblings[8u32] r274 into r280 as [field; 3u32];\n    ternary r278 r279[0u32] r280[0u32] into r281;\n    ternary r278 r279[1u32] r280[1u32] into r282;\n    ternary r278 r279[2u32] r280[2u32] into r283;\n    cast r281 r282 r283 into r284 as [field; 3u32];\n    hash.psd4 r284 into r285 as field;\n    is.eq r7[1u32].siblings[9u32] 0field into r286;\n    shr r7[1u32].leaf_index 8u8 into r287;\n    and r287 1u32 into r288;\n    is.eq r288 0u32 into r289;\n    cast 0field r285 r7[1u32].siblings[9u32] into r290 as [field; 3u32];\n    cast 0field r7[1u32].siblings[9u32] r285 into r291 as [field; 3u32];\n    ternary r289 r290[0u32] r291[0u32] into r292;\n    ternary r289 r290[1u32] r291[1u32] into r293;\n    ternary r289 r290[2u32] r291[2u32] into r294;\n    cast r292 r293 r294 into r295 as [field; 3u32];\n    hash.psd4 r295 into r296 as field;\n    is.eq r7[1u32].siblings[10u32] 0field into r297;\n    shr r7[1u32].leaf_index 9u8 into r298;\n    and r298 1u32 into r299;\n    is.eq r299 0u32 into r300;\n    cast 0field r296 r7[1u32].siblings[10u32] into r301 as [field; 3u32];\n    cast 0field r7[1u32].siblings[10u32] r296 into r302 as [field; 3u32];\n    ternary r300 r301[0u32] r302[0u32] into r303;\n    ternary r300 r301[1u32] r302[1u32] into r304;\n    ternary r300 r301[2u32] r302[2u32] into r305;\n    cast r303 r304 r305 into r306 as [field; 3u32];\n    hash.psd4 r306 into r307 as field;\n    is.eq r7[1u32].siblings[11u32] 0field into r308;\n    shr r7[1u32].leaf_index 10u8 into r309;\n    and r309 1u32 into r310;\n    is.eq r310 0u32 into r311;\n    cast 0field r307 r7[1u32].siblings[11u32] into r312 as [field; 3u32];\n    cast 0field r7[1u32].siblings[11u32] r307 into r313 as [field; 3u32];\n    ternary r311 r312[0u32] r313[0u32] into r314;\n    ternary r311 r312[1u32] r313[1u32] into r315;\n    ternary r311 r312[2u32] r313[2u32] into r316;\n    cast r314 r315 r316 into r317 as [field; 3u32];\n    hash.psd4 r317 into r318 as field;\n    is.eq r7[1u32].siblings[12u32] 0field into r319;\n    shr r7[1u32].leaf_index 11u8 into r320;\n    and r320 1u32 into r321;\n    is.eq r321 0u32 into r322;\n    cast 0field r318 r7[1u32].siblings[12u32] into r323 as [field; 3u32];\n    cast 0field r7[1u32].siblings[12u32] r318 into r324 as [field; 3u32];\n    ternary r322 r323[0u32] r324[0u32] into r325;\n    ternary r322 r323[1u32] r324[1u32] into r326;\n    ternary r322 r323[2u32] r324[2u32] into r327;\n    cast r325 r326 r327 into r328 as [field; 3u32];\n    hash.psd4 r328 into r329 as field;\n    is.eq r7[1u32].siblings[13u32] 0field into r330;\n    shr r7[1u32].leaf_index 12u8 into r331;\n    and r331 1u32 into r332;\n    is.eq r332 0u32 into r333;\n    cast 0field r329 r7[1u32].siblings[13u32] into r334 as [field; 3u32];\n    cast 0field r7[1u32].siblings[13u32] r329 into r335 as [field; 3u32];\n    ternary r333 r334[0u32] r335[0u32] into r336;\n    ternary r333 r334[1u32] r335[1u32] into r337;\n    ternary r333 r334[2u32] r335[2u32] into r338;\n    cast r336 r337 r338 into r339 as [field; 3u32];\n    hash.psd4 r339 into r340 as field;\n    is.eq r7[1u32].siblings[14u32] 0field into r341;\n    shr r7[1u32].leaf_index 13u8 into r342;\n    and r342 1u32 into r343;\n    is.eq r343 0u32 into r344;\n    cast 0field r340 r7[1u32].siblings[14u32] into r345 as [field; 3u32];\n    cast 0field r7[1u32].siblings[14u32] r340 into r346 as [field; 3u32];\n    ternary r344 r345[0u32] r346[0u32] into r347;\n    ternary r344 r345[1u32] r346[1u32] into r348;\n    ternary r344 r345[2u32] r346[2u32] into r349;\n    cast r347 r348 r349 into r350 as [field; 3u32];\n    hash.psd4 r350 into r351 as field;\n    is.eq r7[1u32].siblings[15u32] 0field into r352;\n    shr r7[1u32].leaf_index 14u8 into r353;\n    and r353 1u32 into r354;\n    is.eq r354 0u32 into r355;\n    cast 0field r351 r7[1u32].siblings[15u32] into r356 as [field; 3u32];\n    cast 0field r7[1u32].siblings[15u32] r351 into r357 as [field; 3u32];\n    ternary r355 r356[0u32] r357[0u32] into r358;\n    ternary r355 r356[1u32] r357[1u32] into r359;\n    ternary r355 r356[2u32] r357[2u32] into r360;\n    cast r358 r359 r360 into r361 as [field; 3u32];\n    hash.psd4 r361 into r362 as field;\n    ternary r352 r351 r362 into r363;\n    ternary r352 14u8 15u8 into r364;\n    ternary r341 r340 r363 into r365;\n    ternary r341 13u8 r364 into r366;\n    ternary r330 r329 r365 into r367;\n    ternary r330 12u8 r366 into r368;\n    ternary r319 r318 r367 into r369;\n    ternary r319 11u8 r368 into r370;\n    ternary r308 r307 r369 into r371;\n    ternary r308 10u8 r370 into r372;\n    ternary r297 r296 r371 into r373;\n    ternary r297 9u8 r372 into r374;\n    ternary r286 r285 r373 into r375;\n    ternary r286 8u8 r374 into r376;\n    ternary r275 r274 r375 into r377;\n    ternary r275 7u8 r376 into r378;\n    ternary r264 r263 r377 into r379;\n    ternary r264 6u8 r378 into r380;\n    ternary r253 r252 r379 into r381;\n    ternary r253 5u8 r380 into r382;\n    ternary r242 r241 r381 into r383;\n    ternary r242 4u8 r382 into r384;\n    ternary r231 r230 r383 into r385;\n    ternary r231 3u8 r384 into r386;\n    ternary r220 r219 r385 into r387;\n    ternary r220 2u8 r386 into r388;\n    ternary r209 r208 r387 into r389;\n    ternary r209 1u8 r388 into r390;\n    assert.eq r198 r389;\n    assert.eq r199 r390;\n    cast self.signer into r391 as field;\n    lt r391 r7[0u32].siblings[0u32] into r392;\n    is.eq r391 r7[0u32].siblings[0u32] into r393;\n    nor r392 r393 into r394;\n    is.eq r7[0u32].leaf_index r7[1u32].leaf_index into r395;\n    is.eq r7[0u32].leaf_index 0u32 into r396;\n    and r395 r396 into r397;\n    not r397 into r398;\n    or r392 r398 into r399;\n    assert.eq r399 true;\n    not r396 into r400;\n    shl 1u32 r199 into r401;\n    sub r401 1u32 into r402;\n    and r395 r400 into r403;\n    not r403 into r404;\n    is.eq r7[0u32].leaf_index r402 into r405;\n    or r405 r404 into r406;\n    assert.eq r406 true;\n    or r394 r404 into r407;\n    assert.eq r407 true;\n    not r395 into r408;\n    not r408 into r409;\n    or r394 r409 into r410;\n    assert.eq r410 true;\n    lt r391 r7[1u32].siblings[0u32] into r411;\n    or r411 r409 into r412;\n    assert.eq r412 true;\n    lte r7[1u32].leaf_index r402 into r413;\n    or r413 r409 into r414;\n    assert.eq r414 true;\n    add r7[0u32].leaf_index 1u32 into r415;\n    is.eq r415 r7[1u32].leaf_index into r416;\n    or r416 r409 into r417;\n    assert.eq r417 true;\n    call.dynamic r4 'aleo' 'transfer_public_to_private' with self.signer r5 (as address.private u128.public) into r418 r419 (as dynamic.record dynamic.future);\n    call.dynamic r3 'aleo' 'transfer_public_to_private' with self.signer r6 (as address.private u128.public) into r420 r421 (as dynamic.record dynamic.future);\n    async claim_swap_output r419 r421 r2 r3 r4 r5 r6 r1 r198 r8 into r422;\n    output r418 as dynamic.record;\n    output r420 as dynamic.record;\n    output r422 as shield_swap.aleo/claim_swap_output.future;\n\nfinalize claim_swap_output:\n    input r0 as dynamic.future;\n    input r1 as dynamic.future;\n    input r2 as field.public;\n    input r3 as field.public;\n    input r4 as field.public;\n    input r5 as u128.public;\n    input r6 as u128.public;\n    input r7 as address.public;\n    input r8 as field.public;\n    input r9 as boolean.public;\n    get shield_swap_freezelist.aleo/freeze_list_root[1u8] into r10;\n    is.neq r10 r8 into r11;\n    branch.eq r11 false to end_then_0_0;\n    get shield_swap_freezelist.aleo/freeze_list_root[2u8] into r12;\n    get shield_swap_freezelist.aleo/root_updated_height[true] into r13;\n    get shield_swap_freezelist.aleo/previous_root_window[true] into r14;\n    is.eq r8 r10 into r15;\n    is.eq r8 r12 into r16;\n    sub block.height r13 into r17;\n    lt r17 r14 into r18;\n    and r16 r18 into r19;\n    or r15 r19 into r20;\n    assert.eq r20 true;\n    branch.eq true true to end_otherwise_0_1;\n    position end_then_0_0;\n    position end_otherwise_0_1;\n    get swap_outputs[r2] into r21;\n    contains from_wrapper_token_id[r21.token_in] into r22;\n    contains from_wrapper_token_id[r21.token_out] into r23;\n    or r22 r23 into r24;\n    branch.eq r24 false to end_then_0_2;\n    assert.eq r9 true;\n    branch.eq true true to end_otherwise_0_3;\n    position end_then_0_2;\n    position end_otherwise_0_3;\n    await r0;\n    await r1;\n    is.eq r21.caller r7 into r25;\n    assert.eq r25 true;\n    is.eq r21.recipient r7 into r26;\n    assert.eq r26 true;\n    is.eq r21.token_in r3 into r27;\n    assert.eq r27 true;\n    is.eq r21.token_out r4 into r28;\n    assert.eq r28 true;\n    is.eq r21.amount_out r5 into r29;\n    assert.eq r29 true;\n    is.eq r21.amount_remaining r6 into r30;\n    assert.eq r30 true;\n    remove swap_outputs[r2];\n\nfunction claim_swap_output_no_refund:\n    input r0 as field.private;\n    input r1 as address.public;\n    input r2 as field.public;\n    input r3 as field.public;\n    input r4 as field.public;\n    input r5 as u128.public;\n    input r6 as [MerkleProof; 2u32].private;\n    is.eq self.caller aleo1waeghjttfvzrmk68ckpp4ftnfh7aq6wcm73qxzy0m754x4cu6yxqf38zsq into r7;\n    call verify_blinded_address shield_swap.aleo self.signer r0 r1;\n    and r6[0u32].leaf_index 1u32 into r8;\n    is.eq r8 0u32 into r9;\n    cast 1field r6[0u32].siblings[0u32] r6[0u32].siblings[1u32] into r10 as [field; 3u32];\n    cast 1field r6[0u32].siblings[1u32] r6[0u32].siblings[0u32] into r11 as [field; 3u32];\n    ternary r9 r10[0u32] r11[0u32] into r12;\n    ternary r9 r10[1u32] r11[1u32] into r13;\n    ternary r9 r10[2u32] r11[2u32] into r14;\n    cast r12 r13 r14 into r15 as [field; 3u32];\n    hash.psd4 r15 into r16 as field;\n    is.eq r6[0u32].siblings[2u32] 0field into r17;\n    shr r6[0u32].leaf_index 1u8 into r18;\n    and r18 1u32 into r19;\n    is.eq r19 0u32 into r20;\n    cast 0field r16 r6[0u32].siblings[2u32] into r21 as [field; 3u32];\n    cast 0field r6[0u32].siblings[2u32] r16 into r22 as [field; 3u32];\n    ternary r20 r21[0u32] r22[0u32] into r23;\n    ternary r20 r21[1u32] r22[1u32] into r24;\n    ternary r20 r21[2u32] r22[2u32] into r25;\n    cast r23 r24 r25 into r26 as [field; 3u32];\n    hash.psd4 r26 into r27 as field;\n    is.eq r6[0u32].siblings[3u32] 0field into r28;\n    shr r6[0u32].leaf_index 2u8 into r29;\n    and r29 1u32 into r30;\n    is.eq r30 0u32 into r31;\n    cast 0field r27 r6[0u32].siblings[3u32] into r32 as [field; 3u32];\n    cast 0field r6[0u32].siblings[3u32] r27 into r33 as [field; 3u32];\n    ternary r31 r32[0u32] r33[0u32] into r34;\n    ternary r31 r32[1u32] r33[1u32] into r35;\n    ternary r31 r32[2u32] r33[2u32] into r36;\n    cast r34 r35 r36 into r37 as [field; 3u32];\n    hash.psd4 r37 into r38 as field;\n    is.eq r6[0u32].siblings[4u32] 0field into r39;\n    shr r6[0u32].leaf_index 3u8 into r40;\n    and r40 1u32 into r41;\n    is.eq r41 0u32 into r42;\n    cast 0field r38 r6[0u32].siblings[4u32] into r43 as [field; 3u32];\n    cast 0field r6[0u32].siblings[4u32] r38 into r44 as [field; 3u32];\n    ternary r42 r43[0u32] r44[0u32] into r45;\n    ternary r42 r43[1u32] r44[1u32] into r46;\n    ternary r42 r43[2u32] r44[2u32] into r47;\n    cast r45 r46 r47 into r48 as [field; 3u32];\n    hash.psd4 r48 into r49 as field;\n    is.eq r6[0u32].siblings[5u32] 0field into r50;\n    shr r6[0u32].leaf_index 4u8 into r51;\n    and r51 1u32 into r52;\n    is.eq r52 0u32 into r53;\n    cast 0field r49 r6[0u32].siblings[5u32] into r54 as [field; 3u32];\n    cast 0field r6[0u32].siblings[5u32] r49 into r55 as [field; 3u32];\n    ternary r53 r54[0u32] r55[0u32] into r56;\n    ternary r53 r54[1u32] r55[1u32] into r57;\n    ternary r53 r54[2u32] r55[2u32] into r58;\n    cast r56 r57 r58 into r59 as [field; 3u32];\n    hash.psd4 r59 into r60 as field;\n    is.eq r6[0u32].siblings[6u32] 0field into r61;\n    shr r6[0u32].leaf_index 5u8 into r62;\n    and r62 1u32 into r63;\n    is.eq r63 0u32 into r64;\n    cast 0field r60 r6[0u32].siblings[6u32] into r65 as [field; 3u32];\n    cast 0field r6[0u32].siblings[6u32] r60 into r66 as [field; 3u32];\n    ternary r64 r65[0u32] r66[0u32] into r67;\n    ternary r64 r65[1u32] r66[1u32] into r68;\n    ternary r64 r65[2u32] r66[2u32] into r69;\n    cast r67 r68 r69 into r70 as [field; 3u32];\n    hash.psd4 r70 into r71 as field;\n    is.eq r6[0u32].siblings[7u32] 0field into r72;\n    shr r6[0u32].leaf_index 6u8 into r73;\n    and r73 1u32 into r74;\n    is.eq r74 0u32 into r75;\n    cast 0field r71 r6[0u32].siblings[7u32] into r76 as [field; 3u32];\n    cast 0field r6[0u32].siblings[7u32] r71 into r77 as [field; 3u32];\n    ternary r75 r76[0u32] r77[0u32] into r78;\n    ternary r75 r76[1u32] r77[1u32] into r79;\n    ternary r75 r76[2u32] r77[2u32] into r80;\n    cast r78 r79 r80 into r81 as [field; 3u32];\n    hash.psd4 r81 into r82 as field;\n    is.eq r6[0u32].siblings[8u32] 0field into r83;\n    shr r6[0u32].leaf_index 7u8 into r84;\n    and r84 1u32 into r85;\n    is.eq r85 0u32 into r86;\n    cast 0field r82 r6[0u32].siblings[8u32] into r87 as [field; 3u32];\n    cast 0field r6[0u32].siblings[8u32] r82 into r88 as [field; 3u32];\n    ternary r86 r87[0u32] r88[0u32] into r89;\n    ternary r86 r87[1u32] r88[1u32] into r90;\n    ternary r86 r87[2u32] r88[2u32] into r91;\n    cast r89 r90 r91 into r92 as [field; 3u32];\n    hash.psd4 r92 into r93 as field;\n    is.eq r6[0u32].siblings[9u32] 0field into r94;\n    shr r6[0u32].leaf_index 8u8 into r95;\n    and r95 1u32 into r96;\n    is.eq r96 0u32 into r97;\n    cast 0field r93 r6[0u32].siblings[9u32] into r98 as [field; 3u32];\n    cast 0field r6[0u32].siblings[9u32] r93 into r99 as [field; 3u32];\n    ternary r97 r98[0u32] r99[0u32] into r100;\n    ternary r97 r98[1u32] r99[1u32] into r101;\n    ternary r97 r98[2u32] r99[2u32] into r102;\n    cast r100 r101 r102 into r103 as [field; 3u32];\n    hash.psd4 r103 into r104 as field;\n    is.eq r6[0u32].siblings[10u32] 0field into r105;\n    shr r6[0u32].leaf_index 9u8 into r106;\n    and r106 1u32 into r107;\n    is.eq r107 0u32 into r108;\n    cast 0field r104 r6[0u32].siblings[10u32] into r109 as [field; 3u32];\n    cast 0field r6[0u32].siblings[10u32] r104 into r110 as [field; 3u32];\n    ternary r108 r109[0u32] r110[0u32] into r111;\n    ternary r108 r109[1u32] r110[1u32] into r112;\n    ternary r108 r109[2u32] r110[2u32] into r113;\n    cast r111 r112 r113 into r114 as [field; 3u32];\n    hash.psd4 r114 into r115 as field;\n    is.eq r6[0u32].siblings[11u32] 0field into r116;\n    shr r6[0u32].leaf_index 10u8 into r117;\n    and r117 1u32 into r118;\n    is.eq r118 0u32 into r119;\n    cast 0field r115 r6[0u32].siblings[11u32] into r120 as [field; 3u32];\n    cast 0field r6[0u32].siblings[11u32] r115 into r121 as [field; 3u32];\n    ternary r119 r120[0u32] r121[0u32] into r122;\n    ternary r119 r120[1u32] r121[1u32] into r123;\n    ternary r119 r120[2u32] r121[2u32] into r124;\n    cast r122 r123 r124 into r125 as [field; 3u32];\n    hash.psd4 r125 into r126 as field;\n    is.eq r6[0u32].siblings[12u32] 0field into r127;\n    shr r6[0u32].leaf_index 11u8 into r128;\n    and r128 1u32 into r129;\n    is.eq r129 0u32 into r130;\n    cast 0field r126 r6[0u32].siblings[12u32] into r131 as [field; 3u32];\n    cast 0field r6[0u32].siblings[12u32] r126 into r132 as [field; 3u32];\n    ternary r130 r131[0u32] r132[0u32] into r133;\n    ternary r130 r131[1u32] r132[1u32] into r134;\n    ternary r130 r131[2u32] r132[2u32] into r135;\n    cast r133 r134 r135 into r136 as [field; 3u32];\n    hash.psd4 r136 into r137 as field;\n    is.eq r6[0u32].siblings[13u32] 0field into r138;\n    shr r6[0u32].leaf_index 12u8 into r139;\n    and r139 1u32 into r140;\n    is.eq r140 0u32 into r141;\n    cast 0field r137 r6[0u32].siblings[13u32] into r142 as [field; 3u32];\n    cast 0field r6[0u32].siblings[13u32] r137 into r143 as [field; 3u32];\n    ternary r141 r142[0u32] r143[0u32] into r144;\n    ternary r141 r142[1u32] r143[1u32] into r145;\n    ternary r141 r142[2u32] r143[2u32] into r146;\n    cast r144 r145 r146 into r147 as [field; 3u32];\n    hash.psd4 r147 into r148 as field;\n    is.eq r6[0u32].siblings[14u32] 0field into r149;\n    shr r6[0u32].leaf_index 13u8 into r150;\n    and r150 1u32 into r151;\n    is.eq r151 0u32 into r152;\n    cast 0field r148 r6[0u32].siblings[14u32] into r153 as [field; 3u32];\n    cast 0field r6[0u32].siblings[14u32] r148 into r154 as [field; 3u32];\n    ternary r152 r153[0u32] r154[0u32] into r155;\n    ternary r152 r153[1u32] r154[1u32] into r156;\n    ternary r152 r153[2u32] r154[2u32] into r157;\n    cast r155 r156 r157 into r158 as [field; 3u32];\n    hash.psd4 r158 into r159 as field;\n    is.eq r6[0u32].siblings[15u32] 0field into r160;\n    shr r6[0u32].leaf_index 14u8 into r161;\n    and r161 1u32 into r162;\n    is.eq r162 0u32 into r163;\n    cast 0field r159 r6[0u32].siblings[15u32] into r164 as [field; 3u32];\n    cast 0field r6[0u32].siblings[15u32] r159 into r165 as [field; 3u32];\n    ternary r163 r164[0u32] r165[0u32] into r166;\n    ternary r163 r164[1u32] r165[1u32] into r167;\n    ternary r163 r164[2u32] r165[2u32] into r168;\n    cast r166 r167 r168 into r169 as [field; 3u32];\n    hash.psd4 r169 into r170 as field;\n    ternary r160 r159 r170 into r171;\n    ternary r160 14u8 15u8 into r172;\n    ternary r149 r148 r171 into r173;\n    ternary r149 13u8 r172 into r174;\n    ternary r138 r137 r173 into r175;\n    ternary r138 12u8 r174 into r176;\n    ternary r127 r126 r175 into r177;\n    ternary r127 11u8 r176 into r178;\n    ternary r116 r115 r177 into r179;\n    ternary r116 10u8 r178 into r180;\n    ternary r105 r104 r179 into r181;\n    ternary r105 9u8 r180 into r182;\n    ternary r94 r93 r181 into r183;\n    ternary r94 8u8 r182 into r184;\n    ternary r83 r82 r183 into r185;\n    ternary r83 7u8 r184 into r186;\n    ternary r72 r71 r185 into r187;\n    ternary r72 6u8 r186 into r188;\n    ternary r61 r60 r187 into r189;\n    ternary r61 5u8 r188 into r190;\n    ternary r50 r49 r189 into r191;\n    ternary r50 4u8 r190 into r192;\n    ternary r39 r38 r191 into r193;\n    ternary r39 3u8 r192 into r194;\n    ternary r28 r27 r193 into r195;\n    ternary r28 2u8 r194 into r196;\n    ternary r17 r16 r195 into r197;\n    ternary r17 1u8 r196 into r198;\n    and r6[1u32].leaf_index 1u32 into r199;\n    is.eq r199 0u32 into r200;\n    cast 1field r6[1u32].siblings[0u32] r6[1u32].siblings[1u32] into r201 as [field; 3u32];\n    cast 1field r6[1u32].siblings[1u32] r6[1u32].siblings[0u32] into r202 as [field; 3u32];\n    ternary r200 r201[0u32] r202[0u32] into r203;\n    ternary r200 r201[1u32] r202[1u32] into r204;\n    ternary r200 r201[2u32] r202[2u32] into r205;\n    cast r203 r204 r205 into r206 as [field; 3u32];\n    hash.psd4 r206 into r207 as field;\n    is.eq r6[1u32].siblings[2u32] 0field into r208;\n    shr r6[1u32].leaf_index 1u8 into r209;\n    and r209 1u32 into r210;\n    is.eq r210 0u32 into r211;\n    cast 0field r207 r6[1u32].siblings[2u32] into r212 as [field; 3u32];\n    cast 0field r6[1u32].siblings[2u32] r207 into r213 as [field; 3u32];\n    ternary r211 r212[0u32] r213[0u32] into r214;\n    ternary r211 r212[1u32] r213[1u32] into r215;\n    ternary r211 r212[2u32] r213[2u32] into r216;\n    cast r214 r215 r216 into r217 as [field; 3u32];\n    hash.psd4 r217 into r218 as field;\n    is.eq r6[1u32].siblings[3u32] 0field into r219;\n    shr r6[1u32].leaf_index 2u8 into r220;\n    and r220 1u32 into r221;\n    is.eq r221 0u32 into r222;\n    cast 0field r218 r6[1u32].siblings[3u32] into r223 as [field; 3u32];\n    cast 0field r6[1u32].siblings[3u32] r218 into r224 as [field; 3u32];\n    ternary r222 r223[0u32] r224[0u32] into r225;\n    ternary r222 r223[1u32] r224[1u32] into r226;\n    ternary r222 r223[2u32] r224[2u32] into r227;\n    cast r225 r226 r227 into r228 as [field; 3u32];\n    hash.psd4 r228 into r229 as field;\n    is.eq r6[1u32].siblings[4u32] 0field into r230;\n    shr r6[1u32].leaf_index 3u8 into r231;\n    and r231 1u32 into r232;\n    is.eq r232 0u32 into r233;\n    cast 0field r229 r6[1u32].siblings[4u32] into r234 as [field; 3u32];\n    cast 0field r6[1u32].siblings[4u32] r229 into r235 as [field; 3u32];\n    ternary r233 r234[0u32] r235[0u32] into r236;\n    ternary r233 r234[1u32] r235[1u32] into r237;\n    ternary r233 r234[2u32] r235[2u32] into r238;\n    cast r236 r237 r238 into r239 as [field; 3u32];\n    hash.psd4 r239 into r240 as field;\n    is.eq r6[1u32].siblings[5u32] 0field into r241;\n    shr r6[1u32].leaf_index 4u8 into r242;\n    and r242 1u32 into r243;\n    is.eq r243 0u32 into r244;\n    cast 0field r240 r6[1u32].siblings[5u32] into r245 as [field; 3u32];\n    cast 0field r6[1u32].siblings[5u32] r240 into r246 as [field; 3u32];\n    ternary r244 r245[0u32] r246[0u32] into r247;\n    ternary r244 r245[1u32] r246[1u32] into r248;\n    ternary r244 r245[2u32] r246[2u32] into r249;\n    cast r247 r248 r249 into r250 as [field; 3u32];\n    hash.psd4 r250 into r251 as field;\n    is.eq r6[1u32].siblings[6u32] 0field into r252;\n    shr r6[1u32].leaf_index 5u8 into r253;\n    and r253 1u32 into r254;\n    is.eq r254 0u32 into r255;\n    cast 0field r251 r6[1u32].siblings[6u32] into r256 as [field; 3u32];\n    cast 0field r6[1u32].siblings[6u32] r251 into r257 as [field; 3u32];\n    ternary r255 r256[0u32] r257[0u32] into r258;\n    ternary r255 r256[1u32] r257[1u32] into r259;\n    ternary r255 r256[2u32] r257[2u32] into r260;\n    cast r258 r259 r260 into r261 as [field; 3u32];\n    hash.psd4 r261 into r262 as field;\n    is.eq r6[1u32].siblings[7u32] 0field into r263;\n    shr r6[1u32].leaf_index 6u8 into r264;\n    and r264 1u32 into r265;\n    is.eq r265 0u32 into r266;\n    cast 0field r262 r6[1u32].siblings[7u32] into r267 as [field; 3u32];\n    cast 0field r6[1u32].siblings[7u32] r262 into r268 as [field; 3u32];\n    ternary r266 r267[0u32] r268[0u32] into r269;\n    ternary r266 r267[1u32] r268[1u32] into r270;\n    ternary r266 r267[2u32] r268[2u32] into r271;\n    cast r269 r270 r271 into r272 as [field; 3u32];\n    hash.psd4 r272 into r273 as field;\n    is.eq r6[1u32].siblings[8u32] 0field into r274;\n    shr r6[1u32].leaf_index 7u8 into r275;\n    and r275 1u32 into r276;\n    is.eq r276 0u32 into r277;\n    cast 0field r273 r6[1u32].siblings[8u32] into r278 as [field; 3u32];\n    cast 0field r6[1u32].siblings[8u32] r273 into r279 as [field; 3u32];\n    ternary r277 r278[0u32] r279[0u32] into r280;\n    ternary r277 r278[1u32] r279[1u32] into r281;\n    ternary r277 r278[2u32] r279[2u32] into r282;\n    cast r280 r281 r282 into r283 as [field; 3u32];\n    hash.psd4 r283 into r284 as field;\n    is.eq r6[1u32].siblings[9u32] 0field into r285;\n    shr r6[1u32].leaf_index 8u8 into r286;\n    and r286 1u32 into r287;\n    is.eq r287 0u32 into r288;\n    cast 0field r284 r6[1u32].siblings[9u32] into r289 as [field; 3u32];\n    cast 0field r6[1u32].siblings[9u32] r284 into r290 as [field; 3u32];\n    ternary r288 r289[0u32] r290[0u32] into r291;\n    ternary r288 r289[1u32] r290[1u32] into r292;\n    ternary r288 r289[2u32] r290[2u32] into r293;\n    cast r291 r292 r293 into r294 as [field; 3u32];\n    hash.psd4 r294 into r295 as field;\n    is.eq r6[1u32].siblings[10u32] 0field into r296;\n    shr r6[1u32].leaf_index 9u8 into r297;\n    and r297 1u32 into r298;\n    is.eq r298 0u32 into r299;\n    cast 0field r295 r6[1u32].siblings[10u32] into r300 as [field; 3u32];\n    cast 0field r6[1u32].siblings[10u32] r295 into r301 as [field; 3u32];\n    ternary r299 r300[0u32] r301[0u32] into r302;\n    ternary r299 r300[1u32] r301[1u32] into r303;\n    ternary r299 r300[2u32] r301[2u32] into r304;\n    cast r302 r303 r304 into r305 as [field; 3u32];\n    hash.psd4 r305 into r306 as field;\n    is.eq r6[1u32].siblings[11u32] 0field into r307;\n    shr r6[1u32].leaf_index 10u8 into r308;\n    and r308 1u32 into r309;\n    is.eq r309 0u32 into r310;\n    cast 0field r306 r6[1u32].siblings[11u32] into r311 as [field; 3u32];\n    cast 0field r6[1u32].siblings[11u32] r306 into r312 as [field; 3u32];\n    ternary r310 r311[0u32] r312[0u32] into r313;\n    ternary r310 r311[1u32] r312[1u32] into r314;\n    ternary r310 r311[2u32] r312[2u32] into r315;\n    cast r313 r314 r315 into r316 as [field; 3u32];\n    hash.psd4 r316 into r317 as field;\n    is.eq r6[1u32].siblings[12u32] 0field into r318;\n    shr r6[1u32].leaf_index 11u8 into r319;\n    and r319 1u32 into r320;\n    is.eq r320 0u32 into r321;\n    cast 0field r317 r6[1u32].siblings[12u32] into r322 as [field; 3u32];\n    cast 0field r6[1u32].siblings[12u32] r317 into r323 as [field; 3u32];\n    ternary r321 r322[0u32] r323[0u32] into r324;\n    ternary r321 r322[1u32] r323[1u32] into r325;\n    ternary r321 r322[2u32] r323[2u32] into r326;\n    cast r324 r325 r326 into r327 as [field; 3u32];\n    hash.psd4 r327 into r328 as field;\n    is.eq r6[1u32].siblings[13u32] 0field into r329;\n    shr r6[1u32].leaf_index 12u8 into r330;\n    and r330 1u32 into r331;\n    is.eq r331 0u32 into r332;\n    cast 0field r328 r6[1u32].siblings[13u32] into r333 as [field; 3u32];\n    cast 0field r6[1u32].siblings[13u32] r328 into r334 as [field; 3u32];\n    ternary r332 r333[0u32] r334[0u32] into r335;\n    ternary r332 r333[1u32] r334[1u32] into r336;\n    ternary r332 r333[2u32] r334[2u32] into r337;\n    cast r335 r336 r337 into r338 as [field; 3u32];\n    hash.psd4 r338 into r339 as field;\n    is.eq r6[1u32].siblings[14u32] 0field into r340;\n    shr r6[1u32].leaf_index 13u8 into r341;\n    and r341 1u32 into r342;\n    is.eq r342 0u32 into r343;\n    cast 0field r339 r6[1u32].siblings[14u32] into r344 as [field; 3u32];\n    cast 0field r6[1u32].siblings[14u32] r339 into r345 as [field; 3u32];\n    ternary r343 r344[0u32] r345[0u32] into r346;\n    ternary r343 r344[1u32] r345[1u32] into r347;\n    ternary r343 r344[2u32] r345[2u32] into r348;\n    cast r346 r347 r348 into r349 as [field; 3u32];\n    hash.psd4 r349 into r350 as field;\n    is.eq r6[1u32].siblings[15u32] 0field into r351;\n    shr r6[1u32].leaf_index 14u8 into r352;\n    and r352 1u32 into r353;\n    is.eq r353 0u32 into r354;\n    cast 0field r350 r6[1u32].siblings[15u32] into r355 as [field; 3u32];\n    cast 0field r6[1u32].siblings[15u32] r350 into r356 as [field; 3u32];\n    ternary r354 r355[0u32] r356[0u32] into r357;\n    ternary r354 r355[1u32] r356[1u32] into r358;\n    ternary r354 r355[2u32] r356[2u32] into r359;\n    cast r357 r358 r359 into r360 as [field; 3u32];\n    hash.psd4 r360 into r361 as field;\n    ternary r351 r350 r361 into r362;\n    ternary r351 14u8 15u8 into r363;\n    ternary r340 r339 r362 into r364;\n    ternary r340 13u8 r363 into r365;\n    ternary r329 r328 r364 into r366;\n    ternary r329 12u8 r365 into r367;\n    ternary r318 r317 r366 into r368;\n    ternary r318 11u8 r367 into r369;\n    ternary r307 r306 r368 into r370;\n    ternary r307 10u8 r369 into r371;\n    ternary r296 r295 r370 into r372;\n    ternary r296 9u8 r371 into r373;\n    ternary r285 r284 r372 into r374;\n    ternary r285 8u8 r373 into r375;\n    ternary r274 r273 r374 into r376;\n    ternary r274 7u8 r375 into r377;\n    ternary r263 r262 r376 into r378;\n    ternary r263 6u8 r377 into r379;\n    ternary r252 r251 r378 into r380;\n    ternary r252 5u8 r379 into r381;\n    ternary r241 r240 r380 into r382;\n    ternary r241 4u8 r381 into r383;\n    ternary r230 r229 r382 into r384;\n    ternary r230 3u8 r383 into r385;\n    ternary r219 r218 r384 into r386;\n    ternary r219 2u8 r385 into r387;\n    ternary r208 r207 r386 into r388;\n    ternary r208 1u8 r387 into r389;\n    assert.eq r197 r388;\n    assert.eq r198 r389;\n    cast self.signer into r390 as field;\n    lt r390 r6[0u32].siblings[0u32] into r391;\n    is.eq r390 r6[0u32].siblings[0u32] into r392;\n    nor r391 r392 into r393;\n    is.eq r6[0u32].leaf_index r6[1u32].leaf_index into r394;\n    is.eq r6[0u32].leaf_index 0u32 into r395;\n    and r394 r395 into r396;\n    not r396 into r397;\n    or r391 r397 into r398;\n    assert.eq r398 true;\n    not r395 into r399;\n    shl 1u32 r198 into r400;\n    sub r400 1u32 into r401;\n    and r394 r399 into r402;\n    not r402 into r403;\n    is.eq r6[0u32].leaf_index r401 into r404;\n    or r404 r403 into r405;\n    assert.eq r405 true;\n    or r393 r403 into r406;\n    assert.eq r406 true;\n    not r394 into r407;\n    not r407 into r408;\n    or r393 r408 into r409;\n    assert.eq r409 true;\n    lt r390 r6[1u32].siblings[0u32] into r410;\n    or r410 r408 into r411;\n    assert.eq r411 true;\n    lte r6[1u32].leaf_index r401 into r412;\n    or r412 r408 into r413;\n    assert.eq r413 true;\n    add r6[0u32].leaf_index 1u32 into r414;\n    is.eq r414 r6[1u32].leaf_index into r415;\n    or r415 r408 into r416;\n    assert.eq r416 true;\n    call.dynamic r4 'aleo' 'transfer_public_to_private' with self.signer r5 (as address.private u128.public) into r417 r418 (as dynamic.record dynamic.future);\n    async claim_swap_output_no_refund r418 r2 r3 r4 r5 r1 r197 r7 into r419;\n    output r417 as dynamic.record;\n    output r419 as shield_swap.aleo/claim_swap_output_no_refund.future;\n\nfinalize claim_swap_output_no_refund:\n    input r0 as dynamic.future;\n    input r1 as field.public;\n    input r2 as field.public;\n    input r3 as field.public;\n    input r4 as u128.public;\n    input r5 as address.public;\n    input r6 as field.public;\n    input r7 as boolean.public;\n    get shield_swap_freezelist.aleo/freeze_list_root[1u8] into r8;\n    is.neq r8 r6 into r9;\n    branch.eq r9 false to end_then_0_0;\n    get shield_swap_freezelist.aleo/freeze_list_root[2u8] into r10;\n    get shield_swap_freezelist.aleo/root_updated_height[true] into r11;\n    get shield_swap_freezelist.aleo/previous_root_window[true] into r12;\n    is.eq r6 r8 into r13;\n    is.eq r6 r10 into r14;\n    sub block.height r11 into r15;\n    lt r15 r12 into r16;\n    and r14 r16 into r17;\n    or r13 r17 into r18;\n    assert.eq r18 true;\n    branch.eq true true to end_otherwise_0_1;\n    position end_then_0_0;\n    position end_otherwise_0_1;\n    get swap_outputs[r1] into r19;\n    contains from_wrapper_token_id[r19.token_in] into r20;\n    contains from_wrapper_token_id[r19.token_out] into r21;\n    or r20 r21 into r22;\n    branch.eq r22 false to end_then_0_2;\n    assert.eq r7 true;\n    branch.eq true true to end_otherwise_0_3;\n    position end_then_0_2;\n    position end_otherwise_0_3;\n    assert.eq r19.caller r5;\n    assert.eq r19.recipient r5;\n    assert.eq r19.token_in r2;\n    assert.eq r19.token_out r3;\n    assert.eq r19.amount_out r4;\n    assert.eq r19.amount_remaining 0u128;\n    remove swap_outputs[r1];\n    await r0;\n\nfunction swap_multi_hop:\n    input r0 as field.private;\n    input r1 as address.public;\n    input r2 as dynamic.record;\n    input r3 as field.public;\n    input r4 as field.public;\n    input r5 as u128.public;\n    input r6 as u128.public;\n    input r7 as SwapHop.public;\n    input r8 as SwapHop.public;\n    input r9 as SwapHop.public;\n    input r10 as u8.public;\n    input r11 as u64.public;\n    input r12 as u32.public;\n    is.eq self.caller aleo1waeghjttfvzrmk68ckpp4ftnfh7aq6wcm73qxzy0m754x4cu6yxqf38zsq into r13;\n    call verify_blinded_address shield_swap.aleo self.signer r0 r1;\n    cast r3 r4 r5 r6 r1 r7 r8 r9 r10 r11 r12 r1 into r14 as SwapMultiHopRequest;\n    hash.bhp256 r14 into r15 as field;\n    cast aleo1w0zm05xf0hleydv5w4mj8w4u5matr4q2gmddgj4hucj5yszcn5rqdgd3cj r15 r14 self.caller self.signer r1 into r16 as MultiHopSwapComplianceRecord.record;\n    call.dynamic r3 'aleo' 'transfer_private_to_public' with r2 shield_swap.aleo r5 (as dynamic.record address.public u128.public) into r17 r18 (as dynamic.record dynamic.future);\n    async swap_multi_hop r18 r14 r15 r13 into r19;\n    output r15 as field.public;\n    output r17 as dynamic.record;\n    output r16 as MultiHopSwapComplianceRecord.record;\n    output r19 as shield_swap.aleo/swap_multi_hop.future;\n\nfinalize swap_multi_hop:\n    input r0 as dynamic.future;\n    input r1 as SwapMultiHopRequest.public;\n    input r2 as field.public;\n    input r3 as boolean.public;\n    contains from_wrapper_token_id[r1.token_in] into r4;\n    branch.eq r4 false to end_then_0_0;\n    assert.eq r3 true;\n    branch.eq true true to end_otherwise_0_1;\n    position end_then_0_0;\n    position end_otherwise_0_1;\n    await r0;\n    lte block.height r1.deadline into r5;\n    assert.eq r5 true;\n    gte r1.hop_count 2u8 into r6;\n    lte r1.hop_count 3u8 into r7;\n    and r6 r7 into r8;\n    assert.eq r8 true;\n    gt r1.amount_in 0u128 into r9;\n    assert.eq r9 true;\n    get.or_use global_paused[true] false into r10;\n    not r10 into r11;\n    assert.eq r11 true;\n    get pools[r1.hop0.pool] into r12;\n    assert.eq r12.enabled true;\n    get.or_use token_paused[r12.token0] false into r13;\n    not r13 into r14;\n    assert.eq r14 true;\n    get.or_use token_paused[r12.token1] false into r15;\n    not r15 into r16;\n    assert.eq r16 true;\n    cast r12.token0 r12.token1 into r17 as PairKey;\n    get.or_use pair_paused[r17] false into r18;\n    not r18 into r19;\n    assert.eq r19 true;\n    ternary r1.hop0.zero_for_one r12.token0 r12.token1 into r20;\n    ternary r1.hop0.zero_for_one r12.token1 r12.token0 into r21;\n    is.eq r20 r1.token_in into r22;\n    assert.eq r22 true;\n    get slots[r1.hop0.pool] into r23;\n    cast r12.fee into r24 as u32;\n    lt r1.hop0.sqrt_price_limit.hi 0u128 into r25;\n    gt r1.hop0.sqrt_price_limit.hi 0u128 into r26;\n    lt r1.hop0.sqrt_price_limit.lo 702075911466779181339691826087u128 into r27;\n    ternary r26 false r27 into r28;\n    ternary r25 true r28 into r29;\n    not r29 into r30;\n    lt 484680305u128 r1.hop0.sqrt_price_limit.hi into r31;\n    gt 484680305u128 r1.hop0.sqrt_price_limit.hi into r32;\n    lt 8756686347225649145659787327114459760u128 r1.hop0.sqrt_price_limit.lo into r33;\n    ternary r32 false r33 into r34;\n    ternary r31 true r34 into r35;\n    not r35 into r36;\n    and r30 r36 into r37;\n    assert.eq r37 true;\n    lt r1.hop0.sqrt_price_limit.hi r23.sqrt_price.hi into r38;\n    gt r1.hop0.sqrt_price_limit.hi r23.sqrt_price.hi into r39;\n    lt r1.hop0.sqrt_price_limit.lo r23.sqrt_price.lo into r40;\n    ternary r39 false r40 into r41;\n    ternary r38 true r41 into r42;\n    lt r23.sqrt_price.hi r1.hop0.sqrt_price_limit.hi into r43;\n    gt r23.sqrt_price.hi r1.hop0.sqrt_price_limit.hi into r44;\n    lt r23.sqrt_price.lo r1.hop0.sqrt_price_limit.lo into r45;\n    ternary r44 false r45 into r46;\n    ternary r43 true r46 into r47;\n    ternary r1.hop0.zero_for_one r42 r47 into r48;\n    assert.eq r48 true;\n    ternary r1.hop0.zero_for_one r23.fee_growth_global0_x_128.hi r23.fee_growth_global1_x_128.hi into r49;\n    ternary r1.hop0.zero_for_one r23.fee_growth_global0_x_128.lo r23.fee_growth_global1_x_128.lo into r50;\n    cast r49 r50 into r51 as U256__8JquwLopp8;\n    cast r1.hop0.zero_for_one r1.hop0.sqrt_price_limit r24 r23.fee_protocol r23.fee_growth_global0_x_128 r23.fee_growth_global1_x_128 into r52 as SwapIterCfg;\n    ternary r1.hop0.zero_for_one r23.next_init_below r23.next_init_above into r53;\n    cast r1.hop0.pool r53 into r54 as TickKey;\n    hash.bhp256 r54 into r55 as field;\n    get ticks[r55] into r56;\n    call view_sqrt_price_at_tick_x128 r53 into r57;\n    cast r23.sqrt_price r1.amount_in 0u128 r51 r23.liquidity r23.tick true 0u128 r23.next_init_below r23.next_init_above into r58 as SwapIterState;\n    call view_swap_iteration_v2 r52 r53 r57 r56 r58 into r59 r60 r61;\n    set r60 into ticks[r55];\n    not r59.crossed into r62;\n    is.eq r59.sp.hi r23.sqrt_price.hi into r63;\n    is.eq r59.sp.lo r23.sqrt_price.lo into r64;\n    and r63 r64 into r65;\n    not r65 into r66;\n    and r62 r66 into r67;\n    ternary r1.hop0.zero_for_one r59.nb r59.na into r68;\n    cast r1.hop0.pool r68 into r69 as TickKey;\n    hash.bhp256 r69 into r70 as field;\n    get ticks[r70] into r71;\n    call view_sqrt_price_at_tick_x128 r68 into r72;\n    cast r59.sp r59.rem r59.out r59.fg r59.liq r59.tk r59.crossed r59.pf r59.nb r59.na into r73 as SwapIterState;\n    call view_swap_iteration_v2 r52 r68 r72 r71 r73 into r74 r75 r76;\n    set r75 into ticks[r70];\n    not r74.crossed into r77;\n    is.eq r74.sp.hi r59.sp.hi into r78;\n    is.eq r74.sp.lo r59.sp.lo into r79;\n    and r78 r79 into r80;\n    not r80 into r81;\n    and r77 r81 into r82;\n    or r67 r82 into r83;\n    add r61 r76 into r84;\n    ternary r1.hop0.zero_for_one r74.nb r74.na into r85;\n    cast r1.hop0.pool r85 into r86 as TickKey;\n    hash.bhp256 r86 into r87 as field;\n    get ticks[r87] into r88;\n    call view_sqrt_price_at_tick_x128 r85 into r89;\n    cast r74.sp r74.rem r74.out r74.fg r74.liq r74.tk r74.crossed r74.pf r74.nb r74.na into r90 as SwapIterState;\n    call view_swap_iteration_v2 r52 r85 r89 r88 r90 into r91 r92 r93;\n    set r92 into ticks[r87];\n    not r91.crossed into r94;\n    is.eq r91.sp.hi r74.sp.hi into r95;\n    is.eq r91.sp.lo r74.sp.lo into r96;\n    and r95 r96 into r97;\n    not r97 into r98;\n    and r94 r98 into r99;\n    or r83 r99 into r100;\n    add r84 r93 into r101;\n    ternary r1.hop0.zero_for_one r91.nb r91.na into r102;\n    call view_sqrt_price_at_tick_x128 r102 into r103;\n    call view_bounded_partial_v2 r91.sp r91.liq r91.rem r91.out r91.fg r91.pf r103 r1.hop0.sqrt_price_limit r24 r23.fee_protocol r1.hop0.zero_for_one into r104 r105 r106 r107 r108 r109 r110;\n    call resolve_stored_tick r91.sp r91.tk r104 r109 r100 into r111;\n    add r101 r110 into r112;\n    add r23.protocol_fees0 r108 into r113;\n    ternary r1.hop0.zero_for_one r113 r23.protocol_fees0 into r114;\n    add r23.protocol_fees1 r108 into r115;\n    ternary r1.hop0.zero_for_one r23.protocol_fees1 r115 into r116;\n    ternary r1.hop0.zero_for_one r107.hi r23.fee_growth_global0_x_128.hi into r117;\n    ternary r1.hop0.zero_for_one r107.lo r23.fee_growth_global0_x_128.lo into r118;\n    cast r117 r118 into r119 as U256__8JquwLopp8;\n    ternary r1.hop0.zero_for_one r23.fee_growth_global1_x_128.hi r107.hi into r120;\n    ternary r1.hop0.zero_for_one r23.fee_growth_global1_x_128.lo r107.lo into r121;\n    cast r120 r121 into r122 as U256__8JquwLopp8;\n    cast r111 r23.tick_spacing r104 r23.fee_protocol r91.liq r119 r122 r23.max_liquidity_per_tick r114 r116 r91.nb r91.na into r123 as Slot;\n    set r123 into slots[r1.hop0.pool];\n    get pools[r1.hop1.pool] into r124;\n    assert.eq r124.enabled true;\n    get.or_use token_paused[r124.token0] false into r125;\n    not r125 into r126;\n    assert.eq r126 true;\n    get.or_use token_paused[r124.token1] false into r127;\n    not r127 into r128;\n    assert.eq r128 true;\n    cast r124.token0 r124.token1 into r129 as PairKey;\n    get.or_use pair_paused[r129] false into r130;\n    not r130 into r131;\n    assert.eq r131 true;\n    ternary r1.hop1.zero_for_one r124.token0 r124.token1 into r132;\n    ternary r1.hop1.zero_for_one r124.token1 r124.token0 into r133;\n    is.eq r132 r21 into r134;\n    assert.eq r134 true;\n    get slots[r1.hop1.pool] into r135;\n    cast r124.fee into r136 as u32;\n    lt r1.hop1.sqrt_price_limit.hi 0u128 into r137;\n    gt r1.hop1.sqrt_price_limit.hi 0u128 into r138;\n    lt r1.hop1.sqrt_price_limit.lo 702075911466779181339691826087u128 into r139;\n    ternary r138 false r139 into r140;\n    ternary r137 true r140 into r141;\n    not r141 into r142;\n    lt 484680305u128 r1.hop1.sqrt_price_limit.hi into r143;\n    gt 484680305u128 r1.hop1.sqrt_price_limit.hi into r144;\n    lt 8756686347225649145659787327114459760u128 r1.hop1.sqrt_price_limit.lo into r145;\n    ternary r144 false r145 into r146;\n    ternary r143 true r146 into r147;\n    not r147 into r148;\n    and r142 r148 into r149;\n    assert.eq r149 true;\n    lt r1.hop1.sqrt_price_limit.hi r135.sqrt_price.hi into r150;\n    gt r1.hop1.sqrt_price_limit.hi r135.sqrt_price.hi into r151;\n    lt r1.hop1.sqrt_price_limit.lo r135.sqrt_price.lo into r152;\n    ternary r151 false r152 into r153;\n    ternary r150 true r153 into r154;\n    lt r135.sqrt_price.hi r1.hop1.sqrt_price_limit.hi into r155;\n    gt r135.sqrt_price.hi r1.hop1.sqrt_price_limit.hi into r156;\n    lt r135.sqrt_price.lo r1.hop1.sqrt_price_limit.lo into r157;\n    ternary r156 false r157 into r158;\n    ternary r155 true r158 into r159;\n    ternary r1.hop1.zero_for_one r154 r159 into r160;\n    assert.eq r160 true;\n    ternary r1.hop1.zero_for_one r135.fee_growth_global0_x_128.hi r135.fee_growth_global1_x_128.hi into r161;\n    ternary r1.hop1.zero_for_one r135.fee_growth_global0_x_128.lo r135.fee_growth_global1_x_128.lo into r162;\n    cast r161 r162 into r163 as U256__8JquwLopp8;\n    cast r1.hop1.zero_for_one r1.hop1.sqrt_price_limit r136 r135.fee_protocol r135.fee_growth_global0_x_128 r135.fee_growth_global1_x_128 into r164 as SwapIterCfg;\n    ternary r1.hop1.zero_for_one r135.next_init_below r135.next_init_above into r165;\n    cast r1.hop1.pool r165 into r166 as TickKey;\n    hash.bhp256 r166 into r167 as field;\n    get ticks[r167] into r168;\n    call view_sqrt_price_at_tick_x128 r165 into r169;\n    cast r135.sqrt_price r105 0u128 r163 r135.liquidity r135.tick true 0u128 r135.next_init_below r135.next_init_above into r170 as SwapIterState;\n    call view_swap_iteration_v2 r164 r165 r169 r168 r170 into r171 r172 r173;\n    set r172 into ticks[r167];\n    not r171.crossed into r174;\n    is.eq r171.sp.hi r135.sqrt_price.hi into r175;\n    is.eq r171.sp.lo r135.sqrt_price.lo into r176;\n    and r175 r176 into r177;\n    not r177 into r178;\n    and r174 r178 into r179;\n    ternary r1.hop1.zero_for_one r171.nb r171.na into r180;\n    cast r1.hop1.pool r180 into r181 as TickKey;\n    hash.bhp256 r181 into r182 as field;\n    get ticks[r182] into r183;\n    call view_sqrt_price_at_tick_x128 r180 into r184;\n    cast r171.sp r171.rem r171.out r171.fg r171.liq r171.tk r171.crossed r171.pf r171.nb r171.na into r185 as SwapIterState;\n    call view_swap_iteration_v2 r164 r180 r184 r183 r185 into r186 r187 r188;\n    set r187 into ticks[r182];\n    not r186.crossed into r189;\n    is.eq r186.sp.hi r171.sp.hi into r190;\n    is.eq r186.sp.lo r171.sp.lo into r191;\n    and r190 r191 into r192;\n    not r192 into r193;\n    and r189 r193 into r194;\n    or r179 r194 into r195;\n    add r173 r188 into r196;\n    ternary r1.hop1.zero_for_one r186.nb r186.na into r197;\n    cast r1.hop1.pool r197 into r198 as TickKey;\n    hash.bhp256 r198 into r199 as field;\n    get ticks[r199] into r200;\n    call view_sqrt_price_at_tick_x128 r197 into r201;\n    cast r186.sp r186.rem r186.out r186.fg r186.liq r186.tk r186.crossed r186.pf r186.nb r186.na into r202 as SwapIterState;\n    call view_swap_iteration_v2 r164 r197 r201 r200 r202 into r203 r204 r205;\n    set r204 into ticks[r199];\n    not r203.crossed into r206;\n    is.eq r203.sp.hi r186.sp.hi into r207;\n    is.eq r203.sp.lo r186.sp.lo into r208;\n    and r207 r208 into r209;\n    not r209 into r210;\n    and r206 r210 into r211;\n    or r195 r211 into r212;\n    add r196 r205 into r213;\n    ternary r1.hop1.zero_for_one r203.nb r203.na into r214;\n    call view_sqrt_price_at_tick_x128 r214 into r215;\n    call view_bounded_partial_v2 r203.sp r203.liq r203.rem r203.out r203.fg r203.pf r215 r1.hop1.sqrt_price_limit r136 r135.fee_protocol r1.hop1.zero_for_one into r216 r217 r218 r219 r220 r221 r222;\n    call resolve_stored_tick r203.sp r203.tk r216 r221 r212 into r223;\n    add r213 r222 into r224;\n    is.eq r218 0u128 into r225;\n    assert.eq r225 true;\n    add r135.protocol_fees0 r220 into r226;\n    ternary r1.hop1.zero_for_one r226 r135.protocol_fees0 into r227;\n    add r135.protocol_fees1 r220 into r228;\n    ternary r1.hop1.zero_for_one r135.protocol_fees1 r228 into r229;\n    ternary r1.hop1.zero_for_one r219.hi r135.fee_growth_global0_x_128.hi into r230;\n    ternary r1.hop1.zero_for_one r219.lo r135.fee_growth_global0_x_128.lo into r231;\n    cast r230 r231 into r232 as U256__8JquwLopp8;\n    ternary r1.hop1.zero_for_one r135.fee_growth_global1_x_128.hi r219.hi into r233;\n    ternary r1.hop1.zero_for_one r135.fee_growth_global1_x_128.lo r219.lo into r234;\n    cast r233 r234 into r235 as U256__8JquwLopp8;\n    cast r223 r135.tick_spacing r216 r135.fee_protocol r203.liq r232 r235 r135.max_liquidity_per_tick r227 r229 r203.nb r203.na into r236 as Slot;\n    set r236 into slots[r1.hop1.pool];\n    is.eq r1.hop_count 3u8 into r237;\n    cast 0field 0field 0u16 false into r238 as PoolState;\n    get.or_use pools[r1.hop2.pool] r238 into r239;\n    branch.eq r237 false to end_then_0_2;\n    assert.eq r239.enabled true;\n    get.or_use token_paused[r239.token0] false into r240;\n    not r240 into r241;\n    assert.eq r241 true;\n    get.or_use token_paused[r239.token1] false into r242;\n    not r242 into r243;\n    assert.eq r243 true;\n    cast r239.token0 r239.token1 into r244 as PairKey;\n    get.or_use pair_paused[r244] false into r245;\n    not r245 into r246;\n    assert.eq r246 true;\n    branch.eq true true to end_otherwise_0_3;\n    position end_then_0_2;\n    position end_otherwise_0_3;\n    ternary r1.hop2.zero_for_one r239.token0 r239.token1 into r247;\n    ternary r1.hop2.zero_for_one r239.token1 r239.token0 into r248;\n    not r237 into r249;\n    is.eq r247 r133 into r250;\n    or r249 r250 into r251;\n    assert.eq r251 true;\n    ternary r237 r248 r133 into r252;\n    is.eq r252 r1.token_out into r253;\n    assert.eq r253 true;\n    cast 1u128 0u128 into r254 as U256__8JquwLopp8;\n    cast 0u128 0u128 into r255 as U256__8JquwLopp8;\n    cast 0u128 0u128 into r256 as U256__8JquwLopp8;\n    cast 0i32 1u32 r254 0u8 0u128 r255 r256 0u128 0u128 0u128 0i32 0i32 into r257 as Slot;\n    get.or_use slots[r1.hop2.pool] r257 into r258;\n    cast r239.fee into r259 as u32;\n    ternary r237 r1.hop2.sqrt_price_limit.hi r258.sqrt_price.hi into r260;\n    ternary r237 r1.hop2.sqrt_price_limit.lo r258.sqrt_price.lo into r261;\n    cast r260 r261 into r262 as U256__8JquwLopp8;\n    lt r262.hi 0u128 into r263;\n    gt r262.hi 0u128 into r264;\n    lt r262.lo 702075911466779181339691826087u128 into r265;\n    ternary r264 false r265 into r266;\n    ternary r263 true r266 into r267;\n    not r267 into r268;\n    lt 484680305u128 r262.hi into r269;\n    gt 484680305u128 r262.hi into r270;\n    lt 8756686347225649145659787327114459760u128 r262.lo into r271;\n    ternary r270 false r271 into r272;\n    ternary r269 true r272 into r273;\n    not r273 into r274;\n    and r268 r274 into r275;\n    or r249 r275 into r276;\n    assert.eq r276 true;\n    lt r262.hi r258.sqrt_price.hi into r277;\n    gt r262.hi r258.sqrt_price.hi into r278;\n    lt r262.lo r258.sqrt_price.lo into r279;\n    ternary r278 false r279 into r280;\n    ternary r277 true r280 into r281;\n    lt r258.sqrt_price.hi r262.hi into r282;\n    gt r258.sqrt_price.hi r262.hi into r283;\n    lt r258.sqrt_price.lo r262.lo into r284;\n    ternary r283 false r284 into r285;\n    ternary r282 true r285 into r286;\n    ternary r1.hop2.zero_for_one r281 r286 into r287;\n    or r249 r287 into r288;\n    assert.eq r288 true;\n    ternary r1.hop2.zero_for_one r258.fee_growth_global0_x_128.hi r258.fee_growth_global1_x_128.hi into r289;\n    ternary r1.hop2.zero_for_one r258.fee_growth_global0_x_128.lo r258.fee_growth_global1_x_128.lo into r290;\n    cast r289 r290 into r291 as U256__8JquwLopp8;\n    cast r1.hop2.zero_for_one r262 r259 r258.fee_protocol r258.fee_growth_global0_x_128 r258.fee_growth_global1_x_128 into r292 as SwapIterCfg;\n    ternary r1.hop2.zero_for_one r258.next_init_below r258.next_init_above into r293;\n    cast r1.hop2.pool r293 into r294 as TickKey;\n    hash.bhp256 r294 into r295 as field;\n    cast 0u128 0u128 into r296 as U256__8JquwLopp8;\n    cast 0u128 0u128 into r297 as U256__8JquwLopp8;\n    cast r1.hop2.pool 0i128 0u128 r293 r296 r297 r293 r293 into r298 as Tick;\n    get.or_use ticks[r295] r298 into r299;\n    call view_sqrt_price_at_tick_x128 r293 into r300;\n    cast r258.sqrt_price r217 0u128 r291 r258.liquidity r258.tick r237 0u128 r258.next_init_below r258.next_init_above into r301 as SwapIterState;\n    call view_swap_iteration_v2 r292 r293 r300 r299 r301 into r302 r303 r304;\n    branch.eq r237 false to end_then_0_4;\n    set r303 into ticks[r295];\n    branch.eq true true to end_otherwise_0_5;\n    position end_then_0_4;\n    position end_otherwise_0_5;\n    not r302.crossed into r305;\n    is.eq r302.sp.hi r258.sqrt_price.hi into r306;\n    is.eq r302.sp.lo r258.sqrt_price.lo into r307;\n    and r306 r307 into r308;\n    not r308 into r309;\n    and r305 r309 into r310;\n    ternary r1.hop2.zero_for_one r302.nb r302.na into r311;\n    cast r1.hop2.pool r311 into r312 as TickKey;\n    hash.bhp256 r312 into r313 as field;\n    cast 0u128 0u128 into r314 as U256__8JquwLopp8;\n    cast 0u128 0u128 into r315 as U256__8JquwLopp8;\n    cast r1.hop2.pool 0i128 0u128 r311 r314 r315 r311 r311 into r316 as Tick;\n    get.or_use ticks[r313] r316 into r317;\n    call view_sqrt_price_at_tick_x128 r311 into r318;\n    cast r302.sp r302.rem r302.out r302.fg r302.liq r302.tk r302.crossed r302.pf r302.nb r302.na into r319 as SwapIterState;\n    call view_swap_iteration_v2 r292 r311 r318 r317 r319 into r320 r321 r322;\n    branch.eq r237 false to end_then_0_6;\n    set r321 into ticks[r313];\n    branch.eq true true to end_otherwise_0_7;\n    position end_then_0_6;\n    position end_otherwise_0_7;\n    not r320.crossed into r323;\n    is.eq r320.sp.hi r302.sp.hi into r324;\n    is.eq r320.sp.lo r302.sp.lo into r325;\n    and r324 r325 into r326;\n    not r326 into r327;\n    and r323 r327 into r328;\n    or r310 r328 into r329;\n    add r304 r322 into r330;\n    ternary r1.hop2.zero_for_one r320.nb r320.na into r331;\n    cast r1.hop2.pool r331 into r332 as TickKey;\n    hash.bhp256 r332 into r333 as field;\n    cast 0u128 0u128 into r334 as U256__8JquwLopp8;\n    cast 0u128 0u128 into r335 as U256__8JquwLopp8;\n    cast r1.hop2.pool 0i128 0u128 r331 r334 r335 r331 r331 into r336 as Tick;\n    get.or_use ticks[r333] r336 into r337;\n    call view_sqrt_price_at_tick_x128 r331 into r338;\n    cast r320.sp r320.rem r320.out r320.fg r320.liq r320.tk r320.crossed r320.pf r320.nb r320.na into r339 as SwapIterState;\n    call view_swap_iteration_v2 r292 r331 r338 r337 r339 into r340 r341 r342;\n    branch.eq r237 false to end_then_0_8;\n    set r341 into ticks[r333];\n    branch.eq true true to end_otherwise_0_9;\n    position end_then_0_8;\n    position end_otherwise_0_9;\n    not r340.crossed into r343;\n    is.eq r340.sp.hi r320.sp.hi into r344;\n    is.eq r340.sp.lo r320.sp.lo into r345;\n    and r344 r345 into r346;\n    not r346 into r347;\n    and r343 r347 into r348;\n    or r329 r348 into r349;\n    add r330 r342 into r350;\n    ternary r1.hop2.zero_for_one r340.nb r340.na into r351;\n    call view_sqrt_price_at_tick_x128 r351 into r352;\n    call view_bounded_partial_v2 r340.sp r340.liq r340.rem r340.out r340.fg r340.pf r352 r262 r259 r258.fee_protocol r1.hop2.zero_for_one into r353 r354 r355 r356 r357 r358 r359;\n    call resolve_stored_tick r340.sp r340.tk r353 r358 r349 into r360;\n    add r350 r359 into r361;\n    not r237 into r362;\n    is.eq r355 0u128 into r363;\n    or r362 r363 into r364;\n    assert.eq r364 true;\n    add r258.protocol_fees0 r357 into r365;\n    ternary r1.hop2.zero_for_one r365 r258.protocol_fees0 into r366;\n    add r258.protocol_fees1 r357 into r367;\n    ternary r1.hop2.zero_for_one r258.protocol_fees1 r367 into r368;\n    branch.eq r237 false to end_then_0_10;\n    ternary r1.hop2.zero_for_one r356.hi r258.fee_growth_global0_x_128.hi into r369;\n    ternary r1.hop2.zero_for_one r356.lo r258.fee_growth_global0_x_128.lo into r370;\n    cast r369 r370 into r371 as U256__8JquwLopp8;\n    ternary r1.hop2.zero_for_one r258.fee_growth_global1_x_128.hi r356.hi into r372;\n    ternary r1.hop2.zero_for_one r258.fee_growth_global1_x_128.lo r356.lo into r373;\n    cast r372 r373 into r374 as U256__8JquwLopp8;\n    cast r360 r258.tick_spacing r353 r258.fee_protocol r340.liq r371 r374 r258.max_liquidity_per_tick r366 r368 r340.nb r340.na into r375 as Slot;\n    set r375 into slots[r1.hop2.pool];\n    branch.eq true true to end_otherwise_0_11;\n    position end_then_0_10;\n    position end_otherwise_0_11;\n    ternary r237 r354 r217 into r376;\n    gt r376 0u128 into r377;\n    is.eq r106 r1.amount_in into r378;\n    or r377 r378 into r379;\n    gte r376 r1.amount_out_min into r380;\n    and r379 r380 into r381;\n    assert.eq r381 true;\n    contains swap_outputs[r2] into r382;\n    not r382 into r383;\n    assert.eq r383 true;\n    contains swap_execution_headers[r2] into r384;\n    not r384 into r385;\n    assert.eq r385 true;\n    cast block.height r1.hop_count into r386 as SwapExecutionHeader;\n    set r386 into swap_execution_headers[r2];\n    cast r2 0u8 into r387 as SwapExecutionKey;\n    sub r1.amount_in r106 into r388;\n    cast r1.hop0.pool r1.hop0.zero_for_one r388 r105 r112 r108 r104 r91.liq r111 into r389 as HopExecution;\n    set r389 into swap_execution_hops[r387];\n    cast r2 1u8 into r390 as SwapExecutionKey;\n    cast r1.hop1.pool r1.hop1.zero_for_one r105 r217 r224 r220 r216 r203.liq r223 into r391 as HopExecution;\n    set r391 into swap_execution_hops[r390];\n    branch.eq r237 false to end_then_0_12;\n    cast r2 2u8 into r392 as SwapExecutionKey;\n    cast r1.hop2.pool r1.hop2.zero_for_one r217 r354 r361 r357 r353 r340.liq r360 into r393 as HopExecution;\n    set r393 into swap_execution_hops[r392];\n    branch.eq true true to end_otherwise_0_13;\n    position end_then_0_12;\n    position end_otherwise_0_13;\n    cast r1.recipient r1.caller r20 r1.token_out r376 r106 into r394 as SwapOutput;\n    set r394 into swap_outputs[r2];\n    contains used_blinded_addresses[r1.caller] into r395;\n    not r395 into r396;\n    assert.eq r396 true;\n    set true into used_blinded_addresses[r1.caller];\n\nview view_swap_iteration:\n    input r0 as SwapIterCfg.public;\n    input r1 as i32.public;\n    input r2 as U256__8JquwLopp8.public;\n    input r3 as Tick.public;\n    input r4 as SwapIterState.public;\n    lt r2.hi r0.lim.hi into r5;\n    gt r2.hi r0.lim.hi into r6;\n    lt r2.lo r0.lim.lo into r7;\n    ternary r6 false r7 into r8;\n    ternary r5 true r8 into r9;\n    ternary r9 r0.lim.hi r2.hi into r10;\n    ternary r9 r0.lim.lo r2.lo into r11;\n    cast r10 r11 into r12 as U256__8JquwLopp8;\n    lt r0.lim.hi r2.hi into r13;\n    gt r0.lim.hi r2.hi into r14;\n    lt r0.lim.lo r2.lo into r15;\n    ternary r14 false r15 into r16;\n    ternary r13 true r16 into r17;\n    ternary r17 r0.lim.hi r2.hi into r18;\n    ternary r17 r0.lim.lo r2.lo into r19;\n    cast r18 r19 into r20 as U256__8JquwLopp8;\n    ternary r0.z r12.hi r20.hi into r21;\n    ternary r0.z r12.lo r20.lo into r22;\n    cast r21 r22 into r23 as U256__8JquwLopp8;\n    gt r4.rem 0u128 into r24;\n    and r4.crossed r24 into r25;\n    is.eq r4.liq 0u128 into r26;\n    and r25 r26 into r27;\n    gt r4.liq 0u128 into r28;\n    and r24 r28 into r29;\n    and r29 r4.crossed into r30;\n    lt r4.sp.hi r23.hi into r31;\n    gt r4.sp.hi r23.hi into r32;\n    lt r4.sp.lo r23.lo into r33;\n    ternary r32 false r33 into r34;\n    ternary r31 true r34 into r35;\n    ternary r35 r4.sp.hi r23.hi into r36;\n    ternary r35 r4.sp.lo r23.lo into r37;\n    cast r36 r37 into r38 as U256__8JquwLopp8;\n    lt r4.sp.hi r23.hi into r39;\n    gt r4.sp.hi r23.hi into r40;\n    lt r4.sp.lo r23.lo into r41;\n    ternary r40 false r41 into r42;\n    ternary r39 true r42 into r43;\n    ternary r43 r23.hi r4.sp.hi into r44;\n    ternary r43 r23.lo r4.sp.lo into r45;\n    cast r44 r45 into r46 as U256__8JquwLopp8;\n    lt r46.lo r38.lo into r47;\n    ternary r47 1u128 0u128 into r48;\n    sub.w r46.lo r38.lo into r49;\n    sub.w r46.hi r38.hi into r50;\n    sub.w r50 r48 into r51;\n    cast r51 r49 into r52 as U256__8JquwLopp8;\n    shr r52.lo 64u8 into r53;\n    shr r52.hi 64u8 into r54;\n    and r4.liq 18446744073709551615u128 into r55;\n    shr r4.liq 64u8 into r56;\n    and r52.lo 18446744073709551615u128 into r57;\n    shr r52.lo 64u8 into r58;\n    mul r55 r57 into r59;\n    mul r55 r58 into r60;\n    mul r56 r57 into r61;\n    mul r56 r58 into r62;\n    and r59 18446744073709551615u128 into r63;\n    shr r59 64u8 into r64;\n    and r60 18446744073709551615u128 into r65;\n    add r64 r65 into r66;\n    and r61 18446744073709551615u128 into r67;\n    add r66 r67 into r68;\n    and r68 18446744073709551615u128 into r69;\n    shr r68 64u8 into r70;\n    shr r60 64u8 into r71;\n    shr r61 64u8 into r72;\n    add r71 r72 into r73;\n    and r62 18446744073709551615u128 into r74;\n    add r73 r74 into r75;\n    add r75 r70 into r76;\n    and r76 18446744073709551615u128 into r77;\n    shr r76 64u8 into r78;\n    shr r62 64u8 into r79;\n    add r79 r78 into r80;\n    shl r80 64u8 into r81;\n    add r81 r77 into r82;\n    shl r69 64u8 into r83;\n    add r83 r63 into r84;\n    and r52.hi 18446744073709551615u128 into r85;\n    shr r52.hi 64u8 into r86;\n    mul r55 r85 into r87;\n    mul r55 r86 into r88;\n    mul r56 r85 into r89;\n    mul r56 r86 into r90;\n    and r87 18446744073709551615u128 into r91;\n    shr r87 64u8 into r92;\n    and r88 18446744073709551615u128 into r93;\n    add r92 r93 into r94;\n    and r89 18446744073709551615u128 into r95;\n    add r94 r95 into r96;\n    and r96 18446744073709551615u128 into r97;\n    shr r96 64u8 into r98;\n    shr r88 64u8 into r99;\n    shr r89 64u8 into r100;\n    add r99 r100 into r101;\n    and r90 18446744073709551615u128 into r102;\n    add r101 r102 into r103;\n    add r103 r98 into r104;\n    and r104 18446744073709551615u128 into r105;\n    shr r104 64u8 into r106;\n    shr r90 64u8 into r107;\n    add r107 r106 into r108;\n    shl r108 64u8 into r109;\n    add r109 r105 into r110;\n    shl r97 64u8 into r111;\n    add r111 r91 into r112;\n    lt r84 0u128 into r113;\n    ternary r113 1u128 0u128 into r114;\n    lt r82 0u128 into r115;\n    ternary r115 1u128 0u128 into r116;\n    add.w r82 r112 into r117;\n    lt r117 r82 into r118;\n    ternary r118 1u128 0u128 into r119;\n    add.w r117 r114 into r120;\n    lt r120 r117 into r121;\n    ternary r121 1u128 0u128 into r122;\n    add r116 r119 into r123;\n    add r123 r122 into r124;\n    add.w r110 r124 into r125;\n    cast r125 r120 into r126 as U256__8JquwLopp8;\n    cast r84 0u128 into r127 as U256__8JquwLopp8;\n    lt r126.hi r46.hi into r128;\n    gt r126.hi r46.hi into r129;\n    lt r126.lo r46.lo into r130;\n    ternary r129 false r130 into r131;\n    ternary r128 true r131 into r132;\n    assert.eq r132 true;\n    gt r46.hi 0u128 into r133;\n    ternary r133 r46.hi r46.lo into r134;\n    ternary r133 128u32 0u32 into r135;\n    gte r134 18446744073709551616u128 into r136;\n    shr r134 64u8 into r137;\n    ternary r136 r137 r134 into r138;\n    ternary r136 64u32 0u32 into r139;\n    gte r138 4294967296u128 into r140;\n    shr r138 32u8 into r141;\n    add r139 32u32 into r142;\n    ternary r140 r141 r138 into r143;\n    ternary r140 r142 r139 into r144;\n    gte r143 65536u128 into r145;\n    shr r143 16u8 into r146;\n    add r144 16u32 into r147;\n    ternary r145 r146 r143 into r148;\n    ternary r145 r147 r144 into r149;\n    gte r148 256u128 into r150;\n    shr r148 8u8 into r151;\n    add r149 8u32 into r152;\n    ternary r150 r151 r148 into r153;\n    ternary r150 r152 r149 into r154;\n    gte r153 16u128 into r155;\n    shr r153 4u8 into r156;\n    add r154 4u32 into r157;\n    ternary r155 r156 r153 into r158;\n    ternary r155 r157 r154 into r159;\n    gte r158 4u128 into r160;\n    shr r158 2u8 into r161;\n    add r159 2u32 into r162;\n    ternary r160 r161 r158 into r163;\n    ternary r160 r162 r159 into r164;\n    gte r163 2u128 into r165;\n    add r164 1u32 into r166;\n    ternary r165 r166 r164 into r167;\n    add r135 r167 into r168;\n    sub 255u32 r168 into r169;\n    cast r169 into r170 as u16;\n    and r170 127u16 into r171;\n    cast r171 into r172 as u8;\n    is.eq r172 0u8 into r173;\n    sub 128u8 r172 into r174;\n    shr.w r46.lo r174 into r175;\n    ternary r173 0u128 r175 into r176;\n    shl.w r46.hi r172 into r177;\n    or r177 r176 into r178;\n    shl.w r46.lo r172 into r179;\n    shl.w r46.lo r172 into r180;\n    gte r170 128u16 into r181;\n    ternary r181 r180 r178 into r182;\n    ternary r181 0u128 r179 into r183;\n    cast r182 r183 into r184 as U256__8JquwLopp8;\n    and r184.lo 18446744073709551615u128 into r185;\n    shr r184.lo 64u8 into r186;\n    and r184.hi 18446744073709551615u128 into r187;\n    shr r184.hi 64u8 into r188;\n    cast r171 into r189 as u8;\n    is.eq r189 0u8 into r190;\n    sub 128u8 r189 into r191;\n    shr.w r127.lo r191 into r192;\n    ternary r190 0u128 r192 into r193;\n    shl.w r127.hi r189 into r194;\n    or r194 r193 into r195;\n    shl.w r127.lo r189 into r196;\n    shl.w r127.lo r189 into r197;\n    ternary r181 r197 r195 into r198;\n    ternary r181 0u128 r196 into r199;\n    cast r198 r199 into r200 as U256__8JquwLopp8;\n    is.eq r170 0u16 into r201;\n    sub 256u16 r170 into r202;\n    and r202 127u16 into r203;\n    cast r203 into r204 as u8;\n    is.eq r204 0u8 into r205;\n    sub 128u8 r204 into r206;\n    shl.w r127.hi r206 into r207;\n    ternary r205 0u128 r207 into r208;\n    shr r127.lo r204 into r209;\n    or r209 r208 into r210;\n    shr r127.hi r204 into r211;\n    shr r127.hi r204 into r212;\n    gte r202 128u16 into r213;\n    ternary r213 0u128 r211 into r214;\n    ternary r213 r212 r210 into r215;\n    cast r214 r215 into r216 as U256__8JquwLopp8;\n    ternary r201 0u128 r216.hi into r217;\n    ternary r201 0u128 r216.lo into r218;\n    cast r217 r218 into r219 as U256__8JquwLopp8;\n    cast r171 into r220 as u8;\n    is.eq r220 0u8 into r221;\n    sub 128u8 r220 into r222;\n    shr.w r126.lo r222 into r223;\n    ternary r221 0u128 r223 into r224;\n    shl.w r126.hi r220 into r225;\n    or r225 r224 into r226;\n    shl.w r126.lo r220 into r227;\n    shl.w r126.lo r220 into r228;\n    ternary r181 r228 r226 into r229;\n    ternary r181 0u128 r227 into r230;\n    cast r229 r230 into r231 as U256__8JquwLopp8;\n    add.w r231.lo r219.lo into r232;\n    lt r232 r231.lo into r233;\n    ternary r233 1u128 0u128 into r234;\n    add.w r231.hi r219.hi into r235;\n    add.w r235 r234 into r236;\n    cast r236 r232 into r237 as U256__8JquwLopp8;\n    and r200.lo 18446744073709551615u128 into r238;\n    shr r200.lo 64u8 into r239;\n    and r200.hi 18446744073709551615u128 into r240;\n    shr r200.hi 64u8 into r241;\n    and r237.lo 18446744073709551615u128 into r242;\n    shr r237.lo 64u8 into r243;\n    and r237.hi 18446744073709551615u128 into r244;\n    shr r237.hi 64u8 into r245;\n    shl r245 64u8 into r246;\n    add r246 r244 into r247;\n    div r247 r188 into r248;\n    gt r248 18446744073709551615u128 into r249;\n    ternary r249 18446744073709551615u128 r248 into r250;\n    mul r250 r188 into r251;\n    sub r247 r251 into r252;\n    lte r252 18446744073709551615u128 into r253;\n    mul r250 r187 into r254;\n    and r252 18446744073709551615u128 into r255;\n    shl r255 64u8 into r256;\n    add r256 r243 into r257;\n    gt r254 r257 into r258;\n    and r253 r258 into r259;\n    sub.w r250 1u128 into r260;\n    ternary r259 r260 r250 into r261;\n    add r252 r188 into r262;\n    ternary r259 r262 r252 into r263;\n    lte r263 18446744073709551615u128 into r264;\n    and r259 r264 into r265;\n    mul r261 r187 into r266;\n    and r263 18446744073709551615u128 into r267;\n    shl r267 64u8 into r268;\n    add r268 r243 into r269;\n    gt r266 r269 into r270;\n    and r265 r270 into r271;\n    sub.w r261 1u128 into r272;\n    ternary r271 r272 r261 into r273;\n    mul r273 r185 into r274;\n    and r274 18446744073709551615u128 into r275;\n    lt r241 r275 into r276;\n    add r241 18446744073709551616u128 into r277;\n    sub r277 r275 into r278;\n    and r278 18446744073709551615u128 into r279;\n    shr r274 64u8 into r280;\n    ternary r276 1u128 0u128 into r281;\n    add r280 r281 into r282;\n    mul r273 r186 into r283;\n    add r283 r282 into r284;\n    and r284 18446744073709551615u128 into r285;\n    lt r242 r285 into r286;\n    add r242 18446744073709551616u128 into r287;\n    sub r287 r285 into r288;\n    and r288 18446744073709551615u128 into r289;\n    shr r284 64u8 into r290;\n    ternary r286 1u128 0u128 into r291;\n    add r290 r291 into r292;\n    mul r273 r187 into r293;\n    add r293 r292 into r294;\n    and r294 18446744073709551615u128 into r295;\n    lt r243 r295 into r296;\n    add r243 18446744073709551616u128 into r297;\n    sub r297 r295 into r298;\n    and r298 18446744073709551615u128 into r299;\n    shr r294 64u8 into r300;\n    ternary r296 1u128 0u128 into r301;\n    add r300 r301 into r302;\n    mul r273 r188 into r303;\n    add r303 r302 into r304;\n    and r304 18446744073709551615u128 into r305;\n    lt r244 r305 into r306;\n    add r244 18446744073709551616u128 into r307;\n    sub r307 r305 into r308;\n    and r308 18446744073709551615u128 into r309;\n    shr r304 64u8 into r310;\n    ternary r306 1u128 0u128 into r311;\n    add r310 r311 into r312;\n    lt r245 r312 into r313;\n    add r245 18446744073709551616u128 into r314;\n    sub r314 r312 into r315;\n    and r315 18446744073709551615u128 into r316;\n    sub.w r273 1u128 into r317;\n    ternary r313 r317 r273 into r318;\n    add r279 r185 into r319;\n    and r319 18446744073709551615u128 into r320;\n    ternary r313 r320 r279 into r321;\n    shr r319 64u8 into r322;\n    ternary r313 r322 0u128 into r323;\n    add r289 r186 into r324;\n    add r324 r323 into r325;\n    and r325 18446744073709551615u128 into r326;\n    ternary r313 r326 r289 into r327;\n    shr r325 64u8 into r328;\n    ternary r313 r328 0u128 into r329;\n    add r299 r187 into r330;\n    add r330 r329 into r331;\n    and r331 18446744073709551615u128 into r332;\n    ternary r313 r332 r299 into r333;\n    shr r331 64u8 into r334;\n    ternary r313 r334 0u128 into r335;\n    add r309 r188 into r336;\n    add r336 r335 into r337;\n    and r337 18446744073709551615u128 into r338;\n    ternary r313 r338 r309 into r339;\n    shr r337 64u8 into r340;\n    ternary r313 r340 0u128 into r341;\n    add r316 r341 into r342;\n    shl r339 64u8 into r343;\n    add r343 r333 into r344;\n    div r344 r188 into r345;\n    gt r345 18446744073709551615u128 into r346;\n    ternary r346 18446744073709551615u128 r345 into r347;\n    mul r347 r188 into r348;\n    sub r344 r348 into r349;\n    lte r349 18446744073709551615u128 into r350;\n    mul r347 r187 into r351;\n    and r349 18446744073709551615u128 into r352;\n    shl r352 64u8 into r353;\n    add r353 r327 into r354;\n    gt r351 r354 into r355;\n    and r350 r355 into r356;\n    sub.w r347 1u128 into r357;\n    ternary r356 r357 r347 into r358;\n    add r349 r188 into r359;\n    ternary r356 r359 r349 into r360;\n    lte r360 18446744073709551615u128 into r361;\n    and r356 r361 into r362;\n    mul r358 r187 into r363;\n    and r360 18446744073709551615u128 into r364;\n    shl r364 64u8 into r365;\n    add r365 r327 into r366;\n    gt r363 r366 into r367;\n    and r362 r367 into r368;\n    sub.w r358 1u128 into r369;\n    ternary r368 r369 r358 into r370;\n    mul r370 r185 into r371;\n    and r371 18446744073709551615u128 into r372;\n    lt r240 r372 into r373;\n    add r240 18446744073709551616u128 into r374;\n    sub r374 r372 into r375;\n    and r375 18446744073709551615u128 into r376;\n    shr r371 64u8 into r377;\n    ternary r373 1u128 0u128 into r378;\n    add r377 r378 into r379;\n    mul r370 r186 into r380;\n    add r380 r379 into r381;\n    and r381 18446744073709551615u128 into r382;\n    lt r321 r382 into r383;\n    add r321 18446744073709551616u128 into r384;\n    sub r384 r382 into r385;\n    and r385 18446744073709551615u128 into r386;\n    shr r381 64u8 into r387;\n    ternary r383 1u128 0u128 into r388;\n    add r387 r388 into r389;\n    mul r370 r187 into r390;\n    add r390 r389 into r391;\n    and r391 18446744073709551615u128 into r392;\n    lt r327 r392 into r393;\n    add r327 18446744073709551616u128 into r394;\n    sub r394 r392 into r395;\n    and r395 18446744073709551615u128 into r396;\n    shr r391 64u8 into r397;\n    ternary r393 1u128 0u128 into r398;\n    add r397 r398 into r399;\n    mul r370 r188 into r400;\n    add r400 r399 into r401;\n    and r401 18446744073709551615u128 into r402;\n    lt r333 r402 into r403;\n    add r333 18446744073709551616u128 into r404;\n    sub r404 r402 into r405;\n    and r405 18446744073709551615u128 into r406;\n    shr r401 64u8 into r407;\n    ternary r403 1u128 0u128 into r408;\n    add r407 r408 into r409;\n    lt r339 r409 into r410;\n    add r339 18446744073709551616u128 into r411;\n    sub r411 r409 into r412;\n    and r412 18446744073709551615u128 into r413;\n    sub.w r370 1u128 into r414;\n    ternary r410 r414 r370 into r415;\n    add r376 r185 into r416;\n    and r416 18446744073709551615u128 into r417;\n    ternary r410 r417 r376 into r418;\n    shr r416 64u8 into r419;\n    ternary r410 r419 0u128 into r420;\n    add r386 r186 into r421;\n    add r421 r420 into r422;\n    and r422 18446744073709551615u128 into r423;\n    ternary r410 r423 r386 into r424;\n    shr r422 64u8 into r425;\n    ternary r410 r425 0u128 into r426;\n    add r396 r187 into r427;\n    add r427 r426 into r428;\n    and r428 18446744073709551615u128 into r429;\n    ternary r410 r429 r396 into r430;\n    shr r428 64u8 into r431;\n    ternary r410 r431 0u128 into r432;\n    add r406 r188 into r433;\n    add r433 r432 into r434;\n    and r434 18446744073709551615u128 into r435;\n    ternary r410 r435 r406 into r436;\n    shr r434 64u8 into r437;\n    ternary r410 r437 0u128 into r438;\n    add r413 r438 into r439;\n    shl r436 64u8 into r440;\n    add r440 r430 into r441;\n    div r441 r188 into r442;\n    gt r442 18446744073709551615u128 into r443;\n    ternary r443 18446744073709551615u128 r442 into r444;\n    mul r444 r188 into r445;\n    sub r441 r445 into r446;\n    lte r446 18446744073709551615u128 into r447;\n    mul r444 r187 into r448;\n    and r446 18446744073709551615u128 into r449;\n    shl r449 64u8 into r450;\n    add r450 r424 into r451;\n    gt r448 r451 into r452;\n    and r447 r452 into r453;\n    sub.w r444 1u128 into r454;\n    ternary r453 r454 r444 into r455;\n    add r446 r188 into r456;\n    ternary r453 r456 r446 into r457;\n    lte r457 18446744073709551615u128 into r458;\n    and r453 r458 into r459;\n    mul r455 r187 into r460;\n    and r457 18446744073709551615u128 into r461;\n    shl r461 64u8 into r462;\n    add r462 r424 into r463;\n    gt r460 r463 into r464;\n    and r459 r464 into r465;\n    sub.w r455 1u128 into r466;\n    ternary r465 r466 r455 into r467;\n    mul r467 r185 into r468;\n    and r468 18446744073709551615u128 into r469;\n    lt r239 r469 into r470;\n    add r239 18446744073709551616u128 into r471;\n    sub r471 r469 into r472;\n    and r472 18446744073709551615u128 into r473;\n    shr r468 64u8 into r474;\n    ternary r470 1u128 0u128 into r475;\n    add r474 r475 into r476;\n    mul r467 r186 into r477;\n    add r477 r476 into r478;\n    and r478 18446744073709551615u128 into r479;\n    lt r418 r479 into r480;\n    add r418 18446744073709551616u128 into r481;\n    sub r481 r479 into r482;\n    and r482 18446744073709551615u128 into r483;\n    shr r478 64u8 into r484;\n    ternary r480 1u128 0u128 into r485;\n    add r484 r485 into r486;\n    mul r467 r187 into r487;\n    add r487 r486 into r488;\n    and r488 18446744073709551615u128 into r489;\n    lt r424 r489 into r490;\n    add r424 18446744073709551616u128 into r491;\n    sub r491 r489 into r492;\n    and r492 18446744073709551615u128 into r493;\n    shr r488 64u8 into r494;\n    ternary r490 1u128 0u128 into r495;\n    add r494 r495 into r496;\n    mul r467 r188 into r497;\n    add r497 r496 into r498;\n    and r498 18446744073709551615u128 into r499;\n    lt r430 r499 into r500;\n    add r430 18446744073709551616u128 into r501;\n    sub r501 r499 into r502;\n    and r502 18446744073709551615u128 into r503;\n    shr r498 64u8 into r504;\n    ternary r500 1u128 0u128 into r505;\n    add r504 r505 into r506;\n    lt r436 r506 into r507;\n    add r436 18446744073709551616u128 into r508;\n    sub r508 r506 into r509;\n    and r509 18446744073709551615u128 into r510;\n    sub.w r467 1u128 into r511;\n    ternary r507 r511 r467 into r512;\n    add r473 r185 into r513;\n    and r513 18446744073709551615u128 into r514;\n    ternary r507 r514 r473 into r515;\n    shr r513 64u8 into r516;\n    ternary r507 r516 0u128 into r517;\n    add r483 r186 into r518;\n    add r518 r517 into r519;\n    and r519 18446744073709551615u128 into r520;\n    ternary r507 r520 r483 into r521;\n    shr r519 64u8 into r522;\n    ternary r507 r522 0u128 into r523;\n    add r493 r187 into r524;\n    add r524 r523 into r525;\n    and r525 18446744073709551615u128 into r526;\n    ternary r507 r526 r493 into r527;\n    shr r525 64u8 into r528;\n    ternary r507 r528 0u128 into r529;\n    add r503 r188 into r530;\n    add r530 r529 into r531;\n    and r531 18446744073709551615u128 into r532;\n    ternary r507 r532 r503 into r533;\n    shr r531 64u8 into r534;\n    ternary r507 r534 0u128 into r535;\n    add r510 r535 into r536;\n    shl r533 64u8 into r537;\n    add r537 r527 into r538;\n    div r538 r188 into r539;\n    gt r539 18446744073709551615u128 into r540;\n    ternary r540 18446744073709551615u128 r539 into r541;\n    mul r541 r188 into r542;\n    sub r538 r542 into r543;\n    lte r543 18446744073709551615u128 into r544;\n    mul r541 r187 into r545;\n    and r543 18446744073709551615u128 into r546;\n    shl r546 64u8 into r547;\n    add r547 r521 into r548;\n    gt r545 r548 into r549;\n    and r544 r549 into r550;\n    sub.w r541 1u128 into r551;\n    ternary r550 r551 r541 into r552;\n    add r543 r188 into r553;\n    ternary r550 r553 r543 into r554;\n    lte r554 18446744073709551615u128 into r555;\n    and r550 r555 into r556;\n    mul r552 r187 into r557;\n    and r554 18446744073709551615u128 into r558;\n    shl r558 64u8 into r559;\n    add r559 r521 into r560;\n    gt r557 r560 into r561;\n    and r556 r561 into r562;\n    sub.w r552 1u128 into r563;\n    ternary r562 r563 r552 into r564;\n    mul r564 r185 into r565;\n    and r565 18446744073709551615u128 into r566;\n    lt r238 r566 into r567;\n    add r238 18446744073709551616u128 into r568;\n    sub r568 r566 into r569;\n    and r569 18446744073709551615u128 into r570;\n    shr r565 64u8 into r571;\n    ternary r567 1u128 0u128 into r572;\n    add r571 r572 into r573;\n    mul r564 r186 into r574;\n    add r574 r573 into r575;\n    and r575 18446744073709551615u128 into r576;\n    lt r515 r576 into r577;\n    add r515 18446744073709551616u128 into r578;\n    sub r578 r576 into r579;\n    and r579 18446744073709551615u128 into r580;\n    shr r575 64u8 into r581;\n    ternary r577 1u128 0u128 into r582;\n    add r581 r582 into r583;\n    mul r564 r187 into r584;\n    add r584 r583 into r585;\n    and r585 18446744073709551615u128 into r586;\n    lt r521 r586 into r587;\n    add r521 18446744073709551616u128 into r588;\n    sub r588 r586 into r589;\n    and r589 18446744073709551615u128 into r590;\n    shr r585 64u8 into r591;\n    ternary r587 1u128 0u128 into r592;\n    add r591 r592 into r593;\n    mul r564 r188 into r594;\n    add r594 r593 into r595;\n    and r595 18446744073709551615u128 into r596;\n    lt r527 r596 into r597;\n    add r527 18446744073709551616u128 into r598;\n    sub r598 r596 into r599;\n    and r599 18446744073709551615u128 into r600;\n    shr r595 64u8 into r601;\n    ternary r597 1u128 0u128 into r602;\n    add r601 r602 into r603;\n    lt r533 r603 into r604;\n    add r533 18446744073709551616u128 into r605;\n    sub r605 r603 into r606;\n    and r606 18446744073709551615u128 into r607;\n    sub.w r564 1u128 into r608;\n    ternary r604 r608 r564 into r609;\n    add r570 r185 into r610;\n    and r610 18446744073709551615u128 into r611;\n    ternary r604 r611 r570 into r612;\n    shr r610 64u8 into r613;\n    ternary r604 r613 0u128 into r614;\n    add r580 r186 into r615;\n    add r615 r614 into r616;\n    and r616 18446744073709551615u128 into r617;\n    ternary r604 r617 r580 into r618;\n    shr r616 64u8 into r619;\n    ternary r604 r619 0u128 into r620;\n    add r590 r187 into r621;\n    add r621 r620 into r622;\n    and r622 18446744073709551615u128 into r623;\n    ternary r604 r623 r590 into r624;\n    shr r622 64u8 into r625;\n    ternary r604 r625 0u128 into r626;\n    add r600 r188 into r627;\n    add r627 r626 into r628;\n    and r628 18446744073709551615u128 into r629;\n    ternary r604 r629 r600 into r630;\n    shr r628 64u8 into r631;\n    ternary r604 r631 0u128 into r632;\n    add r607 r632 into r633;\n    shl r318 64u8 into r634;\n    add r634 r415 into r635;\n    shl r512 64u8 into r636;\n    add r636 r609 into r637;\n    cast r635 r637 into r638 as U256__8JquwLopp8;\n    shl r630 64u8 into r639;\n    add r639 r624 into r640;\n    shl r618 64u8 into r641;\n    add r641 r612 into r642;\n    cast r171 into r643 as u8;\n    is.eq r643 0u8 into r644;\n    sub 128u8 r643 into r645;\n    shl.w r640 r645 into r646;\n    ternary r644 0u128 r646 into r647;\n    shr r642 r643 into r648;\n    or r648 r647 into r649;\n    shr r640 r643 into r650;\n    ternary r181 0u128 r650 into r651;\n    ternary r181 r650 r649 into r652;\n    cast r651 r652 into r653 as U256__8JquwLopp8;\n    is.eq r653.hi 0u128 into r654;\n    is.eq r653.lo 0u128 into r655;\n    and r654 r655 into r656;\n    not r656 into r657;\n    and r0.z r657 into r658;\n    is.eq r638.hi 340282366920938463463374607431768211455u128 into r659;\n    is.eq r638.lo 340282366920938463463374607431768211455u128 into r660;\n    and r659 r660 into r661;\n    and r658 r661 into r662;\n    not r662 into r663;\n    assert.eq r663 true;\n    add.w r638.lo 1u128 into r664;\n    lt r664 r638.lo into r665;\n    ternary r665 1u128 0u128 into r666;\n    add.w r638.hi r666 into r667;\n    cast r667 r664 into r668 as U256__8JquwLopp8;\n    ternary r658 r668.hi r638.hi into r669;\n    ternary r658 r668.lo r638.lo into r670;\n    cast r669 r670 into r671 as U256__8JquwLopp8;\n    and r671.lo 18446744073709551615u128 into r672;\n    shr r671.lo 64u8 into r673;\n    and r672 18446744073709551615u128 into r674;\n    shr r672 64u8 into r675;\n    and r673 18446744073709551615u128 into r676;\n    add r675 r676 into r677;\n    and r677 18446744073709551615u128 into r678;\n    shr r677 64u8 into r679;\n    shr r673 64u8 into r680;\n    add r680 r679 into r681;\n    and r681 18446744073709551615u128 into r682;\n    shr r681 64u8 into r683;\n    shl r683 64u8 into r684;\n    add r684 r682 into r685;\n    shl r678 64u8 into r686;\n    add r686 r674 into r687;\n    shr r671.lo 64u8 into r688;\n    and r671.hi 18446744073709551615u128 into r689;\n    shr r671.hi 64u8 into r690;\n    and r689 18446744073709551615u128 into r691;\n    shr r689 64u8 into r692;\n    and r690 18446744073709551615u128 into r693;\n    add r692 r693 into r694;\n    and r694 18446744073709551615u128 into r695;\n    shr r694 64u8 into r696;\n    shr r690 64u8 into r697;\n    add r697 r696 into r698;\n    and r698 18446744073709551615u128 into r699;\n    shr r698 64u8 into r700;\n    shl r700 64u8 into r701;\n    add r701 r699 into r702;\n    shl r695 64u8 into r703;\n    add r703 r691 into r704;\n    shr r671.hi 64u8 into r705;\n    lt r685 r685 into r706;\n    ternary r706 1u128 0u128 into r707;\n    add.w r685 r704 into r708;\n    lt r708 r685 into r709;\n    ternary r709 1u128 0u128 into r710;\n    add r707 r710 into r711;\n    lt r702 0u128 into r712;\n    ternary r712 1u128 0u128 into r713;\n    lt r702 r702 into r714;\n    ternary r714 1u128 0u128 into r715;\n    add.w r702 r711 into r716;\n    lt r716 r702 into r717;\n    ternary r717 1u128 0u128 into r718;\n    add r713 r715 into r719;\n    add r719 r718 into r720;\n    cast r720 r716 into r721 as U256__8JquwLopp8;\n    cast r708 r687 into r722 as U256__8JquwLopp8;\n    lt r721.hi r38.hi into r723;\n    gt r721.hi r38.hi into r724;\n    lt r721.lo r38.lo into r725;\n    ternary r724 false r725 into r726;\n    ternary r723 true r726 into r727;\n    assert.eq r727 true;\n    gt r38.hi 0u128 into r728;\n    ternary r728 r38.hi r38.lo into r729;\n    ternary r728 128u32 0u32 into r730;\n    gte r729 18446744073709551616u128 into r731;\n    shr r729 64u8 into r732;\n    ternary r731 r732 r729 into r733;\n    ternary r731 64u32 0u32 into r734;\n    gte r733 4294967296u128 into r735;\n    shr r733 32u8 into r736;\n    add r734 32u32 into r737;\n    ternary r735 r736 r733 into r738;\n    ternary r735 r737 r734 into r739;\n    gte r738 65536u128 into r740;\n    shr r738 16u8 into r741;\n    add r739 16u32 into r742;\n    ternary r740 r741 r738 into r743;\n    ternary r740 r742 r739 into r744;\n    gte r743 256u128 into r745;\n    shr r743 8u8 into r746;\n    add r744 8u32 into r747;\n    ternary r745 r746 r743 into r748;\n    ternary r745 r747 r744 into r749;\n    gte r748 16u128 into r750;\n    shr r748 4u8 into r751;\n    add r749 4u32 into r752;\n    ternary r750 r751 r748 into r753;\n    ternary r750 r752 r749 into r754;\n    gte r753 4u128 into r755;\n    shr r753 2u8 into r756;\n    add r754 2u32 into r757;\n    ternary r755 r756 r753 into r758;\n    ternary r755 r757 r754 into r759;\n    gte r758 2u128 into r760;\n    add r759 1u32 into r761;\n    ternary r760 r761 r759 into r762;\n    add r730 r762 into r763;\n    sub 255u32 r763 into r764;\n    cast r764 into r765 as u16;\n    and r765 127u16 into r766;\n    cast r766 into r767 as u8;\n    is.eq r767 0u8 into r768;\n    sub 128u8 r767 into r769;\n    shr.w r38.lo r769 into r770;\n    ternary r768 0u128 r770 into r771;\n    shl.w r38.hi r767 into r772;\n    or r772 r771 into r773;\n    shl.w r38.lo r767 into r774;\n    shl.w r38.lo r767 into r775;\n    gte r765 128u16 into r776;\n    ternary r776 r775 r773 into r777;\n    ternary r776 0u128 r774 into r778;\n    cast r777 r778 into r779 as U256__8JquwLopp8;\n    and r779.lo 18446744073709551615u128 into r780;\n    shr r779.lo 64u8 into r781;\n    and r779.hi 18446744073709551615u128 into r782;\n    shr r779.hi 64u8 into r783;\n    cast r766 into r784 as u8;\n    is.eq r784 0u8 into r785;\n    sub 128u8 r784 into r786;\n    shr.w r722.lo r786 into r787;\n    ternary r785 0u128 r787 into r788;\n    shl.w r722.hi r784 into r789;\n    or r789 r788 into r790;\n    shl.w r722.lo r784 into r791;\n    shl.w r722.lo r784 into r792;\n    ternary r776 r792 r790 into r793;\n    ternary r776 0u128 r791 into r794;\n    cast r793 r794 into r795 as U256__8JquwLopp8;\n    is.eq r765 0u16 into r796;\n    sub 256u16 r765 into r797;\n    and r797 127u16 into r798;\n    cast r798 into r799 as u8;\n    is.eq r799 0u8 into r800;\n    sub 128u8 r799 into r801;\n    shl.w r722.hi r801 into r802;\n    ternary r800 0u128 r802 into r803;\n    shr r722.lo r799 into r804;\n    or r804 r803 into r805;\n    shr r722.hi r799 into r806;\n    shr r722.hi r799 into r807;\n    gte r797 128u16 into r808;\n    ternary r808 0u128 r806 into r809;\n    ternary r808 r807 r805 into r810;\n    cast r809 r810 into r811 as U256__8JquwLopp8;\n    ternary r796 0u128 r811.hi into r812;\n    ternary r796 0u128 r811.lo into r813;\n    cast r812 r813 into r814 as U256__8JquwLopp8;\n    cast r766 into r815 as u8;\n    is.eq r815 0u8 into r816;\n    sub 128u8 r815 into r817;\n    shr.w r721.lo r817 into r818;\n    ternary r816 0u128 r818 into r819;\n    shl.w r721.hi r815 into r820;\n    or r820 r819 into r821;\n    shl.w r721.lo r815 into r822;\n    shl.w r721.lo r815 into r823;\n    ternary r776 r823 r821 into r824;\n    ternary r776 0u128 r822 into r825;\n    cast r824 r825 into r826 as U256__8JquwLopp8;\n    add.w r826.lo r814.lo into r827;\n    lt r827 r826.lo into r828;\n    ternary r828 1u128 0u128 into r829;\n    add.w r826.hi r814.hi into r830;\n    add.w r830 r829 into r831;\n    cast r831 r827 into r832 as U256__8JquwLopp8;\n    and r795.lo 18446744073709551615u128 into r833;\n    shr r795.lo 64u8 into r834;\n    and r795.hi 18446744073709551615u128 into r835;\n    shr r795.hi 64u8 into r836;\n    and r832.lo 18446744073709551615u128 into r837;\n    shr r832.lo 64u8 into r838;\n    and r832.hi 18446744073709551615u128 into r839;\n    shr r832.hi 64u8 into r840;\n    shl r840 64u8 into r841;\n    add r841 r839 into r842;\n    div r842 r783 into r843;\n    gt r843 18446744073709551615u128 into r844;\n    ternary r844 18446744073709551615u128 r843 into r845;\n    mul r845 r783 into r846;\n    sub r842 r846 into r847;\n    lte r847 18446744073709551615u128 into r848;\n    mul r845 r782 into r849;\n    and r847 18446744073709551615u128 into r850;\n    shl r850 64u8 into r851;\n    add r851 r838 into r852;\n    gt r849 r852 into r853;\n    and r848 r853 into r854;\n    sub.w r845 1u128 into r855;\n    ternary r854 r855 r845 into r856;\n    add r847 r783 into r857;\n    ternary r854 r857 r847 into r858;\n    lte r858 18446744073709551615u128 into r859;\n    and r854 r859 into r860;\n    mul r856 r782 into r861;\n    and r858 18446744073709551615u128 into r862;\n    shl r862 64u8 into r863;\n    add r863 r838 into r864;\n    gt r861 r864 into r865;\n    and r860 r865 into r866;\n    sub.w r856 1u128 into r867;\n    ternary r866 r867 r856 into r868;\n    mul r868 r780 into r869;\n    and r869 18446744073709551615u128 into r870;\n    lt r836 r870 into r871;\n    add r836 18446744073709551616u128 into r872;\n    sub r872 r870 into r873;\n    and r873 18446744073709551615u128 into r874;\n    shr r869 64u8 into r875;\n    ternary r871 1u128 0u128 into r876;\n    add r875 r876 into r877;\n    mul r868 r781 into r878;\n    add r878 r877 into r879;\n    and r879 18446744073709551615u128 into r880;\n    lt r837 r880 into r881;\n    add r837 18446744073709551616u128 into r882;\n    sub r882 r880 into r883;\n    and r883 18446744073709551615u128 into r884;\n    shr r879 64u8 into r885;\n    ternary r881 1u128 0u128 into r886;\n    add r885 r886 into r887;\n    mul r868 r782 into r888;\n    add r888 r887 into r889;\n    and r889 18446744073709551615u128 into r890;\n    lt r838 r890 into r891;\n    add r838 18446744073709551616u128 into r892;\n    sub r892 r890 into r893;\n    and r893 18446744073709551615u128 into r894;\n    shr r889 64u8 into r895;\n    ternary r891 1u128 0u128 into r896;\n    add r895 r896 into r897;\n    mul r868 r783 into r898;\n    add r898 r897 into r899;\n    and r899 18446744073709551615u128 into r900;\n    lt r839 r900 into r901;\n    add r839 18446744073709551616u128 into r902;\n    sub r902 r900 into r903;\n    and r903 18446744073709551615u128 into r904;\n    shr r899 64u8 into r905;\n    ternary r901 1u128 0u128 into r906;\n    add r905 r906 into r907;\n    lt r840 r907 into r908;\n    add r840 18446744073709551616u128 into r909;\n    sub r909 r907 into r910;\n    and r910 18446744073709551615u128 into r911;\n    sub.w r868 1u128 into r912;\n    ternary r908 r912 r868 into r913;\n    add r874 r780 into r914;\n    and r914 18446744073709551615u128 into r915;\n    ternary r908 r915 r874 into r916;\n    shr r914 64u8 into r917;\n    ternary r908 r917 0u128 into r918;\n    add r884 r781 into r919;\n    add r919 r918 into r920;\n    and r920 18446744073709551615u128 into r921;\n    ternary r908 r921 r884 into r922;\n    shr r920 64u8 into r923;\n    ternary r908 r923 0u128 into r924;\n    add r894 r782 into r925;\n    add r925 r924 into r926;\n    and r926 18446744073709551615u128 into r927;\n    ternary r908 r927 r894 into r928;\n    shr r926 64u8 into r929;\n    ternary r908 r929 0u128 into r930;\n    add r904 r783 into r931;\n    add r931 r930 into r932;\n    and r932 18446744073709551615u128 into r933;\n    ternary r908 r933 r904 into r934;\n    shr r932 64u8 into r935;\n    ternary r908 r935 0u128 into r936;\n    add r911 r936 into r937;\n    shl r934 64u8 into r938;\n    add r938 r928 into r939;\n    div r939 r783 into r940;\n    gt r940 18446744073709551615u128 into r941;\n    ternary r941 18446744073709551615u128 r940 into r942;\n    mul r942 r783 into r943;\n    sub r939 r943 into r944;\n    lte r944 18446744073709551615u128 into r945;\n    mul r942 r782 into r946;\n    and r944 18446744073709551615u128 into r947;\n    shl r947 64u8 into r948;\n    add r948 r922 into r949;\n    gt r946 r949 into r950;\n    and r945 r950 into r951;\n    sub.w r942 1u128 into r952;\n    ternary r951 r952 r942 into r953;\n    add r944 r783 into r954;\n    ternary r951 r954 r944 into r955;\n    lte r955 18446744073709551615u128 into r956;\n    and r951 r956 into r957;\n    mul r953 r782 into r958;\n    and r955 18446744073709551615u128 into r959;\n    shl r959 64u8 into r960;\n    add r960 r922 into r961;\n    gt r958 r961 into r962;\n    and r957 r962 into r963;\n    sub.w r953 1u128 into r964;\n    ternary r963 r964 r953 into r965;\n    mul r965 r780 into r966;\n    and r966 18446744073709551615u128 into r967;\n    lt r835 r967 into r968;\n    add r835 18446744073709551616u128 into r969;\n    sub r969 r967 into r970;\n    and r970 18446744073709551615u128 into r971;\n    shr r966 64u8 into r972;\n    ternary r968 1u128 0u128 into r973;\n    add r972 r973 into r974;\n    mul r965 r781 into r975;\n    add r975 r974 into r976;\n    and r976 18446744073709551615u128 into r977;\n    lt r916 r977 into r978;\n    add r916 18446744073709551616u128 into r979;\n    sub r979 r977 into r980;\n    and r980 18446744073709551615u128 into r981;\n    shr r976 64u8 into r982;\n    ternary r978 1u128 0u128 into r983;\n    add r982 r983 into r984;\n    mul r965 r782 into r985;\n    add r985 r984 into r986;\n    and r986 18446744073709551615u128 into r987;\n    lt r922 r987 into r988;\n    add r922 18446744073709551616u128 into r989;\n    sub r989 r987 into r990;\n    and r990 18446744073709551615u128 into r991;\n    shr r986 64u8 into r992;\n    ternary r988 1u128 0u128 into r993;\n    add r992 r993 into r994;\n    mul r965 r783 into r995;\n    add r995 r994 into r996;\n    and r996 18446744073709551615u128 into r997;\n    lt r928 r997 into r998;\n    add r928 18446744073709551616u128 into r999;\n    sub r999 r997 into r1000;\n    and r1000 18446744073709551615u128 into r1001;\n    shr r996 64u8 into r1002;\n    ternary r998 1u128 0u128 into r1003;\n    add r1002 r1003 into r1004;\n    lt r934 r1004 into r1005;\n    add r934 18446744073709551616u128 into r1006;\n    sub r1006 r1004 into r1007;\n    and r1007 18446744073709551615u128 into r1008;\n    sub.w r965 1u128 into r1009;\n    ternary r1005 r1009 r965 into r1010;\n    add r971 r780 into r1011;\n    and r1011 18446744073709551615u128 into r1012;\n    ternary r1005 r1012 r971 into r1013;\n    shr r1011 64u8 into r1014;\n    ternary r1005 r1014 0u128 into r1015;\n    add r981 r781 into r1016;\n    add r1016 r1015 into r1017;\n    and r1017 18446744073709551615u128 into r1018;\n    ternary r1005 r1018 r981 into r1019;\n    shr r1017 64u8 into r1020;\n    ternary r1005 r1020 0u128 into r1021;\n    add r991 r782 into r1022;\n    add r1022 r1021 into r1023;\n    and r1023 18446744073709551615u128 into r1024;\n    ternary r1005 r1024 r991 into r1025;\n    shr r1023 64u8 into r1026;\n    ternary r1005 r1026 0u128 into r1027;\n    add r1001 r783 into r1028;\n    add r1028 r1027 into r1029;\n    and r1029 18446744073709551615u128 into r1030;\n    ternary r1005 r1030 r1001 into r1031;\n    shr r1029 64u8 into r1032;\n    ternary r1005 r1032 0u128 into r1033;\n    add r1008 r1033 into r1034;\n    shl r1031 64u8 into r1035;\n    add r1035 r1025 into r1036;\n    div r1036 r783 into r1037;\n    gt r1037 18446744073709551615u128 into r1038;\n    ternary r1038 18446744073709551615u128 r1037 into r1039;\n    mul r1039 r783 into r1040;\n    sub r1036 r1040 into r1041;\n    lte r1041 18446744073709551615u128 into r1042;\n    mul r1039 r782 into r1043;\n    and r1041 18446744073709551615u128 into r1044;\n    shl r1044 64u8 into r1045;\n    add r1045 r1019 into r1046;\n    gt r1043 r1046 into r1047;\n    and r1042 r1047 into r1048;\n    sub.w r1039 1u128 into r1049;\n    ternary r1048 r1049 r1039 into r1050;\n    add r1041 r783 into r1051;\n    ternary r1048 r1051 r1041 into r1052;\n    lte r1052 18446744073709551615u128 into r1053;\n    and r1048 r1053 into r1054;\n    mul r1050 r782 into r1055;\n    and r1052 18446744073709551615u128 into r1056;\n    shl r1056 64u8 into r1057;\n    add r1057 r1019 into r1058;\n    gt r1055 r1058 into r1059;\n    and r1054 r1059 into r1060;\n    sub.w r1050 1u128 into r1061;\n    ternary r1060 r1061 r1050 into r1062;\n    mul r1062 r780 into r1063;\n    and r1063 18446744073709551615u128 into r1064;\n    lt r834 r1064 into r1065;\n    add r834 18446744073709551616u128 into r1066;\n    sub r1066 r1064 into r1067;\n    and r1067 18446744073709551615u128 into r1068;\n    shr r1063 64u8 into r1069;\n    ternary r1065 1u128 0u128 into r1070;\n    add r1069 r1070 into r1071;\n    mul r1062 r781 into r1072;\n    add r1072 r1071 into r1073;\n    and r1073 18446744073709551615u128 into r1074;\n    lt r1013 r1074 into r1075;\n    add r1013 18446744073709551616u128 into r1076;\n    sub r1076 r1074 into r1077;\n    and r1077 18446744073709551615u128 into r1078;\n    shr r1073 64u8 into r1079;\n    ternary r1075 1u128 0u128 into r1080;\n    add r1079 r1080 into r1081;\n    mul r1062 r782 into r1082;\n    add r1082 r1081 into r1083;\n    and r1083 18446744073709551615u128 into r1084;\n    lt r1019 r1084 into r1085;\n    add r1019 18446744073709551616u128 into r1086;\n    sub r1086 r1084 into r1087;\n    and r1087 18446744073709551615u128 into r1088;\n    shr r1083 64u8 into r1089;\n    ternary r1085 1u128 0u128 into r1090;\n    add r1089 r1090 into r1091;\n    mul r1062 r783 into r1092;\n    add r1092 r1091 into r1093;\n    and r1093 18446744073709551615u128 into r1094;\n    lt r1025 r1094 into r1095;\n    add r1025 18446744073709551616u128 into r1096;\n    sub r1096 r1094 into r1097;\n    and r1097 18446744073709551615u128 into r1098;\n    shr r1093 64u8 into r1099;\n    ternary r1095 1u128 0u128 into r1100;\n    add r1099 r1100 into r1101;\n    lt r1031 r1101 into r1102;\n    add r1031 18446744073709551616u128 into r1103;\n    sub r1103 r1101 into r1104;\n    and r1104 18446744073709551615u128 into r1105;\n    sub.w r1062 1u128 into r1106;\n    ternary r1102 r1106 r1062 into r1107;\n    add r1068 r780 into r1108;\n    and r1108 18446744073709551615u128 into r1109;\n    ternary r1102 r1109 r1068 into r1110;\n    shr r1108 64u8 into r1111;\n    ternary r1102 r1111 0u128 into r1112;\n    add r1078 r781 into r1113;\n    add r1113 r1112 into r1114;\n    and r1114 18446744073709551615u128 into r1115;\n    ternary r1102 r1115 r1078 into r1116;\n    shr r1114 64u8 into r1117;\n    ternary r1102 r1117 0u128 into r1118;\n    add r1088 r782 into r1119;\n    add r1119 r1118 into r1120;\n    and r1120 18446744073709551615u128 into r1121;\n    ternary r1102 r1121 r1088 into r1122;\n    shr r1120 64u8 into r1123;\n    ternary r1102 r1123 0u128 into r1124;\n    add r1098 r783 into r1125;\n    add r1125 r1124 into r1126;\n    and r1126 18446744073709551615u128 into r1127;\n    ternary r1102 r1127 r1098 into r1128;\n    shr r1126 64u8 into r1129;\n    ternary r1102 r1129 0u128 into r1130;\n    add r1105 r1130 into r1131;\n    shl r1128 64u8 into r1132;\n    add r1132 r1122 into r1133;\n    div r1133 r783 into r1134;\n    gt r1134 18446744073709551615u128 into r1135;\n    ternary r1135 18446744073709551615u128 r1134 into r1136;\n    mul r1136 r783 into r1137;\n    sub r1133 r1137 into r1138;\n    lte r1138 18446744073709551615u128 into r1139;\n    mul r1136 r782 into r1140;\n    and r1138 18446744073709551615u128 into r1141;\n    shl r1141 64u8 into r1142;\n    add r1142 r1116 into r1143;\n    gt r1140 r1143 into r1144;\n    and r1139 r1144 into r1145;\n    sub.w r1136 1u128 into r1146;\n    ternary r1145 r1146 r1136 into r1147;\n    add r1138 r783 into r1148;\n    ternary r1145 r1148 r1138 into r1149;\n    lte r1149 18446744073709551615u128 into r1150;\n    and r1145 r1150 into r1151;\n    mul r1147 r782 into r1152;\n    and r1149 18446744073709551615u128 into r1153;\n    shl r1153 64u8 into r1154;\n    add r1154 r1116 into r1155;\n    gt r1152 r1155 into r1156;\n    and r1151 r1156 into r1157;\n    sub.w r1147 1u128 into r1158;\n    ternary r1157 r1158 r1147 into r1159;\n    mul r1159 r780 into r1160;\n    and r1160 18446744073709551615u128 into r1161;\n    lt r833 r1161 into r1162;\n    add r833 18446744073709551616u128 into r1163;\n    sub r1163 r1161 into r1164;\n    and r1164 18446744073709551615u128 into r1165;\n    shr r1160 64u8 into r1166;\n    ternary r1162 1u128 0u128 into r1167;\n    add r1166 r1167 into r1168;\n    mul r1159 r781 into r1169;\n    add r1169 r1168 into r1170;\n    and r1170 18446744073709551615u128 into r1171;\n    lt r1110 r1171 into r1172;\n    add r1110 18446744073709551616u128 into r1173;\n    sub r1173 r1171 into r1174;\n    and r1174 18446744073709551615u128 into r1175;\n    shr r1170 64u8 into r1176;\n    ternary r1172 1u128 0u128 into r1177;\n    add r1176 r1177 into r1178;\n    mul r1159 r782 into r1179;\n    add r1179 r1178 into r1180;\n    and r1180 18446744073709551615u128 into r1181;\n    lt r1116 r1181 into r1182;\n    add r1116 18446744073709551616u128 into r1183;\n    sub r1183 r1181 into r1184;\n    and r1184 18446744073709551615u128 into r1185;\n    shr r1180 64u8 into r1186;\n    ternary r1182 1u128 0u128 into r1187;\n    add r1186 r1187 into r1188;\n    mul r1159 r783 into r1189;\n    add r1189 r1188 into r1190;\n    and r1190 18446744073709551615u128 into r1191;\n    lt r1122 r1191 into r1192;\n    add r1122 18446744073709551616u128 into r1193;\n    sub r1193 r1191 into r1194;\n    and r1194 18446744073709551615u128 into r1195;\n    shr r1190 64u8 into r1196;\n    ternary r1192 1u128 0u128 into r1197;\n    add r1196 r1197 into r1198;\n    lt r1128 r1198 into r1199;\n    add r1128 18446744073709551616u128 into r1200;\n    sub r1200 r1198 into r1201;\n    and r1201 18446744073709551615u128 into r1202;\n    sub.w r1159 1u128 into r1203;\n    ternary r1199 r1203 r1159 into r1204;\n    add r1165 r780 into r1205;\n    and r1205 18446744073709551615u128 into r1206;\n    ternary r1199 r1206 r1165 into r1207;\n    shr r1205 64u8 into r1208;\n    ternary r1199 r1208 0u128 into r1209;\n    add r1175 r781 into r1210;\n    add r1210 r1209 into r1211;\n    and r1211 18446744073709551615u128 into r1212;\n    ternary r1199 r1212 r1175 into r1213;\n    shr r1211 64u8 into r1214;\n    ternary r1199 r1214 0u128 into r1215;\n    add r1185 r782 into r1216;\n    add r1216 r1215 into r1217;\n    and r1217 18446744073709551615u128 into r1218;\n    ternary r1199 r1218 r1185 into r1219;\n    shr r1217 64u8 into r1220;\n    ternary r1199 r1220 0u128 into r1221;\n    add r1195 r783 into r1222;\n    add r1222 r1221 into r1223;\n    and r1223 18446744073709551615u128 into r1224;\n    ternary r1199 r1224 r1195 into r1225;\n    shr r1223 64u8 into r1226;\n    ternary r1199 r1226 0u128 into r1227;\n    add r1202 r1227 into r1228;\n    shl r913 64u8 into r1229;\n    add r1229 r1010 into r1230;\n    shl r1107 64u8 into r1231;\n    add r1231 r1204 into r1232;\n    cast r1230 r1232 into r1233 as U256__8JquwLopp8;\n    shl r1225 64u8 into r1234;\n    add r1234 r1219 into r1235;\n    shl r1213 64u8 into r1236;\n    add r1236 r1207 into r1237;\n    cast r766 into r1238 as u8;\n    is.eq r1238 0u8 into r1239;\n    sub 128u8 r1238 into r1240;\n    shl.w r1235 r1240 into r1241;\n    ternary r1239 0u128 r1241 into r1242;\n    shr r1237 r1238 into r1243;\n    or r1243 r1242 into r1244;\n    shr r1235 r1238 into r1245;\n    ternary r776 0u128 r1245 into r1246;\n    ternary r776 r1245 r1244 into r1247;\n    cast r1246 r1247 into r1248 as U256__8JquwLopp8;\n    is.eq r1248.hi 0u128 into r1249;\n    is.eq r1248.lo 0u128 into r1250;\n    and r1249 r1250 into r1251;\n    not r1251 into r1252;\n    and r0.z r1252 into r1253;\n    is.eq r1233.hi 340282366920938463463374607431768211455u128 into r1254;\n    is.eq r1233.lo 340282366920938463463374607431768211455u128 into r1255;\n    and r1254 r1255 into r1256;\n    and r1253 r1256 into r1257;\n    not r1257 into r1258;\n    assert.eq r1258 true;\n    add.w r1233.lo 1u128 into r1259;\n    lt r1259 r1233.lo into r1260;\n    ternary r1260 1u128 0u128 into r1261;\n    add.w r1233.hi r1261 into r1262;\n    cast r1262 r1259 into r1263 as U256__8JquwLopp8;\n    ternary r1253 r1263.hi r1233.hi into r1264;\n    ternary r1253 r1263.lo r1233.lo into r1265;\n    cast r1264 r1265 into r1266 as U256__8JquwLopp8;\n    is.neq r1266.hi 0u128 into r1267;\n    not r0.z into r1268;\n    lt r4.sp.hi r23.hi into r1269;\n    gt r4.sp.hi r23.hi into r1270;\n    lt r4.sp.lo r23.lo into r1271;\n    ternary r1270 false r1271 into r1272;\n    ternary r1269 true r1272 into r1273;\n    ternary r1273 r4.sp.hi r23.hi into r1274;\n    ternary r1273 r4.sp.lo r23.lo into r1275;\n    cast r1274 r1275 into r1276 as U256__8JquwLopp8;\n    lt r4.sp.hi r23.hi into r1277;\n    gt r4.sp.hi r23.hi into r1278;\n    lt r4.sp.lo r23.lo into r1279;\n    ternary r1278 false r1279 into r1280;\n    ternary r1277 true r1280 into r1281;\n    ternary r1281 r23.hi r4.sp.hi into r1282;\n    ternary r1281 r23.lo r4.sp.lo into r1283;\n    cast r1282 r1283 into r1284 as U256__8JquwLopp8;\n    lt r1284.lo r1276.lo into r1285;\n    ternary r1285 1u128 0u128 into r1286;\n    sub.w r1284.lo r1276.lo into r1287;\n    sub.w r1284.hi r1276.hi into r1288;\n    sub.w r1288 r1286 into r1289;\n    cast r1289 r1287 into r1290 as U256__8JquwLopp8;\n    cast 0u128 r4.liq into r1291 as U256__8JquwLopp8;\n    and r1291.lo 18446744073709551615u128 into r1292;\n    shr r1291.lo 64u8 into r1293;\n    and r1290.lo 18446744073709551615u128 into r1294;\n    shr r1290.lo 64u8 into r1295;\n    mul r1292 r1294 into r1296;\n    mul r1292 r1295 into r1297;\n    mul r1293 r1294 into r1298;\n    mul r1293 r1295 into r1299;\n    and r1296 18446744073709551615u128 into r1300;\n    shr r1296 64u8 into r1301;\n    and r1297 18446744073709551615u128 into r1302;\n    add r1301 r1302 into r1303;\n    and r1298 18446744073709551615u128 into r1304;\n    add r1303 r1304 into r1305;\n    and r1305 18446744073709551615u128 into r1306;\n    shr r1305 64u8 into r1307;\n    shr r1297 64u8 into r1308;\n    shr r1298 64u8 into r1309;\n    add r1308 r1309 into r1310;\n    and r1299 18446744073709551615u128 into r1311;\n    add r1310 r1311 into r1312;\n    add r1312 r1307 into r1313;\n    and r1313 18446744073709551615u128 into r1314;\n    shr r1313 64u8 into r1315;\n    shr r1299 64u8 into r1316;\n    add r1316 r1315 into r1317;\n    shl r1317 64u8 into r1318;\n    add r1318 r1314 into r1319;\n    shl r1306 64u8 into r1320;\n    add r1320 r1300 into r1321;\n    and r1291.lo 18446744073709551615u128 into r1322;\n    shr r1291.lo 64u8 into r1323;\n    and r1290.hi 18446744073709551615u128 into r1324;\n    shr r1290.hi 64u8 into r1325;\n    mul r1322 r1324 into r1326;\n    mul r1322 r1325 into r1327;\n    mul r1323 r1324 into r1328;\n    mul r1323 r1325 into r1329;\n    and r1326 18446744073709551615u128 into r1330;\n    shr r1326 64u8 into r1331;\n    and r1327 18446744073709551615u128 into r1332;\n    add r1331 r1332 into r1333;\n    and r1328 18446744073709551615u128 into r1334;\n    add r1333 r1334 into r1335;\n    and r1335 18446744073709551615u128 into r1336;\n    shr r1335 64u8 into r1337;\n    shr r1327 64u8 into r1338;\n    shr r1328 64u8 into r1339;\n    add r1338 r1339 into r1340;\n    and r1329 18446744073709551615u128 into r1341;\n    add r1340 r1341 into r1342;\n    add r1342 r1337 into r1343;\n    and r1343 18446744073709551615u128 into r1344;\n    shr r1343 64u8 into r1345;\n    shr r1329 64u8 into r1346;\n    add r1346 r1345 into r1347;\n    shl r1347 64u8 into r1348;\n    add r1348 r1344 into r1349;\n    shl r1336 64u8 into r1350;\n    add r1350 r1330 into r1351;\n    and r1291.hi 18446744073709551615u128 into r1352;\n    shr r1291.hi 64u8 into r1353;\n    and r1290.lo 18446744073709551615u128 into r1354;\n    shr r1290.lo 64u8 into r1355;\n    mul r1352 r1354 into r1356;\n    mul r1352 r1355 into r1357;\n    mul r1353 r1354 into r1358;\n    mul r1353 r1355 into r1359;\n    and r1356 18446744073709551615u128 into r1360;\n    shr r1356 64u8 into r1361;\n    and r1357 18446744073709551615u128 into r1362;\n    add r1361 r1362 into r1363;\n    and r1358 18446744073709551615u128 into r1364;\n    add r1363 r1364 into r1365;\n    and r1365 18446744073709551615u128 into r1366;\n    shr r1365 64u8 into r1367;\n    shr r1357 64u8 into r1368;\n    shr r1358 64u8 into r1369;\n    add r1368 r1369 into r1370;\n    and r1359 18446744073709551615u128 into r1371;\n    add r1370 r1371 into r1372;\n    add r1372 r1367 into r1373;\n    and r1373 18446744073709551615u128 into r1374;\n    shr r1373 64u8 into r1375;\n    shr r1359 64u8 into r1376;\n    add r1376 r1375 into r1377;\n    shl r1377 64u8 into r1378;\n    add r1378 r1374 into r1379;\n    shl r1366 64u8 into r1380;\n    add r1380 r1360 into r1381;\n    and r1291.hi 18446744073709551615u128 into r1382;\n    shr r1291.hi 64u8 into r1383;\n    and r1290.hi 18446744073709551615u128 into r1384;\n    shr r1290.hi 64u8 into r1385;\n    mul r1382 r1384 into r1386;\n    mul r1382 r1385 into r1387;\n    mul r1383 r1384 into r1388;\n    mul r1383 r1385 into r1389;\n    and r1386 18446744073709551615u128 into r1390;\n    shr r1386 64u8 into r1391;\n    and r1387 18446744073709551615u128 into r1392;\n    add r1391 r1392 into r1393;\n    and r1388 18446744073709551615u128 into r1394;\n    add r1393 r1394 into r1395;\n    and r1395 18446744073709551615u128 into r1396;\n    shr r1395 64u8 into r1397;\n    shr r1387 64u8 into r1398;\n    shr r1388 64u8 into r1399;\n    add r1398 r1399 into r1400;\n    and r1389 18446744073709551615u128 into r1401;\n    add r1400 r1401 into r1402;\n    add r1402 r1397 into r1403;\n    and r1403 18446744073709551615u128 into r1404;\n    shr r1403 64u8 into r1405;\n    shr r1389 64u8 into r1406;\n    add r1406 r1405 into r1407;\n    shl r1407 64u8 into r1408;\n    add r1408 r1404 into r1409;\n    shl r1396 64u8 into r1410;\n    add r1410 r1390 into r1411;\n    add.w r1319 r1351 into r1412;\n    lt r1412 r1319 into r1413;\n    ternary r1413 1u128 0u128 into r1414;\n    add.w r1412 r1381 into r1415;\n    lt r1415 r1412 into r1416;\n    ternary r1416 1u128 0u128 into r1417;\n    add r1414 r1417 into r1418;\n    add.w r1349 r1379 into r1419;\n    lt r1419 r1349 into r1420;\n    ternary r1420 1u128 0u128 into r1421;\n    add.w r1419 r1411 into r1422;\n    lt r1422 r1419 into r1423;\n    ternary r1423 1u128 0u128 into r1424;\n    add.w r1422 r1418 into r1425;\n    lt r1425 r1422 into r1426;\n    ternary r1426 1u128 0u128 into r1427;\n    add r1421 r1424 into r1428;\n    add r1428 r1427 into r1429;\n    add.w r1409 r1429 into r1430;\n    cast r1430 r1425 into r1431 as U256__8JquwLopp8;\n    cast r1415 r1321 into r1432 as U256__8JquwLopp8;\n    gt r1432.lo 0u128 into r1433;\n    and r1268 r1433 into r1434;\n    is.eq r1432.hi 340282366920938463463374607431768211455u128 into r1435;\n    and r1434 r1435 into r1436;\n    is.neq r1431.hi 0u128 into r1437;\n    is.neq r1431.lo 0u128 into r1438;\n    or r1437 r1438 into r1439;\n    or r1439 r1436 into r1440;\n    gt r1432.lo 0u128 into r1441;\n    and r1268 r1441 into r1442;\n    lt r1432.hi 340282366920938463463374607431768211455u128 into r1443;\n    and r1442 r1443 into r1444;\n    add.w r1432.hi 1u128 into r1445;\n    ternary r1444 r1445 r1432.hi into r1446;\n    ternary r0.z r1266.lo r1446 into r1447;\n    ternary r0.z r1446 r1266.lo into r1448;\n    cast r0.fee_pips into r1449 as u128;\n    sub 1000000u128 r1449 into r1450;\n    and r4.rem 18446744073709551615u128 into r1451;\n    shr r4.rem 64u8 into r1452;\n    and r1450 18446744073709551615u128 into r1453;\n    shr r1450 64u8 into r1454;\n    mul r1451 r1453 into r1455;\n    mul r1451 r1454 into r1456;\n    mul r1452 r1453 into r1457;\n    mul r1452 r1454 into r1458;\n    and r1455 18446744073709551615u128 into r1459;\n    shr r1455 64u8 into r1460;\n    and r1456 18446744073709551615u128 into r1461;\n    add r1460 r1461 into r1462;\n    and r1457 18446744073709551615u128 into r1463;\n    add r1462 r1463 into r1464;\n    and r1464 18446744073709551615u128 into r1465;\n    shr r1464 64u8 into r1466;\n    shr r1456 64u8 into r1467;\n    shr r1457 64u8 into r1468;\n    add r1467 r1468 into r1469;\n    and r1458 18446744073709551615u128 into r1470;\n    add r1469 r1470 into r1471;\n    add r1471 r1466 into r1472;\n    and r1472 18446744073709551615u128 into r1473;\n    shr r1472 64u8 into r1474;\n    shr r1458 64u8 into r1475;\n    add r1475 r1474 into r1476;\n    shl r1476 64u8 into r1477;\n    add r1477 r1473 into r1478;\n    shl r1465 64u8 into r1479;\n    add r1479 r1459 into r1480;\n    lt r1478 1000000u128 into r1481;\n    assert.eq r1481 true;\n    shr r1480 96u8 into r1482;\n    and r1482 4294967295u128 into r1483;\n    shl r1478 32u8 into r1484;\n    add r1484 r1483 into r1485;\n    div r1485 1000000u128 into r1486;\n    rem r1485 1000000u128 into r1487;\n    shr r1480 64u8 into r1488;\n    and r1488 4294967295u128 into r1489;\n    shl r1487 32u8 into r1490;\n    add r1490 r1489 into r1491;\n    shl r1486 32u8 into r1492;\n    div r1491 1000000u128 into r1493;\n    add r1492 r1493 into r1494;\n    rem r1491 1000000u128 into r1495;\n    shr r1480 32u8 into r1496;\n    and r1496 4294967295u128 into r1497;\n    shl r1495 32u8 into r1498;\n    add r1498 r1497 into r1499;\n    shl r1494 32u8 into r1500;\n    div r1499 1000000u128 into r1501;\n    add r1500 r1501 into r1502;\n    rem r1499 1000000u128 into r1503;\n    shr r1480 0u8 into r1504;\n    and r1504 4294967295u128 into r1505;\n    shl r1503 32u8 into r1506;\n    add r1506 r1505 into r1507;\n    shl r1502 32u8 into r1508;\n    div r1507 1000000u128 into r1509;\n    add r1508 r1509 into r1510;\n    rem r1507 1000000u128 into r1511;\n    not r1267 into r1512;\n    not r1440 into r1513;\n    and r1512 r1513 into r1514;\n    gte r1510 r1447 into r1515;\n    and r1514 r1515 into r1516;\n    ternary r1516 r23.hi r4.sp.hi into r1517;\n    ternary r1516 r23.lo r4.sp.lo into r1518;\n    cast r1517 r1518 into r1519 as U256__8JquwLopp8;\n    ternary r1516 r1447 0u128 into r1520;\n    ternary r1516 r1448 0u128 into r1521;\n    cast r0.fee_pips into r1522 as u128;\n    cast r0.fee_pips into r1523 as u128;\n    sub 1000000u128 r1523 into r1524;\n    and r1520 18446744073709551615u128 into r1525;\n    shr r1520 64u8 into r1526;\n    and r1522 18446744073709551615u128 into r1527;\n    shr r1522 64u8 into r1528;\n    mul r1525 r1527 into r1529;\n    mul r1525 r1528 into r1530;\n    mul r1526 r1527 into r1531;\n    mul r1526 r1528 into r1532;\n    and r1529 18446744073709551615u128 into r1533;\n    shr r1529 64u8 into r1534;\n    and r1530 18446744073709551615u128 into r1535;\n    add r1534 r1535 into r1536;\n    and r1531 18446744073709551615u128 into r1537;\n    add r1536 r1537 into r1538;\n    and r1538 18446744073709551615u128 into r1539;\n    shr r1538 64u8 into r1540;\n    shr r1530 64u8 into r1541;\n    shr r1531 64u8 into r1542;\n    add r1541 r1542 into r1543;\n    and r1532 18446744073709551615u128 into r1544;\n    add r1543 r1544 into r1545;\n    add r1545 r1540 into r1546;\n    and r1546 18446744073709551615u128 into r1547;\n    shr r1546 64u8 into r1548;\n    shr r1532 64u8 into r1549;\n    add r1549 r1548 into r1550;\n    shl r1550 64u8 into r1551;\n    add r1551 r1547 into r1552;\n    shl r1539 64u8 into r1553;\n    add r1553 r1533 into r1554;\n    lt r1552 r1524 into r1555;\n    assert.eq r1555 true;\n    shr r1554 96u8 into r1556;\n    and r1556 4294967295u128 into r1557;\n    shl r1552 32u8 into r1558;\n    add r1558 r1557 into r1559;\n    div r1559 r1524 into r1560;\n    rem r1559 r1524 into r1561;\n    shr r1554 64u8 into r1562;\n    and r1562 4294967295u128 into r1563;\n    shl r1561 32u8 into r1564;\n    add r1564 r1563 into r1565;\n    shl r1560 32u8 into r1566;\n    div r1565 r1524 into r1567;\n    add r1566 r1567 into r1568;\n    rem r1565 r1524 into r1569;\n    shr r1554 32u8 into r1570;\n    and r1570 4294967295u128 into r1571;\n    shl r1569 32u8 into r1572;\n    add r1572 r1571 into r1573;\n    shl r1568 32u8 into r1574;\n    div r1573 r1524 into r1575;\n    add r1574 r1575 into r1576;\n    rem r1573 r1524 into r1577;\n    shr r1554 0u8 into r1578;\n    and r1578 4294967295u128 into r1579;\n    shl r1577 32u8 into r1580;\n    add r1580 r1579 into r1581;\n    shl r1576 32u8 into r1582;\n    div r1581 r1524 into r1583;\n    add r1582 r1583 into r1584;\n    rem r1581 r1524 into r1585;\n    gt r1585 0u128 into r1586;\n    ternary r1586 1u128 0u128 into r1587;\n    add r1584 r1587 into r1588;\n    ternary r1516 r1588 0u128 into r1589;\n    ternary r27 r23.hi r4.sp.hi into r1590;\n    ternary r27 r23.lo r4.sp.lo into r1591;\n    cast r1590 r1591 into r1592 as U256__8JquwLopp8;\n    ternary r30 r1519.hi r1592.hi into r1593;\n    ternary r30 r1519.lo r1592.lo into r1594;\n    cast r1593 r1594 into r1595 as U256__8JquwLopp8;\n    ternary r30 r1520 0u128 into r1596;\n    ternary r30 r1521 0u128 into r1597;\n    ternary r30 r1589 0u128 into r1598;\n    add r1596 r1598 into r1599;\n    gt r1599 r4.rem into r1600;\n    ternary r1600 r4.rem r1599 into r1601;\n    sub r1601 r1596 into r1602;\n    cast r0.fee_protocol into r1603 as u128;\n    mul r1602 r1603 into r1604;\n    div r1604 16u128 into r1605;\n    sub r1602 r1605 into r1606;\n    add r4.pf r1605 into r1607;\n    sub r4.rem r1601 into r1608;\n    add r4.out r1597 into r1609;\n    gt r4.liq 0u128 into r1610;\n    ternary r1610 r4.liq 1u128 into r1611;\n    div r1606 r1611 into r1612;\n    rem r1606 r1611 into r1613;\n    lt r1613 r1611 into r1614;\n    assert.eq r1614 true;\n    gte r1613 170141183460469231731687303715884105728u128 into r1615;\n    add.w r1613 r1613 into r1616;\n    gte r1616 r1611 into r1617;\n    or r1615 r1617 into r1618;\n    sub.w r1616 r1611 into r1619;\n    ternary r1618 r1619 r1616 into r1620;\n    ternary r1618 170141183460469231731687303715884105728u128 0u128 into r1621;\n    gte r1620 170141183460469231731687303715884105728u128 into r1622;\n    add.w r1620 r1620 into r1623;\n    gte r1623 r1611 into r1624;\n    or r1622 r1624 into r1625;\n    sub.w r1623 r1611 into r1626;\n    ternary r1625 r1626 r1623 into r1627;\n    add r1621 85070591730234615865843651857942052864u128 into r1628;\n    ternary r1625 r1628 r1621 into r1629;\n    gte r1627 170141183460469231731687303715884105728u128 into r1630;\n    add.w r1627 r1627 into r1631;\n    gte r1631 r1611 into r1632;\n    or r1630 r1632 into r1633;\n    sub.w r1631 r1611 into r1634;\n    ternary r1633 r1634 r1631 into r1635;\n    add r1629 42535295865117307932921825928971026432u128 into r1636;\n    ternary r1633 r1636 r1629 into r1637;\n    gte r1635 170141183460469231731687303715884105728u128 into r1638;\n    add.w r1635 r1635 into r1639;\n    gte r1639 r1611 into r1640;\n    or r1638 r1640 into r1641;\n    sub.w r1639 r1611 into r1642;\n    ternary r1641 r1642 r1639 into r1643;\n    add r1637 21267647932558653966460912964485513216u128 into r1644;\n    ternary r1641 r1644 r1637 into r1645;\n    gte r1643 170141183460469231731687303715884105728u128 into r1646;\n    add.w r1643 r1643 into r1647;\n    gte r1647 r1611 into r1648;\n    or r1646 r1648 into r1649;\n    sub.w r1647 r1611 into r1650;\n    ternary r1649 r1650 r1647 into r1651;\n    add r1645 10633823966279326983230456482242756608u128 into r1652;\n    ternary r1649 r1652 r1645 into r1653;\n    gte r1651 170141183460469231731687303715884105728u128 into r1654;\n    add.w r1651 r1651 into r1655;\n    gte r1655 r1611 into r1656;\n    or r1654 r1656 into r1657;\n    sub.w r1655 r1611 into r1658;\n    ternary r1657 r1658 r1655 into r1659;\n    add r1653 5316911983139663491615228241121378304u128 into r1660;\n    ternary r1657 r1660 r1653 into r1661;\n    gte r1659 170141183460469231731687303715884105728u128 into r1662;\n    add.w r1659 r1659 into r1663;\n    gte r1663 r1611 into r1664;\n    or r1662 r1664 into r1665;\n    sub.w r1663 r1611 into r1666;\n    ternary r1665 r1666 r1663 into r1667;\n    add r1661 2658455991569831745807614120560689152u128 into r1668;\n    ternary r1665 r1668 r1661 into r1669;\n    gte r1667 170141183460469231731687303715884105728u128 into r1670;\n    add.w r1667 r1667 into r1671;\n    gte r1671 r1611 into r1672;\n    or r1670 r1672 into r1673;\n    sub.w r1671 r1611 into r1674;\n    ternary r1673 r1674 r1671 into r1675;\n    add r1669 1329227995784915872903807060280344576u128 into r1676;\n    ternary r1673 r1676 r1669 into r1677;\n    gte r1675 170141183460469231731687303715884105728u128 into r1678;\n    add.w r1675 r1675 into r1679;\n    gte r1679 r1611 into r1680;\n    or r1678 r1680 into r1681;\n    sub.w r1679 r1611 into r1682;\n    ternary r1681 r1682 r1679 into r1683;\n    add r1677 664613997892457936451903530140172288u128 into r1684;\n    ternary r1681 r1684 r1677 into r1685;\n    gte r1683 170141183460469231731687303715884105728u128 into r1686;\n    add.w r1683 r1683 into r1687;\n    gte r1687 r1611 into r1688;\n    or r1686 r1688 into r1689;\n    sub.w r1687 r1611 into r1690;\n    ternary r1689 r1690 r1687 into r1691;\n    add r1685 332306998946228968225951765070086144u128 into r1692;\n    ternary r1689 r1692 r1685 into r1693;\n    gte r1691 170141183460469231731687303715884105728u128 into r1694;\n    add.w r1691 r1691 into r1695;\n    gte r1695 r1611 into r1696;\n    or r1694 r1696 into r1697;\n    sub.w r1695 r1611 into r1698;\n    ternary r1697 r1698 r1695 into r1699;\n    add r1693 166153499473114484112975882535043072u128 into r1700;\n    ternary r1697 r1700 r1693 into r1701;\n    gte r1699 170141183460469231731687303715884105728u128 into r1702;\n    add.w r1699 r1699 into r1703;\n    gte r1703 r1611 into r1704;\n    or r1702 r1704 into r1705;\n    sub.w r1703 r1611 into r1706;\n    ternary r1705 r1706 r1703 into r1707;\n    add r1701 83076749736557242056487941267521536u128 into r1708;\n    ternary r1705 r1708 r1701 into r1709;\n    gte r1707 170141183460469231731687303715884105728u128 into r1710;\n    add.w r1707 r1707 into r1711;\n    gte r1711 r1611 into r1712;\n    or r1710 r1712 into r1713;\n    sub.w r1711 r1611 into r1714;\n    ternary r1713 r1714 r1711 into r1715;\n    add r1709 41538374868278621028243970633760768u128 into r1716;\n    ternary r1713 r1716 r1709 into r1717;\n    gte r1715 170141183460469231731687303715884105728u128 into r1718;\n    add.w r1715 r1715 into r1719;\n    gte r1719 r1611 into r1720;\n    or r1718 r1720 into r1721;\n    sub.w r1719 r1611 into r1722;\n    ternary r1721 r1722 r1719 into r1723;\n    add r1717 20769187434139310514121985316880384u128 into r1724;\n    ternary r1721 r1724 r1717 into r1725;\n    gte r1723 170141183460469231731687303715884105728u128 into r1726;\n    add.w r1723 r1723 into r1727;\n    gte r1727 r1611 into r1728;\n    or r1726 r1728 into r1729;\n    sub.w r1727 r1611 into r1730;\n    ternary r1729 r1730 r1727 into r1731;\n    add r1725 10384593717069655257060992658440192u128 into r1732;\n    ternary r1729 r1732 r1725 into r1733;\n    gte r1731 170141183460469231731687303715884105728u128 into r1734;\n    add.w r1731 r1731 into r1735;\n    gte r1735 r1611 into r1736;\n    or r1734 r1736 into r1737;\n    sub.w r1735 r1611 into r1738;\n    ternary r1737 r1738 r1735 into r1739;\n    add r1733 5192296858534827628530496329220096u128 into r1740;\n    ternary r1737 r1740 r1733 into r1741;\n    gte r1739 170141183460469231731687303715884105728u128 into r1742;\n    add.w r1739 r1739 into r1743;\n    gte r1743 r1611 into r1744;\n    or r1742 r1744 into r1745;\n    sub.w r1743 r1611 into r1746;\n    ternary r1745 r1746 r1743 into r1747;\n    add r1741 2596148429267413814265248164610048u128 into r1748;\n    ternary r1745 r1748 r1741 into r1749;\n    gte r1747 170141183460469231731687303715884105728u128 into r1750;\n    add.w r1747 r1747 into r1751;\n    gte r1751 r1611 into r1752;\n    or r1750 r1752 into r1753;\n    sub.w r1751 r1611 into r1754;\n    ternary r1753 r1754 r1751 into r1755;\n    add r1749 1298074214633706907132624082305024u128 into r1756;\n    ternary r1753 r1756 r1749 into r1757;\n    gte r1755 170141183460469231731687303715884105728u128 into r1758;\n    add.w r1755 r1755 into r1759;\n    gte r1759 r1611 into r1760;\n    or r1758 r1760 into r1761;\n    sub.w r1759 r1611 into r1762;\n    ternary r1761 r1762 r1759 into r1763;\n    add r1757 649037107316853453566312041152512u128 into r1764;\n    ternary r1761 r1764 r1757 into r1765;\n    gte r1763 170141183460469231731687303715884105728u128 into r1766;\n    add.w r1763 r1763 into r1767;\n    gte r1767 r1611 into r1768;\n    or r1766 r1768 into r1769;\n    sub.w r1767 r1611 into r1770;\n    ternary r1769 r1770 r1767 into r1771;\n    add r1765 324518553658426726783156020576256u128 into r1772;\n    ternary r1769 r1772 r1765 into r1773;\n    gte r1771 170141183460469231731687303715884105728u128 into r1774;\n    add.w r1771 r1771 into r1775;\n    gte r1775 r1611 into r1776;\n    or r1774 r1776 into r1777;\n    sub.w r1775 r1611 into r1778;\n    ternary r1777 r1778 r1775 into r1779;\n    add r1773 162259276829213363391578010288128u128 into r1780;\n    ternary r1777 r1780 r1773 into r1781;\n    gte r1779 170141183460469231731687303715884105728u128 into r1782;\n    add.w r1779 r1779 into r1783;\n    gte r1783 r1611 into r1784;\n    or r1782 r1784 into r1785;\n    sub.w r1783 r1611 into r1786;\n    ternary r1785 r1786 r1783 into r1787;\n    add r1781 81129638414606681695789005144064u128 into r1788;\n    ternary r1785 r1788 r1781 into r1789;\n    gte r1787 170141183460469231731687303715884105728u128 into r1790;\n    add.w r1787 r1787 into r1791;\n    gte r1791 r1611 into r1792;\n    or r1790 r1792 into r1793;\n    sub.w r1791 r1611 into r1794;\n    ternary r1793 r1794 r1791 into r1795;\n    add r1789 40564819207303340847894502572032u128 into r1796;\n    ternary r1793 r1796 r1789 into r1797;\n    gte r1795 170141183460469231731687303715884105728u128 into r1798;\n    add.w r1795 r1795 into r1799;\n    gte r1799 r1611 into r1800;\n    or r1798 r1800 into r1801;\n    sub.w r1799 r1611 into r1802;\n    ternary r1801 r1802 r1799 into r1803;\n    add r1797 20282409603651670423947251286016u128 into r1804;\n    ternary r1801 r1804 r1797 into r1805;\n    gte r1803 170141183460469231731687303715884105728u128 into r1806;\n    add.w r1803 r1803 into r1807;\n    gte r1807 r1611 into r1808;\n    or r1806 r1808 into r1809;\n    sub.w r1807 r1611 into r1810;\n    ternary r1809 r1810 r1807 into r1811;\n    add r1805 10141204801825835211973625643008u128 into r1812;\n    ternary r1809 r1812 r1805 into r1813;\n    gte r1811 170141183460469231731687303715884105728u128 into r1814;\n    add.w r1811 r1811 into r1815;\n    gte r1815 r1611 into r1816;\n    or r1814 r1816 into r1817;\n    sub.w r1815 r1611 into r1818;\n    ternary r1817 r1818 r1815 into r1819;\n    add r1813 5070602400912917605986812821504u128 into r1820;\n    ternary r1817 r1820 r1813 into r1821;\n    gte r1819 170141183460469231731687303715884105728u128 into r1822;\n    add.w r1819 r1819 into r1823;\n    gte r1823 r1611 into r1824;\n    or r1822 r1824 into r1825;\n    sub.w r1823 r1611 into r1826;\n    ternary r1825 r1826 r1823 into r1827;\n    add r1821 2535301200456458802993406410752u128 into r1828;\n    ternary r1825 r1828 r1821 into r1829;\n    gte r1827 170141183460469231731687303715884105728u128 into r1830;\n    add.w r1827 r1827 into r1831;\n    gte r1831 r1611 into r1832;\n    or r1830 r1832 into r1833;\n    sub.w r1831 r1611 into r1834;\n    ternary r1833 r1834 r1831 into r1835;\n    add r1829 1267650600228229401496703205376u128 into r1836;\n    ternary r1833 r1836 r1829 into r1837;\n    gte r1835 170141183460469231731687303715884105728u128 into r1838;\n    add.w r1835 r1835 into r1839;\n    gte r1839 r1611 into r1840;\n    or r1838 r1840 into r1841;\n    sub.w r1839 r1611 into r1842;\n    ternary r1841 r1842 r1839 into r1843;\n    add r1837 633825300114114700748351602688u128 into r1844;\n    ternary r1841 r1844 r1837 into r1845;\n    gte r1843 170141183460469231731687303715884105728u128 into r1846;\n    add.w r1843 r1843 into r1847;\n    gte r1847 r1611 into r1848;\n    or r1846 r1848 into r1849;\n    sub.w r1847 r1611 into r1850;\n    ternary r1849 r1850 r1847 into r1851;\n    add r1845 316912650057057350374175801344u128 into r1852;\n    ternary r1849 r1852 r1845 into r1853;\n    gte r1851 170141183460469231731687303715884105728u128 into r1854;\n    add.w r1851 r1851 into r1855;\n    gte r1855 r1611 into r1856;\n    or r1854 r1856 into r1857;\n    sub.w r1855 r1611 into r1858;\n    ternary r1857 r1858 r1855 into r1859;\n    add r1853 158456325028528675187087900672u128 into r1860;\n    ternary r1857 r1860 r1853 into r1861;\n    gte r1859 170141183460469231731687303715884105728u128 into r1862;\n    add.w r1859 r1859 into r1863;\n    gte r1863 r1611 into r1864;\n    or r1862 r1864 into r1865;\n    sub.w r1863 r1611 into r1866;\n    ternary r1865 r1866 r1863 into r1867;\n    add r1861 79228162514264337593543950336u128 into r1868;\n    ternary r1865 r1868 r1861 into r1869;\n    gte r1867 170141183460469231731687303715884105728u128 into r1870;\n    add.w r1867 r1867 into r1871;\n    gte r1871 r1611 into r1872;\n    or r1870 r1872 into r1873;\n    sub.w r1871 r1611 into r1874;\n    ternary r1873 r1874 r1871 into r1875;\n    add r1869 39614081257132168796771975168u128 into r1876;\n    ternary r1873 r1876 r1869 into r1877;\n    gte r1875 170141183460469231731687303715884105728u128 into r1878;\n    add.w r1875 r1875 into r1879;\n    gte r1879 r1611 into r1880;\n    or r1878 r1880 into r1881;\n    sub.w r1879 r1611 into r1882;\n    ternary r1881 r1882 r1879 into r1883;\n    add r1877 19807040628566084398385987584u128 into r1884;\n    ternary r1881 r1884 r1877 into r1885;\n    gte r1883 170141183460469231731687303715884105728u128 into r1886;\n    add.w r1883 r1883 into r1887;\n    gte r1887 r1611 into r1888;\n    or r1886 r1888 into r1889;\n    sub.w r1887 r1611 into r1890;\n    ternary r1889 r1890 r1887 into r1891;\n    add r1885 9903520314283042199192993792u128 into r1892;\n    ternary r1889 r1892 r1885 into r1893;\n    gte r1891 170141183460469231731687303715884105728u128 into r1894;\n    add.w r1891 r1891 into r1895;\n    gte r1895 r1611 into r1896;\n    or r1894 r1896 into r1897;\n    sub.w r1895 r1611 into r1898;\n    ternary r1897 r1898 r1895 into r1899;\n    add r1893 4951760157141521099596496896u128 into r1900;\n    ternary r1897 r1900 r1893 into r1901;\n    gte r1899 170141183460469231731687303715884105728u128 into r1902;\n    add.w r1899 r1899 into r1903;\n    gte r1903 r1611 into r1904;\n    or r1902 r1904 into r1905;\n    sub.w r1903 r1611 into r1906;\n    ternary r1905 r1906 r1903 into r1907;\n    add r1901 2475880078570760549798248448u128 into r1908;\n    ternary r1905 r1908 r1901 into r1909;\n    gte r1907 170141183460469231731687303715884105728u128 into r1910;\n    add.w r1907 r1907 into r1911;\n    gte r1911 r1611 into r1912;\n    or r1910 r1912 into r1913;\n    sub.w r1911 r1611 into r1914;\n    ternary r1913 r1914 r1911 into r1915;\n    add r1909 1237940039285380274899124224u128 into r1916;\n    ternary r1913 r1916 r1909 into r1917;\n    gte r1915 170141183460469231731687303715884105728u128 into r1918;\n    add.w r1915 r1915 into r1919;\n    gte r1919 r1611 into r1920;\n    or r1918 r1920 into r1921;\n    sub.w r1919 r1611 into r1922;\n    ternary r1921 r1922 r1919 into r1923;\n    add r1917 618970019642690137449562112u128 into r1924;\n    ternary r1921 r1924 r1917 into r1925;\n    gte r1923 170141183460469231731687303715884105728u128 into r1926;\n    add.w r1923 r1923 into r1927;\n    gte r1927 r1611 into r1928;\n    or r1926 r1928 into r1929;\n    sub.w r1927 r1611 into r1930;\n    ternary r1929 r1930 r1927 into r1931;\n    add r1925 309485009821345068724781056u128 into r1932;\n    ternary r1929 r1932 r1925 into r1933;\n    gte r1931 170141183460469231731687303715884105728u128 into r1934;\n    add.w r1931 r1931 into r1935;\n    gte r1935 r1611 into r1936;\n    or r1934 r1936 into r1937;\n    sub.w r1935 r1611 into r1938;\n    ternary r1937 r1938 r1935 into r1939;\n    add r1933 154742504910672534362390528u128 into r1940;\n    ternary r1937 r1940 r1933 into r1941;\n    gte r1939 170141183460469231731687303715884105728u128 into r1942;\n    add.w r1939 r1939 into r1943;\n    gte r1943 r1611 into r1944;\n    or r1942 r1944 into r1945;\n    sub.w r1943 r1611 into r1946;\n    ternary r1945 r1946 r1943 into r1947;\n    add r1941 77371252455336267181195264u128 into r1948;\n    ternary r1945 r1948 r1941 into r1949;\n    gte r1947 170141183460469231731687303715884105728u128 into r1950;\n    add.w r1947 r1947 into r1951;\n    gte r1951 r1611 into r1952;\n    or r1950 r1952 into r1953;\n    sub.w r1951 r1611 into r1954;\n    ternary r1953 r1954 r1951 into r1955;\n    add r1949 38685626227668133590597632u128 into r1956;\n    ternary r1953 r1956 r1949 into r1957;\n    gte r1955 170141183460469231731687303715884105728u128 into r1958;\n    add.w r1955 r1955 into r1959;\n    gte r1959 r1611 into r1960;\n    or r1958 r1960 into r1961;\n    sub.w r1959 r1611 into r1962;\n    ternary r1961 r1962 r1959 into r1963;\n    add r1957 19342813113834066795298816u128 into r1964;\n    ternary r1961 r1964 r1957 into r1965;\n    gte r1963 170141183460469231731687303715884105728u128 into r1966;\n    add.w r1963 r1963 into r1967;\n    gte r1967 r1611 into r1968;\n    or r1966 r1968 into r1969;\n    sub.w r1967 r1611 into r1970;\n    ternary r1969 r1970 r1967 into r1971;\n    add r1965 9671406556917033397649408u128 into r1972;\n    ternary r1969 r1972 r1965 into r1973;\n    gte r1971 170141183460469231731687303715884105728u128 into r1974;\n    add.w r1971 r1971 into r1975;\n    gte r1975 r1611 into r1976;\n    or r1974 r1976 into r1977;\n    sub.w r1975 r1611 into r1978;\n    ternary r1977 r1978 r1975 into r1979;\n    add r1973 4835703278458516698824704u128 into r1980;\n    ternary r1977 r1980 r1973 into r1981;\n    gte r1979 170141183460469231731687303715884105728u128 into r1982;\n    add.w r1979 r1979 into r1983;\n    gte r1983 r1611 into r1984;\n    or r1982 r1984 into r1985;\n    sub.w r1983 r1611 into r1986;\n    ternary r1985 r1986 r1983 into r1987;\n    add r1981 2417851639229258349412352u128 into r1988;\n    ternary r1985 r1988 r1981 into r1989;\n    gte r1987 170141183460469231731687303715884105728u128 into r1990;\n    add.w r1987 r1987 into r1991;\n    gte r1991 r1611 into r1992;\n    or r1990 r1992 into r1993;\n    sub.w r1991 r1611 into r1994;\n    ternary r1993 r1994 r1991 into r1995;\n    add r1989 1208925819614629174706176u128 into r1996;\n    ternary r1993 r1996 r1989 into r1997;\n    gte r1995 170141183460469231731687303715884105728u128 into r1998;\n    add.w r1995 r1995 into r1999;\n    gte r1999 r1611 into r2000;\n    or r1998 r2000 into r2001;\n    sub.w r1999 r1611 into r2002;\n    ternary r2001 r2002 r1999 into r2003;\n    add r1997 604462909807314587353088u128 into r2004;\n    ternary r2001 r2004 r1997 into r2005;\n    gte r2003 170141183460469231731687303715884105728u128 into r2006;\n    add.w r2003 r2003 into r2007;\n    gte r2007 r1611 into r2008;\n    or r2006 r2008 into r2009;\n    sub.w r2007 r1611 into r2010;\n    ternary r2009 r2010 r2007 into r2011;\n    add r2005 302231454903657293676544u128 into r2012;\n    ternary r2009 r2012 r2005 into r2013;\n    gte r2011 170141183460469231731687303715884105728u128 into r2014;\n    add.w r2011 r2011 into r2015;\n    gte r2015 r1611 into r2016;\n    or r2014 r2016 into r2017;\n    sub.w r2015 r1611 into r2018;\n    ternary r2017 r2018 r2015 into r2019;\n    add r2013 151115727451828646838272u128 into r2020;\n    ternary r2017 r2020 r2013 into r2021;\n    gte r2019 170141183460469231731687303715884105728u128 into r2022;\n    add.w r2019 r2019 into r2023;\n    gte r2023 r1611 into r2024;\n    or r2022 r2024 into r2025;\n    sub.w r2023 r1611 into r2026;\n    ternary r2025 r2026 r2023 into r2027;\n    add r2021 75557863725914323419136u128 into r2028;\n    ternary r2025 r2028 r2021 into r2029;\n    gte r2027 170141183460469231731687303715884105728u128 into r2030;\n    add.w r2027 r2027 into r2031;\n    gte r2031 r1611 into r2032;\n    or r2030 r2032 into r2033;\n    sub.w r2031 r1611 into r2034;\n    ternary r2033 r2034 r2031 into r2035;\n    add r2029 37778931862957161709568u128 into r2036;\n    ternary r2033 r2036 r2029 into r2037;\n    gte r2035 170141183460469231731687303715884105728u128 into r2038;\n    add.w r2035 r2035 into r2039;\n    gte r2039 r1611 into r2040;\n    or r2038 r2040 into r2041;\n    sub.w r2039 r1611 into r2042;\n    ternary r2041 r2042 r2039 into r2043;\n    add r2037 18889465931478580854784u128 into r2044;\n    ternary r2041 r2044 r2037 into r2045;\n    gte r2043 170141183460469231731687303715884105728u128 into r2046;\n    add.w r2043 r2043 into r2047;\n    gte r2047 r1611 into r2048;\n    or r2046 r2048 into r2049;\n    sub.w r2047 r1611 into r2050;\n    ternary r2049 r2050 r2047 into r2051;\n    add r2045 9444732965739290427392u128 into r2052;\n    ternary r2049 r2052 r2045 into r2053;\n    gte r2051 170141183460469231731687303715884105728u128 into r2054;\n    add.w r2051 r2051 into r2055;\n    gte r2055 r1611 into r2056;\n    or r2054 r2056 into r2057;\n    sub.w r2055 r1611 into r2058;\n    ternary r2057 r2058 r2055 into r2059;\n    add r2053 4722366482869645213696u128 into r2060;\n    ternary r2057 r2060 r2053 into r2061;\n    gte r2059 170141183460469231731687303715884105728u128 into r2062;\n    add.w r2059 r2059 into r2063;\n    gte r2063 r1611 into r2064;\n    or r2062 r2064 into r2065;\n    sub.w r2063 r1611 into r2066;\n    ternary r2065 r2066 r2063 into r2067;\n    add r2061 2361183241434822606848u128 into r2068;\n    ternary r2065 r2068 r2061 into r2069;\n    gte r2067 170141183460469231731687303715884105728u128 into r2070;\n    add.w r2067 r2067 into r2071;\n    gte r2071 r1611 into r2072;\n    or r2070 r2072 into r2073;\n    sub.w r2071 r1611 into r2074;\n    ternary r2073 r2074 r2071 into r2075;\n    add r2069 1180591620717411303424u128 into r2076;\n    ternary r2073 r2076 r2069 into r2077;\n    gte r2075 170141183460469231731687303715884105728u128 into r2078;\n    add.w r2075 r2075 into r2079;\n    gte r2079 r1611 into r2080;\n    or r2078 r2080 into r2081;\n    sub.w r2079 r1611 into r2082;\n    ternary r2081 r2082 r2079 into r2083;\n    add r2077 590295810358705651712u128 into r2084;\n    ternary r2081 r2084 r2077 into r2085;\n    gte r2083 170141183460469231731687303715884105728u128 into r2086;\n    add.w r2083 r2083 into r2087;\n    gte r2087 r1611 into r2088;\n    or r2086 r2088 into r2089;\n    sub.w r2087 r1611 into r2090;\n    ternary r2089 r2090 r2087 into r2091;\n    add r2085 295147905179352825856u128 into r2092;\n    ternary r2089 r2092 r2085 into r2093;\n    gte r2091 170141183460469231731687303715884105728u128 into r2094;\n    add.w r2091 r2091 into r2095;\n    gte r2095 r1611 into r2096;\n    or r2094 r2096 into r2097;\n    sub.w r2095 r1611 into r2098;\n    ternary r2097 r2098 r2095 into r2099;\n    add r2093 147573952589676412928u128 into r2100;\n    ternary r2097 r2100 r2093 into r2101;\n    gte r2099 170141183460469231731687303715884105728u128 into r2102;\n    add.w r2099 r2099 into r2103;\n    gte r2103 r1611 into r2104;\n    or r2102 r2104 into r2105;\n    sub.w r2103 r1611 into r2106;\n    ternary r2105 r2106 r2103 into r2107;\n    add r2101 73786976294838206464u128 into r2108;\n    ternary r2105 r2108 r2101 into r2109;\n    gte r2107 170141183460469231731687303715884105728u128 into r2110;\n    add.w r2107 r2107 into r2111;\n    gte r2111 r1611 into r2112;\n    or r2110 r2112 into r2113;\n    sub.w r2111 r1611 into r2114;\n    ternary r2113 r2114 r2111 into r2115;\n    add r2109 36893488147419103232u128 into r2116;\n    ternary r2113 r2116 r2109 into r2117;\n    gte r2115 170141183460469231731687303715884105728u128 into r2118;\n    add.w r2115 r2115 into r2119;\n    gte r2119 r1611 into r2120;\n    or r2118 r2120 into r2121;\n    sub.w r2119 r1611 into r2122;\n    ternary r2121 r2122 r2119 into r2123;\n    add r2117 18446744073709551616u128 into r2124;\n    ternary r2121 r2124 r2117 into r2125;\n    gte r2123 170141183460469231731687303715884105728u128 into r2126;\n    add.w r2123 r2123 into r2127;\n    gte r2127 r1611 into r2128;\n    or r2126 r2128 into r2129;\n    sub.w r2127 r1611 into r2130;\n    ternary r2129 r2130 r2127 into r2131;\n    add r2125 9223372036854775808u128 into r2132;\n    ternary r2129 r2132 r2125 into r2133;\n    gte r2131 170141183460469231731687303715884105728u128 into r2134;\n    add.w r2131 r2131 into r2135;\n    gte r2135 r1611 into r2136;\n    or r2134 r2136 into r2137;\n    sub.w r2135 r1611 into r2138;\n    ternary r2137 r2138 r2135 into r2139;\n    add r2133 4611686018427387904u128 into r2140;\n    ternary r2137 r2140 r2133 into r2141;\n    gte r2139 170141183460469231731687303715884105728u128 into r2142;\n    add.w r2139 r2139 into r2143;\n    gte r2143 r1611 into r2144;\n    or r2142 r2144 into r2145;\n    sub.w r2143 r1611 into r2146;\n    ternary r2145 r2146 r2143 into r2147;\n    add r2141 2305843009213693952u128 into r2148;\n    ternary r2145 r2148 r2141 into r2149;\n    gte r2147 170141183460469231731687303715884105728u128 into r2150;\n    add.w r2147 r2147 into r2151;\n    gte r2151 r1611 into r2152;\n    or r2150 r2152 into r2153;\n    sub.w r2151 r1611 into r2154;\n    ternary r2153 r2154 r2151 into r2155;\n    add r2149 1152921504606846976u128 into r2156;\n    ternary r2153 r2156 r2149 into r2157;\n    gte r2155 170141183460469231731687303715884105728u128 into r2158;\n    add.w r2155 r2155 into r2159;\n    gte r2159 r1611 into r2160;\n    or r2158 r2160 into r2161;\n    sub.w r2159 r1611 into r2162;\n    ternary r2161 r2162 r2159 into r2163;\n    add r2157 576460752303423488u128 into r2164;\n    ternary r2161 r2164 r2157 into r2165;\n    gte r2163 170141183460469231731687303715884105728u128 into r2166;\n    add.w r2163 r2163 into r2167;\n    gte r2167 r1611 into r2168;\n    or r2166 r2168 into r2169;\n    sub.w r2167 r1611 into r2170;\n    ternary r2169 r2170 r2167 into r2171;\n    add r2165 288230376151711744u128 into r2172;\n    ternary r2169 r2172 r2165 into r2173;\n    gte r2171 170141183460469231731687303715884105728u128 into r2174;\n    add.w r2171 r2171 into r2175;\n    gte r2175 r1611 into r2176;\n    or r2174 r2176 into r2177;\n    sub.w r2175 r1611 into r2178;\n    ternary r2177 r2178 r2175 into r2179;\n    add r2173 144115188075855872u128 into r2180;\n    ternary r2177 r2180 r2173 into r2181;\n    gte r2179 170141183460469231731687303715884105728u128 into r2182;\n    add.w r2179 r2179 into r2183;\n    gte r2183 r1611 into r2184;\n    or r2182 r2184 into r2185;\n    sub.w r2183 r1611 into r2186;\n    ternary r2185 r2186 r2183 into r2187;\n    add r2181 72057594037927936u128 into r2188;\n    ternary r2185 r2188 r2181 into r2189;\n    gte r2187 170141183460469231731687303715884105728u128 into r2190;\n    add.w r2187 r2187 into r2191;\n    gte r2191 r1611 into r2192;\n    or r2190 r2192 into r2193;\n    sub.w r2191 r1611 into r2194;\n    ternary r2193 r2194 r2191 into r2195;\n    add r2189 36028797018963968u128 into r2196;\n    ternary r2193 r2196 r2189 into r2197;\n    gte r2195 170141183460469231731687303715884105728u128 into r2198;\n    add.w r2195 r2195 into r2199;\n    gte r2199 r1611 into r2200;\n    or r2198 r2200 into r2201;\n    sub.w r2199 r1611 into r2202;\n    ternary r2201 r2202 r2199 into r2203;\n    add r2197 18014398509481984u128 into r2204;\n    ternary r2201 r2204 r2197 into r2205;\n    gte r2203 170141183460469231731687303715884105728u128 into r2206;\n    add.w r2203 r2203 into r2207;\n    gte r2207 r1611 into r2208;\n    or r2206 r2208 into r2209;\n    sub.w r2207 r1611 into r2210;\n    ternary r2209 r2210 r2207 into r2211;\n    add r2205 9007199254740992u128 into r2212;\n    ternary r2209 r2212 r2205 into r2213;\n    gte r2211 170141183460469231731687303715884105728u128 into r2214;\n    add.w r2211 r2211 into r2215;\n    gte r2215 r1611 into r2216;\n    or r2214 r2216 into r2217;\n    sub.w r2215 r1611 into r2218;\n    ternary r2217 r2218 r2215 into r2219;\n    add r2213 4503599627370496u128 into r2220;\n    ternary r2217 r2220 r2213 into r2221;\n    gte r2219 170141183460469231731687303715884105728u128 into r2222;\n    add.w r2219 r2219 into r2223;\n    gte r2223 r1611 into r2224;\n    or r2222 r2224 into r2225;\n    sub.w r2223 r1611 into r2226;\n    ternary r2225 r2226 r2223 into r2227;\n    add r2221 2251799813685248u128 into r2228;\n    ternary r2225 r2228 r2221 into r2229;\n    gte r2227 170141183460469231731687303715884105728u128 into r2230;\n    add.w r2227 r2227 into r2231;\n    gte r2231 r1611 into r2232;\n    or r2230 r2232 into r2233;\n    sub.w r2231 r1611 into r2234;\n    ternary r2233 r2234 r2231 into r2235;\n    add r2229 1125899906842624u128 into r2236;\n    ternary r2233 r2236 r2229 into r2237;\n    gte r2235 170141183460469231731687303715884105728u128 into r2238;\n    add.w r2235 r2235 into r2239;\n    gte r2239 r1611 into r2240;\n    or r2238 r2240 into r2241;\n    sub.w r2239 r1611 into r2242;\n    ternary r2241 r2242 r2239 into r2243;\n    add r2237 562949953421312u128 into r2244;\n    ternary r2241 r2244 r2237 into r2245;\n    gte r2243 170141183460469231731687303715884105728u128 into r2246;\n    add.w r2243 r2243 into r2247;\n    gte r2247 r1611 into r2248;\n    or r2246 r2248 into r2249;\n    sub.w r2247 r1611 into r2250;\n    ternary r2249 r2250 r2247 into r2251;\n    add r2245 281474976710656u128 into r2252;\n    ternary r2249 r2252 r2245 into r2253;\n    gte r2251 170141183460469231731687303715884105728u128 into r2254;\n    add.w r2251 r2251 into r2255;\n    gte r2255 r1611 into r2256;\n    or r2254 r2256 into r2257;\n    sub.w r2255 r1611 into r2258;\n    ternary r2257 r2258 r2255 into r2259;\n    add r2253 140737488355328u128 into r2260;\n    ternary r2257 r2260 r2253 into r2261;\n    gte r2259 170141183460469231731687303715884105728u128 into r2262;\n    add.w r2259 r2259 into r2263;\n    gte r2263 r1611 into r2264;\n    or r2262 r2264 into r2265;\n    sub.w r2263 r1611 into r2266;\n    ternary r2265 r2266 r2263 into r2267;\n    add r2261 70368744177664u128 into r2268;\n    ternary r2265 r2268 r2261 into r2269;\n    gte r2267 170141183460469231731687303715884105728u128 into r2270;\n    add.w r2267 r2267 into r2271;\n    gte r2271 r1611 into r2272;\n    or r2270 r2272 into r2273;\n    sub.w r2271 r1611 into r2274;\n    ternary r2273 r2274 r2271 into r2275;\n    add r2269 35184372088832u128 into r2276;\n    ternary r2273 r2276 r2269 into r2277;\n    gte r2275 170141183460469231731687303715884105728u128 into r2278;\n    add.w r2275 r2275 into r2279;\n    gte r2279 r1611 into r2280;\n    or r2278 r2280 into r2281;\n    sub.w r2279 r1611 into r2282;\n    ternary r2281 r2282 r2279 into r2283;\n    add r2277 17592186044416u128 into r2284;\n    ternary r2281 r2284 r2277 into r2285;\n    gte r2283 170141183460469231731687303715884105728u128 into r2286;\n    add.w r2283 r2283 into r2287;\n    gte r2287 r1611 into r2288;\n    or r2286 r2288 into r2289;\n    sub.w r2287 r1611 into r2290;\n    ternary r2289 r2290 r2287 into r2291;\n    add r2285 8796093022208u128 into r2292;\n    ternary r2289 r2292 r2285 into r2293;\n    gte r2291 170141183460469231731687303715884105728u128 into r2294;\n    add.w r2291 r2291 into r2295;\n    gte r2295 r1611 into r2296;\n    or r2294 r2296 into r2297;\n    sub.w r2295 r1611 into r2298;\n    ternary r2297 r2298 r2295 into r2299;\n    add r2293 4398046511104u128 into r2300;\n    ternary r2297 r2300 r2293 into r2301;\n    gte r2299 170141183460469231731687303715884105728u128 into r2302;\n    add.w r2299 r2299 into r2303;\n    gte r2303 r1611 into r2304;\n    or r2302 r2304 into r2305;\n    sub.w r2303 r1611 into r2306;\n    ternary r2305 r2306 r2303 into r2307;\n    add r2301 2199023255552u128 into r2308;\n    ternary r2305 r2308 r2301 into r2309;\n    gte r2307 170141183460469231731687303715884105728u128 into r2310;\n    add.w r2307 r2307 into r2311;\n    gte r2311 r1611 into r2312;\n    or r2310 r2312 into r2313;\n    sub.w r2311 r1611 into r2314;\n    ternary r2313 r2314 r2311 into r2315;\n    add r2309 1099511627776u128 into r2316;\n    ternary r2313 r2316 r2309 into r2317;\n    gte r2315 170141183460469231731687303715884105728u128 into r2318;\n    add.w r2315 r2315 into r2319;\n    gte r2319 r1611 into r2320;\n    or r2318 r2320 into r2321;\n    sub.w r2319 r1611 into r2322;\n    ternary r2321 r2322 r2319 into r2323;\n    add r2317 549755813888u128 into r2324;\n    ternary r2321 r2324 r2317 into r2325;\n    gte r2323 170141183460469231731687303715884105728u128 into r2326;\n    add.w r2323 r2323 into r2327;\n    gte r2327 r1611 into r2328;\n    or r2326 r2328 into r2329;\n    sub.w r2327 r1611 into r2330;\n    ternary r2329 r2330 r2327 into r2331;\n    add r2325 274877906944u128 into r2332;\n    ternary r2329 r2332 r2325 into r2333;\n    gte r2331 170141183460469231731687303715884105728u128 into r2334;\n    add.w r2331 r2331 into r2335;\n    gte r2335 r1611 into r2336;\n    or r2334 r2336 into r2337;\n    sub.w r2335 r1611 into r2338;\n    ternary r2337 r2338 r2335 into r2339;\n    add r2333 137438953472u128 into r2340;\n    ternary r2337 r2340 r2333 into r2341;\n    gte r2339 170141183460469231731687303715884105728u128 into r2342;\n    add.w r2339 r2339 into r2343;\n    gte r2343 r1611 into r2344;\n    or r2342 r2344 into r2345;\n    sub.w r2343 r1611 into r2346;\n    ternary r2345 r2346 r2343 into r2347;\n    add r2341 68719476736u128 into r2348;\n    ternary r2345 r2348 r2341 into r2349;\n    gte r2347 170141183460469231731687303715884105728u128 into r2350;\n    add.w r2347 r2347 into r2351;\n    gte r2351 r1611 into r2352;\n    or r2350 r2352 into r2353;\n    sub.w r2351 r1611 into r2354;\n    ternary r2353 r2354 r2351 into r2355;\n    add r2349 34359738368u128 into r2356;\n    ternary r2353 r2356 r2349 into r2357;\n    gte r2355 170141183460469231731687303715884105728u128 into r2358;\n    add.w r2355 r2355 into r2359;\n    gte r2359 r1611 into r2360;\n    or r2358 r2360 into r2361;\n    sub.w r2359 r1611 into r2362;\n    ternary r2361 r2362 r2359 into r2363;\n    add r2357 17179869184u128 into r2364;\n    ternary r2361 r2364 r2357 into r2365;\n    gte r2363 170141183460469231731687303715884105728u128 into r2366;\n    add.w r2363 r2363 into r2367;\n    gte r2367 r1611 into r2368;\n    or r2366 r2368 into r2369;\n    sub.w r2367 r1611 into r2370;\n    ternary r2369 r2370 r2367 into r2371;\n    add r2365 8589934592u128 into r2372;\n    ternary r2369 r2372 r2365 into r2373;\n    gte r2371 170141183460469231731687303715884105728u128 into r2374;\n    add.w r2371 r2371 into r2375;\n    gte r2375 r1611 into r2376;\n    or r2374 r2376 into r2377;\n    sub.w r2375 r1611 into r2378;\n    ternary r2377 r2378 r2375 into r2379;\n    add r2373 4294967296u128 into r2380;\n    ternary r2377 r2380 r2373 into r2381;\n    gte r2379 170141183460469231731687303715884105728u128 into r2382;\n    add.w r2379 r2379 into r2383;\n    gte r2383 r1611 into r2384;\n    or r2382 r2384 into r2385;\n    sub.w r2383 r1611 into r2386;\n    ternary r2385 r2386 r2383 into r2387;\n    add r2381 2147483648u128 into r2388;\n    ternary r2385 r2388 r2381 into r2389;\n    gte r2387 170141183460469231731687303715884105728u128 into r2390;\n    add.w r2387 r2387 into r2391;\n    gte r2391 r1611 into r2392;\n    or r2390 r2392 into r2393;\n    sub.w r2391 r1611 into r2394;\n    ternary r2393 r2394 r2391 into r2395;\n    add r2389 1073741824u128 into r2396;\n    ternary r2393 r2396 r2389 into r2397;\n    gte r2395 170141183460469231731687303715884105728u128 into r2398;\n    add.w r2395 r2395 into r2399;\n    gte r2399 r1611 into r2400;\n    or r2398 r2400 into r2401;\n    sub.w r2399 r1611 into r2402;\n    ternary r2401 r2402 r2399 into r2403;\n    add r2397 536870912u128 into r2404;\n    ternary r2401 r2404 r2397 into r2405;\n    gte r2403 170141183460469231731687303715884105728u128 into r2406;\n    add.w r2403 r2403 into r2407;\n    gte r2407 r1611 into r2408;\n    or r2406 r2408 into r2409;\n    sub.w r2407 r1611 into r2410;\n    ternary r2409 r2410 r2407 into r2411;\n    add r2405 268435456u128 into r2412;\n    ternary r2409 r2412 r2405 into r2413;\n    gte r2411 170141183460469231731687303715884105728u128 into r2414;\n    add.w r2411 r2411 into r2415;\n    gte r2415 r1611 into r2416;\n    or r2414 r2416 into r2417;\n    sub.w r2415 r1611 into r2418;\n    ternary r2417 r2418 r2415 into r2419;\n    add r2413 134217728u128 into r2420;\n    ternary r2417 r2420 r2413 into r2421;\n    gte r2419 170141183460469231731687303715884105728u128 into r2422;\n    add.w r2419 r2419 into r2423;\n    gte r2423 r1611 into r2424;\n    or r2422 r2424 into r2425;\n    sub.w r2423 r1611 into r2426;\n    ternary r2425 r2426 r2423 into r2427;\n    add r2421 67108864u128 into r2428;\n    ternary r2425 r2428 r2421 into r2429;\n    gte r2427 170141183460469231731687303715884105728u128 into r2430;\n    add.w r2427 r2427 into r2431;\n    gte r2431 r1611 into r2432;\n    or r2430 r2432 into r2433;\n    sub.w r2431 r1611 into r2434;\n    ternary r2433 r2434 r2431 into r2435;\n    add r2429 33554432u128 into r2436;\n    ternary r2433 r2436 r2429 into r2437;\n    gte r2435 170141183460469231731687303715884105728u128 into r2438;\n    add.w r2435 r2435 into r2439;\n    gte r2439 r1611 into r2440;\n    or r2438 r2440 into r2441;\n    sub.w r2439 r1611 into r2442;\n    ternary r2441 r2442 r2439 into r2443;\n    add r2437 16777216u128 into r2444;\n    ternary r2441 r2444 r2437 into r2445;\n    gte r2443 170141183460469231731687303715884105728u128 into r2446;\n    add.w r2443 r2443 into r2447;\n    gte r2447 r1611 into r2448;\n    or r2446 r2448 into r2449;\n    sub.w r2447 r1611 into r2450;\n    ternary r2449 r2450 r2447 into r2451;\n    add r2445 8388608u128 into r2452;\n    ternary r2449 r2452 r2445 into r2453;\n    gte r2451 170141183460469231731687303715884105728u128 into r2454;\n    add.w r2451 r2451 into r2455;\n    gte r2455 r1611 into r2456;\n    or r2454 r2456 into r2457;\n    sub.w r2455 r1611 into r2458;\n    ternary r2457 r2458 r2455 into r2459;\n    add r2453 4194304u128 into r2460;\n    ternary r2457 r2460 r2453 into r2461;\n    gte r2459 170141183460469231731687303715884105728u128 into r2462;\n    add.w r2459 r2459 into r2463;\n    gte r2463 r1611 into r2464;\n    or r2462 r2464 into r2465;\n    sub.w r2463 r1611 into r2466;\n    ternary r2465 r2466 r2463 into r2467;\n    add r2461 2097152u128 into r2468;\n    ternary r2465 r2468 r2461 into r2469;\n    gte r2467 170141183460469231731687303715884105728u128 into r2470;\n    add.w r2467 r2467 into r2471;\n    gte r2471 r1611 into r2472;\n    or r2470 r2472 into r2473;\n    sub.w r2471 r1611 into r2474;\n    ternary r2473 r2474 r2471 into r2475;\n    add r2469 1048576u128 into r2476;\n    ternary r2473 r2476 r2469 into r2477;\n    gte r2475 170141183460469231731687303715884105728u128 into r2478;\n    add.w r2475 r2475 into r2479;\n    gte r2479 r1611 into r2480;\n    or r2478 r2480 into r2481;\n    sub.w r2479 r1611 into r2482;\n    ternary r2481 r2482 r2479 into r2483;\n    add r2477 524288u128 into r2484;\n    ternary r2481 r2484 r2477 into r2485;\n    gte r2483 170141183460469231731687303715884105728u128 into r2486;\n    add.w r2483 r2483 into r2487;\n    gte r2487 r1611 into r2488;\n    or r2486 r2488 into r2489;\n    sub.w r2487 r1611 into r2490;\n    ternary r2489 r2490 r2487 into r2491;\n    add r2485 262144u128 into r2492;\n    ternary r2489 r2492 r2485 into r2493;\n    gte r2491 170141183460469231731687303715884105728u128 into r2494;\n    add.w r2491 r2491 into r2495;\n    gte r2495 r1611 into r2496;\n    or r2494 r2496 into r2497;\n    sub.w r2495 r1611 into r2498;\n    ternary r2497 r2498 r2495 into r2499;\n    add r2493 131072u128 into r2500;\n    ternary r2497 r2500 r2493 into r2501;\n    gte r2499 170141183460469231731687303715884105728u128 into r2502;\n    add.w r2499 r2499 into r2503;\n    gte r2503 r1611 into r2504;\n    or r2502 r2504 into r2505;\n    sub.w r2503 r1611 into r2506;\n    ternary r2505 r2506 r2503 into r2507;\n    add r2501 65536u128 into r2508;\n    ternary r2505 r2508 r2501 into r2509;\n    gte r2507 170141183460469231731687303715884105728u128 into r2510;\n    add.w r2507 r2507 into r2511;\n    gte r2511 r1611 into r2512;\n    or r2510 r2512 into r2513;\n    sub.w r2511 r1611 into r2514;\n    ternary r2513 r2514 r2511 into r2515;\n    add r2509 32768u128 into r2516;\n    ternary r2513 r2516 r2509 into r2517;\n    gte r2515 170141183460469231731687303715884105728u128 into r2518;\n    add.w r2515 r2515 into r2519;\n    gte r2519 r1611 into r2520;\n    or r2518 r2520 into r2521;\n    sub.w r2519 r1611 into r2522;\n    ternary r2521 r2522 r2519 into r2523;\n    add r2517 16384u128 into r2524;\n    ternary r2521 r2524 r2517 into r2525;\n    gte r2523 170141183460469231731687303715884105728u128 into r2526;\n    add.w r2523 r2523 into r2527;\n    gte r2527 r1611 into r2528;\n    or r2526 r2528 into r2529;\n    sub.w r2527 r1611 into r2530;\n    ternary r2529 r2530 r2527 into r2531;\n    add r2525 8192u128 into r2532;\n    ternary r2529 r2532 r2525 into r2533;\n    gte r2531 170141183460469231731687303715884105728u128 into r2534;\n    add.w r2531 r2531 into r2535;\n    gte r2535 r1611 into r2536;\n    or r2534 r2536 into r2537;\n    sub.w r2535 r1611 into r2538;\n    ternary r2537 r2538 r2535 into r2539;\n    add r2533 4096u128 into r2540;\n    ternary r2537 r2540 r2533 into r2541;\n    gte r2539 170141183460469231731687303715884105728u128 into r2542;\n    add.w r2539 r2539 into r2543;\n    gte r2543 r1611 into r2544;\n    or r2542 r2544 into r2545;\n    sub.w r2543 r1611 into r2546;\n    ternary r2545 r2546 r2543 into r2547;\n    add r2541 2048u128 into r2548;\n    ternary r2545 r2548 r2541 into r2549;\n    gte r2547 170141183460469231731687303715884105728u128 into r2550;\n    add.w r2547 r2547 into r2551;\n    gte r2551 r1611 into r2552;\n    or r2550 r2552 into r2553;\n    sub.w r2551 r1611 into r2554;\n    ternary r2553 r2554 r2551 into r2555;\n    add r2549 1024u128 into r2556;\n    ternary r2553 r2556 r2549 into r2557;\n    gte r2555 170141183460469231731687303715884105728u128 into r2558;\n    add.w r2555 r2555 into r2559;\n    gte r2559 r1611 into r2560;\n    or r2558 r2560 into r2561;\n    sub.w r2559 r1611 into r2562;\n    ternary r2561 r2562 r2559 into r2563;\n    add r2557 512u128 into r2564;\n    ternary r2561 r2564 r2557 into r2565;\n    gte r2563 170141183460469231731687303715884105728u128 into r2566;\n    add.w r2563 r2563 into r2567;\n    gte r2567 r1611 into r2568;\n    or r2566 r2568 into r2569;\n    sub.w r2567 r1611 into r2570;\n    ternary r2569 r2570 r2567 into r2571;\n    add r2565 256u128 into r2572;\n    ternary r2569 r2572 r2565 into r2573;\n    gte r2571 170141183460469231731687303715884105728u128 into r2574;\n    add.w r2571 r2571 into r2575;\n    gte r2575 r1611 into r2576;\n    or r2574 r2576 into r2577;\n    sub.w r2575 r1611 into r2578;\n    ternary r2577 r2578 r2575 into r2579;\n    add r2573 128u128 into r2580;\n    ternary r2577 r2580 r2573 into r2581;\n    gte r2579 170141183460469231731687303715884105728u128 into r2582;\n    add.w r2579 r2579 into r2583;\n    gte r2583 r1611 into r2584;\n    or r2582 r2584 into r2585;\n    sub.w r2583 r1611 into r2586;\n    ternary r2585 r2586 r2583 into r2587;\n    add r2581 64u128 into r2588;\n    ternary r2585 r2588 r2581 into r2589;\n    gte r2587 170141183460469231731687303715884105728u128 into r2590;\n    add.w r2587 r2587 into r2591;\n    gte r2591 r1611 into r2592;\n    or r2590 r2592 into r2593;\n    sub.w r2591 r1611 into r2594;\n    ternary r2593 r2594 r2591 into r2595;\n    add r2589 32u128 into r2596;\n    ternary r2593 r2596 r2589 into r2597;\n    gte r2595 170141183460469231731687303715884105728u128 into r2598;\n    add.w r2595 r2595 into r2599;\n    gte r2599 r1611 into r2600;\n    or r2598 r2600 into r2601;\n    sub.w r2599 r1611 into r2602;\n    ternary r2601 r2602 r2599 into r2603;\n    add r2597 16u128 into r2604;\n    ternary r2601 r2604 r2597 into r2605;\n    gte r2603 170141183460469231731687303715884105728u128 into r2606;\n    add.w r2603 r2603 into r2607;\n    gte r2607 r1611 into r2608;\n    or r2606 r2608 into r2609;\n    sub.w r2607 r1611 into r2610;\n    ternary r2609 r2610 r2607 into r2611;\n    add r2605 8u128 into r2612;\n    ternary r2609 r2612 r2605 into r2613;\n    gte r2611 170141183460469231731687303715884105728u128 into r2614;\n    add.w r2611 r2611 into r2615;\n    gte r2615 r1611 into r2616;\n    or r2614 r2616 into r2617;\n    sub.w r2615 r1611 into r2618;\n    ternary r2617 r2618 r2615 into r2619;\n    add r2613 4u128 into r2620;\n    ternary r2617 r2620 r2613 into r2621;\n    gte r2619 170141183460469231731687303715884105728u128 into r2622;\n    add.w r2619 r2619 into r2623;\n    gte r2623 r1611 into r2624;\n    or r2622 r2624 into r2625;\n    sub.w r2623 r1611 into r2626;\n    ternary r2625 r2626 r2623 into r2627;\n    add r2621 2u128 into r2628;\n    ternary r2625 r2628 r2621 into r2629;\n    gte r2627 170141183460469231731687303715884105728u128 into r2630;\n    add.w r2627 r2627 into r2631;\n    gte r2631 r1611 into r2632;\n    or r2630 r2632 into r2633;\n    add r2629 1u128 into r2634;\n    ternary r2633 r2634 r2629 into r2635;\n    ternary r1610 r1612 0u128 into r2636;\n    ternary r1610 r2635 0u128 into r2637;\n    cast r2636 r2637 into r2638 as U256__8JquwLopp8;\n    add.w r4.fg.lo r2638.lo into r2639;\n    lt r2639 r4.fg.lo into r2640;\n    ternary r2640 1u128 0u128 into r2641;\n    add.w r4.fg.hi r2638.hi into r2642;\n    add.w r2642 r2641 into r2643;\n    cast r2643 r2639 into r2644 as U256__8JquwLopp8;\n    is.eq r1595.hi r2.hi into r2645;\n    is.eq r1595.lo r2.lo into r2646;\n    and r2645 r2646 into r2647;\n    and r4.crossed r2647 into r2648;\n    ternary r0.z r2644.hi r0.slot_fg0.hi into r2649;\n    ternary r0.z r2644.lo r0.slot_fg0.lo into r2650;\n    cast r2649 r2650 into r2651 as U256__8JquwLopp8;\n    ternary r0.z r0.slot_fg1.hi r2644.hi into r2652;\n    ternary r0.z r0.slot_fg1.lo r2644.lo into r2653;\n    cast r2652 r2653 into r2654 as U256__8JquwLopp8;\n    lt r2651.lo r3.fee_growth_outside0_x_128.lo into r2655;\n    ternary r2655 1u128 0u128 into r2656;\n    sub.w r2651.lo r3.fee_growth_outside0_x_128.lo into r2657;\n    sub.w r2651.hi r3.fee_growth_outside0_x_128.hi into r2658;\n    sub.w r2658 r2656 into r2659;\n    cast r2659 r2657 into r2660 as U256__8JquwLopp8;\n    lt r2654.lo r3.fee_growth_outside1_x_128.lo into r2661;\n    ternary r2661 1u128 0u128 into r2662;\n    sub.w r2654.lo r3.fee_growth_outside1_x_128.lo into r2663;\n    sub.w r2654.hi r3.fee_growth_outside1_x_128.hi into r2664;\n    sub.w r2664 r2662 into r2665;\n    cast r2665 r2663 into r2666 as U256__8JquwLopp8;\n    ternary r2648 r2660.hi r3.fee_growth_outside0_x_128.hi into r2667;\n    ternary r2648 r2660.lo r3.fee_growth_outside0_x_128.lo into r2668;\n    cast r2667 r2668 into r2669 as U256__8JquwLopp8;\n    ternary r2648 r2666.hi r3.fee_growth_outside1_x_128.hi into r2670;\n    ternary r2648 r2666.lo r3.fee_growth_outside1_x_128.lo into r2671;\n    cast r2670 r2671 into r2672 as U256__8JquwLopp8;\n    ternary r2648 r3.pool r3.pool into r2673;\n    ternary r2648 r3.liquidity_net r3.liquidity_net into r2674;\n    ternary r2648 r3.liquidity_gross r3.liquidity_gross into r2675;\n    ternary r2648 r3.tick r3.tick into r2676;\n    ternary r2648 r3.prev r3.prev into r2677;\n    ternary r2648 r3.next r3.next into r2678;\n    cast r2673 r2674 r2675 r2676 r2669 r2672 r2677 r2678 into r2679 as Tick;\n    sub 0i128 r3.liquidity_net into r2680;\n    ternary r0.z r2680 r3.liquidity_net into r2681;\n    ternary r2648 r2681 0i128 into r2682;\n    sub 0i128 r2682 into r2683;\n    gt r2682 0i128 into r2684;\n    ternary r2684 r2682 0i128 into r2685;\n    gt r2683 0i128 into r2686;\n    ternary r2686 r2683 0i128 into r2687;\n    cast r2685 into r2688 as u128;\n    cast r2687 into r2689 as u128;\n    gte r4.liq r2689 into r2690;\n    assert.eq r2690 true;\n    sub r4.liq r2689 into r2691;\n    add r4.liq r2688 into r2692;\n    lt r2682 0i128 into r2693;\n    ternary r2693 r2691 r2692 into r2694;\n    ternary r2648 r2694 r4.liq into r2695;\n    sub r1 1i32 into r2696;\n    ternary r0.z r2696 r1 into r2697;\n    ternary r2648 r2697 r4.tk into r2698;\n    ternary r0.z r3.prev r1 into r2699;\n    ternary r2648 r2699 r4.nb into r2700;\n    ternary r0.z r1 r3.next into r2701;\n    ternary r2648 r2701 r4.na into r2702;\n    cast r1595 r1608 r1609 r2644 r2695 r2698 r2648 r1607 r2700 r2702 into r2703 as SwapIterState;\n    output r2703 as SwapIterState.public;\n    output r2679 as Tick.public;\n\nview view_bounded_partial:\n    input r0 as U256__8JquwLopp8.public;\n    input r1 as u128.public;\n    input r2 as u128.public;\n    input r3 as u128.public;\n    input r4 as U256__8JquwLopp8.public;\n    input r5 as u128.public;\n    input r6 as U256__8JquwLopp8.public;\n    input r7 as U256__8JquwLopp8.public;\n    input r8 as u32.public;\n    input r9 as u8.public;\n    input r10 as boolean.public;\n    lt r6.hi r7.hi into r11;\n    gt r6.hi r7.hi into r12;\n    lt r6.lo r7.lo into r13;\n    ternary r12 false r13 into r14;\n    ternary r11 true r14 into r15;\n    ternary r15 r7.hi r6.hi into r16;\n    ternary r15 r7.lo r6.lo into r17;\n    cast r16 r17 into r18 as U256__8JquwLopp8;\n    lt r7.hi r6.hi into r19;\n    gt r7.hi r6.hi into r20;\n    lt r7.lo r6.lo into r21;\n    ternary r20 false r21 into r22;\n    ternary r19 true r22 into r23;\n    ternary r23 r7.hi r6.hi into r24;\n    ternary r23 r7.lo r6.lo into r25;\n    cast r24 r25 into r26 as U256__8JquwLopp8;\n    ternary r10 r18.hi r26.hi into r27;\n    ternary r10 r18.lo r26.lo into r28;\n    cast r27 r28 into r29 as U256__8JquwLopp8;\n    is.eq r29.hi r6.hi into r30;\n    is.eq r29.lo r6.lo into r31;\n    and r30 r31 into r32;\n    lt r29.hi r0.hi into r33;\n    gt r29.hi r0.hi into r34;\n    lt r29.lo r0.lo into r35;\n    ternary r34 false r35 into r36;\n    ternary r33 true r36 into r37;\n    lt r0.hi r29.hi into r38;\n    gt r0.hi r29.hi into r39;\n    lt r0.lo r29.lo into r40;\n    ternary r39 false r40 into r41;\n    ternary r38 true r41 into r42;\n    ternary r10 r37 r42 into r43;\n    gt r2 0u128 into r44;\n    gt r1 0u128 into r45;\n    and r44 r45 into r46;\n    and r46 r43 into r47;\n    cast r8 into r48 as u128;\n    sub 1000000u128 r48 into r49;\n    and r2 18446744073709551615u128 into r50;\n    shr r2 64u8 into r51;\n    and r49 18446744073709551615u128 into r52;\n    shr r49 64u8 into r53;\n    mul r50 r52 into r54;\n    mul r50 r53 into r55;\n    mul r51 r52 into r56;\n    mul r51 r53 into r57;\n    and r54 18446744073709551615u128 into r58;\n    shr r54 64u8 into r59;\n    and r55 18446744073709551615u128 into r60;\n    add r59 r60 into r61;\n    and r56 18446744073709551615u128 into r62;\n    add r61 r62 into r63;\n    and r63 18446744073709551615u128 into r64;\n    shr r63 64u8 into r65;\n    shr r55 64u8 into r66;\n    shr r56 64u8 into r67;\n    add r66 r67 into r68;\n    and r57 18446744073709551615u128 into r69;\n    add r68 r69 into r70;\n    add r70 r65 into r71;\n    and r71 18446744073709551615u128 into r72;\n    shr r71 64u8 into r73;\n    shr r57 64u8 into r74;\n    add r74 r73 into r75;\n    shl r75 64u8 into r76;\n    add r76 r72 into r77;\n    shl r64 64u8 into r78;\n    add r78 r58 into r79;\n    lt r77 1000000u128 into r80;\n    assert.eq r80 true;\n    shr r79 96u8 into r81;\n    and r81 4294967295u128 into r82;\n    shl r77 32u8 into r83;\n    add r83 r82 into r84;\n    div r84 1000000u128 into r85;\n    rem r84 1000000u128 into r86;\n    shr r79 64u8 into r87;\n    and r87 4294967295u128 into r88;\n    shl r86 32u8 into r89;\n    add r89 r88 into r90;\n    shl r85 32u8 into r91;\n    div r90 1000000u128 into r92;\n    add r91 r92 into r93;\n    rem r90 1000000u128 into r94;\n    shr r79 32u8 into r95;\n    and r95 4294967295u128 into r96;\n    shl r94 32u8 into r97;\n    add r97 r96 into r98;\n    shl r93 32u8 into r99;\n    div r98 1000000u128 into r100;\n    add r99 r100 into r101;\n    rem r98 1000000u128 into r102;\n    shr r79 0u8 into r103;\n    and r103 4294967295u128 into r104;\n    shl r102 32u8 into r105;\n    add r105 r104 into r106;\n    shl r101 32u8 into r107;\n    div r106 1000000u128 into r108;\n    add r107 r108 into r109;\n    rem r106 1000000u128 into r110;\n    lt r0.hi r29.hi into r111;\n    gt r0.hi r29.hi into r112;\n    lt r0.lo r29.lo into r113;\n    ternary r112 false r113 into r114;\n    ternary r111 true r114 into r115;\n    ternary r115 r0.hi r29.hi into r116;\n    ternary r115 r0.lo r29.lo into r117;\n    cast r116 r117 into r118 as U256__8JquwLopp8;\n    lt r0.hi r29.hi into r119;\n    gt r0.hi r29.hi into r120;\n    lt r0.lo r29.lo into r121;\n    ternary r120 false r121 into r122;\n    ternary r119 true r122 into r123;\n    ternary r123 r29.hi r0.hi into r124;\n    ternary r123 r29.lo r0.lo into r125;\n    cast r124 r125 into r126 as U256__8JquwLopp8;\n    lt r126.lo r118.lo into r127;\n    ternary r127 1u128 0u128 into r128;\n    sub.w r126.lo r118.lo into r129;\n    sub.w r126.hi r118.hi into r130;\n    sub.w r130 r128 into r131;\n    cast r131 r129 into r132 as U256__8JquwLopp8;\n    shr r132.lo 64u8 into r133;\n    shr r132.hi 64u8 into r134;\n    and r1 18446744073709551615u128 into r135;\n    shr r1 64u8 into r136;\n    and r132.lo 18446744073709551615u128 into r137;\n    shr r132.lo 64u8 into r138;\n    mul r135 r137 into r139;\n    mul r135 r138 into r140;\n    mul r136 r137 into r141;\n    mul r136 r138 into r142;\n    and r139 18446744073709551615u128 into r143;\n    shr r139 64u8 into r144;\n    and r140 18446744073709551615u128 into r145;\n    add r144 r145 into r146;\n    and r141 18446744073709551615u128 into r147;\n    add r146 r147 into r148;\n    and r148 18446744073709551615u128 into r149;\n    shr r148 64u8 into r150;\n    shr r140 64u8 into r151;\n    shr r141 64u8 into r152;\n    add r151 r152 into r153;\n    and r142 18446744073709551615u128 into r154;\n    add r153 r154 into r155;\n    add r155 r150 into r156;\n    and r156 18446744073709551615u128 into r157;\n    shr r156 64u8 into r158;\n    shr r142 64u8 into r159;\n    add r159 r158 into r160;\n    shl r160 64u8 into r161;\n    add r161 r157 into r162;\n    shl r149 64u8 into r163;\n    add r163 r143 into r164;\n    and r132.hi 18446744073709551615u128 into r165;\n    shr r132.hi 64u8 into r166;\n    mul r135 r165 into r167;\n    mul r135 r166 into r168;\n    mul r136 r165 into r169;\n    mul r136 r166 into r170;\n    and r167 18446744073709551615u128 into r171;\n    shr r167 64u8 into r172;\n    and r168 18446744073709551615u128 into r173;\n    add r172 r173 into r174;\n    and r169 18446744073709551615u128 into r175;\n    add r174 r175 into r176;\n    and r176 18446744073709551615u128 into r177;\n    shr r176 64u8 into r178;\n    shr r168 64u8 into r179;\n    shr r169 64u8 into r180;\n    add r179 r180 into r181;\n    and r170 18446744073709551615u128 into r182;\n    add r181 r182 into r183;\n    add r183 r178 into r184;\n    and r184 18446744073709551615u128 into r185;\n    shr r184 64u8 into r186;\n    shr r170 64u8 into r187;\n    add r187 r186 into r188;\n    shl r188 64u8 into r189;\n    add r189 r185 into r190;\n    shl r177 64u8 into r191;\n    add r191 r171 into r192;\n    lt r164 0u128 into r193;\n    ternary r193 1u128 0u128 into r194;\n    lt r162 0u128 into r195;\n    ternary r195 1u128 0u128 into r196;\n    add.w r162 r192 into r197;\n    lt r197 r162 into r198;\n    ternary r198 1u128 0u128 into r199;\n    add.w r197 r194 into r200;\n    lt r200 r197 into r201;\n    ternary r201 1u128 0u128 into r202;\n    add r196 r199 into r203;\n    add r203 r202 into r204;\n    add.w r190 r204 into r205;\n    cast r205 r200 into r206 as U256__8JquwLopp8;\n    cast r164 0u128 into r207 as U256__8JquwLopp8;\n    lt r206.hi r126.hi into r208;\n    gt r206.hi r126.hi into r209;\n    lt r206.lo r126.lo into r210;\n    ternary r209 false r210 into r211;\n    ternary r208 true r211 into r212;\n    assert.eq r212 true;\n    gt r126.hi 0u128 into r213;\n    ternary r213 r126.hi r126.lo into r214;\n    ternary r213 128u32 0u32 into r215;\n    gte r214 18446744073709551616u128 into r216;\n    shr r214 64u8 into r217;\n    ternary r216 r217 r214 into r218;\n    ternary r216 64u32 0u32 into r219;\n    gte r218 4294967296u128 into r220;\n    shr r218 32u8 into r221;\n    add r219 32u32 into r222;\n    ternary r220 r221 r218 into r223;\n    ternary r220 r222 r219 into r224;\n    gte r223 65536u128 into r225;\n    shr r223 16u8 into r226;\n    add r224 16u32 into r227;\n    ternary r225 r226 r223 into r228;\n    ternary r225 r227 r224 into r229;\n    gte r228 256u128 into r230;\n    shr r228 8u8 into r231;\n    add r229 8u32 into r232;\n    ternary r230 r231 r228 into r233;\n    ternary r230 r232 r229 into r234;\n    gte r233 16u128 into r235;\n    shr r233 4u8 into r236;\n    add r234 4u32 into r237;\n    ternary r235 r236 r233 into r238;\n    ternary r235 r237 r234 into r239;\n    gte r238 4u128 into r240;\n    shr r238 2u8 into r241;\n    add r239 2u32 into r242;\n    ternary r240 r241 r238 into r243;\n    ternary r240 r242 r239 into r244;\n    gte r243 2u128 into r245;\n    add r244 1u32 into r246;\n    ternary r245 r246 r244 into r247;\n    add r215 r247 into r248;\n    sub 255u32 r248 into r249;\n    cast r249 into r250 as u16;\n    and r250 127u16 into r251;\n    cast r251 into r252 as u8;\n    is.eq r252 0u8 into r253;\n    sub 128u8 r252 into r254;\n    shr.w r126.lo r254 into r255;\n    ternary r253 0u128 r255 into r256;\n    shl.w r126.hi r252 into r257;\n    or r257 r256 into r258;\n    shl.w r126.lo r252 into r259;\n    shl.w r126.lo r252 into r260;\n    gte r250 128u16 into r261;\n    ternary r261 r260 r258 into r262;\n    ternary r261 0u128 r259 into r263;\n    cast r262 r263 into r264 as U256__8JquwLopp8;\n    and r264.lo 18446744073709551615u128 into r265;\n    shr r264.lo 64u8 into r266;\n    and r264.hi 18446744073709551615u128 into r267;\n    shr r264.hi 64u8 into r268;\n    cast r251 into r269 as u8;\n    is.eq r269 0u8 into r270;\n    sub 128u8 r269 into r271;\n    shr.w r207.lo r271 into r272;\n    ternary r270 0u128 r272 into r273;\n    shl.w r207.hi r269 into r274;\n    or r274 r273 into r275;\n    shl.w r207.lo r269 into r276;\n    shl.w r207.lo r269 into r277;\n    ternary r261 r277 r275 into r278;\n    ternary r261 0u128 r276 into r279;\n    cast r278 r279 into r280 as U256__8JquwLopp8;\n    is.eq r250 0u16 into r281;\n    sub 256u16 r250 into r282;\n    and r282 127u16 into r283;\n    cast r283 into r284 as u8;\n    is.eq r284 0u8 into r285;\n    sub 128u8 r284 into r286;\n    shl.w r207.hi r286 into r287;\n    ternary r285 0u128 r287 into r288;\n    shr r207.lo r284 into r289;\n    or r289 r288 into r290;\n    shr r207.hi r284 into r291;\n    shr r207.hi r284 into r292;\n    gte r282 128u16 into r293;\n    ternary r293 0u128 r291 into r294;\n    ternary r293 r292 r290 into r295;\n    cast r294 r295 into r296 as U256__8JquwLopp8;\n    ternary r281 0u128 r296.hi into r297;\n    ternary r281 0u128 r296.lo into r298;\n    cast r297 r298 into r299 as U256__8JquwLopp8;\n    cast r251 into r300 as u8;\n    is.eq r300 0u8 into r301;\n    sub 128u8 r300 into r302;\n    shr.w r206.lo r302 into r303;\n    ternary r301 0u128 r303 into r304;\n    shl.w r206.hi r300 into r305;\n    or r305 r304 into r306;\n    shl.w r206.lo r300 into r307;\n    shl.w r206.lo r300 into r308;\n    ternary r261 r308 r306 into r309;\n    ternary r261 0u128 r307 into r310;\n    cast r309 r310 into r311 as U256__8JquwLopp8;\n    add.w r311.lo r299.lo into r312;\n    lt r312 r311.lo into r313;\n    ternary r313 1u128 0u128 into r314;\n    add.w r311.hi r299.hi into r315;\n    add.w r315 r314 into r316;\n    cast r316 r312 into r317 as U256__8JquwLopp8;\n    and r280.lo 18446744073709551615u128 into r318;\n    shr r280.lo 64u8 into r319;\n    and r280.hi 18446744073709551615u128 into r320;\n    shr r280.hi 64u8 into r321;\n    and r317.lo 18446744073709551615u128 into r322;\n    shr r317.lo 64u8 into r323;\n    and r317.hi 18446744073709551615u128 into r324;\n    shr r317.hi 64u8 into r325;\n    shl r325 64u8 into r326;\n    add r326 r324 into r327;\n    div r327 r268 into r328;\n    gt r328 18446744073709551615u128 into r329;\n    ternary r329 18446744073709551615u128 r328 into r330;\n    mul r330 r268 into r331;\n    sub r327 r331 into r332;\n    lte r332 18446744073709551615u128 into r333;\n    mul r330 r267 into r334;\n    and r332 18446744073709551615u128 into r335;\n    shl r335 64u8 into r336;\n    add r336 r323 into r337;\n    gt r334 r337 into r338;\n    and r333 r338 into r339;\n    sub.w r330 1u128 into r340;\n    ternary r339 r340 r330 into r341;\n    add r332 r268 into r342;\n    ternary r339 r342 r332 into r343;\n    lte r343 18446744073709551615u128 into r344;\n    and r339 r344 into r345;\n    mul r341 r267 into r346;\n    and r343 18446744073709551615u128 into r347;\n    shl r347 64u8 into r348;\n    add r348 r323 into r349;\n    gt r346 r349 into r350;\n    and r345 r350 into r351;\n    sub.w r341 1u128 into r352;\n    ternary r351 r352 r341 into r353;\n    mul r353 r265 into r354;\n    and r354 18446744073709551615u128 into r355;\n    lt r321 r355 into r356;\n    add r321 18446744073709551616u128 into r357;\n    sub r357 r355 into r358;\n    and r358 18446744073709551615u128 into r359;\n    shr r354 64u8 into r360;\n    ternary r356 1u128 0u128 into r361;\n    add r360 r361 into r362;\n    mul r353 r266 into r363;\n    add r363 r362 into r364;\n    and r364 18446744073709551615u128 into r365;\n    lt r322 r365 into r366;\n    add r322 18446744073709551616u128 into r367;\n    sub r367 r365 into r368;\n    and r368 18446744073709551615u128 into r369;\n    shr r364 64u8 into r370;\n    ternary r366 1u128 0u128 into r371;\n    add r370 r371 into r372;\n    mul r353 r267 into r373;\n    add r373 r372 into r374;\n    and r374 18446744073709551615u128 into r375;\n    lt r323 r375 into r376;\n    add r323 18446744073709551616u128 into r377;\n    sub r377 r375 into r378;\n    and r378 18446744073709551615u128 into r379;\n    shr r374 64u8 into r380;\n    ternary r376 1u128 0u128 into r381;\n    add r380 r381 into r382;\n    mul r353 r268 into r383;\n    add r383 r382 into r384;\n    and r384 18446744073709551615u128 into r385;\n    lt r324 r385 into r386;\n    add r324 18446744073709551616u128 into r387;\n    sub r387 r385 into r388;\n    and r388 18446744073709551615u128 into r389;\n    shr r384 64u8 into r390;\n    ternary r386 1u128 0u128 into r391;\n    add r390 r391 into r392;\n    lt r325 r392 into r393;\n    add r325 18446744073709551616u128 into r394;\n    sub r394 r392 into r395;\n    and r395 18446744073709551615u128 into r396;\n    sub.w r353 1u128 into r397;\n    ternary r393 r397 r353 into r398;\n    add r359 r265 into r399;\n    and r399 18446744073709551615u128 into r400;\n    ternary r393 r400 r359 into r401;\n    shr r399 64u8 into r402;\n    ternary r393 r402 0u128 into r403;\n    add r369 r266 into r404;\n    add r404 r403 into r405;\n    and r405 18446744073709551615u128 into r406;\n    ternary r393 r406 r369 into r407;\n    shr r405 64u8 into r408;\n    ternary r393 r408 0u128 into r409;\n    add r379 r267 into r410;\n    add r410 r409 into r411;\n    and r411 18446744073709551615u128 into r412;\n    ternary r393 r412 r379 into r413;\n    shr r411 64u8 into r414;\n    ternary r393 r414 0u128 into r415;\n    add r389 r268 into r416;\n    add r416 r415 into r417;\n    and r417 18446744073709551615u128 into r418;\n    ternary r393 r418 r389 into r419;\n    shr r417 64u8 into r420;\n    ternary r393 r420 0u128 into r421;\n    add r396 r421 into r422;\n    shl r419 64u8 into r423;\n    add r423 r413 into r424;\n    div r424 r268 into r425;\n    gt r425 18446744073709551615u128 into r426;\n    ternary r426 18446744073709551615u128 r425 into r427;\n    mul r427 r268 into r428;\n    sub r424 r428 into r429;\n    lte r429 18446744073709551615u128 into r430;\n    mul r427 r267 into r431;\n    and r429 18446744073709551615u128 into r432;\n    shl r432 64u8 into r433;\n    add r433 r407 into r434;\n    gt r431 r434 into r435;\n    and r430 r435 into r436;\n    sub.w r427 1u128 into r437;\n    ternary r436 r437 r427 into r438;\n    add r429 r268 into r439;\n    ternary r436 r439 r429 into r440;\n    lte r440 18446744073709551615u128 into r441;\n    and r436 r441 into r442;\n    mul r438 r267 into r443;\n    and r440 18446744073709551615u128 into r444;\n    shl r444 64u8 into r445;\n    add r445 r407 into r446;\n    gt r443 r446 into r447;\n    and r442 r447 into r448;\n    sub.w r438 1u128 into r449;\n    ternary r448 r449 r438 into r450;\n    mul r450 r265 into r451;\n    and r451 18446744073709551615u128 into r452;\n    lt r320 r452 into r453;\n    add r320 18446744073709551616u128 into r454;\n    sub r454 r452 into r455;\n    and r455 18446744073709551615u128 into r456;\n    shr r451 64u8 into r457;\n    ternary r453 1u128 0u128 into r458;\n    add r457 r458 into r459;\n    mul r450 r266 into r460;\n    add r460 r459 into r461;\n    and r461 18446744073709551615u128 into r462;\n    lt r401 r462 into r463;\n    add r401 18446744073709551616u128 into r464;\n    sub r464 r462 into r465;\n    and r465 18446744073709551615u128 into r466;\n    shr r461 64u8 into r467;\n    ternary r463 1u128 0u128 into r468;\n    add r467 r468 into r469;\n    mul r450 r267 into r470;\n    add r470 r469 into r471;\n    and r471 18446744073709551615u128 into r472;\n    lt r407 r472 into r473;\n    add r407 18446744073709551616u128 into r474;\n    sub r474 r472 into r475;\n    and r475 18446744073709551615u128 into r476;\n    shr r471 64u8 into r477;\n    ternary r473 1u128 0u128 into r478;\n    add r477 r478 into r479;\n    mul r450 r268 into r480;\n    add r480 r479 into r481;\n    and r481 18446744073709551615u128 into r482;\n    lt r413 r482 into r483;\n    add r413 18446744073709551616u128 into r484;\n    sub r484 r482 into r485;\n    and r485 18446744073709551615u128 into r486;\n    shr r481 64u8 into r487;\n    ternary r483 1u128 0u128 into r488;\n    add r487 r488 into r489;\n    lt r419 r489 into r490;\n    add r419 18446744073709551616u128 into r491;\n    sub r491 r489 into r492;\n    and r492 18446744073709551615u128 into r493;\n    sub.w r450 1u128 into r494;\n    ternary r490 r494 r450 into r495;\n    add r456 r265 into r496;\n    and r496 18446744073709551615u128 into r497;\n    ternary r490 r497 r456 into r498;\n    shr r496 64u8 into r499;\n    ternary r490 r499 0u128 into r500;\n    add r466 r266 into r501;\n    add r501 r500 into r502;\n    and r502 18446744073709551615u128 into r503;\n    ternary r490 r503 r466 into r504;\n    shr r502 64u8 into r505;\n    ternary r490 r505 0u128 into r506;\n    add r476 r267 into r507;\n    add r507 r506 into r508;\n    and r508 18446744073709551615u128 into r509;\n    ternary r490 r509 r476 into r510;\n    shr r508 64u8 into r511;\n    ternary r490 r511 0u128 into r512;\n    add r486 r268 into r513;\n    add r513 r512 into r514;\n    and r514 18446744073709551615u128 into r515;\n    ternary r490 r515 r486 into r516;\n    shr r514 64u8 into r517;\n    ternary r490 r517 0u128 into r518;\n    add r493 r518 into r519;\n    shl r516 64u8 into r520;\n    add r520 r510 into r521;\n    div r521 r268 into r522;\n    gt r522 18446744073709551615u128 into r523;\n    ternary r523 18446744073709551615u128 r522 into r524;\n    mul r524 r268 into r525;\n    sub r521 r525 into r526;\n    lte r526 18446744073709551615u128 into r527;\n    mul r524 r267 into r528;\n    and r526 18446744073709551615u128 into r529;\n    shl r529 64u8 into r530;\n    add r530 r504 into r531;\n    gt r528 r531 into r532;\n    and r527 r532 into r533;\n    sub.w r524 1u128 into r534;\n    ternary r533 r534 r524 into r535;\n    add r526 r268 into r536;\n    ternary r533 r536 r526 into r537;\n    lte r537 18446744073709551615u128 into r538;\n    and r533 r538 into r539;\n    mul r535 r267 into r540;\n    and r537 18446744073709551615u128 into r541;\n    shl r541 64u8 into r542;\n    add r542 r504 into r543;\n    gt r540 r543 into r544;\n    and r539 r544 into r545;\n    sub.w r535 1u128 into r546;\n    ternary r545 r546 r535 into r547;\n    mul r547 r265 into r548;\n    and r548 18446744073709551615u128 into r549;\n    lt r319 r549 into r550;\n    add r319 18446744073709551616u128 into r551;\n    sub r551 r549 into r552;\n    and r552 18446744073709551615u128 into r553;\n    shr r548 64u8 into r554;\n    ternary r550 1u128 0u128 into r555;\n    add r554 r555 into r556;\n    mul r547 r266 into r557;\n    add r557 r556 into r558;\n    and r558 18446744073709551615u128 into r559;\n    lt r498 r559 into r560;\n    add r498 18446744073709551616u128 into r561;\n    sub r561 r559 into r562;\n    and r562 18446744073709551615u128 into r563;\n    shr r558 64u8 into r564;\n    ternary r560 1u128 0u128 into r565;\n    add r564 r565 into r566;\n    mul r547 r267 into r567;\n    add r567 r566 into r568;\n    and r568 18446744073709551615u128 into r569;\n    lt r504 r569 into r570;\n    add r504 18446744073709551616u128 into r571;\n    sub r571 r569 into r572;\n    and r572 18446744073709551615u128 into r573;\n    shr r568 64u8 into r574;\n    ternary r570 1u128 0u128 into r575;\n    add r574 r575 into r576;\n    mul r547 r268 into r577;\n    add r577 r576 into r578;\n    and r578 18446744073709551615u128 into r579;\n    lt r510 r579 into r580;\n    add r510 18446744073709551616u128 into r581;\n    sub r581 r579 into r582;\n    and r582 18446744073709551615u128 into r583;\n    shr r578 64u8 into r584;\n    ternary r580 1u128 0u128 into r585;\n    add r584 r585 into r586;\n    lt r516 r586 into r587;\n    add r516 18446744073709551616u128 into r588;\n    sub r588 r586 into r589;\n    and r589 18446744073709551615u128 into r590;\n    sub.w r547 1u128 into r591;\n    ternary r587 r591 r547 into r592;\n    add r553 r265 into r593;\n    and r593 18446744073709551615u128 into r594;\n    ternary r587 r594 r553 into r595;\n    shr r593 64u8 into r596;\n    ternary r587 r596 0u128 into r597;\n    add r563 r266 into r598;\n    add r598 r597 into r599;\n    and r599 18446744073709551615u128 into r600;\n    ternary r587 r600 r563 into r601;\n    shr r599 64u8 into r602;\n    ternary r587 r602 0u128 into r603;\n    add r573 r267 into r604;\n    add r604 r603 into r605;\n    and r605 18446744073709551615u128 into r606;\n    ternary r587 r606 r573 into r607;\n    shr r605 64u8 into r608;\n    ternary r587 r608 0u128 into r609;\n    add r583 r268 into r610;\n    add r610 r609 into r611;\n    and r611 18446744073709551615u128 into r612;\n    ternary r587 r612 r583 into r613;\n    shr r611 64u8 into r614;\n    ternary r587 r614 0u128 into r615;\n    add r590 r615 into r616;\n    shl r613 64u8 into r617;\n    add r617 r607 into r618;\n    div r618 r268 into r619;\n    gt r619 18446744073709551615u128 into r620;\n    ternary r620 18446744073709551615u128 r619 into r621;\n    mul r621 r268 into r622;\n    sub r618 r622 into r623;\n    lte r623 18446744073709551615u128 into r624;\n    mul r621 r267 into r625;\n    and r623 18446744073709551615u128 into r626;\n    shl r626 64u8 into r627;\n    add r627 r601 into r628;\n    gt r625 r628 into r629;\n    and r624 r629 into r630;\n    sub.w r621 1u128 into r631;\n    ternary r630 r631 r621 into r632;\n    add r623 r268 into r633;\n    ternary r630 r633 r623 into r634;\n    lte r634 18446744073709551615u128 into r635;\n    and r630 r635 into r636;\n    mul r632 r267 into r637;\n    and r634 18446744073709551615u128 into r638;\n    shl r638 64u8 into r639;\n    add r639 r601 into r640;\n    gt r637 r640 into r641;\n    and r636 r641 into r642;\n    sub.w r632 1u128 into r643;\n    ternary r642 r643 r632 into r644;\n    mul r644 r265 into r645;\n    and r645 18446744073709551615u128 into r646;\n    lt r318 r646 into r647;\n    add r318 18446744073709551616u128 into r648;\n    sub r648 r646 into r649;\n    and r649 18446744073709551615u128 into r650;\n    shr r645 64u8 into r651;\n    ternary r647 1u128 0u128 into r652;\n    add r651 r652 into r653;\n    mul r644 r266 into r654;\n    add r654 r653 into r655;\n    and r655 18446744073709551615u128 into r656;\n    lt r595 r656 into r657;\n    add r595 18446744073709551616u128 into r658;\n    sub r658 r656 into r659;\n    and r659 18446744073709551615u128 into r660;\n    shr r655 64u8 into r661;\n    ternary r657 1u128 0u128 into r662;\n    add r661 r662 into r663;\n    mul r644 r267 into r664;\n    add r664 r663 into r665;\n    and r665 18446744073709551615u128 into r666;\n    lt r601 r666 into r667;\n    add r601 18446744073709551616u128 into r668;\n    sub r668 r666 into r669;\n    and r669 18446744073709551615u128 into r670;\n    shr r665 64u8 into r671;\n    ternary r667 1u128 0u128 into r672;\n    add r671 r672 into r673;\n    mul r644 r268 into r674;\n    add r674 r673 into r675;\n    and r675 18446744073709551615u128 into r676;\n    lt r607 r676 into r677;\n    add r607 18446744073709551616u128 into r678;\n    sub r678 r676 into r679;\n    and r679 18446744073709551615u128 into r680;\n    shr r675 64u8 into r681;\n    ternary r677 1u128 0u128 into r682;\n    add r681 r682 into r683;\n    lt r613 r683 into r684;\n    add r613 18446744073709551616u128 into r685;\n    sub r685 r683 into r686;\n    and r686 18446744073709551615u128 into r687;\n    sub.w r644 1u128 into r688;\n    ternary r684 r688 r644 into r689;\n    add r650 r265 into r690;\n    and r690 18446744073709551615u128 into r691;\n    ternary r684 r691 r650 into r692;\n    shr r690 64u8 into r693;\n    ternary r684 r693 0u128 into r694;\n    add r660 r266 into r695;\n    add r695 r694 into r696;\n    and r696 18446744073709551615u128 into r697;\n    ternary r684 r697 r660 into r698;\n    shr r696 64u8 into r699;\n    ternary r684 r699 0u128 into r700;\n    add r670 r267 into r701;\n    add r701 r700 into r702;\n    and r702 18446744073709551615u128 into r703;\n    ternary r684 r703 r670 into r704;\n    shr r702 64u8 into r705;\n    ternary r684 r705 0u128 into r706;\n    add r680 r268 into r707;\n    add r707 r706 into r708;\n    and r708 18446744073709551615u128 into r709;\n    ternary r684 r709 r680 into r710;\n    shr r708 64u8 into r711;\n    ternary r684 r711 0u128 into r712;\n    add r687 r712 into r713;\n    shl r398 64u8 into r714;\n    add r714 r495 into r715;\n    shl r592 64u8 into r716;\n    add r716 r689 into r717;\n    cast r715 r717 into r718 as U256__8JquwLopp8;\n    shl r710 64u8 into r719;\n    add r719 r704 into r720;\n    shl r698 64u8 into r721;\n    add r721 r692 into r722;\n    cast r251 into r723 as u8;\n    is.eq r723 0u8 into r724;\n    sub 128u8 r723 into r725;\n    shl.w r720 r725 into r726;\n    ternary r724 0u128 r726 into r727;\n    shr r722 r723 into r728;\n    or r728 r727 into r729;\n    shr r720 r723 into r730;\n    ternary r261 0u128 r730 into r731;\n    ternary r261 r730 r729 into r732;\n    cast r731 r732 into r733 as U256__8JquwLopp8;\n    is.eq r733.hi 0u128 into r734;\n    is.eq r733.lo 0u128 into r735;\n    and r734 r735 into r736;\n    not r736 into r737;\n    is.eq r718.hi 340282366920938463463374607431768211455u128 into r738;\n    is.eq r718.lo 340282366920938463463374607431768211455u128 into r739;\n    and r738 r739 into r740;\n    and r737 r740 into r741;\n    not r741 into r742;\n    assert.eq r742 true;\n    add.w r718.lo 1u128 into r743;\n    lt r743 r718.lo into r744;\n    ternary r744 1u128 0u128 into r745;\n    add.w r718.hi r745 into r746;\n    cast r746 r743 into r747 as U256__8JquwLopp8;\n    ternary r737 r747.hi r718.hi into r748;\n    ternary r737 r747.lo r718.lo into r749;\n    cast r748 r749 into r750 as U256__8JquwLopp8;\n    and r750.lo 18446744073709551615u128 into r751;\n    shr r750.lo 64u8 into r752;\n    and r751 18446744073709551615u128 into r753;\n    shr r751 64u8 into r754;\n    and r752 18446744073709551615u128 into r755;\n    add r754 r755 into r756;\n    and r756 18446744073709551615u128 into r757;\n    shr r756 64u8 into r758;\n    shr r752 64u8 into r759;\n    add r759 r758 into r760;\n    and r760 18446744073709551615u128 into r761;\n    shr r760 64u8 into r762;\n    shl r762 64u8 into r763;\n    add r763 r761 into r764;\n    shl r757 64u8 into r765;\n    add r765 r753 into r766;\n    shr r750.lo 64u8 into r767;\n    and r750.hi 18446744073709551615u128 into r768;\n    shr r750.hi 64u8 into r769;\n    and r768 18446744073709551615u128 into r770;\n    shr r768 64u8 into r771;\n    and r769 18446744073709551615u128 into r772;\n    add r771 r772 into r773;\n    and r773 18446744073709551615u128 into r774;\n    shr r773 64u8 into r775;\n    shr r769 64u8 into r776;\n    add r776 r775 into r777;\n    and r777 18446744073709551615u128 into r778;\n    shr r777 64u8 into r779;\n    shl r779 64u8 into r780;\n    add r780 r778 into r781;\n    shl r774 64u8 into r782;\n    add r782 r770 into r783;\n    shr r750.hi 64u8 into r784;\n    lt r764 r764 into r785;\n    ternary r785 1u128 0u128 into r786;\n    add.w r764 r783 into r787;\n    lt r787 r764 into r788;\n    ternary r788 1u128 0u128 into r789;\n    add r786 r789 into r790;\n    lt r781 0u128 into r791;\n    ternary r791 1u128 0u128 into r792;\n    lt r781 r781 into r793;\n    ternary r793 1u128 0u128 into r794;\n    add.w r781 r790 into r795;\n    lt r795 r781 into r796;\n    ternary r796 1u128 0u128 into r797;\n    add r792 r794 into r798;\n    add r798 r797 into r799;\n    cast r799 r795 into r800 as U256__8JquwLopp8;\n    cast r787 r766 into r801 as U256__8JquwLopp8;\n    lt r800.hi r118.hi into r802;\n    gt r800.hi r118.hi into r803;\n    lt r800.lo r118.lo into r804;\n    ternary r803 false r804 into r805;\n    ternary r802 true r805 into r806;\n    assert.eq r806 true;\n    gt r118.hi 0u128 into r807;\n    ternary r807 r118.hi r118.lo into r808;\n    ternary r807 128u32 0u32 into r809;\n    gte r808 18446744073709551616u128 into r810;\n    shr r808 64u8 into r811;\n    ternary r810 r811 r808 into r812;\n    ternary r810 64u32 0u32 into r813;\n    gte r812 4294967296u128 into r814;\n    shr r812 32u8 into r815;\n    add r813 32u32 into r816;\n    ternary r814 r815 r812 into r817;\n    ternary r814 r816 r813 into r818;\n    gte r817 65536u128 into r819;\n    shr r817 16u8 into r820;\n    add r818 16u32 into r821;\n    ternary r819 r820 r817 into r822;\n    ternary r819 r821 r818 into r823;\n    gte r822 256u128 into r824;\n    shr r822 8u8 into r825;\n    add r823 8u32 into r826;\n    ternary r824 r825 r822 into r827;\n    ternary r824 r826 r823 into r828;\n    gte r827 16u128 into r829;\n    shr r827 4u8 into r830;\n    add r828 4u32 into r831;\n    ternary r829 r830 r827 into r832;\n    ternary r829 r831 r828 into r833;\n    gte r832 4u128 into r834;\n    shr r832 2u8 into r835;\n    add r833 2u32 into r836;\n    ternary r834 r835 r832 into r837;\n    ternary r834 r836 r833 into r838;\n    gte r837 2u128 into r839;\n    add r838 1u32 into r840;\n    ternary r839 r840 r838 into r841;\n    add r809 r841 into r842;\n    sub 255u32 r842 into r843;\n    cast r843 into r844 as u16;\n    and r844 127u16 into r845;\n    cast r845 into r846 as u8;\n    is.eq r846 0u8 into r847;\n    sub 128u8 r846 into r848;\n    shr.w r118.lo r848 into r849;\n    ternary r847 0u128 r849 into r850;\n    shl.w r118.hi r846 into r851;\n    or r851 r850 into r852;\n    shl.w r118.lo r846 into r853;\n    shl.w r118.lo r846 into r854;\n    gte r844 128u16 into r855;\n    ternary r855 r854 r852 into r856;\n    ternary r855 0u128 r853 into r857;\n    cast r856 r857 into r858 as U256__8JquwLopp8;\n    and r858.lo 18446744073709551615u128 into r859;\n    shr r858.lo 64u8 into r860;\n    and r858.hi 18446744073709551615u128 into r861;\n    shr r858.hi 64u8 into r862;\n    cast r845 into r863 as u8;\n    is.eq r863 0u8 into r864;\n    sub 128u8 r863 into r865;\n    shr.w r801.lo r865 into r866;\n    ternary r864 0u128 r866 into r867;\n    shl.w r801.hi r863 into r868;\n    or r868 r867 into r869;\n    shl.w r801.lo r863 into r870;\n    shl.w r801.lo r863 into r871;\n    ternary r855 r871 r869 into r872;\n    ternary r855 0u128 r870 into r873;\n    cast r872 r873 into r874 as U256__8JquwLopp8;\n    is.eq r844 0u16 into r875;\n    sub 256u16 r844 into r876;\n    and r876 127u16 into r877;\n    cast r877 into r878 as u8;\n    is.eq r878 0u8 into r879;\n    sub 128u8 r878 into r880;\n    shl.w r801.hi r880 into r881;\n    ternary r879 0u128 r881 into r882;\n    shr r801.lo r878 into r883;\n    or r883 r882 into r884;\n    shr r801.hi r878 into r885;\n    shr r801.hi r878 into r886;\n    gte r876 128u16 into r887;\n    ternary r887 0u128 r885 into r888;\n    ternary r887 r886 r884 into r889;\n    cast r888 r889 into r890 as U256__8JquwLopp8;\n    ternary r875 0u128 r890.hi into r891;\n    ternary r875 0u128 r890.lo into r892;\n    cast r891 r892 into r893 as U256__8JquwLopp8;\n    cast r845 into r894 as u8;\n    is.eq r894 0u8 into r895;\n    sub 128u8 r894 into r896;\n    shr.w r800.lo r896 into r897;\n    ternary r895 0u128 r897 into r898;\n    shl.w r800.hi r894 into r899;\n    or r899 r898 into r900;\n    shl.w r800.lo r894 into r901;\n    shl.w r800.lo r894 into r902;\n    ternary r855 r902 r900 into r903;\n    ternary r855 0u128 r901 into r904;\n    cast r903 r904 into r905 as U256__8JquwLopp8;\n    add.w r905.lo r893.lo into r906;\n    lt r906 r905.lo into r907;\n    ternary r907 1u128 0u128 into r908;\n    add.w r905.hi r893.hi into r909;\n    add.w r909 r908 into r910;\n    cast r910 r906 into r911 as U256__8JquwLopp8;\n    and r874.lo 18446744073709551615u128 into r912;\n    shr r874.lo 64u8 into r913;\n    and r874.hi 18446744073709551615u128 into r914;\n    shr r874.hi 64u8 into r915;\n    and r911.lo 18446744073709551615u128 into r916;\n    shr r911.lo 64u8 into r917;\n    and r911.hi 18446744073709551615u128 into r918;\n    shr r911.hi 64u8 into r919;\n    shl r919 64u8 into r920;\n    add r920 r918 into r921;\n    div r921 r862 into r922;\n    gt r922 18446744073709551615u128 into r923;\n    ternary r923 18446744073709551615u128 r922 into r924;\n    mul r924 r862 into r925;\n    sub r921 r925 into r926;\n    lte r926 18446744073709551615u128 into r927;\n    mul r924 r861 into r928;\n    and r926 18446744073709551615u128 into r929;\n    shl r929 64u8 into r930;\n    add r930 r917 into r931;\n    gt r928 r931 into r932;\n    and r927 r932 into r933;\n    sub.w r924 1u128 into r934;\n    ternary r933 r934 r924 into r935;\n    add r926 r862 into r936;\n    ternary r933 r936 r926 into r937;\n    lte r937 18446744073709551615u128 into r938;\n    and r933 r938 into r939;\n    mul r935 r861 into r940;\n    and r937 18446744073709551615u128 into r941;\n    shl r941 64u8 into r942;\n    add r942 r917 into r943;\n    gt r940 r943 into r944;\n    and r939 r944 into r945;\n    sub.w r935 1u128 into r946;\n    ternary r945 r946 r935 into r947;\n    mul r947 r859 into r948;\n    and r948 18446744073709551615u128 into r949;\n    lt r915 r949 into r950;\n    add r915 18446744073709551616u128 into r951;\n    sub r951 r949 into r952;\n    and r952 18446744073709551615u128 into r953;\n    shr r948 64u8 into r954;\n    ternary r950 1u128 0u128 into r955;\n    add r954 r955 into r956;\n    mul r947 r860 into r957;\n    add r957 r956 into r958;\n    and r958 18446744073709551615u128 into r959;\n    lt r916 r959 into r960;\n    add r916 18446744073709551616u128 into r961;\n    sub r961 r959 into r962;\n    and r962 18446744073709551615u128 into r963;\n    shr r958 64u8 into r964;\n    ternary r960 1u128 0u128 into r965;\n    add r964 r965 into r966;\n    mul r947 r861 into r967;\n    add r967 r966 into r968;\n    and r968 18446744073709551615u128 into r969;\n    lt r917 r969 into r970;\n    add r917 18446744073709551616u128 into r971;\n    sub r971 r969 into r972;\n    and r972 18446744073709551615u128 into r973;\n    shr r968 64u8 into r974;\n    ternary r970 1u128 0u128 into r975;\n    add r974 r975 into r976;\n    mul r947 r862 into r977;\n    add r977 r976 into r978;\n    and r978 18446744073709551615u128 into r979;\n    lt r918 r979 into r980;\n    add r918 18446744073709551616u128 into r981;\n    sub r981 r979 into r982;\n    and r982 18446744073709551615u128 into r983;\n    shr r978 64u8 into r984;\n    ternary r980 1u128 0u128 into r985;\n    add r984 r985 into r986;\n    lt r919 r986 into r987;\n    add r919 18446744073709551616u128 into r988;\n    sub r988 r986 into r989;\n    and r989 18446744073709551615u128 into r990;\n    sub.w r947 1u128 into r991;\n    ternary r987 r991 r947 into r992;\n    add r953 r859 into r993;\n    and r993 18446744073709551615u128 into r994;\n    ternary r987 r994 r953 into r995;\n    shr r993 64u8 into r996;\n    ternary r987 r996 0u128 into r997;\n    add r963 r860 into r998;\n    add r998 r997 into r999;\n    and r999 18446744073709551615u128 into r1000;\n    ternary r987 r1000 r963 into r1001;\n    shr r999 64u8 into r1002;\n    ternary r987 r1002 0u128 into r1003;\n    add r973 r861 into r1004;\n    add r1004 r1003 into r1005;\n    and r1005 18446744073709551615u128 into r1006;\n    ternary r987 r1006 r973 into r1007;\n    shr r1005 64u8 into r1008;\n    ternary r987 r1008 0u128 into r1009;\n    add r983 r862 into r1010;\n    add r1010 r1009 into r1011;\n    and r1011 18446744073709551615u128 into r1012;\n    ternary r987 r1012 r983 into r1013;\n    shr r1011 64u8 into r1014;\n    ternary r987 r1014 0u128 into r1015;\n    add r990 r1015 into r1016;\n    shl r1013 64u8 into r1017;\n    add r1017 r1007 into r1018;\n    div r1018 r862 into r1019;\n    gt r1019 18446744073709551615u128 into r1020;\n    ternary r1020 18446744073709551615u128 r1019 into r1021;\n    mul r1021 r862 into r1022;\n    sub r1018 r1022 into r1023;\n    lte r1023 18446744073709551615u128 into r1024;\n    mul r1021 r861 into r1025;\n    and r1023 18446744073709551615u128 into r1026;\n    shl r1026 64u8 into r1027;\n    add r1027 r1001 into r1028;\n    gt r1025 r1028 into r1029;\n    and r1024 r1029 into r1030;\n    sub.w r1021 1u128 into r1031;\n    ternary r1030 r1031 r1021 into r1032;\n    add r1023 r862 into r1033;\n    ternary r1030 r1033 r1023 into r1034;\n    lte r1034 18446744073709551615u128 into r1035;\n    and r1030 r1035 into r1036;\n    mul r1032 r861 into r1037;\n    and r1034 18446744073709551615u128 into r1038;\n    shl r1038 64u8 into r1039;\n    add r1039 r1001 into r1040;\n    gt r1037 r1040 into r1041;\n    and r1036 r1041 into r1042;\n    sub.w r1032 1u128 into r1043;\n    ternary r1042 r1043 r1032 into r1044;\n    mul r1044 r859 into r1045;\n    and r1045 18446744073709551615u128 into r1046;\n    lt r914 r1046 into r1047;\n    add r914 18446744073709551616u128 into r1048;\n    sub r1048 r1046 into r1049;\n    and r1049 18446744073709551615u128 into r1050;\n    shr r1045 64u8 into r1051;\n    ternary r1047 1u128 0u128 into r1052;\n    add r1051 r1052 into r1053;\n    mul r1044 r860 into r1054;\n    add r1054 r1053 into r1055;\n    and r1055 18446744073709551615u128 into r1056;\n    lt r995 r1056 into r1057;\n    add r995 18446744073709551616u128 into r1058;\n    sub r1058 r1056 into r1059;\n    and r1059 18446744073709551615u128 into r1060;\n    shr r1055 64u8 into r1061;\n    ternary r1057 1u128 0u128 into r1062;\n    add r1061 r1062 into r1063;\n    mul r1044 r861 into r1064;\n    add r1064 r1063 into r1065;\n    and r1065 18446744073709551615u128 into r1066;\n    lt r1001 r1066 into r1067;\n    add r1001 18446744073709551616u128 into r1068;\n    sub r1068 r1066 into r1069;\n    and r1069 18446744073709551615u128 into r1070;\n    shr r1065 64u8 into r1071;\n    ternary r1067 1u128 0u128 into r1072;\n    add r1071 r1072 into r1073;\n    mul r1044 r862 into r1074;\n    add r1074 r1073 into r1075;\n    and r1075 18446744073709551615u128 into r1076;\n    lt r1007 r1076 into r1077;\n    add r1007 18446744073709551616u128 into r1078;\n    sub r1078 r1076 into r1079;\n    and r1079 18446744073709551615u128 into r1080;\n    shr r1075 64u8 into r1081;\n    ternary r1077 1u128 0u128 into r1082;\n    add r1081 r1082 into r1083;\n    lt r1013 r1083 into r1084;\n    add r1013 18446744073709551616u128 into r1085;\n    sub r1085 r1083 into r1086;\n    and r1086 18446744073709551615u128 into r1087;\n    sub.w r1044 1u128 into r1088;\n    ternary r1084 r1088 r1044 into r1089;\n    add r1050 r859 into r1090;\n    and r1090 18446744073709551615u128 into r1091;\n    ternary r1084 r1091 r1050 into r1092;\n    shr r1090 64u8 into r1093;\n    ternary r1084 r1093 0u128 into r1094;\n    add r1060 r860 into r1095;\n    add r1095 r1094 into r1096;\n    and r1096 18446744073709551615u128 into r1097;\n    ternary r1084 r1097 r1060 into r1098;\n    shr r1096 64u8 into r1099;\n    ternary r1084 r1099 0u128 into r1100;\n    add r1070 r861 into r1101;\n    add r1101 r1100 into r1102;\n    and r1102 18446744073709551615u128 into r1103;\n    ternary r1084 r1103 r1070 into r1104;\n    shr r1102 64u8 into r1105;\n    ternary r1084 r1105 0u128 into r1106;\n    add r1080 r862 into r1107;\n    add r1107 r1106 into r1108;\n    and r1108 18446744073709551615u128 into r1109;\n    ternary r1084 r1109 r1080 into r1110;\n    shr r1108 64u8 into r1111;\n    ternary r1084 r1111 0u128 into r1112;\n    add r1087 r1112 into r1113;\n    shl r1110 64u8 into r1114;\n    add r1114 r1104 into r1115;\n    div r1115 r862 into r1116;\n    gt r1116 18446744073709551615u128 into r1117;\n    ternary r1117 18446744073709551615u128 r1116 into r1118;\n    mul r1118 r862 into r1119;\n    sub r1115 r1119 into r1120;\n    lte r1120 18446744073709551615u128 into r1121;\n    mul r1118 r861 into r1122;\n    and r1120 18446744073709551615u128 into r1123;\n    shl r1123 64u8 into r1124;\n    add r1124 r1098 into r1125;\n    gt r1122 r1125 into r1126;\n    and r1121 r1126 into r1127;\n    sub.w r1118 1u128 into r1128;\n    ternary r1127 r1128 r1118 into r1129;\n    add r1120 r862 into r1130;\n    ternary r1127 r1130 r1120 into r1131;\n    lte r1131 18446744073709551615u128 into r1132;\n    and r1127 r1132 into r1133;\n    mul r1129 r861 into r1134;\n    and r1131 18446744073709551615u128 into r1135;\n    shl r1135 64u8 into r1136;\n    add r1136 r1098 into r1137;\n    gt r1134 r1137 into r1138;\n    and r1133 r1138 into r1139;\n    sub.w r1129 1u128 into r1140;\n    ternary r1139 r1140 r1129 into r1141;\n    mul r1141 r859 into r1142;\n    and r1142 18446744073709551615u128 into r1143;\n    lt r913 r1143 into r1144;\n    add r913 18446744073709551616u128 into r1145;\n    sub r1145 r1143 into r1146;\n    and r1146 18446744073709551615u128 into r1147;\n    shr r1142 64u8 into r1148;\n    ternary r1144 1u128 0u128 into r1149;\n    add r1148 r1149 into r1150;\n    mul r1141 r860 into r1151;\n    add r1151 r1150 into r1152;\n    and r1152 18446744073709551615u128 into r1153;\n    lt r1092 r1153 into r1154;\n    add r1092 18446744073709551616u128 into r1155;\n    sub r1155 r1153 into r1156;\n    and r1156 18446744073709551615u128 into r1157;\n    shr r1152 64u8 into r1158;\n    ternary r1154 1u128 0u128 into r1159;\n    add r1158 r1159 into r1160;\n    mul r1141 r861 into r1161;\n    add r1161 r1160 into r1162;\n    and r1162 18446744073709551615u128 into r1163;\n    lt r1098 r1163 into r1164;\n    add r1098 18446744073709551616u128 into r1165;\n    sub r1165 r1163 into r1166;\n    and r1166 18446744073709551615u128 into r1167;\n    shr r1162 64u8 into r1168;\n    ternary r1164 1u128 0u128 into r1169;\n    add r1168 r1169 into r1170;\n    mul r1141 r862 into r1171;\n    add r1171 r1170 into r1172;\n    and r1172 18446744073709551615u128 into r1173;\n    lt r1104 r1173 into r1174;\n    add r1104 18446744073709551616u128 into r1175;\n    sub r1175 r1173 into r1176;\n    and r1176 18446744073709551615u128 into r1177;\n    shr r1172 64u8 into r1178;\n    ternary r1174 1u128 0u128 into r1179;\n    add r1178 r1179 into r1180;\n    lt r1110 r1180 into r1181;\n    add r1110 18446744073709551616u128 into r1182;\n    sub r1182 r1180 into r1183;\n    and r1183 18446744073709551615u128 into r1184;\n    sub.w r1141 1u128 into r1185;\n    ternary r1181 r1185 r1141 into r1186;\n    add r1147 r859 into r1187;\n    and r1187 18446744073709551615u128 into r1188;\n    ternary r1181 r1188 r1147 into r1189;\n    shr r1187 64u8 into r1190;\n    ternary r1181 r1190 0u128 into r1191;\n    add r1157 r860 into r1192;\n    add r1192 r1191 into r1193;\n    and r1193 18446744073709551615u128 into r1194;\n    ternary r1181 r1194 r1157 into r1195;\n    shr r1193 64u8 into r1196;\n    ternary r1181 r1196 0u128 into r1197;\n    add r1167 r861 into r1198;\n    add r1198 r1197 into r1199;\n    and r1199 18446744073709551615u128 into r1200;\n    ternary r1181 r1200 r1167 into r1201;\n    shr r1199 64u8 into r1202;\n    ternary r1181 r1202 0u128 into r1203;\n    add r1177 r862 into r1204;\n    add r1204 r1203 into r1205;\n    and r1205 18446744073709551615u128 into r1206;\n    ternary r1181 r1206 r1177 into r1207;\n    shr r1205 64u8 into r1208;\n    ternary r1181 r1208 0u128 into r1209;\n    add r1184 r1209 into r1210;\n    shl r1207 64u8 into r1211;\n    add r1211 r1201 into r1212;\n    div r1212 r862 into r1213;\n    gt r1213 18446744073709551615u128 into r1214;\n    ternary r1214 18446744073709551615u128 r1213 into r1215;\n    mul r1215 r862 into r1216;\n    sub r1212 r1216 into r1217;\n    lte r1217 18446744073709551615u128 into r1218;\n    mul r1215 r861 into r1219;\n    and r1217 18446744073709551615u128 into r1220;\n    shl r1220 64u8 into r1221;\n    add r1221 r1195 into r1222;\n    gt r1219 r1222 into r1223;\n    and r1218 r1223 into r1224;\n    sub.w r1215 1u128 into r1225;\n    ternary r1224 r1225 r1215 into r1226;\n    add r1217 r862 into r1227;\n    ternary r1224 r1227 r1217 into r1228;\n    lte r1228 18446744073709551615u128 into r1229;\n    and r1224 r1229 into r1230;\n    mul r1226 r861 into r1231;\n    and r1228 18446744073709551615u128 into r1232;\n    shl r1232 64u8 into r1233;\n    add r1233 r1195 into r1234;\n    gt r1231 r1234 into r1235;\n    and r1230 r1235 into r1236;\n    sub.w r1226 1u128 into r1237;\n    ternary r1236 r1237 r1226 into r1238;\n    mul r1238 r859 into r1239;\n    and r1239 18446744073709551615u128 into r1240;\n    lt r912 r1240 into r1241;\n    add r912 18446744073709551616u128 into r1242;\n    sub r1242 r1240 into r1243;\n    and r1243 18446744073709551615u128 into r1244;\n    shr r1239 64u8 into r1245;\n    ternary r1241 1u128 0u128 into r1246;\n    add r1245 r1246 into r1247;\n    mul r1238 r860 into r1248;\n    add r1248 r1247 into r1249;\n    and r1249 18446744073709551615u128 into r1250;\n    lt r1189 r1250 into r1251;\n    add r1189 18446744073709551616u128 into r1252;\n    sub r1252 r1250 into r1253;\n    and r1253 18446744073709551615u128 into r1254;\n    shr r1249 64u8 into r1255;\n    ternary r1251 1u128 0u128 into r1256;\n    add r1255 r1256 into r1257;\n    mul r1238 r861 into r1258;\n    add r1258 r1257 into r1259;\n    and r1259 18446744073709551615u128 into r1260;\n    lt r1195 r1260 into r1261;\n    add r1195 18446744073709551616u128 into r1262;\n    sub r1262 r1260 into r1263;\n    and r1263 18446744073709551615u128 into r1264;\n    shr r1259 64u8 into r1265;\n    ternary r1261 1u128 0u128 into r1266;\n    add r1265 r1266 into r1267;\n    mul r1238 r862 into r1268;\n    add r1268 r1267 into r1269;\n    and r1269 18446744073709551615u128 into r1270;\n    lt r1201 r1270 into r1271;\n    add r1201 18446744073709551616u128 into r1272;\n    sub r1272 r1270 into r1273;\n    and r1273 18446744073709551615u128 into r1274;\n    shr r1269 64u8 into r1275;\n    ternary r1271 1u128 0u128 into r1276;\n    add r1275 r1276 into r1277;\n    lt r1207 r1277 into r1278;\n    add r1207 18446744073709551616u128 into r1279;\n    sub r1279 r1277 into r1280;\n    and r1280 18446744073709551615u128 into r1281;\n    sub.w r1238 1u128 into r1282;\n    ternary r1278 r1282 r1238 into r1283;\n    add r1244 r859 into r1284;\n    and r1284 18446744073709551615u128 into r1285;\n    ternary r1278 r1285 r1244 into r1286;\n    shr r1284 64u8 into r1287;\n    ternary r1278 r1287 0u128 into r1288;\n    add r1254 r860 into r1289;\n    add r1289 r1288 into r1290;\n    and r1290 18446744073709551615u128 into r1291;\n    ternary r1278 r1291 r1254 into r1292;\n    shr r1290 64u8 into r1293;\n    ternary r1278 r1293 0u128 into r1294;\n    add r1264 r861 into r1295;\n    add r1295 r1294 into r1296;\n    and r1296 18446744073709551615u128 into r1297;\n    ternary r1278 r1297 r1264 into r1298;\n    shr r1296 64u8 into r1299;\n    ternary r1278 r1299 0u128 into r1300;\n    add r1274 r862 into r1301;\n    add r1301 r1300 into r1302;\n    and r1302 18446744073709551615u128 into r1303;\n    ternary r1278 r1303 r1274 into r1304;\n    shr r1302 64u8 into r1305;\n    ternary r1278 r1305 0u128 into r1306;\n    add r1281 r1306 into r1307;\n    shl r992 64u8 into r1308;\n    add r1308 r1089 into r1309;\n    shl r1186 64u8 into r1310;\n    add r1310 r1283 into r1311;\n    cast r1309 r1311 into r1312 as U256__8JquwLopp8;\n    shl r1304 64u8 into r1313;\n    add r1313 r1298 into r1314;\n    shl r1292 64u8 into r1315;\n    add r1315 r1286 into r1316;\n    cast r845 into r1317 as u8;\n    is.eq r1317 0u8 into r1318;\n    sub 128u8 r1317 into r1319;\n    shl.w r1314 r1319 into r1320;\n    ternary r1318 0u128 r1320 into r1321;\n    shr r1316 r1317 into r1322;\n    or r1322 r1321 into r1323;\n    shr r1314 r1317 into r1324;\n    ternary r855 0u128 r1324 into r1325;\n    ternary r855 r1324 r1323 into r1326;\n    cast r1325 r1326 into r1327 as U256__8JquwLopp8;\n    is.eq r1327.hi 0u128 into r1328;\n    is.eq r1327.lo 0u128 into r1329;\n    and r1328 r1329 into r1330;\n    not r1330 into r1331;\n    is.eq r1312.hi 340282366920938463463374607431768211455u128 into r1332;\n    is.eq r1312.lo 340282366920938463463374607431768211455u128 into r1333;\n    and r1332 r1333 into r1334;\n    and r1331 r1334 into r1335;\n    not r1335 into r1336;\n    assert.eq r1336 true;\n    add.w r1312.lo 1u128 into r1337;\n    lt r1337 r1312.lo into r1338;\n    ternary r1338 1u128 0u128 into r1339;\n    add.w r1312.hi r1339 into r1340;\n    cast r1340 r1337 into r1341 as U256__8JquwLopp8;\n    ternary r1331 r1341.hi r1312.hi into r1342;\n    ternary r1331 r1341.lo r1312.lo into r1343;\n    cast r1342 r1343 into r1344 as U256__8JquwLopp8;\n    is.neq r1344.hi 0u128 into r1345;\n    lt r0.hi r29.hi into r1346;\n    gt r0.hi r29.hi into r1347;\n    lt r0.lo r29.lo into r1348;\n    ternary r1347 false r1348 into r1349;\n    ternary r1346 true r1349 into r1350;\n    ternary r1350 r0.hi r29.hi into r1351;\n    ternary r1350 r0.lo r29.lo into r1352;\n    cast r1351 r1352 into r1353 as U256__8JquwLopp8;\n    lt r0.hi r29.hi into r1354;\n    gt r0.hi r29.hi into r1355;\n    lt r0.lo r29.lo into r1356;\n    ternary r1355 false r1356 into r1357;\n    ternary r1354 true r1357 into r1358;\n    ternary r1358 r29.hi r0.hi into r1359;\n    ternary r1358 r29.lo r0.lo into r1360;\n    cast r1359 r1360 into r1361 as U256__8JquwLopp8;\n    lt r1361.lo r1353.lo into r1362;\n    ternary r1362 1u128 0u128 into r1363;\n    sub.w r1361.lo r1353.lo into r1364;\n    sub.w r1361.hi r1353.hi into r1365;\n    sub.w r1365 r1363 into r1366;\n    cast r1366 r1364 into r1367 as U256__8JquwLopp8;\n    cast 0u128 r1 into r1368 as U256__8JquwLopp8;\n    and r1368.lo 18446744073709551615u128 into r1369;\n    shr r1368.lo 64u8 into r1370;\n    and r1367.lo 18446744073709551615u128 into r1371;\n    shr r1367.lo 64u8 into r1372;\n    mul r1369 r1371 into r1373;\n    mul r1369 r1372 into r1374;\n    mul r1370 r1371 into r1375;\n    mul r1370 r1372 into r1376;\n    and r1373 18446744073709551615u128 into r1377;\n    shr r1373 64u8 into r1378;\n    and r1374 18446744073709551615u128 into r1379;\n    add r1378 r1379 into r1380;\n    and r1375 18446744073709551615u128 into r1381;\n    add r1380 r1381 into r1382;\n    and r1382 18446744073709551615u128 into r1383;\n    shr r1382 64u8 into r1384;\n    shr r1374 64u8 into r1385;\n    shr r1375 64u8 into r1386;\n    add r1385 r1386 into r1387;\n    and r1376 18446744073709551615u128 into r1388;\n    add r1387 r1388 into r1389;\n    add r1389 r1384 into r1390;\n    and r1390 18446744073709551615u128 into r1391;\n    shr r1390 64u8 into r1392;\n    shr r1376 64u8 into r1393;\n    add r1393 r1392 into r1394;\n    shl r1394 64u8 into r1395;\n    add r1395 r1391 into r1396;\n    shl r1383 64u8 into r1397;\n    add r1397 r1377 into r1398;\n    and r1368.lo 18446744073709551615u128 into r1399;\n    shr r1368.lo 64u8 into r1400;\n    and r1367.hi 18446744073709551615u128 into r1401;\n    shr r1367.hi 64u8 into r1402;\n    mul r1399 r1401 into r1403;\n    mul r1399 r1402 into r1404;\n    mul r1400 r1401 into r1405;\n    mul r1400 r1402 into r1406;\n    and r1403 18446744073709551615u128 into r1407;\n    shr r1403 64u8 into r1408;\n    and r1404 18446744073709551615u128 into r1409;\n    add r1408 r1409 into r1410;\n    and r1405 18446744073709551615u128 into r1411;\n    add r1410 r1411 into r1412;\n    and r1412 18446744073709551615u128 into r1413;\n    shr r1412 64u8 into r1414;\n    shr r1404 64u8 into r1415;\n    shr r1405 64u8 into r1416;\n    add r1415 r1416 into r1417;\n    and r1406 18446744073709551615u128 into r1418;\n    add r1417 r1418 into r1419;\n    add r1419 r1414 into r1420;\n    and r1420 18446744073709551615u128 into r1421;\n    shr r1420 64u8 into r1422;\n    shr r1406 64u8 into r1423;\n    add r1423 r1422 into r1424;\n    shl r1424 64u8 into r1425;\n    add r1425 r1421 into r1426;\n    shl r1413 64u8 into r1427;\n    add r1427 r1407 into r1428;\n    and r1368.hi 18446744073709551615u128 into r1429;\n    shr r1368.hi 64u8 into r1430;\n    and r1367.lo 18446744073709551615u128 into r1431;\n    shr r1367.lo 64u8 into r1432;\n    mul r1429 r1431 into r1433;\n    mul r1429 r1432 into r1434;\n    mul r1430 r1431 into r1435;\n    mul r1430 r1432 into r1436;\n    and r1433 18446744073709551615u128 into r1437;\n    shr r1433 64u8 into r1438;\n    and r1434 18446744073709551615u128 into r1439;\n    add r1438 r1439 into r1440;\n    and r1435 18446744073709551615u128 into r1441;\n    add r1440 r1441 into r1442;\n    and r1442 18446744073709551615u128 into r1443;\n    shr r1442 64u8 into r1444;\n    shr r1434 64u8 into r1445;\n    shr r1435 64u8 into r1446;\n    add r1445 r1446 into r1447;\n    and r1436 18446744073709551615u128 into r1448;\n    add r1447 r1448 into r1449;\n    add r1449 r1444 into r1450;\n    and r1450 18446744073709551615u128 into r1451;\n    shr r1450 64u8 into r1452;\n    shr r1436 64u8 into r1453;\n    add r1453 r1452 into r1454;\n    shl r1454 64u8 into r1455;\n    add r1455 r1451 into r1456;\n    shl r1443 64u8 into r1457;\n    add r1457 r1437 into r1458;\n    and r1368.hi 18446744073709551615u128 into r1459;\n    shr r1368.hi 64u8 into r1460;\n    and r1367.hi 18446744073709551615u128 into r1461;\n    shr r1367.hi 64u8 into r1462;\n    mul r1459 r1461 into r1463;\n    mul r1459 r1462 into r1464;\n    mul r1460 r1461 into r1465;\n    mul r1460 r1462 into r1466;\n    and r1463 18446744073709551615u128 into r1467;\n    shr r1463 64u8 into r1468;\n    and r1464 18446744073709551615u128 into r1469;\n    add r1468 r1469 into r1470;\n    and r1465 18446744073709551615u128 into r1471;\n    add r1470 r1471 into r1472;\n    and r1472 18446744073709551615u128 into r1473;\n    shr r1472 64u8 into r1474;\n    shr r1464 64u8 into r1475;\n    shr r1465 64u8 into r1476;\n    add r1475 r1476 into r1477;\n    and r1466 18446744073709551615u128 into r1478;\n    add r1477 r1478 into r1479;\n    add r1479 r1474 into r1480;\n    and r1480 18446744073709551615u128 into r1481;\n    shr r1480 64u8 into r1482;\n    shr r1466 64u8 into r1483;\n    add r1483 r1482 into r1484;\n    shl r1484 64u8 into r1485;\n    add r1485 r1481 into r1486;\n    shl r1473 64u8 into r1487;\n    add r1487 r1467 into r1488;\n    add.w r1396 r1428 into r1489;\n    lt r1489 r1396 into r1490;\n    ternary r1490 1u128 0u128 into r1491;\n    add.w r1489 r1458 into r1492;\n    lt r1492 r1489 into r1493;\n    ternary r1493 1u128 0u128 into r1494;\n    add r1491 r1494 into r1495;\n    add.w r1426 r1456 into r1496;\n    lt r1496 r1426 into r1497;\n    ternary r1497 1u128 0u128 into r1498;\n    add.w r1496 r1488 into r1499;\n    lt r1499 r1496 into r1500;\n    ternary r1500 1u128 0u128 into r1501;\n    add.w r1499 r1495 into r1502;\n    lt r1502 r1499 into r1503;\n    ternary r1503 1u128 0u128 into r1504;\n    add r1498 r1501 into r1505;\n    add r1505 r1504 into r1506;\n    add.w r1486 r1506 into r1507;\n    cast r1507 r1502 into r1508 as U256__8JquwLopp8;\n    cast r1492 r1398 into r1509 as U256__8JquwLopp8;\n    gt r1509.lo 0u128 into r1510;\n    is.eq r1509.hi 340282366920938463463374607431768211455u128 into r1511;\n    and r1510 r1511 into r1512;\n    is.neq r1508.hi 0u128 into r1513;\n    is.neq r1508.lo 0u128 into r1514;\n    or r1513 r1514 into r1515;\n    or r1515 r1512 into r1516;\n    gt r1509.lo 0u128 into r1517;\n    lt r1509.hi 340282366920938463463374607431768211455u128 into r1518;\n    and r1517 r1518 into r1519;\n    add.w r1509.hi 1u128 into r1520;\n    ternary r1519 r1520 r1509.hi into r1521;\n    ternary r10 r1344.lo r1521 into r1522;\n    ternary r10 r1345 r1516 into r1523;\n    not r1523 into r1524;\n    gte r109 r1522 into r1525;\n    and r1524 r1525 into r1526;\n    not r10 into r1527;\n    and r1527 r32 into r1528;\n    and r1528 r1526 into r1529;\n    lt r29.lo 1u128 into r1530;\n    ternary r1530 1u128 0u128 into r1531;\n    sub.w r29.lo 1u128 into r1532;\n    sub.w r29.hi r1531 into r1533;\n    cast r1533 r1532 into r1534 as U256__8JquwLopp8;\n    ternary r1529 r1534.hi r29.hi into r1535;\n    ternary r1529 r1534.lo r29.lo into r1536;\n    cast r1535 r1536 into r1537 as U256__8JquwLopp8;\n    gt r1 0u128 into r1538;\n    ternary r1538 r1 1u128 into r1539;\n    is.eq r109 0u128 into r1540;\n    cast 0u128 r1539 into r1541 as U256__8JquwLopp8;\n    shr r1541.lo 64u8 into r1542;\n    and r1541.lo 18446744073709551615u128 into r1543;\n    shr r1541.lo 64u8 into r1544;\n    and r1543 18446744073709551615u128 into r1545;\n    shr r1543 64u8 into r1546;\n    and r1544 18446744073709551615u128 into r1547;\n    add r1546 r1547 into r1548;\n    and r1548 18446744073709551615u128 into r1549;\n    shr r1548 64u8 into r1550;\n    shr r1544 64u8 into r1551;\n    add r1551 r1550 into r1552;\n    and r1552 18446744073709551615u128 into r1553;\n    shr r1552 64u8 into r1554;\n    shl r1554 64u8 into r1555;\n    add r1555 r1553 into r1556;\n    shl r1549 64u8 into r1557;\n    add r1557 r1545 into r1558;\n    shr r1541.hi 64u8 into r1559;\n    and r1541.hi 18446744073709551615u128 into r1560;\n    shr r1541.hi 64u8 into r1561;\n    and r1560 18446744073709551615u128 into r1562;\n    shr r1560 64u8 into r1563;\n    and r1561 18446744073709551615u128 into r1564;\n    add r1563 r1564 into r1565;\n    and r1565 18446744073709551615u128 into r1566;\n    shr r1565 64u8 into r1567;\n    shr r1561 64u8 into r1568;\n    add r1568 r1567 into r1569;\n    and r1569 18446744073709551615u128 into r1570;\n    shr r1569 64u8 into r1571;\n    shl r1571 64u8 into r1572;\n    add r1572 r1570 into r1573;\n    shl r1566 64u8 into r1574;\n    add r1574 r1562 into r1575;\n    lt r1558 0u128 into r1576;\n    ternary r1576 1u128 0u128 into r1577;\n    lt r1558 r1558 into r1578;\n    ternary r1578 1u128 0u128 into r1579;\n    add r1577 r1579 into r1580;\n    lt r1556 r1556 into r1581;\n    ternary r1581 1u128 0u128 into r1582;\n    add.w r1556 r1575 into r1583;\n    lt r1583 r1556 into r1584;\n    ternary r1584 1u128 0u128 into r1585;\n    add.w r1583 r1580 into r1586;\n    lt r1586 r1583 into r1587;\n    ternary r1587 1u128 0u128 into r1588;\n    add r1582 r1585 into r1589;\n    add r1589 r1588 into r1590;\n    add.w r1573 r1590 into r1591;\n    cast r1591 r1586 into r1592 as U256__8JquwLopp8;\n    cast r1558 0u128 into r1593 as U256__8JquwLopp8;\n    lt r1592.hi r0.hi into r1594;\n    gt r1592.hi r0.hi into r1595;\n    lt r1592.lo r0.lo into r1596;\n    ternary r1595 false r1596 into r1597;\n    ternary r1594 true r1597 into r1598;\n    assert.eq r1598 true;\n    gt r0.hi 0u128 into r1599;\n    ternary r1599 r0.hi r0.lo into r1600;\n    ternary r1599 128u32 0u32 into r1601;\n    gte r1600 18446744073709551616u128 into r1602;\n    shr r1600 64u8 into r1603;\n    ternary r1602 r1603 r1600 into r1604;\n    ternary r1602 64u32 0u32 into r1605;\n    gte r1604 4294967296u128 into r1606;\n    shr r1604 32u8 into r1607;\n    add r1605 32u32 into r1608;\n    ternary r1606 r1607 r1604 into r1609;\n    ternary r1606 r1608 r1605 into r1610;\n    gte r1609 65536u128 into r1611;\n    shr r1609 16u8 into r1612;\n    add r1610 16u32 into r1613;\n    ternary r1611 r1612 r1609 into r1614;\n    ternary r1611 r1613 r1610 into r1615;\n    gte r1614 256u128 into r1616;\n    shr r1614 8u8 into r1617;\n    add r1615 8u32 into r1618;\n    ternary r1616 r1617 r1614 into r1619;\n    ternary r1616 r1618 r1615 into r1620;\n    gte r1619 16u128 into r1621;\n    shr r1619 4u8 into r1622;\n    add r1620 4u32 into r1623;\n    ternary r1621 r1622 r1619 into r1624;\n    ternary r1621 r1623 r1620 into r1625;\n    gte r1624 4u128 into r1626;\n    shr r1624 2u8 into r1627;\n    add r1625 2u32 into r1628;\n    ternary r1626 r1627 r1624 into r1629;\n    ternary r1626 r1628 r1625 into r1630;\n    gte r1629 2u128 into r1631;\n    add r1630 1u32 into r1632;\n    ternary r1631 r1632 r1630 into r1633;\n    add r1601 r1633 into r1634;\n    sub 255u32 r1634 into r1635;\n    cast r1635 into r1636 as u16;\n    and r1636 127u16 into r1637;\n    cast r1637 into r1638 as u8;\n    is.eq r1638 0u8 into r1639;\n    sub 128u8 r1638 into r1640;\n    shr.w r0.lo r1640 into r1641;\n    ternary r1639 0u128 r1641 into r1642;\n    shl.w r0.hi r1638 into r1643;\n    or r1643 r1642 into r1644;\n    shl.w r0.lo r1638 into r1645;\n    shl.w r0.lo r1638 into r1646;\n    gte r1636 128u16 into r1647;\n    ternary r1647 r1646 r1644 into r1648;\n    ternary r1647 0u128 r1645 into r1649;\n    cast r1648 r1649 into r1650 as U256__8JquwLopp8;\n    and r1650.lo 18446744073709551615u128 into r1651;\n    shr r1650.lo 64u8 into r1652;\n    and r1650.hi 18446744073709551615u128 into r1653;\n    shr r1650.hi 64u8 into r1654;\n    cast r1637 into r1655 as u8;\n    is.eq r1655 0u8 into r1656;\n    sub 128u8 r1655 into r1657;\n    shr.w r1593.lo r1657 into r1658;\n    ternary r1656 0u128 r1658 into r1659;\n    shl.w r1593.hi r1655 into r1660;\n    or r1660 r1659 into r1661;\n    shl.w r1593.lo r1655 into r1662;\n    shl.w r1593.lo r1655 into r1663;\n    ternary r1647 r1663 r1661 into r1664;\n    ternary r1647 0u128 r1662 into r1665;\n    cast r1664 r1665 into r1666 as U256__8JquwLopp8;\n    is.eq r1636 0u16 into r1667;\n    sub 256u16 r1636 into r1668;\n    and r1668 127u16 into r1669;\n    cast r1669 into r1670 as u8;\n    is.eq r1670 0u8 into r1671;\n    sub 128u8 r1670 into r1672;\n    shl.w r1593.hi r1672 into r1673;\n    ternary r1671 0u128 r1673 into r1674;\n    shr r1593.lo r1670 into r1675;\n    or r1675 r1674 into r1676;\n    shr r1593.hi r1670 into r1677;\n    shr r1593.hi r1670 into r1678;\n    gte r1668 128u16 into r1679;\n    ternary r1679 0u128 r1677 into r1680;\n    ternary r1679 r1678 r1676 into r1681;\n    cast r1680 r1681 into r1682 as U256__8JquwLopp8;\n    ternary r1667 0u128 r1682.hi into r1683;\n    ternary r1667 0u128 r1682.lo into r1684;\n    cast r1683 r1684 into r1685 as U256__8JquwLopp8;\n    cast r1637 into r1686 as u8;\n    is.eq r1686 0u8 into r1687;\n    sub 128u8 r1686 into r1688;\n    shr.w r1592.lo r1688 into r1689;\n    ternary r1687 0u128 r1689 into r1690;\n    shl.w r1592.hi r1686 into r1691;\n    or r1691 r1690 into r1692;\n    shl.w r1592.lo r1686 into r1693;\n    shl.w r1592.lo r1686 into r1694;\n    ternary r1647 r1694 r1692 into r1695;\n    ternary r1647 0u128 r1693 into r1696;\n    cast r1695 r1696 into r1697 as U256__8JquwLopp8;\n    add.w r1697.lo r1685.lo into r1698;\n    lt r1698 r1697.lo into r1699;\n    ternary r1699 1u128 0u128 into r1700;\n    add.w r1697.hi r1685.hi into r1701;\n    add.w r1701 r1700 into r1702;\n    cast r1702 r1698 into r1703 as U256__8JquwLopp8;\n    and r1666.lo 18446744073709551615u128 into r1704;\n    shr r1666.lo 64u8 into r1705;\n    and r1666.hi 18446744073709551615u128 into r1706;\n    shr r1666.hi 64u8 into r1707;\n    and r1703.lo 18446744073709551615u128 into r1708;\n    shr r1703.lo 64u8 into r1709;\n    and r1703.hi 18446744073709551615u128 into r1710;\n    shr r1703.hi 64u8 into r1711;\n    shl r1711 64u8 into r1712;\n    add r1712 r1710 into r1713;\n    div r1713 r1654 into r1714;\n    gt r1714 18446744073709551615u128 into r1715;\n    ternary r1715 18446744073709551615u128 r1714 into r1716;\n    mul r1716 r1654 into r1717;\n    sub r1713 r1717 into r1718;\n    lte r1718 18446744073709551615u128 into r1719;\n    mul r1716 r1653 into r1720;\n    and r1718 18446744073709551615u128 into r1721;\n    shl r1721 64u8 into r1722;\n    add r1722 r1709 into r1723;\n    gt r1720 r1723 into r1724;\n    and r1719 r1724 into r1725;\n    sub.w r1716 1u128 into r1726;\n    ternary r1725 r1726 r1716 into r1727;\n    add r1718 r1654 into r1728;\n    ternary r1725 r1728 r1718 into r1729;\n    lte r1729 18446744073709551615u128 into r1730;\n    and r1725 r1730 into r1731;\n    mul r1727 r1653 into r1732;\n    and r1729 18446744073709551615u128 into r1733;\n    shl r1733 64u8 into r1734;\n    add r1734 r1709 into r1735;\n    gt r1732 r1735 into r1736;\n    and r1731 r1736 into r1737;\n    sub.w r1727 1u128 into r1738;\n    ternary r1737 r1738 r1727 into r1739;\n    mul r1739 r1651 into r1740;\n    and r1740 18446744073709551615u128 into r1741;\n    lt r1707 r1741 into r1742;\n    add r1707 18446744073709551616u128 into r1743;\n    sub r1743 r1741 into r1744;\n    and r1744 18446744073709551615u128 into r1745;\n    shr r1740 64u8 into r1746;\n    ternary r1742 1u128 0u128 into r1747;\n    add r1746 r1747 into r1748;\n    mul r1739 r1652 into r1749;\n    add r1749 r1748 into r1750;\n    and r1750 18446744073709551615u128 into r1751;\n    lt r1708 r1751 into r1752;\n    add r1708 18446744073709551616u128 into r1753;\n    sub r1753 r1751 into r1754;\n    and r1754 18446744073709551615u128 into r1755;\n    shr r1750 64u8 into r1756;\n    ternary r1752 1u128 0u128 into r1757;\n    add r1756 r1757 into r1758;\n    mul r1739 r1653 into r1759;\n    add r1759 r1758 into r1760;\n    and r1760 18446744073709551615u128 into r1761;\n    lt r1709 r1761 into r1762;\n    add r1709 18446744073709551616u128 into r1763;\n    sub r1763 r1761 into r1764;\n    and r1764 18446744073709551615u128 into r1765;\n    shr r1760 64u8 into r1766;\n    ternary r1762 1u128 0u128 into r1767;\n    add r1766 r1767 into r1768;\n    mul r1739 r1654 into r1769;\n    add r1769 r1768 into r1770;\n    and r1770 18446744073709551615u128 into r1771;\n    lt r1710 r1771 into r1772;\n    add r1710 18446744073709551616u128 into r1773;\n    sub r1773 r1771 into r1774;\n    and r1774 18446744073709551615u128 into r1775;\n    shr r1770 64u8 into r1776;\n    ternary r1772 1u128 0u128 into r1777;\n    add r1776 r1777 into r1778;\n    lt r1711 r1778 into r1779;\n    add r1711 18446744073709551616u128 into r1780;\n    sub r1780 r1778 into r1781;\n    and r1781 18446744073709551615u128 into r1782;\n    sub.w r1739 1u128 into r1783;\n    ternary r1779 r1783 r1739 into r1784;\n    add r1745 r1651 into r1785;\n    and r1785 18446744073709551615u128 into r1786;\n    ternary r1779 r1786 r1745 into r1787;\n    shr r1785 64u8 into r1788;\n    ternary r1779 r1788 0u128 into r1789;\n    add r1755 r1652 into r1790;\n    add r1790 r1789 into r1791;\n    and r1791 18446744073709551615u128 into r1792;\n    ternary r1779 r1792 r1755 into r1793;\n    shr r1791 64u8 into r1794;\n    ternary r1779 r1794 0u128 into r1795;\n    add r1765 r1653 into r1796;\n    add r1796 r1795 into r1797;\n    and r1797 18446744073709551615u128 into r1798;\n    ternary r1779 r1798 r1765 into r1799;\n    shr r1797 64u8 into r1800;\n    ternary r1779 r1800 0u128 into r1801;\n    add r1775 r1654 into r1802;\n    add r1802 r1801 into r1803;\n    and r1803 18446744073709551615u128 into r1804;\n    ternary r1779 r1804 r1775 into r1805;\n    shr r1803 64u8 into r1806;\n    ternary r1779 r1806 0u128 into r1807;\n    add r1782 r1807 into r1808;\n    shl r1805 64u8 into r1809;\n    add r1809 r1799 into r1810;\n    div r1810 r1654 into r1811;\n    gt r1811 18446744073709551615u128 into r1812;\n    ternary r1812 18446744073709551615u128 r1811 into r1813;\n    mul r1813 r1654 into r1814;\n    sub r1810 r1814 into r1815;\n    lte r1815 18446744073709551615u128 into r1816;\n    mul r1813 r1653 into r1817;\n    and r1815 18446744073709551615u128 into r1818;\n    shl r1818 64u8 into r1819;\n    add r1819 r1793 into r1820;\n    gt r1817 r1820 into r1821;\n    and r1816 r1821 into r1822;\n    sub.w r1813 1u128 into r1823;\n    ternary r1822 r1823 r1813 into r1824;\n    add r1815 r1654 into r1825;\n    ternary r1822 r1825 r1815 into r1826;\n    lte r1826 18446744073709551615u128 into r1827;\n    and r1822 r1827 into r1828;\n    mul r1824 r1653 into r1829;\n    and r1826 18446744073709551615u128 into r1830;\n    shl r1830 64u8 into r1831;\n    add r1831 r1793 into r1832;\n    gt r1829 r1832 into r1833;\n    and r1828 r1833 into r1834;\n    sub.w r1824 1u128 into r1835;\n    ternary r1834 r1835 r1824 into r1836;\n    mul r1836 r1651 into r1837;\n    and r1837 18446744073709551615u128 into r1838;\n    lt r1706 r1838 into r1839;\n    add r1706 18446744073709551616u128 into r1840;\n    sub r1840 r1838 into r1841;\n    and r1841 18446744073709551615u128 into r1842;\n    shr r1837 64u8 into r1843;\n    ternary r1839 1u128 0u128 into r1844;\n    add r1843 r1844 into r1845;\n    mul r1836 r1652 into r1846;\n    add r1846 r1845 into r1847;\n    and r1847 18446744073709551615u128 into r1848;\n    lt r1787 r1848 into r1849;\n    add r1787 18446744073709551616u128 into r1850;\n    sub r1850 r1848 into r1851;\n    and r1851 18446744073709551615u128 into r1852;\n    shr r1847 64u8 into r1853;\n    ternary r1849 1u128 0u128 into r1854;\n    add r1853 r1854 into r1855;\n    mul r1836 r1653 into r1856;\n    add r1856 r1855 into r1857;\n    and r1857 18446744073709551615u128 into r1858;\n    lt r1793 r1858 into r1859;\n    add r1793 18446744073709551616u128 into r1860;\n    sub r1860 r1858 into r1861;\n    and r1861 18446744073709551615u128 into r1862;\n    shr r1857 64u8 into r1863;\n    ternary r1859 1u128 0u128 into r1864;\n    add r1863 r1864 into r1865;\n    mul r1836 r1654 into r1866;\n    add r1866 r1865 into r1867;\n    and r1867 18446744073709551615u128 into r1868;\n    lt r1799 r1868 into r1869;\n    add r1799 18446744073709551616u128 into r1870;\n    sub r1870 r1868 into r1871;\n    and r1871 18446744073709551615u128 into r1872;\n    shr r1867 64u8 into r1873;\n    ternary r1869 1u128 0u128 into r1874;\n    add r1873 r1874 into r1875;\n    lt r1805 r1875 into r1876;\n    add r1805 18446744073709551616u128 into r1877;\n    sub r1877 r1875 into r1878;\n    and r1878 18446744073709551615u128 into r1879;\n    sub.w r1836 1u128 into r1880;\n    ternary r1876 r1880 r1836 into r1881;\n    add r1842 r1651 into r1882;\n    and r1882 18446744073709551615u128 into r1883;\n    ternary r1876 r1883 r1842 into r1884;\n    shr r1882 64u8 into r1885;\n    ternary r1876 r1885 0u128 into r1886;\n    add r1852 r1652 into r1887;\n    add r1887 r1886 into r1888;\n    and r1888 18446744073709551615u128 into r1889;\n    ternary r1876 r1889 r1852 into r1890;\n    shr r1888 64u8 into r1891;\n    ternary r1876 r1891 0u128 into r1892;\n    add r1862 r1653 into r1893;\n    add r1893 r1892 into r1894;\n    and r1894 18446744073709551615u128 into r1895;\n    ternary r1876 r1895 r1862 into r1896;\n    shr r1894 64u8 into r1897;\n    ternary r1876 r1897 0u128 into r1898;\n    add r1872 r1654 into r1899;\n    add r1899 r1898 into r1900;\n    and r1900 18446744073709551615u128 into r1901;\n    ternary r1876 r1901 r1872 into r1902;\n    shr r1900 64u8 into r1903;\n    ternary r1876 r1903 0u128 into r1904;\n    add r1879 r1904 into r1905;\n    shl r1902 64u8 into r1906;\n    add r1906 r1896 into r1907;\n    div r1907 r1654 into r1908;\n    gt r1908 18446744073709551615u128 into r1909;\n    ternary r1909 18446744073709551615u128 r1908 into r1910;\n    mul r1910 r1654 into r1911;\n    sub r1907 r1911 into r1912;\n    lte r1912 18446744073709551615u128 into r1913;\n    mul r1910 r1653 into r1914;\n    and r1912 18446744073709551615u128 into r1915;\n    shl r1915 64u8 into r1916;\n    add r1916 r1890 into r1917;\n    gt r1914 r1917 into r1918;\n    and r1913 r1918 into r1919;\n    sub.w r1910 1u128 into r1920;\n    ternary r1919 r1920 r1910 into r1921;\n    add r1912 r1654 into r1922;\n    ternary r1919 r1922 r1912 into r1923;\n    lte r1923 18446744073709551615u128 into r1924;\n    and r1919 r1924 into r1925;\n    mul r1921 r1653 into r1926;\n    and r1923 18446744073709551615u128 into r1927;\n    shl r1927 64u8 into r1928;\n    add r1928 r1890 into r1929;\n    gt r1926 r1929 into r1930;\n    and r1925 r1930 into r1931;\n    sub.w r1921 1u128 into r1932;\n    ternary r1931 r1932 r1921 into r1933;\n    mul r1933 r1651 into r1934;\n    and r1934 18446744073709551615u128 into r1935;\n    lt r1705 r1935 into r1936;\n    add r1705 18446744073709551616u128 into r1937;\n    sub r1937 r1935 into r1938;\n    and r1938 18446744073709551615u128 into r1939;\n    shr r1934 64u8 into r1940;\n    ternary r1936 1u128 0u128 into r1941;\n    add r1940 r1941 into r1942;\n    mul r1933 r1652 into r1943;\n    add r1943 r1942 into r1944;\n    and r1944 18446744073709551615u128 into r1945;\n    lt r1884 r1945 into r1946;\n    add r1884 18446744073709551616u128 into r1947;\n    sub r1947 r1945 into r1948;\n    and r1948 18446744073709551615u128 into r1949;\n    shr r1944 64u8 into r1950;\n    ternary r1946 1u128 0u128 into r1951;\n    add r1950 r1951 into r1952;\n    mul r1933 r1653 into r1953;\n    add r1953 r1952 into r1954;\n    and r1954 18446744073709551615u128 into r1955;\n    lt r1890 r1955 into r1956;\n    add r1890 18446744073709551616u128 into r1957;\n    sub r1957 r1955 into r1958;\n    and r1958 18446744073709551615u128 into r1959;\n    shr r1954 64u8 into r1960;\n    ternary r1956 1u128 0u128 into r1961;\n    add r1960 r1961 into r1962;\n    mul r1933 r1654 into r1963;\n    add r1963 r1962 into r1964;\n    and r1964 18446744073709551615u128 into r1965;\n    lt r1896 r1965 into r1966;\n    add r1896 18446744073709551616u128 into r1967;\n    sub r1967 r1965 into r1968;\n    and r1968 18446744073709551615u128 into r1969;\n    shr r1964 64u8 into r1970;\n    ternary r1966 1u128 0u128 into r1971;\n    add r1970 r1971 into r1972;\n    lt r1902 r1972 into r1973;\n    add r1902 18446744073709551616u128 into r1974;\n    sub r1974 r1972 into r1975;\n    and r1975 18446744073709551615u128 into r1976;\n    sub.w r1933 1u128 into r1977;\n    ternary r1973 r1977 r1933 into r1978;\n    add r1939 r1651 into r1979;\n    and r1979 18446744073709551615u128 into r1980;\n    ternary r1973 r1980 r1939 into r1981;\n    shr r1979 64u8 into r1982;\n    ternary r1973 r1982 0u128 into r1983;\n    add r1949 r1652 into r1984;\n    add r1984 r1983 into r1985;\n    and r1985 18446744073709551615u128 into r1986;\n    ternary r1973 r1986 r1949 into r1987;\n    shr r1985 64u8 into r1988;\n    ternary r1973 r1988 0u128 into r1989;\n    add r1959 r1653 into r1990;\n    add r1990 r1989 into r1991;\n    and r1991 18446744073709551615u128 into r1992;\n    ternary r1973 r1992 r1959 into r1993;\n    shr r1991 64u8 into r1994;\n    ternary r1973 r1994 0u128 into r1995;\n    add r1969 r1654 into r1996;\n    add r1996 r1995 into r1997;\n    and r1997 18446744073709551615u128 into r1998;\n    ternary r1973 r1998 r1969 into r1999;\n    shr r1997 64u8 into r2000;\n    ternary r1973 r2000 0u128 into r2001;\n    add r1976 r2001 into r2002;\n    shl r1999 64u8 into r2003;\n    add r2003 r1993 into r2004;\n    div r2004 r1654 into r2005;\n    gt r2005 18446744073709551615u128 into r2006;\n    ternary r2006 18446744073709551615u128 r2005 into r2007;\n    mul r2007 r1654 into r2008;\n    sub r2004 r2008 into r2009;\n    lte r2009 18446744073709551615u128 into r2010;\n    mul r2007 r1653 into r2011;\n    and r2009 18446744073709551615u128 into r2012;\n    shl r2012 64u8 into r2013;\n    add r2013 r1987 into r2014;\n    gt r2011 r2014 into r2015;\n    and r2010 r2015 into r2016;\n    sub.w r2007 1u128 into r2017;\n    ternary r2016 r2017 r2007 into r2018;\n    add r2009 r1654 into r2019;\n    ternary r2016 r2019 r2009 into r2020;\n    lte r2020 18446744073709551615u128 into r2021;\n    and r2016 r2021 into r2022;\n    mul r2018 r1653 into r2023;\n    and r2020 18446744073709551615u128 into r2024;\n    shl r2024 64u8 into r2025;\n    add r2025 r1987 into r2026;\n    gt r2023 r2026 into r2027;\n    and r2022 r2027 into r2028;\n    sub.w r2018 1u128 into r2029;\n    ternary r2028 r2029 r2018 into r2030;\n    mul r2030 r1651 into r2031;\n    and r2031 18446744073709551615u128 into r2032;\n    lt r1704 r2032 into r2033;\n    add r1704 18446744073709551616u128 into r2034;\n    sub r2034 r2032 into r2035;\n    and r2035 18446744073709551615u128 into r2036;\n    shr r2031 64u8 into r2037;\n    ternary r2033 1u128 0u128 into r2038;\n    add r2037 r2038 into r2039;\n    mul r2030 r1652 into r2040;\n    add r2040 r2039 into r2041;\n    and r2041 18446744073709551615u128 into r2042;\n    lt r1981 r2042 into r2043;\n    add r1981 18446744073709551616u128 into r2044;\n    sub r2044 r2042 into r2045;\n    and r2045 18446744073709551615u128 into r2046;\n    shr r2041 64u8 into r2047;\n    ternary r2043 1u128 0u128 into r2048;\n    add r2047 r2048 into r2049;\n    mul r2030 r1653 into r2050;\n    add r2050 r2049 into r2051;\n    and r2051 18446744073709551615u128 into r2052;\n    lt r1987 r2052 into r2053;\n    add r1987 18446744073709551616u128 into r2054;\n    sub r2054 r2052 into r2055;\n    and r2055 18446744073709551615u128 into r2056;\n    shr r2051 64u8 into r2057;\n    ternary r2053 1u128 0u128 into r2058;\n    add r2057 r2058 into r2059;\n    mul r2030 r1654 into r2060;\n    add r2060 r2059 into r2061;\n    and r2061 18446744073709551615u128 into r2062;\n    lt r1993 r2062 into r2063;\n    add r1993 18446744073709551616u128 into r2064;\n    sub r2064 r2062 into r2065;\n    and r2065 18446744073709551615u128 into r2066;\n    shr r2061 64u8 into r2067;\n    ternary r2063 1u128 0u128 into r2068;\n    add r2067 r2068 into r2069;\n    lt r1999 r2069 into r2070;\n    add r1999 18446744073709551616u128 into r2071;\n    sub r2071 r2069 into r2072;\n    and r2072 18446744073709551615u128 into r2073;\n    sub.w r2030 1u128 into r2074;\n    ternary r2070 r2074 r2030 into r2075;\n    add r2036 r1651 into r2076;\n    and r2076 18446744073709551615u128 into r2077;\n    ternary r2070 r2077 r2036 into r2078;\n    shr r2076 64u8 into r2079;\n    ternary r2070 r2079 0u128 into r2080;\n    add r2046 r1652 into r2081;\n    add r2081 r2080 into r2082;\n    and r2082 18446744073709551615u128 into r2083;\n    ternary r2070 r2083 r2046 into r2084;\n    shr r2082 64u8 into r2085;\n    ternary r2070 r2085 0u128 into r2086;\n    add r2056 r1653 into r2087;\n    add r2087 r2086 into r2088;\n    and r2088 18446744073709551615u128 into r2089;\n    ternary r2070 r2089 r2056 into r2090;\n    shr r2088 64u8 into r2091;\n    ternary r2070 r2091 0u128 into r2092;\n    add r2066 r1654 into r2093;\n    add r2093 r2092 into r2094;\n    and r2094 18446744073709551615u128 into r2095;\n    ternary r2070 r2095 r2066 into r2096;\n    shr r2094 64u8 into r2097;\n    ternary r2070 r2097 0u128 into r2098;\n    add r2073 r2098 into r2099;\n    shl r1784 64u8 into r2100;\n    add r2100 r1881 into r2101;\n    shl r1978 64u8 into r2102;\n    add r2102 r2075 into r2103;\n    cast r2101 r2103 into r2104 as U256__8JquwLopp8;\n    shl r2096 64u8 into r2105;\n    add r2105 r2090 into r2106;\n    shl r2084 64u8 into r2107;\n    add r2107 r2078 into r2108;\n    cast r1637 into r2109 as u8;\n    sub 128u8 r2109 into r2110;\n    shr r2108 r2109 into r2111;\n    shr r2106 r2109 into r2112;\n    cast r2104.hi r2104.lo into r2113 as U256__8JquwLopp8;\n    cast 0u128 r109 into r2114 as U256__8JquwLopp8;\n    add.w r2113.lo r2114.lo into r2115;\n    lt r2115 r2113.lo into r2116;\n    ternary r2116 1u128 0u128 into r2117;\n    add.w r2113.hi r2114.hi into r2118;\n    add.w r2118 r2117 into r2119;\n    cast r2119 r2115 into r2120 as U256__8JquwLopp8;\n    cast r2120.hi r2120.lo into r2121 as U256__8JquwLopp8;\n    is.eq r2121.hi 0u128 into r2122;\n    is.eq r2121.lo 0u128 into r2123;\n    and r2122 r2123 into r2124;\n    ternary r2124 0u128 r2121.hi into r2125;\n    ternary r2124 1u128 r2121.lo into r2126;\n    cast r2125 r2126 into r2127 as U256__8JquwLopp8;\n    cast 0u128 r1539 into r2128 as U256__8JquwLopp8;\n    shr r2128.lo 64u8 into r2129;\n    and r2128.lo 18446744073709551615u128 into r2130;\n    shr r2128.lo 64u8 into r2131;\n    and r2130 18446744073709551615u128 into r2132;\n    shr r2130 64u8 into r2133;\n    and r2131 18446744073709551615u128 into r2134;\n    add r2133 r2134 into r2135;\n    and r2135 18446744073709551615u128 into r2136;\n    shr r2135 64u8 into r2137;\n    shr r2131 64u8 into r2138;\n    add r2138 r2137 into r2139;\n    and r2139 18446744073709551615u128 into r2140;\n    shr r2139 64u8 into r2141;\n    shl r2141 64u8 into r2142;\n    add r2142 r2140 into r2143;\n    shl r2136 64u8 into r2144;\n    add r2144 r2132 into r2145;\n    shr r2128.hi 64u8 into r2146;\n    and r2128.hi 18446744073709551615u128 into r2147;\n    shr r2128.hi 64u8 into r2148;\n    and r2147 18446744073709551615u128 into r2149;\n    shr r2147 64u8 into r2150;\n    and r2148 18446744073709551615u128 into r2151;\n    add r2150 r2151 into r2152;\n    and r2152 18446744073709551615u128 into r2153;\n    shr r2152 64u8 into r2154;\n    shr r2148 64u8 into r2155;\n    add r2155 r2154 into r2156;\n    and r2156 18446744073709551615u128 into r2157;\n    shr r2156 64u8 into r2158;\n    shl r2158 64u8 into r2159;\n    add r2159 r2157 into r2160;\n    shl r2153 64u8 into r2161;\n    add r2161 r2149 into r2162;\n    lt r2145 0u128 into r2163;\n    ternary r2163 1u128 0u128 into r2164;\n    lt r2145 r2145 into r2165;\n    ternary r2165 1u128 0u128 into r2166;\n    add r2164 r2166 into r2167;\n    lt r2143 r2143 into r2168;\n    ternary r2168 1u128 0u128 into r2169;\n    add.w r2143 r2162 into r2170;\n    lt r2170 r2143 into r2171;\n    ternary r2171 1u128 0u128 into r2172;\n    add.w r2170 r2167 into r2173;\n    lt r2173 r2170 into r2174;\n    ternary r2174 1u128 0u128 into r2175;\n    add r2169 r2172 into r2176;\n    add r2176 r2175 into r2177;\n    add.w r2160 r2177 into r2178;\n    cast r2178 r2173 into r2179 as U256__8JquwLopp8;\n    cast r2145 0u128 into r2180 as U256__8JquwLopp8;\n    lt r2179.hi r2127.hi into r2181;\n    gt r2179.hi r2127.hi into r2182;\n    lt r2179.lo r2127.lo into r2183;\n    ternary r2182 false r2183 into r2184;\n    ternary r2181 true r2184 into r2185;\n    assert.eq r2185 true;\n    gt r2127.hi 0u128 into r2186;\n    ternary r2186 r2127.hi r2127.lo into r2187;\n    ternary r2186 128u32 0u32 into r2188;\n    gte r2187 18446744073709551616u128 into r2189;\n    shr r2187 64u8 into r2190;\n    ternary r2189 r2190 r2187 into r2191;\n    ternary r2189 64u32 0u32 into r2192;\n    gte r2191 4294967296u128 into r2193;\n    shr r2191 32u8 into r2194;\n    add r2192 32u32 into r2195;\n    ternary r2193 r2194 r2191 into r2196;\n    ternary r2193 r2195 r2192 into r2197;\n    gte r2196 65536u128 into r2198;\n    shr r2196 16u8 into r2199;\n    add r2197 16u32 into r2200;\n    ternary r2198 r2199 r2196 into r2201;\n    ternary r2198 r2200 r2197 into r2202;\n    gte r2201 256u128 into r2203;\n    shr r2201 8u8 into r2204;\n    add r2202 8u32 into r2205;\n    ternary r2203 r2204 r2201 into r2206;\n    ternary r2203 r2205 r2202 into r2207;\n    gte r2206 16u128 into r2208;\n    shr r2206 4u8 into r2209;\n    add r2207 4u32 into r2210;\n    ternary r2208 r2209 r2206 into r2211;\n    ternary r2208 r2210 r2207 into r2212;\n    gte r2211 4u128 into r2213;\n    shr r2211 2u8 into r2214;\n    add r2212 2u32 into r2215;\n    ternary r2213 r2214 r2211 into r2216;\n    ternary r2213 r2215 r2212 into r2217;\n    gte r2216 2u128 into r2218;\n    add r2217 1u32 into r2219;\n    ternary r2218 r2219 r2217 into r2220;\n    add r2188 r2220 into r2221;\n    sub 255u32 r2221 into r2222;\n    cast r2222 into r2223 as u16;\n    and r2223 127u16 into r2224;\n    cast r2224 into r2225 as u8;\n    is.eq r2225 0u8 into r2226;\n    sub 128u8 r2225 into r2227;\n    shr.w r2127.lo r2227 into r2228;\n    ternary r2226 0u128 r2228 into r2229;\n    shl.w r2127.hi r2225 into r2230;\n    or r2230 r2229 into r2231;\n    shl.w r2127.lo r2225 into r2232;\n    shl.w r2127.lo r2225 into r2233;\n    gte r2223 128u16 into r2234;\n    ternary r2234 r2233 r2231 into r2235;\n    ternary r2234 0u128 r2232 into r2236;\n    cast r2235 r2236 into r2237 as U256__8JquwLopp8;\n    and r2237.lo 18446744073709551615u128 into r2238;\n    shr r2237.lo 64u8 into r2239;\n    and r2237.hi 18446744073709551615u128 into r2240;\n    shr r2237.hi 64u8 into r2241;\n    cast r2224 into r2242 as u8;\n    is.eq r2242 0u8 into r2243;\n    sub 128u8 r2242 into r2244;\n    shr.w r2180.lo r2244 into r2245;\n    ternary r2243 0u128 r2245 into r2246;\n    shl.w r2180.hi r2242 into r2247;\n    or r2247 r2246 into r2248;\n    shl.w r2180.lo r2242 into r2249;\n    shl.w r2180.lo r2242 into r2250;\n    ternary r2234 r2250 r2248 into r2251;\n    ternary r2234 0u128 r2249 into r2252;\n    cast r2251 r2252 into r2253 as U256__8JquwLopp8;\n    is.eq r2223 0u16 into r2254;\n    sub 256u16 r2223 into r2255;\n    and r2255 127u16 into r2256;\n    cast r2256 into r2257 as u8;\n    is.eq r2257 0u8 into r2258;\n    sub 128u8 r2257 into r2259;\n    shl.w r2180.hi r2259 into r2260;\n    ternary r2258 0u128 r2260 into r2261;\n    shr r2180.lo r2257 into r2262;\n    or r2262 r2261 into r2263;\n    shr r2180.hi r2257 into r2264;\n    shr r2180.hi r2257 into r2265;\n    gte r2255 128u16 into r2266;\n    ternary r2266 0u128 r2264 into r2267;\n    ternary r2266 r2265 r2263 into r2268;\n    cast r2267 r2268 into r2269 as U256__8JquwLopp8;\n    ternary r2254 0u128 r2269.hi into r2270;\n    ternary r2254 0u128 r2269.lo into r2271;\n    cast r2270 r2271 into r2272 as U256__8JquwLopp8;\n    cast r2224 into r2273 as u8;\n    is.eq r2273 0u8 into r2274;\n    sub 128u8 r2273 into r2275;\n    shr.w r2179.lo r2275 into r2276;\n    ternary r2274 0u128 r2276 into r2277;\n    shl.w r2179.hi r2273 into r2278;\n    or r2278 r2277 into r2279;\n    shl.w r2179.lo r2273 into r2280;\n    shl.w r2179.lo r2273 into r2281;\n    ternary r2234 r2281 r2279 into r2282;\n    ternary r2234 0u128 r2280 into r2283;\n    cast r2282 r2283 into r2284 as U256__8JquwLopp8;\n    add.w r2284.lo r2272.lo into r2285;\n    lt r2285 r2284.lo into r2286;\n    ternary r2286 1u128 0u128 into r2287;\n    add.w r2284.hi r2272.hi into r2288;\n    add.w r2288 r2287 into r2289;\n    cast r2289 r2285 into r2290 as U256__8JquwLopp8;\n    and r2253.lo 18446744073709551615u128 into r2291;\n    shr r2253.lo 64u8 into r2292;\n    and r2253.hi 18446744073709551615u128 into r2293;\n    shr r2253.hi 64u8 into r2294;\n    and r2290.lo 18446744073709551615u128 into r2295;\n    shr r2290.lo 64u8 into r2296;\n    and r2290.hi 18446744073709551615u128 into r2297;\n    shr r2290.hi 64u8 into r2298;\n    shl r2298 64u8 into r2299;\n    add r2299 r2297 into r2300;\n    div r2300 r2241 into r2301;\n    gt r2301 18446744073709551615u128 into r2302;\n    ternary r2302 18446744073709551615u128 r2301 into r2303;\n    mul r2303 r2241 into r2304;\n    sub r2300 r2304 into r2305;\n    lte r2305 18446744073709551615u128 into r2306;\n    mul r2303 r2240 into r2307;\n    and r2305 18446744073709551615u128 into r2308;\n    shl r2308 64u8 into r2309;\n    add r2309 r2296 into r2310;\n    gt r2307 r2310 into r2311;\n    and r2306 r2311 into r2312;\n    sub.w r2303 1u128 into r2313;\n    ternary r2312 r2313 r2303 into r2314;\n    add r2305 r2241 into r2315;\n    ternary r2312 r2315 r2305 into r2316;\n    lte r2316 18446744073709551615u128 into r2317;\n    and r2312 r2317 into r2318;\n    mul r2314 r2240 into r2319;\n    and r2316 18446744073709551615u128 into r2320;\n    shl r2320 64u8 into r2321;\n    add r2321 r2296 into r2322;\n    gt r2319 r2322 into r2323;\n    and r2318 r2323 into r2324;\n    sub.w r2314 1u128 into r2325;\n    ternary r2324 r2325 r2314 into r2326;\n    mul r2326 r2238 into r2327;\n    and r2327 18446744073709551615u128 into r2328;\n    lt r2294 r2328 into r2329;\n    add r2294 18446744073709551616u128 into r2330;\n    sub r2330 r2328 into r2331;\n    and r2331 18446744073709551615u128 into r2332;\n    shr r2327 64u8 into r2333;\n    ternary r2329 1u128 0u128 into r2334;\n    add r2333 r2334 into r2335;\n    mul r2326 r2239 into r2336;\n    add r2336 r2335 into r2337;\n    and r2337 18446744073709551615u128 into r2338;\n    lt r2295 r2338 into r2339;\n    add r2295 18446744073709551616u128 into r2340;\n    sub r2340 r2338 into r2341;\n    and r2341 18446744073709551615u128 into r2342;\n    shr r2337 64u8 into r2343;\n    ternary r2339 1u128 0u128 into r2344;\n    add r2343 r2344 into r2345;\n    mul r2326 r2240 into r2346;\n    add r2346 r2345 into r2347;\n    and r2347 18446744073709551615u128 into r2348;\n    lt r2296 r2348 into r2349;\n    add r2296 18446744073709551616u128 into r2350;\n    sub r2350 r2348 into r2351;\n    and r2351 18446744073709551615u128 into r2352;\n    shr r2347 64u8 into r2353;\n    ternary r2349 1u128 0u128 into r2354;\n    add r2353 r2354 into r2355;\n    mul r2326 r2241 into r2356;\n    add r2356 r2355 into r2357;\n    and r2357 18446744073709551615u128 into r2358;\n    lt r2297 r2358 into r2359;\n    add r2297 18446744073709551616u128 into r2360;\n    sub r2360 r2358 into r2361;\n    and r2361 18446744073709551615u128 into r2362;\n    shr r2357 64u8 into r2363;\n    ternary r2359 1u128 0u128 into r2364;\n    add r2363 r2364 into r2365;\n    lt r2298 r2365 into r2366;\n    add r2298 18446744073709551616u128 into r2367;\n    sub r2367 r2365 into r2368;\n    and r2368 18446744073709551615u128 into r2369;\n    sub.w r2326 1u128 into r2370;\n    ternary r2366 r2370 r2326 into r2371;\n    add r2332 r2238 into r2372;\n    and r2372 18446744073709551615u128 into r2373;\n    ternary r2366 r2373 r2332 into r2374;\n    shr r2372 64u8 into r2375;\n    ternary r2366 r2375 0u128 into r2376;\n    add r2342 r2239 into r2377;\n    add r2377 r2376 into r2378;\n    and r2378 18446744073709551615u128 into r2379;\n    ternary r2366 r2379 r2342 into r2380;\n    shr r2378 64u8 into r2381;\n    ternary r2366 r2381 0u128 into r2382;\n    add r2352 r2240 into r2383;\n    add r2383 r2382 into r2384;\n    and r2384 18446744073709551615u128 into r2385;\n    ternary r2366 r2385 r2352 into r2386;\n    shr r2384 64u8 into r2387;\n    ternary r2366 r2387 0u128 into r2388;\n    add r2362 r2241 into r2389;\n    add r2389 r2388 into r2390;\n    and r2390 18446744073709551615u128 into r2391;\n    ternary r2366 r2391 r2362 into r2392;\n    shr r2390 64u8 into r2393;\n    ternary r2366 r2393 0u128 into r2394;\n    add r2369 r2394 into r2395;\n    shl r2392 64u8 into r2396;\n    add r2396 r2386 into r2397;\n    div r2397 r2241 into r2398;\n    gt r2398 18446744073709551615u128 into r2399;\n    ternary r2399 18446744073709551615u128 r2398 into r2400;\n    mul r2400 r2241 into r2401;\n    sub r2397 r2401 into r2402;\n    lte r2402 18446744073709551615u128 into r2403;\n    mul r2400 r2240 into r2404;\n    and r2402 18446744073709551615u128 into r2405;\n    shl r2405 64u8 into r2406;\n    add r2406 r2380 into r2407;\n    gt r2404 r2407 into r2408;\n    and r2403 r2408 into r2409;\n    sub.w r2400 1u128 into r2410;\n    ternary r2409 r2410 r2400 into r2411;\n    add r2402 r2241 into r2412;\n    ternary r2409 r2412 r2402 into r2413;\n    lte r2413 18446744073709551615u128 into r2414;\n    and r2409 r2414 into r2415;\n    mul r2411 r2240 into r2416;\n    and r2413 18446744073709551615u128 into r2417;\n    shl r2417 64u8 into r2418;\n    add r2418 r2380 into r2419;\n    gt r2416 r2419 into r2420;\n    and r2415 r2420 into r2421;\n    sub.w r2411 1u128 into r2422;\n    ternary r2421 r2422 r2411 into r2423;\n    mul r2423 r2238 into r2424;\n    and r2424 18446744073709551615u128 into r2425;\n    lt r2293 r2425 into r2426;\n    add r2293 18446744073709551616u128 into r2427;\n    sub r2427 r2425 into r2428;\n    and r2428 18446744073709551615u128 into r2429;\n    shr r2424 64u8 into r2430;\n    ternary r2426 1u128 0u128 into r2431;\n    add r2430 r2431 into r2432;\n    mul r2423 r2239 into r2433;\n    add r2433 r2432 into r2434;\n    and r2434 18446744073709551615u128 into r2435;\n    lt r2374 r2435 into r2436;\n    add r2374 18446744073709551616u128 into r2437;\n    sub r2437 r2435 into r2438;\n    and r2438 18446744073709551615u128 into r2439;\n    shr r2434 64u8 into r2440;\n    ternary r2436 1u128 0u128 into r2441;\n    add r2440 r2441 into r2442;\n    mul r2423 r2240 into r2443;\n    add r2443 r2442 into r2444;\n    and r2444 18446744073709551615u128 into r2445;\n    lt r2380 r2445 into r2446;\n    add r2380 18446744073709551616u128 into r2447;\n    sub r2447 r2445 into r2448;\n    and r2448 18446744073709551615u128 into r2449;\n    shr r2444 64u8 into r2450;\n    ternary r2446 1u128 0u128 into r2451;\n    add r2450 r2451 into r2452;\n    mul r2423 r2241 into r2453;\n    add r2453 r2452 into r2454;\n    and r2454 18446744073709551615u128 into r2455;\n    lt r2386 r2455 into r2456;\n    add r2386 18446744073709551616u128 into r2457;\n    sub r2457 r2455 into r2458;\n    and r2458 18446744073709551615u128 into r2459;\n    shr r2454 64u8 into r2460;\n    ternary r2456 1u128 0u128 into r2461;\n    add r2460 r2461 into r2462;\n    lt r2392 r2462 into r2463;\n    add r2392 18446744073709551616u128 into r2464;\n    sub r2464 r2462 into r2465;\n    and r2465 18446744073709551615u128 into r2466;\n    sub.w r2423 1u128 into r2467;\n    ternary r2463 r2467 r2423 into r2468;\n    add r2429 r2238 into r2469;\n    and r2469 18446744073709551615u128 into r2470;\n    ternary r2463 r2470 r2429 into r2471;\n    shr r2469 64u8 into r2472;\n    ternary r2463 r2472 0u128 into r2473;\n    add r2439 r2239 into r2474;\n    add r2474 r2473 into r2475;\n    and r2475 18446744073709551615u128 into r2476;\n    ternary r2463 r2476 r2439 into r2477;\n    shr r2475 64u8 into r2478;\n    ternary r2463 r2478 0u128 into r2479;\n    add r2449 r2240 into r2480;\n    add r2480 r2479 into r2481;\n    and r2481 18446744073709551615u128 into r2482;\n    ternary r2463 r2482 r2449 into r2483;\n    shr r2481 64u8 into r2484;\n    ternary r2463 r2484 0u128 into r2485;\n    add r2459 r2241 into r2486;\n    add r2486 r2485 into r2487;\n    and r2487 18446744073709551615u128 into r2488;\n    ternary r2463 r2488 r2459 into r2489;\n    shr r2487 64u8 into r2490;\n    ternary r2463 r2490 0u128 into r2491;\n    add r2466 r2491 into r2492;\n    shl r2489 64u8 into r2493;\n    add r2493 r2483 into r2494;\n    div r2494 r2241 into r2495;\n    gt r2495 18446744073709551615u128 into r2496;\n    ternary r2496 18446744073709551615u128 r2495 into r2497;\n    mul r2497 r2241 into r2498;\n    sub r2494 r2498 into r2499;\n    lte r2499 18446744073709551615u128 into r2500;\n    mul r2497 r2240 into r2501;\n    and r2499 18446744073709551615u128 into r2502;\n    shl r2502 64u8 into r2503;\n    add r2503 r2477 into r2504;\n    gt r2501 r2504 into r2505;\n    and r2500 r2505 into r2506;\n    sub.w r2497 1u128 into r2507;\n    ternary r2506 r2507 r2497 into r2508;\n    add r2499 r2241 into r2509;\n    ternary r2506 r2509 r2499 into r2510;\n    lte r2510 18446744073709551615u128 into r2511;\n    and r2506 r2511 into r2512;\n    mul r2508 r2240 into r2513;\n    and r2510 18446744073709551615u128 into r2514;\n    shl r2514 64u8 into r2515;\n    add r2515 r2477 into r2516;\n    gt r2513 r2516 into r2517;\n    and r2512 r2517 into r2518;\n    sub.w r2508 1u128 into r2519;\n    ternary r2518 r2519 r2508 into r2520;\n    mul r2520 r2238 into r2521;\n    and r2521 18446744073709551615u128 into r2522;\n    lt r2292 r2522 into r2523;\n    add r2292 18446744073709551616u128 into r2524;\n    sub r2524 r2522 into r2525;\n    and r2525 18446744073709551615u128 into r2526;\n    shr r2521 64u8 into r2527;\n    ternary r2523 1u128 0u128 into r2528;\n    add r2527 r2528 into r2529;\n    mul r2520 r2239 into r2530;\n    add r2530 r2529 into r2531;\n    and r2531 18446744073709551615u128 into r2532;\n    lt r2471 r2532 into r2533;\n    add r2471 18446744073709551616u128 into r2534;\n    sub r2534 r2532 into r2535;\n    and r2535 18446744073709551615u128 into r2536;\n    shr r2531 64u8 into r2537;\n    ternary r2533 1u128 0u128 into r2538;\n    add r2537 r2538 into r2539;\n    mul r2520 r2240 into r2540;\n    add r2540 r2539 into r2541;\n    and r2541 18446744073709551615u128 into r2542;\n    lt r2477 r2542 into r2543;\n    add r2477 18446744073709551616u128 into r2544;\n    sub r2544 r2542 into r2545;\n    and r2545 18446744073709551615u128 into r2546;\n    shr r2541 64u8 into r2547;\n    ternary r2543 1u128 0u128 into r2548;\n    add r2547 r2548 into r2549;\n    mul r2520 r2241 into r2550;\n    add r2550 r2549 into r2551;\n    and r2551 18446744073709551615u128 into r2552;\n    lt r2483 r2552 into r2553;\n    add r2483 18446744073709551616u128 into r2554;\n    sub r2554 r2552 into r2555;\n    and r2555 18446744073709551615u128 into r2556;\n    shr r2551 64u8 into r2557;\n    ternary r2553 1u128 0u128 into r2558;\n    add r2557 r2558 into r2559;\n    lt r2489 r2559 into r2560;\n    add r2489 18446744073709551616u128 into r2561;\n    sub r2561 r2559 into r2562;\n    and r2562 18446744073709551615u128 into r2563;\n    sub.w r2520 1u128 into r2564;\n    ternary r2560 r2564 r2520 into r2565;\n    add r2526 r2238 into r2566;\n    and r2566 18446744073709551615u128 into r2567;\n    ternary r2560 r2567 r2526 into r2568;\n    shr r2566 64u8 into r2569;\n    ternary r2560 r2569 0u128 into r2570;\n    add r2536 r2239 into r2571;\n    add r2571 r2570 into r2572;\n    and r2572 18446744073709551615u128 into r2573;\n    ternary r2560 r2573 r2536 into r2574;\n    shr r2572 64u8 into r2575;\n    ternary r2560 r2575 0u128 into r2576;\n    add r2546 r2240 into r2577;\n    add r2577 r2576 into r2578;\n    and r2578 18446744073709551615u128 into r2579;\n    ternary r2560 r2579 r2546 into r2580;\n    shr r2578 64u8 into r2581;\n    ternary r2560 r2581 0u128 into r2582;\n    add r2556 r2241 into r2583;\n    add r2583 r2582 into r2584;\n    and r2584 18446744073709551615u128 into r2585;\n    ternary r2560 r2585 r2556 into r2586;\n    shr r2584 64u8 into r2587;\n    ternary r2560 r2587 0u128 into r2588;\n    add r2563 r2588 into r2589;\n    shl r2586 64u8 into r2590;\n    add r2590 r2580 into r2591;\n    div r2591 r2241 into r2592;\n    gt r2592 18446744073709551615u128 into r2593;\n    ternary r2593 18446744073709551615u128 r2592 into r2594;\n    mul r2594 r2241 into r2595;\n    sub r2591 r2595 into r2596;\n    lte r2596 18446744073709551615u128 into r2597;\n    mul r2594 r2240 into r2598;\n    and r2596 18446744073709551615u128 into r2599;\n    shl r2599 64u8 into r2600;\n    add r2600 r2574 into r2601;\n    gt r2598 r2601 into r2602;\n    and r2597 r2602 into r2603;\n    sub.w r2594 1u128 into r2604;\n    ternary r2603 r2604 r2594 into r2605;\n    add r2596 r2241 into r2606;\n    ternary r2603 r2606 r2596 into r2607;\n    lte r2607 18446744073709551615u128 into r2608;\n    and r2603 r2608 into r2609;\n    mul r2605 r2240 into r2610;\n    and r2607 18446744073709551615u128 into r2611;\n    shl r2611 64u8 into r2612;\n    add r2612 r2574 into r2613;\n    gt r2610 r2613 into r2614;\n    and r2609 r2614 into r2615;\n    sub.w r2605 1u128 into r2616;\n    ternary r2615 r2616 r2605 into r2617;\n    mul r2617 r2238 into r2618;\n    and r2618 18446744073709551615u128 into r2619;\n    lt r2291 r2619 into r2620;\n    add r2291 18446744073709551616u128 into r2621;\n    sub r2621 r2619 into r2622;\n    and r2622 18446744073709551615u128 into r2623;\n    shr r2618 64u8 into r2624;\n    ternary r2620 1u128 0u128 into r2625;\n    add r2624 r2625 into r2626;\n    mul r2617 r2239 into r2627;\n    add r2627 r2626 into r2628;\n    and r2628 18446744073709551615u128 into r2629;\n    lt r2568 r2629 into r2630;\n    add r2568 18446744073709551616u128 into r2631;\n    sub r2631 r2629 into r2632;\n    and r2632 18446744073709551615u128 into r2633;\n    shr r2628 64u8 into r2634;\n    ternary r2630 1u128 0u128 into r2635;\n    add r2634 r2635 into r2636;\n    mul r2617 r2240 into r2637;\n    add r2637 r2636 into r2638;\n    and r2638 18446744073709551615u128 into r2639;\n    lt r2574 r2639 into r2640;\n    add r2574 18446744073709551616u128 into r2641;\n    sub r2641 r2639 into r2642;\n    and r2642 18446744073709551615u128 into r2643;\n    shr r2638 64u8 into r2644;\n    ternary r2640 1u128 0u128 into r2645;\n    add r2644 r2645 into r2646;\n    mul r2617 r2241 into r2647;\n    add r2647 r2646 into r2648;\n    and r2648 18446744073709551615u128 into r2649;\n    lt r2580 r2649 into r2650;\n    add r2580 18446744073709551616u128 into r2651;\n    sub r2651 r2649 into r2652;\n    and r2652 18446744073709551615u128 into r2653;\n    shr r2648 64u8 into r2654;\n    ternary r2650 1u128 0u128 into r2655;\n    add r2654 r2655 into r2656;\n    lt r2586 r2656 into r2657;\n    add r2586 18446744073709551616u128 into r2658;\n    sub r2658 r2656 into r2659;\n    and r2659 18446744073709551615u128 into r2660;\n    sub.w r2617 1u128 into r2661;\n    ternary r2657 r2661 r2617 into r2662;\n    add r2623 r2238 into r2663;\n    and r2663 18446744073709551615u128 into r2664;\n    ternary r2657 r2664 r2623 into r2665;\n    shr r2663 64u8 into r2666;\n    ternary r2657 r2666 0u128 into r2667;\n    add r2633 r2239 into r2668;\n    add r2668 r2667 into r2669;\n    and r2669 18446744073709551615u128 into r2670;\n    ternary r2657 r2670 r2633 into r2671;\n    shr r2669 64u8 into r2672;\n    ternary r2657 r2672 0u128 into r2673;\n    add r2643 r2240 into r2674;\n    add r2674 r2673 into r2675;\n    and r2675 18446744073709551615u128 into r2676;\n    ternary r2657 r2676 r2643 into r2677;\n    shr r2675 64u8 into r2678;\n    ternary r2657 r2678 0u128 into r2679;\n    add r2653 r2241 into r2680;\n    add r2680 r2679 into r2681;\n    and r2681 18446744073709551615u128 into r2682;\n    ternary r2657 r2682 r2653 into r2683;\n    shr r2681 64u8 into r2684;\n    ternary r2657 r2684 0u128 into r2685;\n    add r2660 r2685 into r2686;\n    shl r2371 64u8 into r2687;\n    add r2687 r2468 into r2688;\n    shl r2565 64u8 into r2689;\n    add r2689 r2662 into r2690;\n    cast r2688 r2690 into r2691 as U256__8JquwLopp8;\n    shl r2683 64u8 into r2692;\n    add r2692 r2677 into r2693;\n    shl r2671 64u8 into r2694;\n    add r2694 r2665 into r2695;\n    cast r2224 into r2696 as u8;\n    is.eq r2696 0u8 into r2697;\n    sub 128u8 r2696 into r2698;\n    shl.w r2693 r2698 into r2699;\n    ternary r2697 0u128 r2699 into r2700;\n    shr r2695 r2696 into r2701;\n    or r2701 r2700 into r2702;\n    shr r2693 r2696 into r2703;\n    ternary r2234 0u128 r2703 into r2704;\n    ternary r2234 r2703 r2702 into r2705;\n    cast r2704 r2705 into r2706 as U256__8JquwLopp8;\n    is.eq r2706.hi 0u128 into r2707;\n    is.eq r2706.lo 0u128 into r2708;\n    and r2707 r2708 into r2709;\n    not r2709 into r2710;\n    is.eq r2691.hi 340282366920938463463374607431768211455u128 into r2711;\n    is.eq r2691.lo 340282366920938463463374607431768211455u128 into r2712;\n    and r2711 r2712 into r2713;\n    and r2710 r2713 into r2714;\n    not r2714 into r2715;\n    assert.eq r2715 true;\n    add.w r2691.lo 1u128 into r2716;\n    lt r2716 r2691.lo into r2717;\n    ternary r2717 1u128 0u128 into r2718;\n    add.w r2691.hi r2718 into r2719;\n    cast r2719 r2716 into r2720 as U256__8JquwLopp8;\n    ternary r2710 r2720.hi r2691.hi into r2721;\n    ternary r2710 r2720.lo r2691.lo into r2722;\n    cast r2721 r2722 into r2723 as U256__8JquwLopp8;\n    ternary r1540 r0.hi r2723.hi into r2724;\n    ternary r1540 r0.lo r2723.lo into r2725;\n    cast r2724 r2725 into r2726 as U256__8JquwLopp8;\n    cast 0u128 r109 into r2727 as U256__8JquwLopp8;\n    cast 0u128 r1539 into r2728 as U256__8JquwLopp8;\n    shr r2727.lo 64u8 into r2729;\n    and r2727.lo 18446744073709551615u128 into r2730;\n    shr r2727.lo 64u8 into r2731;\n    and r2730 18446744073709551615u128 into r2732;\n    shr r2730 64u8 into r2733;\n    and r2731 18446744073709551615u128 into r2734;\n    add r2733 r2734 into r2735;\n    and r2735 18446744073709551615u128 into r2736;\n    shr r2735 64u8 into r2737;\n    shr r2731 64u8 into r2738;\n    add r2738 r2737 into r2739;\n    and r2739 18446744073709551615u128 into r2740;\n    shr r2739 64u8 into r2741;\n    shl r2741 64u8 into r2742;\n    add r2742 r2740 into r2743;\n    shl r2736 64u8 into r2744;\n    add r2744 r2732 into r2745;\n    shr r2727.hi 64u8 into r2746;\n    and r2727.hi 18446744073709551615u128 into r2747;\n    shr r2727.hi 64u8 into r2748;\n    and r2747 18446744073709551615u128 into r2749;\n    shr r2747 64u8 into r2750;\n    and r2748 18446744073709551615u128 into r2751;\n    add r2750 r2751 into r2752;\n    and r2752 18446744073709551615u128 into r2753;\n    shr r2752 64u8 into r2754;\n    shr r2748 64u8 into r2755;\n    add r2755 r2754 into r2756;\n    and r2756 18446744073709551615u128 into r2757;\n    shr r2756 64u8 into r2758;\n    shl r2758 64u8 into r2759;\n    add r2759 r2757 into r2760;\n    shl r2753 64u8 into r2761;\n    add r2761 r2749 into r2762;\n    lt r2745 0u128 into r2763;\n    ternary r2763 1u128 0u128 into r2764;\n    lt r2745 r2745 into r2765;\n    ternary r2765 1u128 0u128 into r2766;\n    add r2764 r2766 into r2767;\n    lt r2743 r2743 into r2768;\n    ternary r2768 1u128 0u128 into r2769;\n    add.w r2743 r2762 into r2770;\n    lt r2770 r2743 into r2771;\n    ternary r2771 1u128 0u128 into r2772;\n    add.w r2770 r2767 into r2773;\n    lt r2773 r2770 into r2774;\n    ternary r2774 1u128 0u128 into r2775;\n    add r2769 r2772 into r2776;\n    add r2776 r2775 into r2777;\n    add.w r2760 r2777 into r2778;\n    cast r2778 r2773 into r2779 as U256__8JquwLopp8;\n    cast r2745 0u128 into r2780 as U256__8JquwLopp8;\n    lt r2779.hi r2728.hi into r2781;\n    gt r2779.hi r2728.hi into r2782;\n    lt r2779.lo r2728.lo into r2783;\n    ternary r2782 false r2783 into r2784;\n    ternary r2781 true r2784 into r2785;\n    assert.eq r2785 true;\n    gt r2728.hi 0u128 into r2786;\n    ternary r2786 r2728.hi r2728.lo into r2787;\n    ternary r2786 128u32 0u32 into r2788;\n    gte r2787 18446744073709551616u128 into r2789;\n    shr r2787 64u8 into r2790;\n    ternary r2789 r2790 r2787 into r2791;\n    ternary r2789 64u32 0u32 into r2792;\n    gte r2791 4294967296u128 into r2793;\n    shr r2791 32u8 into r2794;\n    add r2792 32u32 into r2795;\n    ternary r2793 r2794 r2791 into r2796;\n    ternary r2793 r2795 r2792 into r2797;\n    gte r2796 65536u128 into r2798;\n    shr r2796 16u8 into r2799;\n    add r2797 16u32 into r2800;\n    ternary r2798 r2799 r2796 into r2801;\n    ternary r2798 r2800 r2797 into r2802;\n    gte r2801 256u128 into r2803;\n    shr r2801 8u8 into r2804;\n    add r2802 8u32 into r2805;\n    ternary r2803 r2804 r2801 into r2806;\n    ternary r2803 r2805 r2802 into r2807;\n    gte r2806 16u128 into r2808;\n    shr r2806 4u8 into r2809;\n    add r2807 4u32 into r2810;\n    ternary r2808 r2809 r2806 into r2811;\n    ternary r2808 r2810 r2807 into r2812;\n    gte r2811 4u128 into r2813;\n    shr r2811 2u8 into r2814;\n    add r2812 2u32 into r2815;\n    ternary r2813 r2814 r2811 into r2816;\n    ternary r2813 r2815 r2812 into r2817;\n    gte r2816 2u128 into r2818;\n    add r2817 1u32 into r2819;\n    ternary r2818 r2819 r2817 into r2820;\n    add r2788 r2820 into r2821;\n    sub 255u32 r2821 into r2822;\n    cast r2822 into r2823 as u16;\n    and r2823 127u16 into r2824;\n    cast r2824 into r2825 as u8;\n    is.eq r2825 0u8 into r2826;\n    sub 128u8 r2825 into r2827;\n    shr.w r2728.lo r2827 into r2828;\n    ternary r2826 0u128 r2828 into r2829;\n    shl.w r2728.hi r2825 into r2830;\n    or r2830 r2829 into r2831;\n    shl.w r2728.lo r2825 into r2832;\n    shl.w r2728.lo r2825 into r2833;\n    gte r2823 128u16 into r2834;\n    ternary r2834 r2833 r2831 into r2835;\n    ternary r2834 0u128 r2832 into r2836;\n    cast r2835 r2836 into r2837 as U256__8JquwLopp8;\n    and r2837.lo 18446744073709551615u128 into r2838;\n    shr r2837.lo 64u8 into r2839;\n    and r2837.hi 18446744073709551615u128 into r2840;\n    shr r2837.hi 64u8 into r2841;\n    cast r2824 into r2842 as u8;\n    is.eq r2842 0u8 into r2843;\n    sub 128u8 r2842 into r2844;\n    shr.w r2780.lo r2844 into r2845;\n    ternary r2843 0u128 r2845 into r2846;\n    shl.w r2780.hi r2842 into r2847;\n    or r2847 r2846 into r2848;\n    shl.w r2780.lo r2842 into r2849;\n    shl.w r2780.lo r2842 into r2850;\n    ternary r2834 r2850 r2848 into r2851;\n    ternary r2834 0u128 r2849 into r2852;\n    cast r2851 r2852 into r2853 as U256__8JquwLopp8;\n    is.eq r2823 0u16 into r2854;\n    sub 256u16 r2823 into r2855;\n    and r2855 127u16 into r2856;\n    cast r2856 into r2857 as u8;\n    is.eq r2857 0u8 into r2858;\n    sub 128u8 r2857 into r2859;\n    shl.w r2780.hi r2859 into r2860;\n    ternary r2858 0u128 r2860 into r2861;\n    shr r2780.lo r2857 into r2862;\n    or r2862 r2861 into r2863;\n    shr r2780.hi r2857 into r2864;\n    shr r2780.hi r2857 into r2865;\n    gte r2855 128u16 into r2866;\n    ternary r2866 0u128 r2864 into r2867;\n    ternary r2866 r2865 r2863 into r2868;\n    cast r2867 r2868 into r2869 as U256__8JquwLopp8;\n    ternary r2854 0u128 r2869.hi into r2870;\n    ternary r2854 0u128 r2869.lo into r2871;\n    cast r2870 r2871 into r2872 as U256__8JquwLopp8;\n    cast r2824 into r2873 as u8;\n    is.eq r2873 0u8 into r2874;\n    sub 128u8 r2873 into r2875;\n    shr.w r2779.lo r2875 into r2876;\n    ternary r2874 0u128 r2876 into r2877;\n    shl.w r2779.hi r2873 into r2878;\n    or r2878 r2877 into r2879;\n    shl.w r2779.lo r2873 into r2880;\n    shl.w r2779.lo r2873 into r2881;\n    ternary r2834 r2881 r2879 into r2882;\n    ternary r2834 0u128 r2880 into r2883;\n    cast r2882 r2883 into r2884 as U256__8JquwLopp8;\n    add.w r2884.lo r2872.lo into r2885;\n    lt r2885 r2884.lo into r2886;\n    ternary r2886 1u128 0u128 into r2887;\n    add.w r2884.hi r2872.hi into r2888;\n    add.w r2888 r2887 into r2889;\n    cast r2889 r2885 into r2890 as U256__8JquwLopp8;\n    and r2853.lo 18446744073709551615u128 into r2891;\n    shr r2853.lo 64u8 into r2892;\n    and r2853.hi 18446744073709551615u128 into r2893;\n    shr r2853.hi 64u8 into r2894;\n    and r2890.lo 18446744073709551615u128 into r2895;\n    shr r2890.lo 64u8 into r2896;\n    and r2890.hi 18446744073709551615u128 into r2897;\n    shr r2890.hi 64u8 into r2898;\n    shl r2898 64u8 into r2899;\n    add r2899 r2897 into r2900;\n    div r2900 r2841 into r2901;\n    gt r2901 18446744073709551615u128 into r2902;\n    ternary r2902 18446744073709551615u128 r2901 into r2903;\n    mul r2903 r2841 into r2904;\n    sub r2900 r2904 into r2905;\n    lte r2905 18446744073709551615u128 into r2906;\n    mul r2903 r2840 into r2907;\n    and r2905 18446744073709551615u128 into r2908;\n    shl r2908 64u8 into r2909;\n    add r2909 r2896 into r2910;\n    gt r2907 r2910 into r2911;\n    and r2906 r2911 into r2912;\n    sub.w r2903 1u128 into r2913;\n    ternary r2912 r2913 r2903 into r2914;\n    add r2905 r2841 into r2915;\n    ternary r2912 r2915 r2905 into r2916;\n    lte r2916 18446744073709551615u128 into r2917;\n    and r2912 r2917 into r2918;\n    mul r2914 r2840 into r2919;\n    and r2916 18446744073709551615u128 into r2920;\n    shl r2920 64u8 into r2921;\n    add r2921 r2896 into r2922;\n    gt r2919 r2922 into r2923;\n    and r2918 r2923 into r2924;\n    sub.w r2914 1u128 into r2925;\n    ternary r2924 r2925 r2914 into r2926;\n    mul r2926 r2838 into r2927;\n    and r2927 18446744073709551615u128 into r2928;\n    lt r2894 r2928 into r2929;\n    add r2894 18446744073709551616u128 into r2930;\n    sub r2930 r2928 into r2931;\n    and r2931 18446744073709551615u128 into r2932;\n    shr r2927 64u8 into r2933;\n    ternary r2929 1u128 0u128 into r2934;\n    add r2933 r2934 into r2935;\n    mul r2926 r2839 into r2936;\n    add r2936 r2935 into r2937;\n    and r2937 18446744073709551615u128 into r2938;\n    lt r2895 r2938 into r2939;\n    add r2895 18446744073709551616u128 into r2940;\n    sub r2940 r2938 into r2941;\n    and r2941 18446744073709551615u128 into r2942;\n    shr r2937 64u8 into r2943;\n    ternary r2939 1u128 0u128 into r2944;\n    add r2943 r2944 into r2945;\n    mul r2926 r2840 into r2946;\n    add r2946 r2945 into r2947;\n    and r2947 18446744073709551615u128 into r2948;\n    lt r2896 r2948 into r2949;\n    add r2896 18446744073709551616u128 into r2950;\n    sub r2950 r2948 into r2951;\n    and r2951 18446744073709551615u128 into r2952;\n    shr r2947 64u8 into r2953;\n    ternary r2949 1u128 0u128 into r2954;\n    add r2953 r2954 into r2955;\n    mul r2926 r2841 into r2956;\n    add r2956 r2955 into r2957;\n    and r2957 18446744073709551615u128 into r2958;\n    lt r2897 r2958 into r2959;\n    add r2897 18446744073709551616u128 into r2960;\n    sub r2960 r2958 into r2961;\n    and r2961 18446744073709551615u128 into r2962;\n    shr r2957 64u8 into r2963;\n    ternary r2959 1u128 0u128 into r2964;\n    add r2963 r2964 into r2965;\n    lt r2898 r2965 into r2966;\n    add r2898 18446744073709551616u128 into r2967;\n    sub r2967 r2965 into r2968;\n    and r2968 18446744073709551615u128 into r2969;\n    sub.w r2926 1u128 into r2970;\n    ternary r2966 r2970 r2926 into r2971;\n    add r2932 r2838 into r2972;\n    and r2972 18446744073709551615u128 into r2973;\n    ternary r2966 r2973 r2932 into r2974;\n    shr r2972 64u8 into r2975;\n    ternary r2966 r2975 0u128 into r2976;\n    add r2942 r2839 into r2977;\n    add r2977 r2976 into r2978;\n    and r2978 18446744073709551615u128 into r2979;\n    ternary r2966 r2979 r2942 into r2980;\n    shr r2978 64u8 into r2981;\n    ternary r2966 r2981 0u128 into r2982;\n    add r2952 r2840 into r2983;\n    add r2983 r2982 into r2984;\n    and r2984 18446744073709551615u128 into r2985;\n    ternary r2966 r2985 r2952 into r2986;\n    shr r2984 64u8 into r2987;\n    ternary r2966 r2987 0u128 into r2988;\n    add r2962 r2841 into r2989;\n    add r2989 r2988 into r2990;\n    and r2990 18446744073709551615u128 into r2991;\n    ternary r2966 r2991 r2962 into r2992;\n    shr r2990 64u8 into r2993;\n    ternary r2966 r2993 0u128 into r2994;\n    add r2969 r2994 into r2995;\n    shl r2992 64u8 into r2996;\n    add r2996 r2986 into r2997;\n    div r2997 r2841 into r2998;\n    gt r2998 18446744073709551615u128 into r2999;\n    ternary r2999 18446744073709551615u128 r2998 into r3000;\n    mul r3000 r2841 into r3001;\n    sub r2997 r3001 into r3002;\n    lte r3002 18446744073709551615u128 into r3003;\n    mul r3000 r2840 into r3004;\n    and r3002 18446744073709551615u128 into r3005;\n    shl r3005 64u8 into r3006;\n    add r3006 r2980 into r3007;\n    gt r3004 r3007 into r3008;\n    and r3003 r3008 into r3009;\n    sub.w r3000 1u128 into r3010;\n    ternary r3009 r3010 r3000 into r3011;\n    add r3002 r2841 into r3012;\n    ternary r3009 r3012 r3002 into r3013;\n    lte r3013 18446744073709551615u128 into r3014;\n    and r3009 r3014 into r3015;\n    mul r3011 r2840 into r3016;\n    and r3013 18446744073709551615u128 into r3017;\n    shl r3017 64u8 into r3018;\n    add r3018 r2980 into r3019;\n    gt r3016 r3019 into r3020;\n    and r3015 r3020 into r3021;\n    sub.w r3011 1u128 into r3022;\n    ternary r3021 r3022 r3011 into r3023;\n    mul r3023 r2838 into r3024;\n    and r3024 18446744073709551615u128 into r3025;\n    lt r2893 r3025 into r3026;\n    add r2893 18446744073709551616u128 into r3027;\n    sub r3027 r3025 into r3028;\n    and r3028 18446744073709551615u128 into r3029;\n    shr r3024 64u8 into r3030;\n    ternary r3026 1u128 0u128 into r3031;\n    add r3030 r3031 into r3032;\n    mul r3023 r2839 into r3033;\n    add r3033 r3032 into r3034;\n    and r3034 18446744073709551615u128 into r3035;\n    lt r2974 r3035 into r3036;\n    add r2974 18446744073709551616u128 into r3037;\n    sub r3037 r3035 into r3038;\n    and r3038 18446744073709551615u128 into r3039;\n    shr r3034 64u8 into r3040;\n    ternary r3036 1u128 0u128 into r3041;\n    add r3040 r3041 into r3042;\n    mul r3023 r2840 into r3043;\n    add r3043 r3042 into r3044;\n    and r3044 18446744073709551615u128 into r3045;\n    lt r2980 r3045 into r3046;\n    add r2980 18446744073709551616u128 into r3047;\n    sub r3047 r3045 into r3048;\n    and r3048 18446744073709551615u128 into r3049;\n    shr r3044 64u8 into r3050;\n    ternary r3046 1u128 0u128 into r3051;\n    add r3050 r3051 into r3052;\n    mul r3023 r2841 into r3053;\n    add r3053 r3052 into r3054;\n    and r3054 18446744073709551615u128 into r3055;\n    lt r2986 r3055 into r3056;\n    add r2986 18446744073709551616u128 into r3057;\n    sub r3057 r3055 into r3058;\n    and r3058 18446744073709551615u128 into r3059;\n    shr r3054 64u8 into r3060;\n    ternary r3056 1u128 0u128 into r3061;\n    add r3060 r3061 into r3062;\n    lt r2992 r3062 into r3063;\n    add r2992 18446744073709551616u128 into r3064;\n    sub r3064 r3062 into r3065;\n    and r3065 18446744073709551615u128 into r3066;\n    sub.w r3023 1u128 into r3067;\n    ternary r3063 r3067 r3023 into r3068;\n    add r3029 r2838 into r3069;\n    and r3069 18446744073709551615u128 into r3070;\n    ternary r3063 r3070 r3029 into r3071;\n    shr r3069 64u8 into r3072;\n    ternary r3063 r3072 0u128 into r3073;\n    add r3039 r2839 into r3074;\n    add r3074 r3073 into r3075;\n    and r3075 18446744073709551615u128 into r3076;\n    ternary r3063 r3076 r3039 into r3077;\n    shr r3075 64u8 into r3078;\n    ternary r3063 r3078 0u128 into r3079;\n    add r3049 r2840 into r3080;\n    add r3080 r3079 into r3081;\n    and r3081 18446744073709551615u128 into r3082;\n    ternary r3063 r3082 r3049 into r3083;\n    shr r3081 64u8 into r3084;\n    ternary r3063 r3084 0u128 into r3085;\n    add r3059 r2841 into r3086;\n    add r3086 r3085 into r3087;\n    and r3087 18446744073709551615u128 into r3088;\n    ternary r3063 r3088 r3059 into r3089;\n    shr r3087 64u8 into r3090;\n    ternary r3063 r3090 0u128 into r3091;\n    add r3066 r3091 into r3092;\n    shl r3089 64u8 into r3093;\n    add r3093 r3083 into r3094;\n    div r3094 r2841 into r3095;\n    gt r3095 18446744073709551615u128 into r3096;\n    ternary r3096 18446744073709551615u128 r3095 into r3097;\n    mul r3097 r2841 into r3098;\n    sub r3094 r3098 into r3099;\n    lte r3099 18446744073709551615u128 into r3100;\n    mul r3097 r2840 into r3101;\n    and r3099 18446744073709551615u128 into r3102;\n    shl r3102 64u8 into r3103;\n    add r3103 r3077 into r3104;\n    gt r3101 r3104 into r3105;\n    and r3100 r3105 into r3106;\n    sub.w r3097 1u128 into r3107;\n    ternary r3106 r3107 r3097 into r3108;\n    add r3099 r2841 into r3109;\n    ternary r3106 r3109 r3099 into r3110;\n    lte r3110 18446744073709551615u128 into r3111;\n    and r3106 r3111 into r3112;\n    mul r3108 r2840 into r3113;\n    and r3110 18446744073709551615u128 into r3114;\n    shl r3114 64u8 into r3115;\n    add r3115 r3077 into r3116;\n    gt r3113 r3116 into r3117;\n    and r3112 r3117 into r3118;\n    sub.w r3108 1u128 into r3119;\n    ternary r3118 r3119 r3108 into r3120;\n    mul r3120 r2838 into r3121;\n    and r3121 18446744073709551615u128 into r3122;\n    lt r2892 r3122 into r3123;\n    add r2892 18446744073709551616u128 into r3124;\n    sub r3124 r3122 into r3125;\n    and r3125 18446744073709551615u128 into r3126;\n    shr r3121 64u8 into r3127;\n    ternary r3123 1u128 0u128 into r3128;\n    add r3127 r3128 into r3129;\n    mul r3120 r2839 into r3130;\n    add r3130 r3129 into r3131;\n    and r3131 18446744073709551615u128 into r3132;\n    lt r3071 r3132 into r3133;\n    add r3071 18446744073709551616u128 into r3134;\n    sub r3134 r3132 into r3135;\n    and r3135 18446744073709551615u128 into r3136;\n    shr r3131 64u8 into r3137;\n    ternary r3133 1u128 0u128 into r3138;\n    add r3137 r3138 into r3139;\n    mul r3120 r2840 into r3140;\n    add r3140 r3139 into r3141;\n    and r3141 18446744073709551615u128 into r3142;\n    lt r3077 r3142 into r3143;\n    add r3077 18446744073709551616u128 into r3144;\n    sub r3144 r3142 into r3145;\n    and r3145 18446744073709551615u128 into r3146;\n    shr r3141 64u8 into r3147;\n    ternary r3143 1u128 0u128 into r3148;\n    add r3147 r3148 into r3149;\n    mul r3120 r2841 into r3150;\n    add r3150 r3149 into r3151;\n    and r3151 18446744073709551615u128 into r3152;\n    lt r3083 r3152 into r3153;\n    add r3083 18446744073709551616u128 into r3154;\n    sub r3154 r3152 into r3155;\n    and r3155 18446744073709551615u128 into r3156;\n    shr r3151 64u8 into r3157;\n    ternary r3153 1u128 0u128 into r3158;\n    add r3157 r3158 into r3159;\n    lt r3089 r3159 into r3160;\n    add r3089 18446744073709551616u128 into r3161;\n    sub r3161 r3159 into r3162;\n    and r3162 18446744073709551615u128 into r3163;\n    sub.w r3120 1u128 into r3164;\n    ternary r3160 r3164 r3120 into r3165;\n    add r3126 r2838 into r3166;\n    and r3166 18446744073709551615u128 into r3167;\n    ternary r3160 r3167 r3126 into r3168;\n    shr r3166 64u8 into r3169;\n    ternary r3160 r3169 0u128 into r3170;\n    add r3136 r2839 into r3171;\n    add r3171 r3170 into r3172;\n    and r3172 18446744073709551615u128 into r3173;\n    ternary r3160 r3173 r3136 into r3174;\n    shr r3172 64u8 into r3175;\n    ternary r3160 r3175 0u128 into r3176;\n    add r3146 r2840 into r3177;\n    add r3177 r3176 into r3178;\n    and r3178 18446744073709551615u128 into r3179;\n    ternary r3160 r3179 r3146 into r3180;\n    shr r3178 64u8 into r3181;\n    ternary r3160 r3181 0u128 into r3182;\n    add r3156 r2841 into r3183;\n    add r3183 r3182 into r3184;\n    and r3184 18446744073709551615u128 into r3185;\n    ternary r3160 r3185 r3156 into r3186;\n    shr r3184 64u8 into r3187;\n    ternary r3160 r3187 0u128 into r3188;\n    add r3163 r3188 into r3189;\n    shl r3186 64u8 into r3190;\n    add r3190 r3180 into r3191;\n    div r3191 r2841 into r3192;\n    gt r3192 18446744073709551615u128 into r3193;\n    ternary r3193 18446744073709551615u128 r3192 into r3194;\n    mul r3194 r2841 into r3195;\n    sub r3191 r3195 into r3196;\n    lte r3196 18446744073709551615u128 into r3197;\n    mul r3194 r2840 into r3198;\n    and r3196 18446744073709551615u128 into r3199;\n    shl r3199 64u8 into r3200;\n    add r3200 r3174 into r3201;\n    gt r3198 r3201 into r3202;\n    and r3197 r3202 into r3203;\n    sub.w r3194 1u128 into r3204;\n    ternary r3203 r3204 r3194 into r3205;\n    add r3196 r2841 into r3206;\n    ternary r3203 r3206 r3196 into r3207;\n    lte r3207 18446744073709551615u128 into r3208;\n    and r3203 r3208 into r3209;\n    mul r3205 r2840 into r3210;\n    and r3207 18446744073709551615u128 into r3211;\n    shl r3211 64u8 into r3212;\n    add r3212 r3174 into r3213;\n    gt r3210 r3213 into r3214;\n    and r3209 r3214 into r3215;\n    sub.w r3205 1u128 into r3216;\n    ternary r3215 r3216 r3205 into r3217;\n    mul r3217 r2838 into r3218;\n    and r3218 18446744073709551615u128 into r3219;\n    lt r2891 r3219 into r3220;\n    add r2891 18446744073709551616u128 into r3221;\n    sub r3221 r3219 into r3222;\n    and r3222 18446744073709551615u128 into r3223;\n    shr r3218 64u8 into r3224;\n    ternary r3220 1u128 0u128 into r3225;\n    add r3224 r3225 into r3226;\n    mul r3217 r2839 into r3227;\n    add r3227 r3226 into r3228;\n    and r3228 18446744073709551615u128 into r3229;\n    lt r3168 r3229 into r3230;\n    add r3168 18446744073709551616u128 into r3231;\n    sub r3231 r3229 into r3232;\n    and r3232 18446744073709551615u128 into r3233;\n    shr r3228 64u8 into r3234;\n    ternary r3230 1u128 0u128 into r3235;\n    add r3234 r3235 into r3236;\n    mul r3217 r2840 into r3237;\n    add r3237 r3236 into r3238;\n    and r3238 18446744073709551615u128 into r3239;\n    lt r3174 r3239 into r3240;\n    add r3174 18446744073709551616u128 into r3241;\n    sub r3241 r3239 into r3242;\n    and r3242 18446744073709551615u128 into r3243;\n    shr r3238 64u8 into r3244;\n    ternary r3240 1u128 0u128 into r3245;\n    add r3244 r3245 into r3246;\n    mul r3217 r2841 into r3247;\n    add r3247 r3246 into r3248;\n    and r3248 18446744073709551615u128 into r3249;\n    lt r3180 r3249 into r3250;\n    add r3180 18446744073709551616u128 into r3251;\n    sub r3251 r3249 into r3252;\n    and r3252 18446744073709551615u128 into r3253;\n    shr r3248 64u8 into r3254;\n    ternary r3250 1u128 0u128 into r3255;\n    add r3254 r3255 into r3256;\n    lt r3186 r3256 into r3257;\n    add r3186 18446744073709551616u128 into r3258;\n    sub r3258 r3256 into r3259;\n    and r3259 18446744073709551615u128 into r3260;\n    sub.w r3217 1u128 into r3261;\n    ternary r3257 r3261 r3217 into r3262;\n    add r3223 r2838 into r3263;\n    and r3263 18446744073709551615u128 into r3264;\n    ternary r3257 r3264 r3223 into r3265;\n    shr r3263 64u8 into r3266;\n    ternary r3257 r3266 0u128 into r3267;\n    add r3233 r2839 into r3268;\n    add r3268 r3267 into r3269;\n    and r3269 18446744073709551615u128 into r3270;\n    ternary r3257 r3270 r3233 into r3271;\n    shr r3269 64u8 into r3272;\n    ternary r3257 r3272 0u128 into r3273;\n    add r3243 r2840 into r3274;\n    add r3274 r3273 into r3275;\n    and r3275 18446744073709551615u128 into r3276;\n    ternary r3257 r3276 r3243 into r3277;\n    shr r3275 64u8 into r3278;\n    ternary r3257 r3278 0u128 into r3279;\n    add r3253 r2841 into r3280;\n    add r3280 r3279 into r3281;\n    and r3281 18446744073709551615u128 into r3282;\n    ternary r3257 r3282 r3253 into r3283;\n    shr r3281 64u8 into r3284;\n    ternary r3257 r3284 0u128 into r3285;\n    add r3260 r3285 into r3286;\n    shl r2971 64u8 into r3287;\n    add r3287 r3068 into r3288;\n    shl r3165 64u8 into r3289;\n    add r3289 r3262 into r3290;\n    cast r3288 r3290 into r3291 as U256__8JquwLopp8;\n    shl r3283 64u8 into r3292;\n    add r3292 r3277 into r3293;\n    shl r3271 64u8 into r3294;\n    add r3294 r3265 into r3295;\n    cast r2824 into r3296 as u8;\n    sub 128u8 r3296 into r3297;\n    shr r3295 r3296 into r3298;\n    shr r3293 r3296 into r3299;\n    cast r3291.hi r3291.lo into r3300 as U256__8JquwLopp8;\n    add.w r0.lo r3300.lo into r3301;\n    lt r3301 r0.lo into r3302;\n    ternary r3302 1u128 0u128 into r3303;\n    add.w r0.hi r3300.hi into r3304;\n    add.w r3304 r3303 into r3305;\n    cast r3305 r3301 into r3306 as U256__8JquwLopp8;\n    cast r3306.hi r3306.lo into r3307 as U256__8JquwLopp8;\n    ternary r10 r2726.hi r3307.hi into r3308;\n    ternary r10 r2726.lo r3307.lo into r3309;\n    cast r3308 r3309 into r3310 as U256__8JquwLopp8;\n    ternary r1526 r1537.hi r3310.hi into r3311;\n    ternary r1526 r1537.lo r3310.lo into r3312;\n    cast r3311 r3312 into r3313 as U256__8JquwLopp8;\n    lt r0.hi r3313.hi into r3314;\n    gt r0.hi r3313.hi into r3315;\n    lt r0.lo r3313.lo into r3316;\n    ternary r3315 false r3316 into r3317;\n    ternary r3314 true r3317 into r3318;\n    ternary r3318 r0.hi r3313.hi into r3319;\n    ternary r3318 r0.lo r3313.lo into r3320;\n    cast r3319 r3320 into r3321 as U256__8JquwLopp8;\n    lt r0.hi r3313.hi into r3322;\n    gt r0.hi r3313.hi into r3323;\n    lt r0.lo r3313.lo into r3324;\n    ternary r3323 false r3324 into r3325;\n    ternary r3322 true r3325 into r3326;\n    ternary r3326 r3313.hi r0.hi into r3327;\n    ternary r3326 r3313.lo r0.lo into r3328;\n    cast r3327 r3328 into r3329 as U256__8JquwLopp8;\n    lt r3329.lo r3321.lo into r3330;\n    ternary r3330 1u128 0u128 into r3331;\n    sub.w r3329.lo r3321.lo into r3332;\n    sub.w r3329.hi r3321.hi into r3333;\n    sub.w r3333 r3331 into r3334;\n    cast r3334 r3332 into r3335 as U256__8JquwLopp8;\n    cast 0u128 r1 into r3336 as U256__8JquwLopp8;\n    and r3336.lo 18446744073709551615u128 into r3337;\n    shr r3336.lo 64u8 into r3338;\n    and r3335.lo 18446744073709551615u128 into r3339;\n    shr r3335.lo 64u8 into r3340;\n    mul r3337 r3339 into r3341;\n    mul r3337 r3340 into r3342;\n    mul r3338 r3339 into r3343;\n    mul r3338 r3340 into r3344;\n    and r3341 18446744073709551615u128 into r3345;\n    shr r3341 64u8 into r3346;\n    and r3342 18446744073709551615u128 into r3347;\n    add r3346 r3347 into r3348;\n    and r3343 18446744073709551615u128 into r3349;\n    add r3348 r3349 into r3350;\n    and r3350 18446744073709551615u128 into r3351;\n    shr r3350 64u8 into r3352;\n    shr r3342 64u8 into r3353;\n    shr r3343 64u8 into r3354;\n    add r3353 r3354 into r3355;\n    and r3344 18446744073709551615u128 into r3356;\n    add r3355 r3356 into r3357;\n    add r3357 r3352 into r3358;\n    and r3358 18446744073709551615u128 into r3359;\n    shr r3358 64u8 into r3360;\n    shr r3344 64u8 into r3361;\n    add r3361 r3360 into r3362;\n    shl r3362 64u8 into r3363;\n    add r3363 r3359 into r3364;\n    shl r3351 64u8 into r3365;\n    add r3365 r3345 into r3366;\n    and r3336.lo 18446744073709551615u128 into r3367;\n    shr r3336.lo 64u8 into r3368;\n    and r3335.hi 18446744073709551615u128 into r3369;\n    shr r3335.hi 64u8 into r3370;\n    mul r3367 r3369 into r3371;\n    mul r3367 r3370 into r3372;\n    mul r3368 r3369 into r3373;\n    mul r3368 r3370 into r3374;\n    and r3371 18446744073709551615u128 into r3375;\n    shr r3371 64u8 into r3376;\n    and r3372 18446744073709551615u128 into r3377;\n    add r3376 r3377 into r3378;\n    and r3373 18446744073709551615u128 into r3379;\n    add r3378 r3379 into r3380;\n    and r3380 18446744073709551615u128 into r3381;\n    shr r3380 64u8 into r3382;\n    shr r3372 64u8 into r3383;\n    shr r3373 64u8 into r3384;\n    add r3383 r3384 into r3385;\n    and r3374 18446744073709551615u128 into r3386;\n    add r3385 r3386 into r3387;\n    add r3387 r3382 into r3388;\n    and r3388 18446744073709551615u128 into r3389;\n    shr r3388 64u8 into r3390;\n    shr r3374 64u8 into r3391;\n    add r3391 r3390 into r3392;\n    shl r3392 64u8 into r3393;\n    add r3393 r3389 into r3394;\n    shl r3381 64u8 into r3395;\n    add r3395 r3375 into r3396;\n    and r3336.hi 18446744073709551615u128 into r3397;\n    shr r3336.hi 64u8 into r3398;\n    and r3335.lo 18446744073709551615u128 into r3399;\n    shr r3335.lo 64u8 into r3400;\n    mul r3397 r3399 into r3401;\n    mul r3397 r3400 into r3402;\n    mul r3398 r3399 into r3403;\n    mul r3398 r3400 into r3404;\n    and r3401 18446744073709551615u128 into r3405;\n    shr r3401 64u8 into r3406;\n    and r3402 18446744073709551615u128 into r3407;\n    add r3406 r3407 into r3408;\n    and r3403 18446744073709551615u128 into r3409;\n    add r3408 r3409 into r3410;\n    and r3410 18446744073709551615u128 into r3411;\n    shr r3410 64u8 into r3412;\n    shr r3402 64u8 into r3413;\n    shr r3403 64u8 into r3414;\n    add r3413 r3414 into r3415;\n    and r3404 18446744073709551615u128 into r3416;\n    add r3415 r3416 into r3417;\n    add r3417 r3412 into r3418;\n    and r3418 18446744073709551615u128 into r3419;\n    shr r3418 64u8 into r3420;\n    shr r3404 64u8 into r3421;\n    add r3421 r3420 into r3422;\n    shl r3422 64u8 into r3423;\n    add r3423 r3419 into r3424;\n    shl r3411 64u8 into r3425;\n    add r3425 r3405 into r3426;\n    and r3336.hi 18446744073709551615u128 into r3427;\n    shr r3336.hi 64u8 into r3428;\n    and r3335.hi 18446744073709551615u128 into r3429;\n    shr r3335.hi 64u8 into r3430;\n    mul r3427 r3429 into r3431;\n    mul r3427 r3430 into r3432;\n    mul r3428 r3429 into r3433;\n    mul r3428 r3430 into r3434;\n    and r3431 18446744073709551615u128 into r3435;\n    shr r3431 64u8 into r3436;\n    and r3432 18446744073709551615u128 into r3437;\n    add r3436 r3437 into r3438;\n    and r3433 18446744073709551615u128 into r3439;\n    add r3438 r3439 into r3440;\n    and r3440 18446744073709551615u128 into r3441;\n    shr r3440 64u8 into r3442;\n    shr r3432 64u8 into r3443;\n    shr r3433 64u8 into r3444;\n    add r3443 r3444 into r3445;\n    and r3434 18446744073709551615u128 into r3446;\n    add r3445 r3446 into r3447;\n    add r3447 r3442 into r3448;\n    and r3448 18446744073709551615u128 into r3449;\n    shr r3448 64u8 into r3450;\n    shr r3434 64u8 into r3451;\n    add r3451 r3450 into r3452;\n    shl r3452 64u8 into r3453;\n    add r3453 r3449 into r3454;\n    shl r3441 64u8 into r3455;\n    add r3455 r3435 into r3456;\n    add.w r3364 r3396 into r3457;\n    lt r3457 r3364 into r3458;\n    ternary r3458 1u128 0u128 into r3459;\n    add.w r3457 r3426 into r3460;\n    lt r3460 r3457 into r3461;\n    ternary r3461 1u128 0u128 into r3462;\n    add r3459 r3462 into r3463;\n    add.w r3394 r3424 into r3464;\n    lt r3464 r3394 into r3465;\n    ternary r3465 1u128 0u128 into r3466;\n    add.w r3464 r3456 into r3467;\n    lt r3467 r3464 into r3468;\n    ternary r3468 1u128 0u128 into r3469;\n    add.w r3467 r3463 into r3470;\n    lt r3470 r3467 into r3471;\n    ternary r3471 1u128 0u128 into r3472;\n    add r3466 r3469 into r3473;\n    add r3473 r3472 into r3474;\n    add.w r3454 r3474 into r3475;\n    cast r3475 r3470 into r3476 as U256__8JquwLopp8;\n    cast r3460 r3366 into r3477 as U256__8JquwLopp8;\n    is.neq r3476.hi 0u128 into r3478;\n    is.neq r3476.lo 0u128 into r3479;\n    or r3478 r3479 into r3480;\n    lt r0.hi r3313.hi into r3481;\n    gt r0.hi r3313.hi into r3482;\n    lt r0.lo r3313.lo into r3483;\n    ternary r3482 false r3483 into r3484;\n    ternary r3481 true r3484 into r3485;\n    ternary r3485 r0.hi r3313.hi into r3486;\n    ternary r3485 r0.lo r3313.lo into r3487;\n    cast r3486 r3487 into r3488 as U256__8JquwLopp8;\n    lt r0.hi r3313.hi into r3489;\n    gt r0.hi r3313.hi into r3490;\n    lt r0.lo r3313.lo into r3491;\n    ternary r3490 false r3491 into r3492;\n    ternary r3489 true r3492 into r3493;\n    ternary r3493 r3313.hi r0.hi into r3494;\n    ternary r3493 r3313.lo r0.lo into r3495;\n    cast r3494 r3495 into r3496 as U256__8JquwLopp8;\n    lt r3496.lo r3488.lo into r3497;\n    ternary r3497 1u128 0u128 into r3498;\n    sub.w r3496.lo r3488.lo into r3499;\n    sub.w r3496.hi r3488.hi into r3500;\n    sub.w r3500 r3498 into r3501;\n    cast r3501 r3499 into r3502 as U256__8JquwLopp8;\n    shr r3502.lo 64u8 into r3503;\n    shr r3502.hi 64u8 into r3504;\n    and r3502.lo 18446744073709551615u128 into r3505;\n    shr r3502.lo 64u8 into r3506;\n    mul r135 r3505 into r3507;\n    mul r135 r3506 into r3508;\n    mul r136 r3505 into r3509;\n    mul r136 r3506 into r3510;\n    and r3507 18446744073709551615u128 into r3511;\n    shr r3507 64u8 into r3512;\n    and r3508 18446744073709551615u128 into r3513;\n    add r3512 r3513 into r3514;\n    and r3509 18446744073709551615u128 into r3515;\n    add r3514 r3515 into r3516;\n    and r3516 18446744073709551615u128 into r3517;\n    shr r3516 64u8 into r3518;\n    shr r3508 64u8 into r3519;\n    shr r3509 64u8 into r3520;\n    add r3519 r3520 into r3521;\n    and r3510 18446744073709551615u128 into r3522;\n    add r3521 r3522 into r3523;\n    add r3523 r3518 into r3524;\n    and r3524 18446744073709551615u128 into r3525;\n    shr r3524 64u8 into r3526;\n    shr r3510 64u8 into r3527;\n    add r3527 r3526 into r3528;\n    shl r3528 64u8 into r3529;\n    add r3529 r3525 into r3530;\n    shl r3517 64u8 into r3531;\n    add r3531 r3511 into r3532;\n    and r3502.hi 18446744073709551615u128 into r3533;\n    shr r3502.hi 64u8 into r3534;\n    mul r135 r3533 into r3535;\n    mul r135 r3534 into r3536;\n    mul r136 r3533 into r3537;\n    mul r136 r3534 into r3538;\n    and r3535 18446744073709551615u128 into r3539;\n    shr r3535 64u8 into r3540;\n    and r3536 18446744073709551615u128 into r3541;\n    add r3540 r3541 into r3542;\n    and r3537 18446744073709551615u128 into r3543;\n    add r3542 r3543 into r3544;\n    and r3544 18446744073709551615u128 into r3545;\n    shr r3544 64u8 into r3546;\n    shr r3536 64u8 into r3547;\n    shr r3537 64u8 into r3548;\n    add r3547 r3548 into r3549;\n    and r3538 18446744073709551615u128 into r3550;\n    add r3549 r3550 into r3551;\n    add r3551 r3546 into r3552;\n    and r3552 18446744073709551615u128 into r3553;\n    shr r3552 64u8 into r3554;\n    shr r3538 64u8 into r3555;\n    add r3555 r3554 into r3556;\n    shl r3556 64u8 into r3557;\n    add r3557 r3553 into r3558;\n    shl r3545 64u8 into r3559;\n    add r3559 r3539 into r3560;\n    lt r3532 0u128 into r3561;\n    ternary r3561 1u128 0u128 into r3562;\n    lt r3530 0u128 into r3563;\n    ternary r3563 1u128 0u128 into r3564;\n    add.w r3530 r3560 into r3565;\n    lt r3565 r3530 into r3566;\n    ternary r3566 1u128 0u128 into r3567;\n    add.w r3565 r3562 into r3568;\n    lt r3568 r3565 into r3569;\n    ternary r3569 1u128 0u128 into r3570;\n    add r3564 r3567 into r3571;\n    add r3571 r3570 into r3572;\n    add.w r3558 r3572 into r3573;\n    cast r3573 r3568 into r3574 as U256__8JquwLopp8;\n    cast r3532 0u128 into r3575 as U256__8JquwLopp8;\n    lt r3574.hi r3496.hi into r3576;\n    gt r3574.hi r3496.hi into r3577;\n    lt r3574.lo r3496.lo into r3578;\n    ternary r3577 false r3578 into r3579;\n    ternary r3576 true r3579 into r3580;\n    assert.eq r3580 true;\n    gt r3496.hi 0u128 into r3581;\n    ternary r3581 r3496.hi r3496.lo into r3582;\n    ternary r3581 128u32 0u32 into r3583;\n    gte r3582 18446744073709551616u128 into r3584;\n    shr r3582 64u8 into r3585;\n    ternary r3584 r3585 r3582 into r3586;\n    ternary r3584 64u32 0u32 into r3587;\n    gte r3586 4294967296u128 into r3588;\n    shr r3586 32u8 into r3589;\n    add r3587 32u32 into r3590;\n    ternary r3588 r3589 r3586 into r3591;\n    ternary r3588 r3590 r3587 into r3592;\n    gte r3591 65536u128 into r3593;\n    shr r3591 16u8 into r3594;\n    add r3592 16u32 into r3595;\n    ternary r3593 r3594 r3591 into r3596;\n    ternary r3593 r3595 r3592 into r3597;\n    gte r3596 256u128 into r3598;\n    shr r3596 8u8 into r3599;\n    add r3597 8u32 into r3600;\n    ternary r3598 r3599 r3596 into r3601;\n    ternary r3598 r3600 r3597 into r3602;\n    gte r3601 16u128 into r3603;\n    shr r3601 4u8 into r3604;\n    add r3602 4u32 into r3605;\n    ternary r3603 r3604 r3601 into r3606;\n    ternary r3603 r3605 r3602 into r3607;\n    gte r3606 4u128 into r3608;\n    shr r3606 2u8 into r3609;\n    add r3607 2u32 into r3610;\n    ternary r3608 r3609 r3606 into r3611;\n    ternary r3608 r3610 r3607 into r3612;\n    gte r3611 2u128 into r3613;\n    add r3612 1u32 into r3614;\n    ternary r3613 r3614 r3612 into r3615;\n    add r3583 r3615 into r3616;\n    sub 255u32 r3616 into r3617;\n    cast r3617 into r3618 as u16;\n    and r3618 127u16 into r3619;\n    cast r3619 into r3620 as u8;\n    is.eq r3620 0u8 into r3621;\n    sub 128u8 r3620 into r3622;\n    shr.w r3496.lo r3622 into r3623;\n    ternary r3621 0u128 r3623 into r3624;\n    shl.w r3496.hi r3620 into r3625;\n    or r3625 r3624 into r3626;\n    shl.w r3496.lo r3620 into r3627;\n    shl.w r3496.lo r3620 into r3628;\n    gte r3618 128u16 into r3629;\n    ternary r3629 r3628 r3626 into r3630;\n    ternary r3629 0u128 r3627 into r3631;\n    cast r3630 r3631 into r3632 as U256__8JquwLopp8;\n    and r3632.lo 18446744073709551615u128 into r3633;\n    shr r3632.lo 64u8 into r3634;\n    and r3632.hi 18446744073709551615u128 into r3635;\n    shr r3632.hi 64u8 into r3636;\n    cast r3619 into r3637 as u8;\n    is.eq r3637 0u8 into r3638;\n    sub 128u8 r3637 into r3639;\n    shr.w r3575.lo r3639 into r3640;\n    ternary r3638 0u128 r3640 into r3641;\n    shl.w r3575.hi r3637 into r3642;\n    or r3642 r3641 into r3643;\n    shl.w r3575.lo r3637 into r3644;\n    shl.w r3575.lo r3637 into r3645;\n    ternary r3629 r3645 r3643 into r3646;\n    ternary r3629 0u128 r3644 into r3647;\n    cast r3646 r3647 into r3648 as U256__8JquwLopp8;\n    is.eq r3618 0u16 into r3649;\n    sub 256u16 r3618 into r3650;\n    and r3650 127u16 into r3651;\n    cast r3651 into r3652 as u8;\n    is.eq r3652 0u8 into r3653;\n    sub 128u8 r3652 into r3654;\n    shl.w r3575.hi r3654 into r3655;\n    ternary r3653 0u128 r3655 into r3656;\n    shr r3575.lo r3652 into r3657;\n    or r3657 r3656 into r3658;\n    shr r3575.hi r3652 into r3659;\n    shr r3575.hi r3652 into r3660;\n    gte r3650 128u16 into r3661;\n    ternary r3661 0u128 r3659 into r3662;\n    ternary r3661 r3660 r3658 into r3663;\n    cast r3662 r3663 into r3664 as U256__8JquwLopp8;\n    ternary r3649 0u128 r3664.hi into r3665;\n    ternary r3649 0u128 r3664.lo into r3666;\n    cast r3665 r3666 into r3667 as U256__8JquwLopp8;\n    cast r3619 into r3668 as u8;\n    is.eq r3668 0u8 into r3669;\n    sub 128u8 r3668 into r3670;\n    shr.w r3574.lo r3670 into r3671;\n    ternary r3669 0u128 r3671 into r3672;\n    shl.w r3574.hi r3668 into r3673;\n    or r3673 r3672 into r3674;\n    shl.w r3574.lo r3668 into r3675;\n    shl.w r3574.lo r3668 into r3676;\n    ternary r3629 r3676 r3674 into r3677;\n    ternary r3629 0u128 r3675 into r3678;\n    cast r3677 r3678 into r3679 as U256__8JquwLopp8;\n    add.w r3679.lo r3667.lo into r3680;\n    lt r3680 r3679.lo into r3681;\n    ternary r3681 1u128 0u128 into r3682;\n    add.w r3679.hi r3667.hi into r3683;\n    add.w r3683 r3682 into r3684;\n    cast r3684 r3680 into r3685 as U256__8JquwLopp8;\n    and r3648.lo 18446744073709551615u128 into r3686;\n    shr r3648.lo 64u8 into r3687;\n    and r3648.hi 18446744073709551615u128 into r3688;\n    shr r3648.hi 64u8 into r3689;\n    and r3685.lo 18446744073709551615u128 into r3690;\n    shr r3685.lo 64u8 into r3691;\n    and r3685.hi 18446744073709551615u128 into r3692;\n    shr r3685.hi 64u8 into r3693;\n    shl r3693 64u8 into r3694;\n    add r3694 r3692 into r3695;\n    div r3695 r3636 into r3696;\n    gt r3696 18446744073709551615u128 into r3697;\n    ternary r3697 18446744073709551615u128 r3696 into r3698;\n    mul r3698 r3636 into r3699;\n    sub r3695 r3699 into r3700;\n    lte r3700 18446744073709551615u128 into r3701;\n    mul r3698 r3635 into r3702;\n    and r3700 18446744073709551615u128 into r3703;\n    shl r3703 64u8 into r3704;\n    add r3704 r3691 into r3705;\n    gt r3702 r3705 into r3706;\n    and r3701 r3706 into r3707;\n    sub.w r3698 1u128 into r3708;\n    ternary r3707 r3708 r3698 into r3709;\n    add r3700 r3636 into r3710;\n    ternary r3707 r3710 r3700 into r3711;\n    lte r3711 18446744073709551615u128 into r3712;\n    and r3707 r3712 into r3713;\n    mul r3709 r3635 into r3714;\n    and r3711 18446744073709551615u128 into r3715;\n    shl r3715 64u8 into r3716;\n    add r3716 r3691 into r3717;\n    gt r3714 r3717 into r3718;\n    and r3713 r3718 into r3719;\n    sub.w r3709 1u128 into r3720;\n    ternary r3719 r3720 r3709 into r3721;\n    mul r3721 r3633 into r3722;\n    and r3722 18446744073709551615u128 into r3723;\n    lt r3689 r3723 into r3724;\n    add r3689 18446744073709551616u128 into r3725;\n    sub r3725 r3723 into r3726;\n    and r3726 18446744073709551615u128 into r3727;\n    shr r3722 64u8 into r3728;\n    ternary r3724 1u128 0u128 into r3729;\n    add r3728 r3729 into r3730;\n    mul r3721 r3634 into r3731;\n    add r3731 r3730 into r3732;\n    and r3732 18446744073709551615u128 into r3733;\n    lt r3690 r3733 into r3734;\n    add r3690 18446744073709551616u128 into r3735;\n    sub r3735 r3733 into r3736;\n    and r3736 18446744073709551615u128 into r3737;\n    shr r3732 64u8 into r3738;\n    ternary r3734 1u128 0u128 into r3739;\n    add r3738 r3739 into r3740;\n    mul r3721 r3635 into r3741;\n    add r3741 r3740 into r3742;\n    and r3742 18446744073709551615u128 into r3743;\n    lt r3691 r3743 into r3744;\n    add r3691 18446744073709551616u128 into r3745;\n    sub r3745 r3743 into r3746;\n    and r3746 18446744073709551615u128 into r3747;\n    shr r3742 64u8 into r3748;\n    ternary r3744 1u128 0u128 into r3749;\n    add r3748 r3749 into r3750;\n    mul r3721 r3636 into r3751;\n    add r3751 r3750 into r3752;\n    and r3752 18446744073709551615u128 into r3753;\n    lt r3692 r3753 into r3754;\n    add r3692 18446744073709551616u128 into r3755;\n    sub r3755 r3753 into r3756;\n    and r3756 18446744073709551615u128 into r3757;\n    shr r3752 64u8 into r3758;\n    ternary r3754 1u128 0u128 into r3759;\n    add r3758 r3759 into r3760;\n    lt r3693 r3760 into r3761;\n    add r3693 18446744073709551616u128 into r3762;\n    sub r3762 r3760 into r3763;\n    and r3763 18446744073709551615u128 into r3764;\n    sub.w r3721 1u128 into r3765;\n    ternary r3761 r3765 r3721 into r3766;\n    add r3727 r3633 into r3767;\n    and r3767 18446744073709551615u128 into r3768;\n    ternary r3761 r3768 r3727 into r3769;\n    shr r3767 64u8 into r3770;\n    ternary r3761 r3770 0u128 into r3771;\n    add r3737 r3634 into r3772;\n    add r3772 r3771 into r3773;\n    and r3773 18446744073709551615u128 into r3774;\n    ternary r3761 r3774 r3737 into r3775;\n    shr r3773 64u8 into r3776;\n    ternary r3761 r3776 0u128 into r3777;\n    add r3747 r3635 into r3778;\n    add r3778 r3777 into r3779;\n    and r3779 18446744073709551615u128 into r3780;\n    ternary r3761 r3780 r3747 into r3781;\n    shr r3779 64u8 into r3782;\n    ternary r3761 r3782 0u128 into r3783;\n    add r3757 r3636 into r3784;\n    add r3784 r3783 into r3785;\n    and r3785 18446744073709551615u128 into r3786;\n    ternary r3761 r3786 r3757 into r3787;\n    shr r3785 64u8 into r3788;\n    ternary r3761 r3788 0u128 into r3789;\n    add r3764 r3789 into r3790;\n    shl r3787 64u8 into r3791;\n    add r3791 r3781 into r3792;\n    div r3792 r3636 into r3793;\n    gt r3793 18446744073709551615u128 into r3794;\n    ternary r3794 18446744073709551615u128 r3793 into r3795;\n    mul r3795 r3636 into r3796;\n    sub r3792 r3796 into r3797;\n    lte r3797 18446744073709551615u128 into r3798;\n    mul r3795 r3635 into r3799;\n    and r3797 18446744073709551615u128 into r3800;\n    shl r3800 64u8 into r3801;\n    add r3801 r3775 into r3802;\n    gt r3799 r3802 into r3803;\n    and r3798 r3803 into r3804;\n    sub.w r3795 1u128 into r3805;\n    ternary r3804 r3805 r3795 into r3806;\n    add r3797 r3636 into r3807;\n    ternary r3804 r3807 r3797 into r3808;\n    lte r3808 18446744073709551615u128 into r3809;\n    and r3804 r3809 into r3810;\n    mul r3806 r3635 into r3811;\n    and r3808 18446744073709551615u128 into r3812;\n    shl r3812 64u8 into r3813;\n    add r3813 r3775 into r3814;\n    gt r3811 r3814 into r3815;\n    and r3810 r3815 into r3816;\n    sub.w r3806 1u128 into r3817;\n    ternary r3816 r3817 r3806 into r3818;\n    mul r3818 r3633 into r3819;\n    and r3819 18446744073709551615u128 into r3820;\n    lt r3688 r3820 into r3821;\n    add r3688 18446744073709551616u128 into r3822;\n    sub r3822 r3820 into r3823;\n    and r3823 18446744073709551615u128 into r3824;\n    shr r3819 64u8 into r3825;\n    ternary r3821 1u128 0u128 into r3826;\n    add r3825 r3826 into r3827;\n    mul r3818 r3634 into r3828;\n    add r3828 r3827 into r3829;\n    and r3829 18446744073709551615u128 into r3830;\n    lt r3769 r3830 into r3831;\n    add r3769 18446744073709551616u128 into r3832;\n    sub r3832 r3830 into r3833;\n    and r3833 18446744073709551615u128 into r3834;\n    shr r3829 64u8 into r3835;\n    ternary r3831 1u128 0u128 into r3836;\n    add r3835 r3836 into r3837;\n    mul r3818 r3635 into r3838;\n    add r3838 r3837 into r3839;\n    and r3839 18446744073709551615u128 into r3840;\n    lt r3775 r3840 into r3841;\n    add r3775 18446744073709551616u128 into r3842;\n    sub r3842 r3840 into r3843;\n    and r3843 18446744073709551615u128 into r3844;\n    shr r3839 64u8 into r3845;\n    ternary r3841 1u128 0u128 into r3846;\n    add r3845 r3846 into r3847;\n    mul r3818 r3636 into r3848;\n    add r3848 r3847 into r3849;\n    and r3849 18446744073709551615u128 into r3850;\n    lt r3781 r3850 into r3851;\n    add r3781 18446744073709551616u128 into r3852;\n    sub r3852 r3850 into r3853;\n    and r3853 18446744073709551615u128 into r3854;\n    shr r3849 64u8 into r3855;\n    ternary r3851 1u128 0u128 into r3856;\n    add r3855 r3856 into r3857;\n    lt r3787 r3857 into r3858;\n    add r3787 18446744073709551616u128 into r3859;\n    sub r3859 r3857 into r3860;\n    and r3860 18446744073709551615u128 into r3861;\n    sub.w r3818 1u128 into r3862;\n    ternary r3858 r3862 r3818 into r3863;\n    add r3824 r3633 into r3864;\n    and r3864 18446744073709551615u128 into r3865;\n    ternary r3858 r3865 r3824 into r3866;\n    shr r3864 64u8 into r3867;\n    ternary r3858 r3867 0u128 into r3868;\n    add r3834 r3634 into r3869;\n    add r3869 r3868 into r3870;\n    and r3870 18446744073709551615u128 into r3871;\n    ternary r3858 r3871 r3834 into r3872;\n    shr r3870 64u8 into r3873;\n    ternary r3858 r3873 0u128 into r3874;\n    add r3844 r3635 into r3875;\n    add r3875 r3874 into r3876;\n    and r3876 18446744073709551615u128 into r3877;\n    ternary r3858 r3877 r3844 into r3878;\n    shr r3876 64u8 into r3879;\n    ternary r3858 r3879 0u128 into r3880;\n    add r3854 r3636 into r3881;\n    add r3881 r3880 into r3882;\n    and r3882 18446744073709551615u128 into r3883;\n    ternary r3858 r3883 r3854 into r3884;\n    shr r3882 64u8 into r3885;\n    ternary r3858 r3885 0u128 into r3886;\n    add r3861 r3886 into r3887;\n    shl r3884 64u8 into r3888;\n    add r3888 r3878 into r3889;\n    div r3889 r3636 into r3890;\n    gt r3890 18446744073709551615u128 into r3891;\n    ternary r3891 18446744073709551615u128 r3890 into r3892;\n    mul r3892 r3636 into r3893;\n    sub r3889 r3893 into r3894;\n    lte r3894 18446744073709551615u128 into r3895;\n    mul r3892 r3635 into r3896;\n    and r3894 18446744073709551615u128 into r3897;\n    shl r3897 64u8 into r3898;\n    add r3898 r3872 into r3899;\n    gt r3896 r3899 into r3900;\n    and r3895 r3900 into r3901;\n    sub.w r3892 1u128 into r3902;\n    ternary r3901 r3902 r3892 into r3903;\n    add r3894 r3636 into r3904;\n    ternary r3901 r3904 r3894 into r3905;\n    lte r3905 18446744073709551615u128 into r3906;\n    and r3901 r3906 into r3907;\n    mul r3903 r3635 into r3908;\n    and r3905 18446744073709551615u128 into r3909;\n    shl r3909 64u8 into r3910;\n    add r3910 r3872 into r3911;\n    gt r3908 r3911 into r3912;\n    and r3907 r3912 into r3913;\n    sub.w r3903 1u128 into r3914;\n    ternary r3913 r3914 r3903 into r3915;\n    mul r3915 r3633 into r3916;\n    and r3916 18446744073709551615u128 into r3917;\n    lt r3687 r3917 into r3918;\n    add r3687 18446744073709551616u128 into r3919;\n    sub r3919 r3917 into r3920;\n    and r3920 18446744073709551615u128 into r3921;\n    shr r3916 64u8 into r3922;\n    ternary r3918 1u128 0u128 into r3923;\n    add r3922 r3923 into r3924;\n    mul r3915 r3634 into r3925;\n    add r3925 r3924 into r3926;\n    and r3926 18446744073709551615u128 into r3927;\n    lt r3866 r3927 into r3928;\n    add r3866 18446744073709551616u128 into r3929;\n    sub r3929 r3927 into r3930;\n    and r3930 18446744073709551615u128 into r3931;\n    shr r3926 64u8 into r3932;\n    ternary r3928 1u128 0u128 into r3933;\n    add r3932 r3933 into r3934;\n    mul r3915 r3635 into r3935;\n    add r3935 r3934 into r3936;\n    and r3936 18446744073709551615u128 into r3937;\n    lt r3872 r3937 into r3938;\n    add r3872 18446744073709551616u128 into r3939;\n    sub r3939 r3937 into r3940;\n    and r3940 18446744073709551615u128 into r3941;\n    shr r3936 64u8 into r3942;\n    ternary r3938 1u128 0u128 into r3943;\n    add r3942 r3943 into r3944;\n    mul r3915 r3636 into r3945;\n    add r3945 r3944 into r3946;\n    and r3946 18446744073709551615u128 into r3947;\n    lt r3878 r3947 into r3948;\n    add r3878 18446744073709551616u128 into r3949;\n    sub r3949 r3947 into r3950;\n    and r3950 18446744073709551615u128 into r3951;\n    shr r3946 64u8 into r3952;\n    ternary r3948 1u128 0u128 into r3953;\n    add r3952 r3953 into r3954;\n    lt r3884 r3954 into r3955;\n    add r3884 18446744073709551616u128 into r3956;\n    sub r3956 r3954 into r3957;\n    and r3957 18446744073709551615u128 into r3958;\n    sub.w r3915 1u128 into r3959;\n    ternary r3955 r3959 r3915 into r3960;\n    add r3921 r3633 into r3961;\n    and r3961 18446744073709551615u128 into r3962;\n    ternary r3955 r3962 r3921 into r3963;\n    shr r3961 64u8 into r3964;\n    ternary r3955 r3964 0u128 into r3965;\n    add r3931 r3634 into r3966;\n    add r3966 r3965 into r3967;\n    and r3967 18446744073709551615u128 into r3968;\n    ternary r3955 r3968 r3931 into r3969;\n    shr r3967 64u8 into r3970;\n    ternary r3955 r3970 0u128 into r3971;\n    add r3941 r3635 into r3972;\n    add r3972 r3971 into r3973;\n    and r3973 18446744073709551615u128 into r3974;\n    ternary r3955 r3974 r3941 into r3975;\n    shr r3973 64u8 into r3976;\n    ternary r3955 r3976 0u128 into r3977;\n    add r3951 r3636 into r3978;\n    add r3978 r3977 into r3979;\n    and r3979 18446744073709551615u128 into r3980;\n    ternary r3955 r3980 r3951 into r3981;\n    shr r3979 64u8 into r3982;\n    ternary r3955 r3982 0u128 into r3983;\n    add r3958 r3983 into r3984;\n    shl r3981 64u8 into r3985;\n    add r3985 r3975 into r3986;\n    div r3986 r3636 into r3987;\n    gt r3987 18446744073709551615u128 into r3988;\n    ternary r3988 18446744073709551615u128 r3987 into r3989;\n    mul r3989 r3636 into r3990;\n    sub r3986 r3990 into r3991;\n    lte r3991 18446744073709551615u128 into r3992;\n    mul r3989 r3635 into r3993;\n    and r3991 18446744073709551615u128 into r3994;\n    shl r3994 64u8 into r3995;\n    add r3995 r3969 into r3996;\n    gt r3993 r3996 into r3997;\n    and r3992 r3997 into r3998;\n    sub.w r3989 1u128 into r3999;\n    ternary r3998 r3999 r3989 into r4000;\n    add r3991 r3636 into r4001;\n    ternary r3998 r4001 r3991 into r4002;\n    lte r4002 18446744073709551615u128 into r4003;\n    and r3998 r4003 into r4004;\n    mul r4000 r3635 into r4005;\n    and r4002 18446744073709551615u128 into r4006;\n    shl r4006 64u8 into r4007;\n    add r4007 r3969 into r4008;\n    gt r4005 r4008 into r4009;\n    and r4004 r4009 into r4010;\n    sub.w r4000 1u128 into r4011;\n    ternary r4010 r4011 r4000 into r4012;\n    mul r4012 r3633 into r4013;\n    and r4013 18446744073709551615u128 into r4014;\n    lt r3686 r4014 into r4015;\n    add r3686 18446744073709551616u128 into r4016;\n    sub r4016 r4014 into r4017;\n    and r4017 18446744073709551615u128 into r4018;\n    shr r4013 64u8 into r4019;\n    ternary r4015 1u128 0u128 into r4020;\n    add r4019 r4020 into r4021;\n    mul r4012 r3634 into r4022;\n    add r4022 r4021 into r4023;\n    and r4023 18446744073709551615u128 into r4024;\n    lt r3963 r4024 into r4025;\n    add r3963 18446744073709551616u128 into r4026;\n    sub r4026 r4024 into r4027;\n    and r4027 18446744073709551615u128 into r4028;\n    shr r4023 64u8 into r4029;\n    ternary r4025 1u128 0u128 into r4030;\n    add r4029 r4030 into r4031;\n    mul r4012 r3635 into r4032;\n    add r4032 r4031 into r4033;\n    and r4033 18446744073709551615u128 into r4034;\n    lt r3969 r4034 into r4035;\n    add r3969 18446744073709551616u128 into r4036;\n    sub r4036 r4034 into r4037;\n    and r4037 18446744073709551615u128 into r4038;\n    shr r4033 64u8 into r4039;\n    ternary r4035 1u128 0u128 into r4040;\n    add r4039 r4040 into r4041;\n    mul r4012 r3636 into r4042;\n    add r4042 r4041 into r4043;\n    and r4043 18446744073709551615u128 into r4044;\n    lt r3975 r4044 into r4045;\n    add r3975 18446744073709551616u128 into r4046;\n    sub r4046 r4044 into r4047;\n    and r4047 18446744073709551615u128 into r4048;\n    shr r4043 64u8 into r4049;\n    ternary r4045 1u128 0u128 into r4050;\n    add r4049 r4050 into r4051;\n    lt r3981 r4051 into r4052;\n    add r3981 18446744073709551616u128 into r4053;\n    sub r4053 r4051 into r4054;\n    and r4054 18446744073709551615u128 into r4055;\n    sub.w r4012 1u128 into r4056;\n    ternary r4052 r4056 r4012 into r4057;\n    add r4018 r3633 into r4058;\n    and r4058 18446744073709551615u128 into r4059;\n    ternary r4052 r4059 r4018 into r4060;\n    shr r4058 64u8 into r4061;\n    ternary r4052 r4061 0u128 into r4062;\n    add r4028 r3634 into r4063;\n    add r4063 r4062 into r4064;\n    and r4064 18446744073709551615u128 into r4065;\n    ternary r4052 r4065 r4028 into r4066;\n    shr r4064 64u8 into r4067;\n    ternary r4052 r4067 0u128 into r4068;\n    add r4038 r3635 into r4069;\n    add r4069 r4068 into r4070;\n    and r4070 18446744073709551615u128 into r4071;\n    ternary r4052 r4071 r4038 into r4072;\n    shr r4070 64u8 into r4073;\n    ternary r4052 r4073 0u128 into r4074;\n    add r4048 r3636 into r4075;\n    add r4075 r4074 into r4076;\n    and r4076 18446744073709551615u128 into r4077;\n    ternary r4052 r4077 r4048 into r4078;\n    shr r4076 64u8 into r4079;\n    ternary r4052 r4079 0u128 into r4080;\n    add r4055 r4080 into r4081;\n    shl r3766 64u8 into r4082;\n    add r4082 r3863 into r4083;\n    shl r3960 64u8 into r4084;\n    add r4084 r4057 into r4085;\n    cast r4083 r4085 into r4086 as U256__8JquwLopp8;\n    shl r4078 64u8 into r4087;\n    add r4087 r4072 into r4088;\n    shl r4066 64u8 into r4089;\n    add r4089 r4060 into r4090;\n    cast r3619 into r4091 as u8;\n    sub 128u8 r4091 into r4092;\n    shr r4090 r4091 into r4093;\n    shr r4088 r4091 into r4094;\n    cast r4086.hi r4086.lo into r4095 as U256__8JquwLopp8;\n    and r4095.lo 18446744073709551615u128 into r4096;\n    shr r4095.lo 64u8 into r4097;\n    and r4096 18446744073709551615u128 into r4098;\n    shr r4096 64u8 into r4099;\n    and r4097 18446744073709551615u128 into r4100;\n    add r4099 r4100 into r4101;\n    and r4101 18446744073709551615u128 into r4102;\n    shr r4101 64u8 into r4103;\n    shr r4097 64u8 into r4104;\n    add r4104 r4103 into r4105;\n    and r4105 18446744073709551615u128 into r4106;\n    shr r4105 64u8 into r4107;\n    shl r4107 64u8 into r4108;\n    add r4108 r4106 into r4109;\n    shl r4102 64u8 into r4110;\n    add r4110 r4098 into r4111;\n    shr r4095.lo 64u8 into r4112;\n    and r4095.hi 18446744073709551615u128 into r4113;\n    shr r4095.hi 64u8 into r4114;\n    and r4113 18446744073709551615u128 into r4115;\n    shr r4113 64u8 into r4116;\n    and r4114 18446744073709551615u128 into r4117;\n    add r4116 r4117 into r4118;\n    and r4118 18446744073709551615u128 into r4119;\n    shr r4118 64u8 into r4120;\n    shr r4114 64u8 into r4121;\n    add r4121 r4120 into r4122;\n    and r4122 18446744073709551615u128 into r4123;\n    shr r4122 64u8 into r4124;\n    shl r4124 64u8 into r4125;\n    add r4125 r4123 into r4126;\n    shl r4119 64u8 into r4127;\n    add r4127 r4115 into r4128;\n    shr r4095.hi 64u8 into r4129;\n    lt r4109 r4109 into r4130;\n    ternary r4130 1u128 0u128 into r4131;\n    add.w r4109 r4128 into r4132;\n    lt r4132 r4109 into r4133;\n    ternary r4133 1u128 0u128 into r4134;\n    add r4131 r4134 into r4135;\n    lt r4126 0u128 into r4136;\n    ternary r4136 1u128 0u128 into r4137;\n    lt r4126 r4126 into r4138;\n    ternary r4138 1u128 0u128 into r4139;\n    add.w r4126 r4135 into r4140;\n    lt r4140 r4126 into r4141;\n    ternary r4141 1u128 0u128 into r4142;\n    add r4137 r4139 into r4143;\n    add r4143 r4142 into r4144;\n    cast r4144 r4140 into r4145 as U256__8JquwLopp8;\n    cast r4132 r4111 into r4146 as U256__8JquwLopp8;\n    lt r4145.hi r3488.hi into r4147;\n    gt r4145.hi r3488.hi into r4148;\n    lt r4145.lo r3488.lo into r4149;\n    ternary r4148 false r4149 into r4150;\n    ternary r4147 true r4150 into r4151;\n    assert.eq r4151 true;\n    gt r3488.hi 0u128 into r4152;\n    ternary r4152 r3488.hi r3488.lo into r4153;\n    ternary r4152 128u32 0u32 into r4154;\n    gte r4153 18446744073709551616u128 into r4155;\n    shr r4153 64u8 into r4156;\n    ternary r4155 r4156 r4153 into r4157;\n    ternary r4155 64u32 0u32 into r4158;\n    gte r4157 4294967296u128 into r4159;\n    shr r4157 32u8 into r4160;\n    add r4158 32u32 into r4161;\n    ternary r4159 r4160 r4157 into r4162;\n    ternary r4159 r4161 r4158 into r4163;\n    gte r4162 65536u128 into r4164;\n    shr r4162 16u8 into r4165;\n    add r4163 16u32 into r4166;\n    ternary r4164 r4165 r4162 into r4167;\n    ternary r4164 r4166 r4163 into r4168;\n    gte r4167 256u128 into r4169;\n    shr r4167 8u8 into r4170;\n    add r4168 8u32 into r4171;\n    ternary r4169 r4170 r4167 into r4172;\n    ternary r4169 r4171 r4168 into r4173;\n    gte r4172 16u128 into r4174;\n    shr r4172 4u8 into r4175;\n    add r4173 4u32 into r4176;\n    ternary r4174 r4175 r4172 into r4177;\n    ternary r4174 r4176 r4173 into r4178;\n    gte r4177 4u128 into r4179;\n    shr r4177 2u8 into r4180;\n    add r4178 2u32 into r4181;\n    ternary r4179 r4180 r4177 into r4182;\n    ternary r4179 r4181 r4178 into r4183;\n    gte r4182 2u128 into r4184;\n    add r4183 1u32 into r4185;\n    ternary r4184 r4185 r4183 into r4186;\n    add r4154 r4186 into r4187;\n    sub 255u32 r4187 into r4188;\n    cast r4188 into r4189 as u16;\n    and r4189 127u16 into r4190;\n    cast r4190 into r4191 as u8;\n    is.eq r4191 0u8 into r4192;\n    sub 128u8 r4191 into r4193;\n    shr.w r3488.lo r4193 into r4194;\n    ternary r4192 0u128 r4194 into r4195;\n    shl.w r3488.hi r4191 into r4196;\n    or r4196 r4195 into r4197;\n    shl.w r3488.lo r4191 into r4198;\n    shl.w r3488.lo r4191 into r4199;\n    gte r4189 128u16 into r4200;\n    ternary r4200 r4199 r4197 into r4201;\n    ternary r4200 0u128 r4198 into r4202;\n    cast r4201 r4202 into r4203 as U256__8JquwLopp8;\n    and r4203.lo 18446744073709551615u128 into r4204;\n    shr r4203.lo 64u8 into r4205;\n    and r4203.hi 18446744073709551615u128 into r4206;\n    shr r4203.hi 64u8 into r4207;\n    cast r4190 into r4208 as u8;\n    is.eq r4208 0u8 into r4209;\n    sub 128u8 r4208 into r4210;\n    shr.w r4146.lo r4210 into r4211;\n    ternary r4209 0u128 r4211 into r4212;\n    shl.w r4146.hi r4208 into r4213;\n    or r4213 r4212 into r4214;\n    shl.w r4146.lo r4208 into r4215;\n    shl.w r4146.lo r4208 into r4216;\n    ternary r4200 r4216 r4214 into r4217;\n    ternary r4200 0u128 r4215 into r4218;\n    cast r4217 r4218 into r4219 as U256__8JquwLopp8;\n    is.eq r4189 0u16 into r4220;\n    sub 256u16 r4189 into r4221;\n    and r4221 127u16 into r4222;\n    cast r4222 into r4223 as u8;\n    is.eq r4223 0u8 into r4224;\n    sub 128u8 r4223 into r4225;\n    shl.w r4146.hi r4225 into r4226;\n    ternary r4224 0u128 r4226 into r4227;\n    shr r4146.lo r4223 into r4228;\n    or r4228 r4227 into r4229;\n    shr r4146.hi r4223 into r4230;\n    shr r4146.hi r4223 into r4231;\n    gte r4221 128u16 into r4232;\n    ternary r4232 0u128 r4230 into r4233;\n    ternary r4232 r4231 r4229 into r4234;\n    cast r4233 r4234 into r4235 as U256__8JquwLopp8;\n    ternary r4220 0u128 r4235.hi into r4236;\n    ternary r4220 0u128 r4235.lo into r4237;\n    cast r4236 r4237 into r4238 as U256__8JquwLopp8;\n    cast r4190 into r4239 as u8;\n    is.eq r4239 0u8 into r4240;\n    sub 128u8 r4239 into r4241;\n    shr.w r4145.lo r4241 into r4242;\n    ternary r4240 0u128 r4242 into r4243;\n    shl.w r4145.hi r4239 into r4244;\n    or r4244 r4243 into r4245;\n    shl.w r4145.lo r4239 into r4246;\n    shl.w r4145.lo r4239 into r4247;\n    ternary r4200 r4247 r4245 into r4248;\n    ternary r4200 0u128 r4246 into r4249;\n    cast r4248 r4249 into r4250 as U256__8JquwLopp8;\n    add.w r4250.lo r4238.lo into r4251;\n    lt r4251 r4250.lo into r4252;\n    ternary r4252 1u128 0u128 into r4253;\n    add.w r4250.hi r4238.hi into r4254;\n    add.w r4254 r4253 into r4255;\n    cast r4255 r4251 into r4256 as U256__8JquwLopp8;\n    and r4219.lo 18446744073709551615u128 into r4257;\n    shr r4219.lo 64u8 into r4258;\n    and r4219.hi 18446744073709551615u128 into r4259;\n    shr r4219.hi 64u8 into r4260;\n    and r4256.lo 18446744073709551615u128 into r4261;\n    shr r4256.lo 64u8 into r4262;\n    and r4256.hi 18446744073709551615u128 into r4263;\n    shr r4256.hi 64u8 into r4264;\n    shl r4264 64u8 into r4265;\n    add r4265 r4263 into r4266;\n    div r4266 r4207 into r4267;\n    gt r4267 18446744073709551615u128 into r4268;\n    ternary r4268 18446744073709551615u128 r4267 into r4269;\n    mul r4269 r4207 into r4270;\n    sub r4266 r4270 into r4271;\n    lte r4271 18446744073709551615u128 into r4272;\n    mul r4269 r4206 into r4273;\n    and r4271 18446744073709551615u128 into r4274;\n    shl r4274 64u8 into r4275;\n    add r4275 r4262 into r4276;\n    gt r4273 r4276 into r4277;\n    and r4272 r4277 into r4278;\n    sub.w r4269 1u128 into r4279;\n    ternary r4278 r4279 r4269 into r4280;\n    add r4271 r4207 into r4281;\n    ternary r4278 r4281 r4271 into r4282;\n    lte r4282 18446744073709551615u128 into r4283;\n    and r4278 r4283 into r4284;\n    mul r4280 r4206 into r4285;\n    and r4282 18446744073709551615u128 into r4286;\n    shl r4286 64u8 into r4287;\n    add r4287 r4262 into r4288;\n    gt r4285 r4288 into r4289;\n    and r4284 r4289 into r4290;\n    sub.w r4280 1u128 into r4291;\n    ternary r4290 r4291 r4280 into r4292;\n    mul r4292 r4204 into r4293;\n    and r4293 18446744073709551615u128 into r4294;\n    lt r4260 r4294 into r4295;\n    add r4260 18446744073709551616u128 into r4296;\n    sub r4296 r4294 into r4297;\n    and r4297 18446744073709551615u128 into r4298;\n    shr r4293 64u8 into r4299;\n    ternary r4295 1u128 0u128 into r4300;\n    add r4299 r4300 into r4301;\n    mul r4292 r4205 into r4302;\n    add r4302 r4301 into r4303;\n    and r4303 18446744073709551615u128 into r4304;\n    lt r4261 r4304 into r4305;\n    add r4261 18446744073709551616u128 into r4306;\n    sub r4306 r4304 into r4307;\n    and r4307 18446744073709551615u128 into r4308;\n    shr r4303 64u8 into r4309;\n    ternary r4305 1u128 0u128 into r4310;\n    add r4309 r4310 into r4311;\n    mul r4292 r4206 into r4312;\n    add r4312 r4311 into r4313;\n    and r4313 18446744073709551615u128 into r4314;\n    lt r4262 r4314 into r4315;\n    add r4262 18446744073709551616u128 into r4316;\n    sub r4316 r4314 into r4317;\n    and r4317 18446744073709551615u128 into r4318;\n    shr r4313 64u8 into r4319;\n    ternary r4315 1u128 0u128 into r4320;\n    add r4319 r4320 into r4321;\n    mul r4292 r4207 into r4322;\n    add r4322 r4321 into r4323;\n    and r4323 18446744073709551615u128 into r4324;\n    lt r4263 r4324 into r4325;\n    add r4263 18446744073709551616u128 into r4326;\n    sub r4326 r4324 into r4327;\n    and r4327 18446744073709551615u128 into r4328;\n    shr r4323 64u8 into r4329;\n    ternary r4325 1u128 0u128 into r4330;\n    add r4329 r4330 into r4331;\n    lt r4264 r4331 into r4332;\n    add r4264 18446744073709551616u128 into r4333;\n    sub r4333 r4331 into r4334;\n    and r4334 18446744073709551615u128 into r4335;\n    sub.w r4292 1u128 into r4336;\n    ternary r4332 r4336 r4292 into r4337;\n    add r4298 r4204 into r4338;\n    and r4338 18446744073709551615u128 into r4339;\n    ternary r4332 r4339 r4298 into r4340;\n    shr r4338 64u8 into r4341;\n    ternary r4332 r4341 0u128 into r4342;\n    add r4308 r4205 into r4343;\n    add r4343 r4342 into r4344;\n    and r4344 18446744073709551615u128 into r4345;\n    ternary r4332 r4345 r4308 into r4346;\n    shr r4344 64u8 into r4347;\n    ternary r4332 r4347 0u128 into r4348;\n    add r4318 r4206 into r4349;\n    add r4349 r4348 into r4350;\n    and r4350 18446744073709551615u128 into r4351;\n    ternary r4332 r4351 r4318 into r4352;\n    shr r4350 64u8 into r4353;\n    ternary r4332 r4353 0u128 into r4354;\n    add r4328 r4207 into r4355;\n    add r4355 r4354 into r4356;\n    and r4356 18446744073709551615u128 into r4357;\n    ternary r4332 r4357 r4328 into r4358;\n    shr r4356 64u8 into r4359;\n    ternary r4332 r4359 0u128 into r4360;\n    add r4335 r4360 into r4361;\n    shl r4358 64u8 into r4362;\n    add r4362 r4352 into r4363;\n    div r4363 r4207 into r4364;\n    gt r4364 18446744073709551615u128 into r4365;\n    ternary r4365 18446744073709551615u128 r4364 into r4366;\n    mul r4366 r4207 into r4367;\n    sub r4363 r4367 into r4368;\n    lte r4368 18446744073709551615u128 into r4369;\n    mul r4366 r4206 into r4370;\n    and r4368 18446744073709551615u128 into r4371;\n    shl r4371 64u8 into r4372;\n    add r4372 r4346 into r4373;\n    gt r4370 r4373 into r4374;\n    and r4369 r4374 into r4375;\n    sub.w r4366 1u128 into r4376;\n    ternary r4375 r4376 r4366 into r4377;\n    add r4368 r4207 into r4378;\n    ternary r4375 r4378 r4368 into r4379;\n    lte r4379 18446744073709551615u128 into r4380;\n    and r4375 r4380 into r4381;\n    mul r4377 r4206 into r4382;\n    and r4379 18446744073709551615u128 into r4383;\n    shl r4383 64u8 into r4384;\n    add r4384 r4346 into r4385;\n    gt r4382 r4385 into r4386;\n    and r4381 r4386 into r4387;\n    sub.w r4377 1u128 into r4388;\n    ternary r4387 r4388 r4377 into r4389;\n    mul r4389 r4204 into r4390;\n    and r4390 18446744073709551615u128 into r4391;\n    lt r4259 r4391 into r4392;\n    add r4259 18446744073709551616u128 into r4393;\n    sub r4393 r4391 into r4394;\n    and r4394 18446744073709551615u128 into r4395;\n    shr r4390 64u8 into r4396;\n    ternary r4392 1u128 0u128 into r4397;\n    add r4396 r4397 into r4398;\n    mul r4389 r4205 into r4399;\n    add r4399 r4398 into r4400;\n    and r4400 18446744073709551615u128 into r4401;\n    lt r4340 r4401 into r4402;\n    add r4340 18446744073709551616u128 into r4403;\n    sub r4403 r4401 into r4404;\n    and r4404 18446744073709551615u128 into r4405;\n    shr r4400 64u8 into r4406;\n    ternary r4402 1u128 0u128 into r4407;\n    add r4406 r4407 into r4408;\n    mul r4389 r4206 into r4409;\n    add r4409 r4408 into r4410;\n    and r4410 18446744073709551615u128 into r4411;\n    lt r4346 r4411 into r4412;\n    add r4346 18446744073709551616u128 into r4413;\n    sub r4413 r4411 into r4414;\n    and r4414 18446744073709551615u128 into r4415;\n    shr r4410 64u8 into r4416;\n    ternary r4412 1u128 0u128 into r4417;\n    add r4416 r4417 into r4418;\n    mul r4389 r4207 into r4419;\n    add r4419 r4418 into r4420;\n    and r4420 18446744073709551615u128 into r4421;\n    lt r4352 r4421 into r4422;\n    add r4352 18446744073709551616u128 into r4423;\n    sub r4423 r4421 into r4424;\n    and r4424 18446744073709551615u128 into r4425;\n    shr r4420 64u8 into r4426;\n    ternary r4422 1u128 0u128 into r4427;\n    add r4426 r4427 into r4428;\n    lt r4358 r4428 into r4429;\n    add r4358 18446744073709551616u128 into r4430;\n    sub r4430 r4428 into r4431;\n    and r4431 18446744073709551615u128 into r4432;\n    sub.w r4389 1u128 into r4433;\n    ternary r4429 r4433 r4389 into r4434;\n    add r4395 r4204 into r4435;\n    and r4435 18446744073709551615u128 into r4436;\n    ternary r4429 r4436 r4395 into r4437;\n    shr r4435 64u8 into r4438;\n    ternary r4429 r4438 0u128 into r4439;\n    add r4405 r4205 into r4440;\n    add r4440 r4439 into r4441;\n    and r4441 18446744073709551615u128 into r4442;\n    ternary r4429 r4442 r4405 into r4443;\n    shr r4441 64u8 into r4444;\n    ternary r4429 r4444 0u128 into r4445;\n    add r4415 r4206 into r4446;\n    add r4446 r4445 into r4447;\n    and r4447 18446744073709551615u128 into r4448;\n    ternary r4429 r4448 r4415 into r4449;\n    shr r4447 64u8 into r4450;\n    ternary r4429 r4450 0u128 into r4451;\n    add r4425 r4207 into r4452;\n    add r4452 r4451 into r4453;\n    and r4453 18446744073709551615u128 into r4454;\n    ternary r4429 r4454 r4425 into r4455;\n    shr r4453 64u8 into r4456;\n    ternary r4429 r4456 0u128 into r4457;\n    add r4432 r4457 into r4458;\n    shl r4455 64u8 into r4459;\n    add r4459 r4449 into r4460;\n    div r4460 r4207 into r4461;\n    gt r4461 18446744073709551615u128 into r4462;\n    ternary r4462 18446744073709551615u128 r4461 into r4463;\n    mul r4463 r4207 into r4464;\n    sub r4460 r4464 into r4465;\n    lte r4465 18446744073709551615u128 into r4466;\n    mul r4463 r4206 into r4467;\n    and r4465 18446744073709551615u128 into r4468;\n    shl r4468 64u8 into r4469;\n    add r4469 r4443 into r4470;\n    gt r4467 r4470 into r4471;\n    and r4466 r4471 into r4472;\n    sub.w r4463 1u128 into r4473;\n    ternary r4472 r4473 r4463 into r4474;\n    add r4465 r4207 into r4475;\n    ternary r4472 r4475 r4465 into r4476;\n    lte r4476 18446744073709551615u128 into r4477;\n    and r4472 r4477 into r4478;\n    mul r4474 r4206 into r4479;\n    and r4476 18446744073709551615u128 into r4480;\n    shl r4480 64u8 into r4481;\n    add r4481 r4443 into r4482;\n    gt r4479 r4482 into r4483;\n    and r4478 r4483 into r4484;\n    sub.w r4474 1u128 into r4485;\n    ternary r4484 r4485 r4474 into r4486;\n    mul r4486 r4204 into r4487;\n    and r4487 18446744073709551615u128 into r4488;\n    lt r4258 r4488 into r4489;\n    add r4258 18446744073709551616u128 into r4490;\n    sub r4490 r4488 into r4491;\n    and r4491 18446744073709551615u128 into r4492;\n    shr r4487 64u8 into r4493;\n    ternary r4489 1u128 0u128 into r4494;\n    add r4493 r4494 into r4495;\n    mul r4486 r4205 into r4496;\n    add r4496 r4495 into r4497;\n    and r4497 18446744073709551615u128 into r4498;\n    lt r4437 r4498 into r4499;\n    add r4437 18446744073709551616u128 into r4500;\n    sub r4500 r4498 into r4501;\n    and r4501 18446744073709551615u128 into r4502;\n    shr r4497 64u8 into r4503;\n    ternary r4499 1u128 0u128 into r4504;\n    add r4503 r4504 into r4505;\n    mul r4486 r4206 into r4506;\n    add r4506 r4505 into r4507;\n    and r4507 18446744073709551615u128 into r4508;\n    lt r4443 r4508 into r4509;\n    add r4443 18446744073709551616u128 into r4510;\n    sub r4510 r4508 into r4511;\n    and r4511 18446744073709551615u128 into r4512;\n    shr r4507 64u8 into r4513;\n    ternary r4509 1u128 0u128 into r4514;\n    add r4513 r4514 into r4515;\n    mul r4486 r4207 into r4516;\n    add r4516 r4515 into r4517;\n    and r4517 18446744073709551615u128 into r4518;\n    lt r4449 r4518 into r4519;\n    add r4449 18446744073709551616u128 into r4520;\n    sub r4520 r4518 into r4521;\n    and r4521 18446744073709551615u128 into r4522;\n    shr r4517 64u8 into r4523;\n    ternary r4519 1u128 0u128 into r4524;\n    add r4523 r4524 into r4525;\n    lt r4455 r4525 into r4526;\n    add r4455 18446744073709551616u128 into r4527;\n    sub r4527 r4525 into r4528;\n    and r4528 18446744073709551615u128 into r4529;\n    sub.w r4486 1u128 into r4530;\n    ternary r4526 r4530 r4486 into r4531;\n    add r4492 r4204 into r4532;\n    and r4532 18446744073709551615u128 into r4533;\n    ternary r4526 r4533 r4492 into r4534;\n    shr r4532 64u8 into r4535;\n    ternary r4526 r4535 0u128 into r4536;\n    add r4502 r4205 into r4537;\n    add r4537 r4536 into r4538;\n    and r4538 18446744073709551615u128 into r4539;\n    ternary r4526 r4539 r4502 into r4540;\n    shr r4538 64u8 into r4541;\n    ternary r4526 r4541 0u128 into r4542;\n    add r4512 r4206 into r4543;\n    add r4543 r4542 into r4544;\n    and r4544 18446744073709551615u128 into r4545;\n    ternary r4526 r4545 r4512 into r4546;\n    shr r4544 64u8 into r4547;\n    ternary r4526 r4547 0u128 into r4548;\n    add r4522 r4207 into r4549;\n    add r4549 r4548 into r4550;\n    and r4550 18446744073709551615u128 into r4551;\n    ternary r4526 r4551 r4522 into r4552;\n    shr r4550 64u8 into r4553;\n    ternary r4526 r4553 0u128 into r4554;\n    add r4529 r4554 into r4555;\n    shl r4552 64u8 into r4556;\n    add r4556 r4546 into r4557;\n    div r4557 r4207 into r4558;\n    gt r4558 18446744073709551615u128 into r4559;\n    ternary r4559 18446744073709551615u128 r4558 into r4560;\n    mul r4560 r4207 into r4561;\n    sub r4557 r4561 into r4562;\n    lte r4562 18446744073709551615u128 into r4563;\n    mul r4560 r4206 into r4564;\n    and r4562 18446744073709551615u128 into r4565;\n    shl r4565 64u8 into r4566;\n    add r4566 r4540 into r4567;\n    gt r4564 r4567 into r4568;\n    and r4563 r4568 into r4569;\n    sub.w r4560 1u128 into r4570;\n    ternary r4569 r4570 r4560 into r4571;\n    add r4562 r4207 into r4572;\n    ternary r4569 r4572 r4562 into r4573;\n    lte r4573 18446744073709551615u128 into r4574;\n    and r4569 r4574 into r4575;\n    mul r4571 r4206 into r4576;\n    and r4573 18446744073709551615u128 into r4577;\n    shl r4577 64u8 into r4578;\n    add r4578 r4540 into r4579;\n    gt r4576 r4579 into r4580;\n    and r4575 r4580 into r4581;\n    sub.w r4571 1u128 into r4582;\n    ternary r4581 r4582 r4571 into r4583;\n    mul r4583 r4204 into r4584;\n    and r4584 18446744073709551615u128 into r4585;\n    lt r4257 r4585 into r4586;\n    add r4257 18446744073709551616u128 into r4587;\n    sub r4587 r4585 into r4588;\n    and r4588 18446744073709551615u128 into r4589;\n    shr r4584 64u8 into r4590;\n    ternary r4586 1u128 0u128 into r4591;\n    add r4590 r4591 into r4592;\n    mul r4583 r4205 into r4593;\n    add r4593 r4592 into r4594;\n    and r4594 18446744073709551615u128 into r4595;\n    lt r4534 r4595 into r4596;\n    add r4534 18446744073709551616u128 into r4597;\n    sub r4597 r4595 into r4598;\n    and r4598 18446744073709551615u128 into r4599;\n    shr r4594 64u8 into r4600;\n    ternary r4596 1u128 0u128 into r4601;\n    add r4600 r4601 into r4602;\n    mul r4583 r4206 into r4603;\n    add r4603 r4602 into r4604;\n    and r4604 18446744073709551615u128 into r4605;\n    lt r4540 r4605 into r4606;\n    add r4540 18446744073709551616u128 into r4607;\n    sub r4607 r4605 into r4608;\n    and r4608 18446744073709551615u128 into r4609;\n    shr r4604 64u8 into r4610;\n    ternary r4606 1u128 0u128 into r4611;\n    add r4610 r4611 into r4612;\n    mul r4583 r4207 into r4613;\n    add r4613 r4612 into r4614;\n    and r4614 18446744073709551615u128 into r4615;\n    lt r4546 r4615 into r4616;\n    add r4546 18446744073709551616u128 into r4617;\n    sub r4617 r4615 into r4618;\n    and r4618 18446744073709551615u128 into r4619;\n    shr r4614 64u8 into r4620;\n    ternary r4616 1u128 0u128 into r4621;\n    add r4620 r4621 into r4622;\n    lt r4552 r4622 into r4623;\n    add r4552 18446744073709551616u128 into r4624;\n    sub r4624 r4622 into r4625;\n    and r4625 18446744073709551615u128 into r4626;\n    sub.w r4583 1u128 into r4627;\n    ternary r4623 r4627 r4583 into r4628;\n    add r4589 r4204 into r4629;\n    and r4629 18446744073709551615u128 into r4630;\n    ternary r4623 r4630 r4589 into r4631;\n    shr r4629 64u8 into r4632;\n    ternary r4623 r4632 0u128 into r4633;\n    add r4599 r4205 into r4634;\n    add r4634 r4633 into r4635;\n    and r4635 18446744073709551615u128 into r4636;\n    ternary r4623 r4636 r4599 into r4637;\n    shr r4635 64u8 into r4638;\n    ternary r4623 r4638 0u128 into r4639;\n    add r4609 r4206 into r4640;\n    add r4640 r4639 into r4641;\n    and r4641 18446744073709551615u128 into r4642;\n    ternary r4623 r4642 r4609 into r4643;\n    shr r4641 64u8 into r4644;\n    ternary r4623 r4644 0u128 into r4645;\n    add r4619 r4207 into r4646;\n    add r4646 r4645 into r4647;\n    and r4647 18446744073709551615u128 into r4648;\n    ternary r4623 r4648 r4619 into r4649;\n    shr r4647 64u8 into r4650;\n    ternary r4623 r4650 0u128 into r4651;\n    add r4626 r4651 into r4652;\n    shl r4337 64u8 into r4653;\n    add r4653 r4434 into r4654;\n    shl r4531 64u8 into r4655;\n    add r4655 r4628 into r4656;\n    cast r4654 r4656 into r4657 as U256__8JquwLopp8;\n    shl r4649 64u8 into r4658;\n    add r4658 r4643 into r4659;\n    shl r4637 64u8 into r4660;\n    add r4660 r4631 into r4661;\n    cast r4190 into r4662 as u8;\n    sub 128u8 r4662 into r4663;\n    shr r4661 r4662 into r4664;\n    shr r4659 r4662 into r4665;\n    cast r4657.hi r4657.lo into r4666 as U256__8JquwLopp8;\n    is.neq r4666.hi 0u128 into r4667;\n    ternary r10 r3477.hi r4666.lo into r4668;\n    ternary r10 r3480 r4667 into r4669;\n    not r4669 into r4670;\n    and r47 r4670 into r4671;\n    gt r109 0u128 into r4672;\n    and r4671 r4672 into r4673;\n    ternary r4673 r3313.hi r0.hi into r4674;\n    ternary r4673 r3313.lo r0.lo into r4675;\n    cast r4674 r4675 into r4676 as U256__8JquwLopp8;\n    ternary r4673 r4668 0u128 into r4677;\n    lt r0.hi r1537.hi into r4678;\n    gt r0.hi r1537.hi into r4679;\n    lt r0.lo r1537.lo into r4680;\n    ternary r4679 false r4680 into r4681;\n    ternary r4678 true r4681 into r4682;\n    ternary r4682 r0.hi r1537.hi into r4683;\n    ternary r4682 r0.lo r1537.lo into r4684;\n    cast r4683 r4684 into r4685 as U256__8JquwLopp8;\n    lt r0.hi r1537.hi into r4686;\n    gt r0.hi r1537.hi into r4687;\n    lt r0.lo r1537.lo into r4688;\n    ternary r4687 false r4688 into r4689;\n    ternary r4686 true r4689 into r4690;\n    ternary r4690 r1537.hi r0.hi into r4691;\n    ternary r4690 r1537.lo r0.lo into r4692;\n    cast r4691 r4692 into r4693 as U256__8JquwLopp8;\n    lt r4693.lo r4685.lo into r4694;\n    ternary r4694 1u128 0u128 into r4695;\n    sub.w r4693.lo r4685.lo into r4696;\n    sub.w r4693.hi r4685.hi into r4697;\n    sub.w r4697 r4695 into r4698;\n    cast r4698 r4696 into r4699 as U256__8JquwLopp8;\n    cast 0u128 r1 into r4700 as U256__8JquwLopp8;\n    and r4700.lo 18446744073709551615u128 into r4701;\n    shr r4700.lo 64u8 into r4702;\n    and r4699.lo 18446744073709551615u128 into r4703;\n    shr r4699.lo 64u8 into r4704;\n    mul r4701 r4703 into r4705;\n    mul r4701 r4704 into r4706;\n    mul r4702 r4703 into r4707;\n    mul r4702 r4704 into r4708;\n    and r4705 18446744073709551615u128 into r4709;\n    shr r4705 64u8 into r4710;\n    and r4706 18446744073709551615u128 into r4711;\n    add r4710 r4711 into r4712;\n    and r4707 18446744073709551615u128 into r4713;\n    add r4712 r4713 into r4714;\n    and r4714 18446744073709551615u128 into r4715;\n    shr r4714 64u8 into r4716;\n    shr r4706 64u8 into r4717;\n    shr r4707 64u8 into r4718;\n    add r4717 r4718 into r4719;\n    and r4708 18446744073709551615u128 into r4720;\n    add r4719 r4720 into r4721;\n    add r4721 r4716 into r4722;\n    and r4722 18446744073709551615u128 into r4723;\n    shr r4722 64u8 into r4724;\n    shr r4708 64u8 into r4725;\n    add r4725 r4724 into r4726;\n    shl r4726 64u8 into r4727;\n    add r4727 r4723 into r4728;\n    shl r4715 64u8 into r4729;\n    add r4729 r4709 into r4730;\n    and r4700.lo 18446744073709551615u128 into r4731;\n    shr r4700.lo 64u8 into r4732;\n    and r4699.hi 18446744073709551615u128 into r4733;\n    shr r4699.hi 64u8 into r4734;\n    mul r4731 r4733 into r4735;\n    mul r4731 r4734 into r4736;\n    mul r4732 r4733 into r4737;\n    mul r4732 r4734 into r4738;\n    and r4735 18446744073709551615u128 into r4739;\n    shr r4735 64u8 into r4740;\n    and r4736 18446744073709551615u128 into r4741;\n    add r4740 r4741 into r4742;\n    and r4737 18446744073709551615u128 into r4743;\n    add r4742 r4743 into r4744;\n    and r4744 18446744073709551615u128 into r4745;\n    shr r4744 64u8 into r4746;\n    shr r4736 64u8 into r4747;\n    shr r4737 64u8 into r4748;\n    add r4747 r4748 into r4749;\n    and r4738 18446744073709551615u128 into r4750;\n    add r4749 r4750 into r4751;\n    add r4751 r4746 into r4752;\n    and r4752 18446744073709551615u128 into r4753;\n    shr r4752 64u8 into r4754;\n    shr r4738 64u8 into r4755;\n    add r4755 r4754 into r4756;\n    shl r4756 64u8 into r4757;\n    add r4757 r4753 into r4758;\n    shl r4745 64u8 into r4759;\n    add r4759 r4739 into r4760;\n    and r4700.hi 18446744073709551615u128 into r4761;\n    shr r4700.hi 64u8 into r4762;\n    and r4699.lo 18446744073709551615u128 into r4763;\n    shr r4699.lo 64u8 into r4764;\n    mul r4761 r4763 into r4765;\n    mul r4761 r4764 into r4766;\n    mul r4762 r4763 into r4767;\n    mul r4762 r4764 into r4768;\n    and r4765 18446744073709551615u128 into r4769;\n    shr r4765 64u8 into r4770;\n    and r4766 18446744073709551615u128 into r4771;\n    add r4770 r4771 into r4772;\n    and r4767 18446744073709551615u128 into r4773;\n    add r4772 r4773 into r4774;\n    and r4774 18446744073709551615u128 into r4775;\n    shr r4774 64u8 into r4776;\n    shr r4766 64u8 into r4777;\n    shr r4767 64u8 into r4778;\n    add r4777 r4778 into r4779;\n    and r4768 18446744073709551615u128 into r4780;\n    add r4779 r4780 into r4781;\n    add r4781 r4776 into r4782;\n    and r4782 18446744073709551615u128 into r4783;\n    shr r4782 64u8 into r4784;\n    shr r4768 64u8 into r4785;\n    add r4785 r4784 into r4786;\n    shl r4786 64u8 into r4787;\n    add r4787 r4783 into r4788;\n    shl r4775 64u8 into r4789;\n    add r4789 r4769 into r4790;\n    and r4700.hi 18446744073709551615u128 into r4791;\n    shr r4700.hi 64u8 into r4792;\n    and r4699.hi 18446744073709551615u128 into r4793;\n    shr r4699.hi 64u8 into r4794;\n    mul r4791 r4793 into r4795;\n    mul r4791 r4794 into r4796;\n    mul r4792 r4793 into r4797;\n    mul r4792 r4794 into r4798;\n    and r4795 18446744073709551615u128 into r4799;\n    shr r4795 64u8 into r4800;\n    and r4796 18446744073709551615u128 into r4801;\n    add r4800 r4801 into r4802;\n    and r4797 18446744073709551615u128 into r4803;\n    add r4802 r4803 into r4804;\n    and r4804 18446744073709551615u128 into r4805;\n    shr r4804 64u8 into r4806;\n    shr r4796 64u8 into r4807;\n    shr r4797 64u8 into r4808;\n    add r4807 r4808 into r4809;\n    and r4798 18446744073709551615u128 into r4810;\n    add r4809 r4810 into r4811;\n    add r4811 r4806 into r4812;\n    and r4812 18446744073709551615u128 into r4813;\n    shr r4812 64u8 into r4814;\n    shr r4798 64u8 into r4815;\n    add r4815 r4814 into r4816;\n    shl r4816 64u8 into r4817;\n    add r4817 r4813 into r4818;\n    shl r4805 64u8 into r4819;\n    add r4819 r4799 into r4820;\n    add.w r4728 r4760 into r4821;\n    lt r4821 r4728 into r4822;\n    ternary r4822 1u128 0u128 into r4823;\n    add.w r4821 r4790 into r4824;\n    lt r4824 r4821 into r4825;\n    ternary r4825 1u128 0u128 into r4826;\n    add r4823 r4826 into r4827;\n    add.w r4758 r4788 into r4828;\n    lt r4828 r4758 into r4829;\n    ternary r4829 1u128 0u128 into r4830;\n    add.w r4828 r4820 into r4831;\n    lt r4831 r4828 into r4832;\n    ternary r4832 1u128 0u128 into r4833;\n    add.w r4831 r4827 into r4834;\n    lt r4834 r4831 into r4835;\n    ternary r4835 1u128 0u128 into r4836;\n    add r4830 r4833 into r4837;\n    add r4837 r4836 into r4838;\n    cast r4824 r4730 into r4839 as U256__8JquwLopp8;\n    gt r4839.lo 0u128 into r4840;\n    lt r4839.hi 340282366920938463463374607431768211455u128 into r4841;\n    and r4840 r4841 into r4842;\n    add.w r4839.hi 1u128 into r4843;\n    ternary r4842 r4843 r4839.hi into r4844;\n    ternary r1529 r4844 r1522 into r4845;\n    ternary r1526 r4845 r109 into r4846;\n    ternary r4673 r4846 0u128 into r4847;\n    cast r8 into r4848 as u128;\n    sub 1000000u128 r4848 into r4849;\n    and r4847 18446744073709551615u128 into r4850;\n    shr r4847 64u8 into r4851;\n    mul r4850 1000000u128 into r4852;\n    mul r4851 1000000u128 into r4853;\n    and r4852 18446744073709551615u128 into r4854;\n    shr r4852 64u8 into r4855;\n    and r4853 18446744073709551615u128 into r4856;\n    add r4855 r4856 into r4857;\n    and r4857 18446744073709551615u128 into r4858;\n    shr r4857 64u8 into r4859;\n    shr r4853 64u8 into r4860;\n    add r4860 r4859 into r4861;\n    and r4861 18446744073709551615u128 into r4862;\n    shr r4861 64u8 into r4863;\n    shl r4863 64u8 into r4864;\n    add r4864 r4862 into r4865;\n    shl r4858 64u8 into r4866;\n    add r4866 r4854 into r4867;\n    lt r4865 r4849 into r4868;\n    assert.eq r4868 true;\n    shr r4867 96u8 into r4869;\n    and r4869 4294967295u128 into r4870;\n    shl r4865 32u8 into r4871;\n    add r4871 r4870 into r4872;\n    div r4872 r4849 into r4873;\n    rem r4872 r4849 into r4874;\n    shr r4867 64u8 into r4875;\n    and r4875 4294967295u128 into r4876;\n    shl r4874 32u8 into r4877;\n    add r4877 r4876 into r4878;\n    shl r4873 32u8 into r4879;\n    div r4878 r4849 into r4880;\n    add r4879 r4880 into r4881;\n    rem r4878 r4849 into r4882;\n    shr r4867 32u8 into r4883;\n    and r4883 4294967295u128 into r4884;\n    shl r4882 32u8 into r4885;\n    add r4885 r4884 into r4886;\n    shl r4881 32u8 into r4887;\n    div r4886 r4849 into r4888;\n    add r4887 r4888 into r4889;\n    rem r4886 r4849 into r4890;\n    shr r4867 0u8 into r4891;\n    and r4891 4294967295u128 into r4892;\n    shl r4890 32u8 into r4893;\n    add r4893 r4892 into r4894;\n    shl r4889 32u8 into r4895;\n    div r4894 r4849 into r4896;\n    add r4895 r4896 into r4897;\n    rem r4894 r4849 into r4898;\n    gt r4898 0u128 into r4899;\n    ternary r4899 1u128 0u128 into r4900;\n    add r4897 r4900 into r4901;\n    ternary r1526 r4901 r2 into r4902;\n    ternary r4673 r4902 0u128 into r4903;\n    gt r4903 r2 into r4904;\n    ternary r4904 r2 r4903 into r4905;\n    sub r2 r4905 into r4906;\n    sub r4905 r4847 into r4907;\n    cast r9 into r4908 as u128;\n    mul r4907 r4908 into r4909;\n    div r4909 16u128 into r4910;\n    sub r4907 r4910 into r4911;\n    div r4911 r1539 into r4912;\n    rem r4911 r1539 into r4913;\n    lt r4913 r1539 into r4914;\n    assert.eq r4914 true;\n    gte r4913 170141183460469231731687303715884105728u128 into r4915;\n    add.w r4913 r4913 into r4916;\n    gte r4916 r1539 into r4917;\n    or r4915 r4917 into r4918;\n    sub.w r4916 r1539 into r4919;\n    ternary r4918 r4919 r4916 into r4920;\n    ternary r4918 170141183460469231731687303715884105728u128 0u128 into r4921;\n    gte r4920 170141183460469231731687303715884105728u128 into r4922;\n    add.w r4920 r4920 into r4923;\n    gte r4923 r1539 into r4924;\n    or r4922 r4924 into r4925;\n    sub.w r4923 r1539 into r4926;\n    ternary r4925 r4926 r4923 into r4927;\n    add r4921 85070591730234615865843651857942052864u128 into r4928;\n    ternary r4925 r4928 r4921 into r4929;\n    gte r4927 170141183460469231731687303715884105728u128 into r4930;\n    add.w r4927 r4927 into r4931;\n    gte r4931 r1539 into r4932;\n    or r4930 r4932 into r4933;\n    sub.w r4931 r1539 into r4934;\n    ternary r4933 r4934 r4931 into r4935;\n    add r4929 42535295865117307932921825928971026432u128 into r4936;\n    ternary r4933 r4936 r4929 into r4937;\n    gte r4935 170141183460469231731687303715884105728u128 into r4938;\n    add.w r4935 r4935 into r4939;\n    gte r4939 r1539 into r4940;\n    or r4938 r4940 into r4941;\n    sub.w r4939 r1539 into r4942;\n    ternary r4941 r4942 r4939 into r4943;\n    add r4937 21267647932558653966460912964485513216u128 into r4944;\n    ternary r4941 r4944 r4937 into r4945;\n    gte r4943 170141183460469231731687303715884105728u128 into r4946;\n    add.w r4943 r4943 into r4947;\n    gte r4947 r1539 into r4948;\n    or r4946 r4948 into r4949;\n    sub.w r4947 r1539 into r4950;\n    ternary r4949 r4950 r4947 into r4951;\n    add r4945 10633823966279326983230456482242756608u128 into r4952;\n    ternary r4949 r4952 r4945 into r4953;\n    gte r4951 170141183460469231731687303715884105728u128 into r4954;\n    add.w r4951 r4951 into r4955;\n    gte r4955 r1539 into r4956;\n    or r4954 r4956 into r4957;\n    sub.w r4955 r1539 into r4958;\n    ternary r4957 r4958 r4955 into r4959;\n    add r4953 5316911983139663491615228241121378304u128 into r4960;\n    ternary r4957 r4960 r4953 into r4961;\n    gte r4959 170141183460469231731687303715884105728u128 into r4962;\n    add.w r4959 r4959 into r4963;\n    gte r4963 r1539 into r4964;\n    or r4962 r4964 into r4965;\n    sub.w r4963 r1539 into r4966;\n    ternary r4965 r4966 r4963 into r4967;\n    add r4961 2658455991569831745807614120560689152u128 into r4968;\n    ternary r4965 r4968 r4961 into r4969;\n    gte r4967 170141183460469231731687303715884105728u128 into r4970;\n    add.w r4967 r4967 into r4971;\n    gte r4971 r1539 into r4972;\n    or r4970 r4972 into r4973;\n    sub.w r4971 r1539 into r4974;\n    ternary r4973 r4974 r4971 into r4975;\n    add r4969 1329227995784915872903807060280344576u128 into r4976;\n    ternary r4973 r4976 r4969 into r4977;\n    gte r4975 170141183460469231731687303715884105728u128 into r4978;\n    add.w r4975 r4975 into r4979;\n    gte r4979 r1539 into r4980;\n    or r4978 r4980 into r4981;\n    sub.w r4979 r1539 into r4982;\n    ternary r4981 r4982 r4979 into r4983;\n    add r4977 664613997892457936451903530140172288u128 into r4984;\n    ternary r4981 r4984 r4977 into r4985;\n    gte r4983 170141183460469231731687303715884105728u128 into r4986;\n    add.w r4983 r4983 into r4987;\n    gte r4987 r1539 into r4988;\n    or r4986 r4988 into r4989;\n    sub.w r4987 r1539 into r4990;\n    ternary r4989 r4990 r4987 into r4991;\n    add r4985 332306998946228968225951765070086144u128 into r4992;\n    ternary r4989 r4992 r4985 into r4993;\n    gte r4991 170141183460469231731687303715884105728u128 into r4994;\n    add.w r4991 r4991 into r4995;\n    gte r4995 r1539 into r4996;\n    or r4994 r4996 into r4997;\n    sub.w r4995 r1539 into r4998;\n    ternary r4997 r4998 r4995 into r4999;\n    add r4993 166153499473114484112975882535043072u128 into r5000;\n    ternary r4997 r5000 r4993 into r5001;\n    gte r4999 170141183460469231731687303715884105728u128 into r5002;\n    add.w r4999 r4999 into r5003;\n    gte r5003 r1539 into r5004;\n    or r5002 r5004 into r5005;\n    sub.w r5003 r1539 into r5006;\n    ternary r5005 r5006 r5003 into r5007;\n    add r5001 83076749736557242056487941267521536u128 into r5008;\n    ternary r5005 r5008 r5001 into r5009;\n    gte r5007 170141183460469231731687303715884105728u128 into r5010;\n    add.w r5007 r5007 into r5011;\n    gte r5011 r1539 into r5012;\n    or r5010 r5012 into r5013;\n    sub.w r5011 r1539 into r5014;\n    ternary r5013 r5014 r5011 into r5015;\n    add r5009 41538374868278621028243970633760768u128 into r5016;\n    ternary r5013 r5016 r5009 into r5017;\n    gte r5015 170141183460469231731687303715884105728u128 into r5018;\n    add.w r5015 r5015 into r5019;\n    gte r5019 r1539 into r5020;\n    or r5018 r5020 into r5021;\n    sub.w r5019 r1539 into r5022;\n    ternary r5021 r5022 r5019 into r5023;\n    add r5017 20769187434139310514121985316880384u128 into r5024;\n    ternary r5021 r5024 r5017 into r5025;\n    gte r5023 170141183460469231731687303715884105728u128 into r5026;\n    add.w r5023 r5023 into r5027;\n    gte r5027 r1539 into r5028;\n    or r5026 r5028 into r5029;\n    sub.w r5027 r1539 into r5030;\n    ternary r5029 r5030 r5027 into r5031;\n    add r5025 10384593717069655257060992658440192u128 into r5032;\n    ternary r5029 r5032 r5025 into r5033;\n    gte r5031 170141183460469231731687303715884105728u128 into r5034;\n    add.w r5031 r5031 into r5035;\n    gte r5035 r1539 into r5036;\n    or r5034 r5036 into r5037;\n    sub.w r5035 r1539 into r5038;\n    ternary r5037 r5038 r5035 into r5039;\n    add r5033 5192296858534827628530496329220096u128 into r5040;\n    ternary r5037 r5040 r5033 into r5041;\n    gte r5039 170141183460469231731687303715884105728u128 into r5042;\n    add.w r5039 r5039 into r5043;\n    gte r5043 r1539 into r5044;\n    or r5042 r5044 into r5045;\n    sub.w r5043 r1539 into r5046;\n    ternary r5045 r5046 r5043 into r5047;\n    add r5041 2596148429267413814265248164610048u128 into r5048;\n    ternary r5045 r5048 r5041 into r5049;\n    gte r5047 170141183460469231731687303715884105728u128 into r5050;\n    add.w r5047 r5047 into r5051;\n    gte r5051 r1539 into r5052;\n    or r5050 r5052 into r5053;\n    sub.w r5051 r1539 into r5054;\n    ternary r5053 r5054 r5051 into r5055;\n    add r5049 1298074214633706907132624082305024u128 into r5056;\n    ternary r5053 r5056 r5049 into r5057;\n    gte r5055 170141183460469231731687303715884105728u128 into r5058;\n    add.w r5055 r5055 into r5059;\n    gte r5059 r1539 into r5060;\n    or r5058 r5060 into r5061;\n    sub.w r5059 r1539 into r5062;\n    ternary r5061 r5062 r5059 into r5063;\n    add r5057 649037107316853453566312041152512u128 into r5064;\n    ternary r5061 r5064 r5057 into r5065;\n    gte r5063 170141183460469231731687303715884105728u128 into r5066;\n    add.w r5063 r5063 into r5067;\n    gte r5067 r1539 into r5068;\n    or r5066 r5068 into r5069;\n    sub.w r5067 r1539 into r5070;\n    ternary r5069 r5070 r5067 into r5071;\n    add r5065 324518553658426726783156020576256u128 into r5072;\n    ternary r5069 r5072 r5065 into r5073;\n    gte r5071 170141183460469231731687303715884105728u128 into r5074;\n    add.w r5071 r5071 into r5075;\n    gte r5075 r1539 into r5076;\n    or r5074 r5076 into r5077;\n    sub.w r5075 r1539 into r5078;\n    ternary r5077 r5078 r5075 into r5079;\n    add r5073 162259276829213363391578010288128u128 into r5080;\n    ternary r5077 r5080 r5073 into r5081;\n    gte r5079 170141183460469231731687303715884105728u128 into r5082;\n    add.w r5079 r5079 into r5083;\n    gte r5083 r1539 into r5084;\n    or r5082 r5084 into r5085;\n    sub.w r5083 r1539 into r5086;\n    ternary r5085 r5086 r5083 into r5087;\n    add r5081 81129638414606681695789005144064u128 into r5088;\n    ternary r5085 r5088 r5081 into r5089;\n    gte r5087 170141183460469231731687303715884105728u128 into r5090;\n    add.w r5087 r5087 into r5091;\n    gte r5091 r1539 into r5092;\n    or r5090 r5092 into r5093;\n    sub.w r5091 r1539 into r5094;\n    ternary r5093 r5094 r5091 into r5095;\n    add r5089 40564819207303340847894502572032u128 into r5096;\n    ternary r5093 r5096 r5089 into r5097;\n    gte r5095 170141183460469231731687303715884105728u128 into r5098;\n    add.w r5095 r5095 into r5099;\n    gte r5099 r1539 into r5100;\n    or r5098 r5100 into r5101;\n    sub.w r5099 r1539 into r5102;\n    ternary r5101 r5102 r5099 into r5103;\n    add r5097 20282409603651670423947251286016u128 into r5104;\n    ternary r5101 r5104 r5097 into r5105;\n    gte r5103 170141183460469231731687303715884105728u128 into r5106;\n    add.w r5103 r5103 into r5107;\n    gte r5107 r1539 into r5108;\n    or r5106 r5108 into r5109;\n    sub.w r5107 r1539 into r5110;\n    ternary r5109 r5110 r5107 into r5111;\n    add r5105 10141204801825835211973625643008u128 into r5112;\n    ternary r5109 r5112 r5105 into r5113;\n    gte r5111 170141183460469231731687303715884105728u128 into r5114;\n    add.w r5111 r5111 into r5115;\n    gte r5115 r1539 into r5116;\n    or r5114 r5116 into r5117;\n    sub.w r5115 r1539 into r5118;\n    ternary r5117 r5118 r5115 into r5119;\n    add r5113 5070602400912917605986812821504u128 into r5120;\n    ternary r5117 r5120 r5113 into r5121;\n    gte r5119 170141183460469231731687303715884105728u128 into r5122;\n    add.w r5119 r5119 into r5123;\n    gte r5123 r1539 into r5124;\n    or r5122 r5124 into r5125;\n    sub.w r5123 r1539 into r5126;\n    ternary r5125 r5126 r5123 into r5127;\n    add r5121 2535301200456458802993406410752u128 into r5128;\n    ternary r5125 r5128 r5121 into r5129;\n    gte r5127 170141183460469231731687303715884105728u128 into r5130;\n    add.w r5127 r5127 into r5131;\n    gte r5131 r1539 into r5132;\n    or r5130 r5132 into r5133;\n    sub.w r5131 r1539 into r5134;\n    ternary r5133 r5134 r5131 into r5135;\n    add r5129 1267650600228229401496703205376u128 into r5136;\n    ternary r5133 r5136 r5129 into r5137;\n    gte r5135 170141183460469231731687303715884105728u128 into r5138;\n    add.w r5135 r5135 into r5139;\n    gte r5139 r1539 into r5140;\n    or r5138 r5140 into r5141;\n    sub.w r5139 r1539 into r5142;\n    ternary r5141 r5142 r5139 into r5143;\n    add r5137 633825300114114700748351602688u128 into r5144;\n    ternary r5141 r5144 r5137 into r5145;\n    gte r5143 170141183460469231731687303715884105728u128 into r5146;\n    add.w r5143 r5143 into r5147;\n    gte r5147 r1539 into r5148;\n    or r5146 r5148 into r5149;\n    sub.w r5147 r1539 into r5150;\n    ternary r5149 r5150 r5147 into r5151;\n    add r5145 316912650057057350374175801344u128 into r5152;\n    ternary r5149 r5152 r5145 into r5153;\n    gte r5151 170141183460469231731687303715884105728u128 into r5154;\n    add.w r5151 r5151 into r5155;\n    gte r5155 r1539 into r5156;\n    or r5154 r5156 into r5157;\n    sub.w r5155 r1539 into r5158;\n    ternary r5157 r5158 r5155 into r5159;\n    add r5153 158456325028528675187087900672u128 into r5160;\n    ternary r5157 r5160 r5153 into r5161;\n    gte r5159 170141183460469231731687303715884105728u128 into r5162;\n    add.w r5159 r5159 into r5163;\n    gte r5163 r1539 into r5164;\n    or r5162 r5164 into r5165;\n    sub.w r5163 r1539 into r5166;\n    ternary r5165 r5166 r5163 into r5167;\n    add r5161 79228162514264337593543950336u128 into r5168;\n    ternary r5165 r5168 r5161 into r5169;\n    gte r5167 170141183460469231731687303715884105728u128 into r5170;\n    add.w r5167 r5167 into r5171;\n    gte r5171 r1539 into r5172;\n    or r5170 r5172 into r5173;\n    sub.w r5171 r1539 into r5174;\n    ternary r5173 r5174 r5171 into r5175;\n    add r5169 39614081257132168796771975168u128 into r5176;\n    ternary r5173 r5176 r5169 into r5177;\n    gte r5175 170141183460469231731687303715884105728u128 into r5178;\n    add.w r5175 r5175 into r5179;\n    gte r5179 r1539 into r5180;\n    or r5178 r5180 into r5181;\n    sub.w r5179 r1539 into r5182;\n    ternary r5181 r5182 r5179 into r5183;\n    add r5177 19807040628566084398385987584u128 into r5184;\n    ternary r5181 r5184 r5177 into r5185;\n    gte r5183 170141183460469231731687303715884105728u128 into r5186;\n    add.w r5183 r5183 into r5187;\n    gte r5187 r1539 into r5188;\n    or r5186 r5188 into r5189;\n    sub.w r5187 r1539 into r5190;\n    ternary r5189 r5190 r5187 into r5191;\n    add r5185 9903520314283042199192993792u128 into r5192;\n    ternary r5189 r5192 r5185 into r5193;\n    gte r5191 170141183460469231731687303715884105728u128 into r5194;\n    add.w r5191 r5191 into r5195;\n    gte r5195 r1539 into r5196;\n    or r5194 r5196 into r5197;\n    sub.w r5195 r1539 into r5198;\n    ternary r5197 r5198 r5195 into r5199;\n    add r5193 4951760157141521099596496896u128 into r5200;\n    ternary r5197 r5200 r5193 into r5201;\n    gte r5199 170141183460469231731687303715884105728u128 into r5202;\n    add.w r5199 r5199 into r5203;\n    gte r5203 r1539 into r5204;\n    or r5202 r5204 into r5205;\n    sub.w r5203 r1539 into r5206;\n    ternary r5205 r5206 r5203 into r5207;\n    add r5201 2475880078570760549798248448u128 into r5208;\n    ternary r5205 r5208 r5201 into r5209;\n    gte r5207 170141183460469231731687303715884105728u128 into r5210;\n    add.w r5207 r5207 into r5211;\n    gte r5211 r1539 into r5212;\n    or r5210 r5212 into r5213;\n    sub.w r5211 r1539 into r5214;\n    ternary r5213 r5214 r5211 into r5215;\n    add r5209 1237940039285380274899124224u128 into r5216;\n    ternary r5213 r5216 r5209 into r5217;\n    gte r5215 170141183460469231731687303715884105728u128 into r5218;\n    add.w r5215 r5215 into r5219;\n    gte r5219 r1539 into r5220;\n    or r5218 r5220 into r5221;\n    sub.w r5219 r1539 into r5222;\n    ternary r5221 r5222 r5219 into r5223;\n    add r5217 618970019642690137449562112u128 into r5224;\n    ternary r5221 r5224 r5217 into r5225;\n    gte r5223 170141183460469231731687303715884105728u128 into r5226;\n    add.w r5223 r5223 into r5227;\n    gte r5227 r1539 into r5228;\n    or r5226 r5228 into r5229;\n    sub.w r5227 r1539 into r5230;\n    ternary r5229 r5230 r5227 into r5231;\n    add r5225 309485009821345068724781056u128 into r5232;\n    ternary r5229 r5232 r5225 into r5233;\n    gte r5231 170141183460469231731687303715884105728u128 into r5234;\n    add.w r5231 r5231 into r5235;\n    gte r5235 r1539 into r5236;\n    or r5234 r5236 into r5237;\n    sub.w r5235 r1539 into r5238;\n    ternary r5237 r5238 r5235 into r5239;\n    add r5233 154742504910672534362390528u128 into r5240;\n    ternary r5237 r5240 r5233 into r5241;\n    gte r5239 170141183460469231731687303715884105728u128 into r5242;\n    add.w r5239 r5239 into r5243;\n    gte r5243 r1539 into r5244;\n    or r5242 r5244 into r5245;\n    sub.w r5243 r1539 into r5246;\n    ternary r5245 r5246 r5243 into r5247;\n    add r5241 77371252455336267181195264u128 into r5248;\n    ternary r5245 r5248 r5241 into r5249;\n    gte r5247 170141183460469231731687303715884105728u128 into r5250;\n    add.w r5247 r5247 into r5251;\n    gte r5251 r1539 into r5252;\n    or r5250 r5252 into r5253;\n    sub.w r5251 r1539 into r5254;\n    ternary r5253 r5254 r5251 into r5255;\n    add r5249 38685626227668133590597632u128 into r5256;\n    ternary r5253 r5256 r5249 into r5257;\n    gte r5255 170141183460469231731687303715884105728u128 into r5258;\n    add.w r5255 r5255 into r5259;\n    gte r5259 r1539 into r5260;\n    or r5258 r5260 into r5261;\n    sub.w r5259 r1539 into r5262;\n    ternary r5261 r5262 r5259 into r5263;\n    add r5257 19342813113834066795298816u128 into r5264;\n    ternary r5261 r5264 r5257 into r5265;\n    gte r5263 170141183460469231731687303715884105728u128 into r5266;\n    add.w r5263 r5263 into r5267;\n    gte r5267 r1539 into r5268;\n    or r5266 r5268 into r5269;\n    sub.w r5267 r1539 into r5270;\n    ternary r5269 r5270 r5267 into r5271;\n    add r5265 9671406556917033397649408u128 into r5272;\n    ternary r5269 r5272 r5265 into r5273;\n    gte r5271 170141183460469231731687303715884105728u128 into r5274;\n    add.w r5271 r5271 into r5275;\n    gte r5275 r1539 into r5276;\n    or r5274 r5276 into r5277;\n    sub.w r5275 r1539 into r5278;\n    ternary r5277 r5278 r5275 into r5279;\n    add r5273 4835703278458516698824704u128 into r5280;\n    ternary r5277 r5280 r5273 into r5281;\n    gte r5279 170141183460469231731687303715884105728u128 into r5282;\n    add.w r5279 r5279 into r5283;\n    gte r5283 r1539 into r5284;\n    or r5282 r5284 into r5285;\n    sub.w r5283 r1539 into r5286;\n    ternary r5285 r5286 r5283 into r5287;\n    add r5281 2417851639229258349412352u128 into r5288;\n    ternary r5285 r5288 r5281 into r5289;\n    gte r5287 170141183460469231731687303715884105728u128 into r5290;\n    add.w r5287 r5287 into r5291;\n    gte r5291 r1539 into r5292;\n    or r5290 r5292 into r5293;\n    sub.w r5291 r1539 into r5294;\n    ternary r5293 r5294 r5291 into r5295;\n    add r5289 1208925819614629174706176u128 into r5296;\n    ternary r5293 r5296 r5289 into r5297;\n    gte r5295 170141183460469231731687303715884105728u128 into r5298;\n    add.w r5295 r5295 into r5299;\n    gte r5299 r1539 into r5300;\n    or r5298 r5300 into r5301;\n    sub.w r5299 r1539 into r5302;\n    ternary r5301 r5302 r5299 into r5303;\n    add r5297 604462909807314587353088u128 into r5304;\n    ternary r5301 r5304 r5297 into r5305;\n    gte r5303 170141183460469231731687303715884105728u128 into r5306;\n    add.w r5303 r5303 into r5307;\n    gte r5307 r1539 into r5308;\n    or r5306 r5308 into r5309;\n    sub.w r5307 r1539 into r5310;\n    ternary r5309 r5310 r5307 into r5311;\n    add r5305 302231454903657293676544u128 into r5312;\n    ternary r5309 r5312 r5305 into r5313;\n    gte r5311 170141183460469231731687303715884105728u128 into r5314;\n    add.w r5311 r5311 into r5315;\n    gte r5315 r1539 into r5316;\n    or r5314 r5316 into r5317;\n    sub.w r5315 r1539 into r5318;\n    ternary r5317 r5318 r5315 into r5319;\n    add r5313 151115727451828646838272u128 into r5320;\n    ternary r5317 r5320 r5313 into r5321;\n    gte r5319 170141183460469231731687303715884105728u128 into r5322;\n    add.w r5319 r5319 into r5323;\n    gte r5323 r1539 into r5324;\n    or r5322 r5324 into r5325;\n    sub.w r5323 r1539 into r5326;\n    ternary r5325 r5326 r5323 into r5327;\n    add r5321 75557863725914323419136u128 into r5328;\n    ternary r5325 r5328 r5321 into r5329;\n    gte r5327 170141183460469231731687303715884105728u128 into r5330;\n    add.w r5327 r5327 into r5331;\n    gte r5331 r1539 into r5332;\n    or r5330 r5332 into r5333;\n    sub.w r5331 r1539 into r5334;\n    ternary r5333 r5334 r5331 into r5335;\n    add r5329 37778931862957161709568u128 into r5336;\n    ternary r5333 r5336 r5329 into r5337;\n    gte r5335 170141183460469231731687303715884105728u128 into r5338;\n    add.w r5335 r5335 into r5339;\n    gte r5339 r1539 into r5340;\n    or r5338 r5340 into r5341;\n    sub.w r5339 r1539 into r5342;\n    ternary r5341 r5342 r5339 into r5343;\n    add r5337 18889465931478580854784u128 into r5344;\n    ternary r5341 r5344 r5337 into r5345;\n    gte r5343 170141183460469231731687303715884105728u128 into r5346;\n    add.w r5343 r5343 into r5347;\n    gte r5347 r1539 into r5348;\n    or r5346 r5348 into r5349;\n    sub.w r5347 r1539 into r5350;\n    ternary r5349 r5350 r5347 into r5351;\n    add r5345 9444732965739290427392u128 into r5352;\n    ternary r5349 r5352 r5345 into r5353;\n    gte r5351 170141183460469231731687303715884105728u128 into r5354;\n    add.w r5351 r5351 into r5355;\n    gte r5355 r1539 into r5356;\n    or r5354 r5356 into r5357;\n    sub.w r5355 r1539 into r5358;\n    ternary r5357 r5358 r5355 into r5359;\n    add r5353 4722366482869645213696u128 into r5360;\n    ternary r5357 r5360 r5353 into r5361;\n    gte r5359 170141183460469231731687303715884105728u128 into r5362;\n    add.w r5359 r5359 into r5363;\n    gte r5363 r1539 into r5364;\n    or r5362 r5364 into r5365;\n    sub.w r5363 r1539 into r5366;\n    ternary r5365 r5366 r5363 into r5367;\n    add r5361 2361183241434822606848u128 into r5368;\n    ternary r5365 r5368 r5361 into r5369;\n    gte r5367 170141183460469231731687303715884105728u128 into r5370;\n    add.w r5367 r5367 into r5371;\n    gte r5371 r1539 into r5372;\n    or r5370 r5372 into r5373;\n    sub.w r5371 r1539 into r5374;\n    ternary r5373 r5374 r5371 into r5375;\n    add r5369 1180591620717411303424u128 into r5376;\n    ternary r5373 r5376 r5369 into r5377;\n    gte r5375 170141183460469231731687303715884105728u128 into r5378;\n    add.w r5375 r5375 into r5379;\n    gte r5379 r1539 into r5380;\n    or r5378 r5380 into r5381;\n    sub.w r5379 r1539 into r5382;\n    ternary r5381 r5382 r5379 into r5383;\n    add r5377 590295810358705651712u128 into r5384;\n    ternary r5381 r5384 r5377 into r5385;\n    gte r5383 170141183460469231731687303715884105728u128 into r5386;\n    add.w r5383 r5383 into r5387;\n    gte r5387 r1539 into r5388;\n    or r5386 r5388 into r5389;\n    sub.w r5387 r1539 into r5390;\n    ternary r5389 r5390 r5387 into r5391;\n    add r5385 295147905179352825856u128 into r5392;\n    ternary r5389 r5392 r5385 into r5393;\n    gte r5391 170141183460469231731687303715884105728u128 into r5394;\n    add.w r5391 r5391 into r5395;\n    gte r5395 r1539 into r5396;\n    or r5394 r5396 into r5397;\n    sub.w r5395 r1539 into r5398;\n    ternary r5397 r5398 r5395 into r5399;\n    add r5393 147573952589676412928u128 into r5400;\n    ternary r5397 r5400 r5393 into r5401;\n    gte r5399 170141183460469231731687303715884105728u128 into r5402;\n    add.w r5399 r5399 into r5403;\n    gte r5403 r1539 into r5404;\n    or r5402 r5404 into r5405;\n    sub.w r5403 r1539 into r5406;\n    ternary r5405 r5406 r5403 into r5407;\n    add r5401 73786976294838206464u128 into r5408;\n    ternary r5405 r5408 r5401 into r5409;\n    gte r5407 170141183460469231731687303715884105728u128 into r5410;\n    add.w r5407 r5407 into r5411;\n    gte r5411 r1539 into r5412;\n    or r5410 r5412 into r5413;\n    sub.w r5411 r1539 into r5414;\n    ternary r5413 r5414 r5411 into r5415;\n    add r5409 36893488147419103232u128 into r5416;\n    ternary r5413 r5416 r5409 into r5417;\n    gte r5415 170141183460469231731687303715884105728u128 into r5418;\n    add.w r5415 r5415 into r5419;\n    gte r5419 r1539 into r5420;\n    or r5418 r5420 into r5421;\n    sub.w r5419 r1539 into r5422;\n    ternary r5421 r5422 r5419 into r5423;\n    add r5417 18446744073709551616u128 into r5424;\n    ternary r5421 r5424 r5417 into r5425;\n    gte r5423 170141183460469231731687303715884105728u128 into r5426;\n    add.w r5423 r5423 into r5427;\n    gte r5427 r1539 into r5428;\n    or r5426 r5428 into r5429;\n    sub.w r5427 r1539 into r5430;\n    ternary r5429 r5430 r5427 into r5431;\n    add r5425 9223372036854775808u128 into r5432;\n    ternary r5429 r5432 r5425 into r5433;\n    gte r5431 170141183460469231731687303715884105728u128 into r5434;\n    add.w r5431 r5431 into r5435;\n    gte r5435 r1539 into r5436;\n    or r5434 r5436 into r5437;\n    sub.w r5435 r1539 into r5438;\n    ternary r5437 r5438 r5435 into r5439;\n    add r5433 4611686018427387904u128 into r5440;\n    ternary r5437 r5440 r5433 into r5441;\n    gte r5439 170141183460469231731687303715884105728u128 into r5442;\n    add.w r5439 r5439 into r5443;\n    gte r5443 r1539 into r5444;\n    or r5442 r5444 into r5445;\n    sub.w r5443 r1539 into r5446;\n    ternary r5445 r5446 r5443 into r5447;\n    add r5441 2305843009213693952u128 into r5448;\n    ternary r5445 r5448 r5441 into r5449;\n    gte r5447 170141183460469231731687303715884105728u128 into r5450;\n    add.w r5447 r5447 into r5451;\n    gte r5451 r1539 into r5452;\n    or r5450 r5452 into r5453;\n    sub.w r5451 r1539 into r5454;\n    ternary r5453 r5454 r5451 into r5455;\n    add r5449 1152921504606846976u128 into r5456;\n    ternary r5453 r5456 r5449 into r5457;\n    gte r5455 170141183460469231731687303715884105728u128 into r5458;\n    add.w r5455 r5455 into r5459;\n    gte r5459 r1539 into r5460;\n    or r5458 r5460 into r5461;\n    sub.w r5459 r1539 into r5462;\n    ternary r5461 r5462 r5459 into r5463;\n    add r5457 576460752303423488u128 into r5464;\n    ternary r5461 r5464 r5457 into r5465;\n    gte r5463 170141183460469231731687303715884105728u128 into r5466;\n    add.w r5463 r5463 into r5467;\n    gte r5467 r1539 into r5468;\n    or r5466 r5468 into r5469;\n    sub.w r5467 r1539 into r5470;\n    ternary r5469 r5470 r5467 into r5471;\n    add r5465 288230376151711744u128 into r5472;\n    ternary r5469 r5472 r5465 into r5473;\n    gte r5471 170141183460469231731687303715884105728u128 into r5474;\n    add.w r5471 r5471 into r5475;\n    gte r5475 r1539 into r5476;\n    or r5474 r5476 into r5477;\n    sub.w r5475 r1539 into r5478;\n    ternary r5477 r5478 r5475 into r5479;\n    add r5473 144115188075855872u128 into r5480;\n    ternary r5477 r5480 r5473 into r5481;\n    gte r5479 170141183460469231731687303715884105728u128 into r5482;\n    add.w r5479 r5479 into r5483;\n    gte r5483 r1539 into r5484;\n    or r5482 r5484 into r5485;\n    sub.w r5483 r1539 into r5486;\n    ternary r5485 r5486 r5483 into r5487;\n    add r5481 72057594037927936u128 into r5488;\n    ternary r5485 r5488 r5481 into r5489;\n    gte r5487 170141183460469231731687303715884105728u128 into r5490;\n    add.w r5487 r5487 into r5491;\n    gte r5491 r1539 into r5492;\n    or r5490 r5492 into r5493;\n    sub.w r5491 r1539 into r5494;\n    ternary r5493 r5494 r5491 into r5495;\n    add r5489 36028797018963968u128 into r5496;\n    ternary r5493 r5496 r5489 into r5497;\n    gte r5495 170141183460469231731687303715884105728u128 into r5498;\n    add.w r5495 r5495 into r5499;\n    gte r5499 r1539 into r5500;\n    or r5498 r5500 into r5501;\n    sub.w r5499 r1539 into r5502;\n    ternary r5501 r5502 r5499 into r5503;\n    add r5497 18014398509481984u128 into r5504;\n    ternary r5501 r5504 r5497 into r5505;\n    gte r5503 170141183460469231731687303715884105728u128 into r5506;\n    add.w r5503 r5503 into r5507;\n    gte r5507 r1539 into r5508;\n    or r5506 r5508 into r5509;\n    sub.w r5507 r1539 into r5510;\n    ternary r5509 r5510 r5507 into r5511;\n    add r5505 9007199254740992u128 into r5512;\n    ternary r5509 r5512 r5505 into r5513;\n    gte r5511 170141183460469231731687303715884105728u128 into r5514;\n    add.w r5511 r5511 into r5515;\n    gte r5515 r1539 into r5516;\n    or r5514 r5516 into r5517;\n    sub.w r5515 r1539 into r5518;\n    ternary r5517 r5518 r5515 into r5519;\n    add r5513 4503599627370496u128 into r5520;\n    ternary r5517 r5520 r5513 into r5521;\n    gte r5519 170141183460469231731687303715884105728u128 into r5522;\n    add.w r5519 r5519 into r5523;\n    gte r5523 r1539 into r5524;\n    or r5522 r5524 into r5525;\n    sub.w r5523 r1539 into r5526;\n    ternary r5525 r5526 r5523 into r5527;\n    add r5521 2251799813685248u128 into r5528;\n    ternary r5525 r5528 r5521 into r5529;\n    gte r5527 170141183460469231731687303715884105728u128 into r5530;\n    add.w r5527 r5527 into r5531;\n    gte r5531 r1539 into r5532;\n    or r5530 r5532 into r5533;\n    sub.w r5531 r1539 into r5534;\n    ternary r5533 r5534 r5531 into r5535;\n    add r5529 1125899906842624u128 into r5536;\n    ternary r5533 r5536 r5529 into r5537;\n    gte r5535 170141183460469231731687303715884105728u128 into r5538;\n    add.w r5535 r5535 into r5539;\n    gte r5539 r1539 into r5540;\n    or r5538 r5540 into r5541;\n    sub.w r5539 r1539 into r5542;\n    ternary r5541 r5542 r5539 into r5543;\n    add r5537 562949953421312u128 into r5544;\n    ternary r5541 r5544 r5537 into r5545;\n    gte r5543 170141183460469231731687303715884105728u128 into r5546;\n    add.w r5543 r5543 into r5547;\n    gte r5547 r1539 into r5548;\n    or r5546 r5548 into r5549;\n    sub.w r5547 r1539 into r5550;\n    ternary r5549 r5550 r5547 into r5551;\n    add r5545 281474976710656u128 into r5552;\n    ternary r5549 r5552 r5545 into r5553;\n    gte r5551 170141183460469231731687303715884105728u128 into r5554;\n    add.w r5551 r5551 into r5555;\n    gte r5555 r1539 into r5556;\n    or r5554 r5556 into r5557;\n    sub.w r5555 r1539 into r5558;\n    ternary r5557 r5558 r5555 into r5559;\n    add r5553 140737488355328u128 into r5560;\n    ternary r5557 r5560 r5553 into r5561;\n    gte r5559 170141183460469231731687303715884105728u128 into r5562;\n    add.w r5559 r5559 into r5563;\n    gte r5563 r1539 into r5564;\n    or r5562 r5564 into r5565;\n    sub.w r5563 r1539 into r5566;\n    ternary r5565 r5566 r5563 into r5567;\n    add r5561 70368744177664u128 into r5568;\n    ternary r5565 r5568 r5561 into r5569;\n    gte r5567 170141183460469231731687303715884105728u128 into r5570;\n    add.w r5567 r5567 into r5571;\n    gte r5571 r1539 into r5572;\n    or r5570 r5572 into r5573;\n    sub.w r5571 r1539 into r5574;\n    ternary r5573 r5574 r5571 into r5575;\n    add r5569 35184372088832u128 into r5576;\n    ternary r5573 r5576 r5569 into r5577;\n    gte r5575 170141183460469231731687303715884105728u128 into r5578;\n    add.w r5575 r5575 into r5579;\n    gte r5579 r1539 into r5580;\n    or r5578 r5580 into r5581;\n    sub.w r5579 r1539 into r5582;\n    ternary r5581 r5582 r5579 into r5583;\n    add r5577 17592186044416u128 into r5584;\n    ternary r5581 r5584 r5577 into r5585;\n    gte r5583 170141183460469231731687303715884105728u128 into r5586;\n    add.w r5583 r5583 into r5587;\n    gte r5587 r1539 into r5588;\n    or r5586 r5588 into r5589;\n    sub.w r5587 r1539 into r5590;\n    ternary r5589 r5590 r5587 into r5591;\n    add r5585 8796093022208u128 into r5592;\n    ternary r5589 r5592 r5585 into r5593;\n    gte r5591 170141183460469231731687303715884105728u128 into r5594;\n    add.w r5591 r5591 into r5595;\n    gte r5595 r1539 into r5596;\n    or r5594 r5596 into r5597;\n    sub.w r5595 r1539 into r5598;\n    ternary r5597 r5598 r5595 into r5599;\n    add r5593 4398046511104u128 into r5600;\n    ternary r5597 r5600 r5593 into r5601;\n    gte r5599 170141183460469231731687303715884105728u128 into r5602;\n    add.w r5599 r5599 into r5603;\n    gte r5603 r1539 into r5604;\n    or r5602 r5604 into r5605;\n    sub.w r5603 r1539 into r5606;\n    ternary r5605 r5606 r5603 into r5607;\n    add r5601 2199023255552u128 into r5608;\n    ternary r5605 r5608 r5601 into r5609;\n    gte r5607 170141183460469231731687303715884105728u128 into r5610;\n    add.w r5607 r5607 into r5611;\n    gte r5611 r1539 into r5612;\n    or r5610 r5612 into r5613;\n    sub.w r5611 r1539 into r5614;\n    ternary r5613 r5614 r5611 into r5615;\n    add r5609 1099511627776u128 into r5616;\n    ternary r5613 r5616 r5609 into r5617;\n    gte r5615 170141183460469231731687303715884105728u128 into r5618;\n    add.w r5615 r5615 into r5619;\n    gte r5619 r1539 into r5620;\n    or r5618 r5620 into r5621;\n    sub.w r5619 r1539 into r5622;\n    ternary r5621 r5622 r5619 into r5623;\n    add r5617 549755813888u128 into r5624;\n    ternary r5621 r5624 r5617 into r5625;\n    gte r5623 170141183460469231731687303715884105728u128 into r5626;\n    add.w r5623 r5623 into r5627;\n    gte r5627 r1539 into r5628;\n    or r5626 r5628 into r5629;\n    sub.w r5627 r1539 into r5630;\n    ternary r5629 r5630 r5627 into r5631;\n    add r5625 274877906944u128 into r5632;\n    ternary r5629 r5632 r5625 into r5633;\n    gte r5631 170141183460469231731687303715884105728u128 into r5634;\n    add.w r5631 r5631 into r5635;\n    gte r5635 r1539 into r5636;\n    or r5634 r5636 into r5637;\n    sub.w r5635 r1539 into r5638;\n    ternary r5637 r5638 r5635 into r5639;\n    add r5633 137438953472u128 into r5640;\n    ternary r5637 r5640 r5633 into r5641;\n    gte r5639 170141183460469231731687303715884105728u128 into r5642;\n    add.w r5639 r5639 into r5643;\n    gte r5643 r1539 into r5644;\n    or r5642 r5644 into r5645;\n    sub.w r5643 r1539 into r5646;\n    ternary r5645 r5646 r5643 into r5647;\n    add r5641 68719476736u128 into r5648;\n    ternary r5645 r5648 r5641 into r5649;\n    gte r5647 170141183460469231731687303715884105728u128 into r5650;\n    add.w r5647 r5647 into r5651;\n    gte r5651 r1539 into r5652;\n    or r5650 r5652 into r5653;\n    sub.w r5651 r1539 into r5654;\n    ternary r5653 r5654 r5651 into r5655;\n    add r5649 34359738368u128 into r5656;\n    ternary r5653 r5656 r5649 into r5657;\n    gte r5655 170141183460469231731687303715884105728u128 into r5658;\n    add.w r5655 r5655 into r5659;\n    gte r5659 r1539 into r5660;\n    or r5658 r5660 into r5661;\n    sub.w r5659 r1539 into r5662;\n    ternary r5661 r5662 r5659 into r5663;\n    add r5657 17179869184u128 into r5664;\n    ternary r5661 r5664 r5657 into r5665;\n    gte r5663 170141183460469231731687303715884105728u128 into r5666;\n    add.w r5663 r5663 into r5667;\n    gte r5667 r1539 into r5668;\n    or r5666 r5668 into r5669;\n    sub.w r5667 r1539 into r5670;\n    ternary r5669 r5670 r5667 into r5671;\n    add r5665 8589934592u128 into r5672;\n    ternary r5669 r5672 r5665 into r5673;\n    gte r5671 170141183460469231731687303715884105728u128 into r5674;\n    add.w r5671 r5671 into r5675;\n    gte r5675 r1539 into r5676;\n    or r5674 r5676 into r5677;\n    sub.w r5675 r1539 into r5678;\n    ternary r5677 r5678 r5675 into r5679;\n    add r5673 4294967296u128 into r5680;\n    ternary r5677 r5680 r5673 into r5681;\n    gte r5679 170141183460469231731687303715884105728u128 into r5682;\n    add.w r5679 r5679 into r5683;\n    gte r5683 r1539 into r5684;\n    or r5682 r5684 into r5685;\n    sub.w r5683 r1539 into r5686;\n    ternary r5685 r5686 r5683 into r5687;\n    add r5681 2147483648u128 into r5688;\n    ternary r5685 r5688 r5681 into r5689;\n    gte r5687 170141183460469231731687303715884105728u128 into r5690;\n    add.w r5687 r5687 into r5691;\n    gte r5691 r1539 into r5692;\n    or r5690 r5692 into r5693;\n    sub.w r5691 r1539 into r5694;\n    ternary r5693 r5694 r5691 into r5695;\n    add r5689 1073741824u128 into r5696;\n    ternary r5693 r5696 r5689 into r5697;\n    gte r5695 170141183460469231731687303715884105728u128 into r5698;\n    add.w r5695 r5695 into r5699;\n    gte r5699 r1539 into r5700;\n    or r5698 r5700 into r5701;\n    sub.w r5699 r1539 into r5702;\n    ternary r5701 r5702 r5699 into r5703;\n    add r5697 536870912u128 into r5704;\n    ternary r5701 r5704 r5697 into r5705;\n    gte r5703 170141183460469231731687303715884105728u128 into r5706;\n    add.w r5703 r5703 into r5707;\n    gte r5707 r1539 into r5708;\n    or r5706 r5708 into r5709;\n    sub.w r5707 r1539 into r5710;\n    ternary r5709 r5710 r5707 into r5711;\n    add r5705 268435456u128 into r5712;\n    ternary r5709 r5712 r5705 into r5713;\n    gte r5711 170141183460469231731687303715884105728u128 into r5714;\n    add.w r5711 r5711 into r5715;\n    gte r5715 r1539 into r5716;\n    or r5714 r5716 into r5717;\n    sub.w r5715 r1539 into r5718;\n    ternary r5717 r5718 r5715 into r5719;\n    add r5713 134217728u128 into r5720;\n    ternary r5717 r5720 r5713 into r5721;\n    gte r5719 170141183460469231731687303715884105728u128 into r5722;\n    add.w r5719 r5719 into r5723;\n    gte r5723 r1539 into r5724;\n    or r5722 r5724 into r5725;\n    sub.w r5723 r1539 into r5726;\n    ternary r5725 r5726 r5723 into r5727;\n    add r5721 67108864u128 into r5728;\n    ternary r5725 r5728 r5721 into r5729;\n    gte r5727 170141183460469231731687303715884105728u128 into r5730;\n    add.w r5727 r5727 into r5731;\n    gte r5731 r1539 into r5732;\n    or r5730 r5732 into r5733;\n    sub.w r5731 r1539 into r5734;\n    ternary r5733 r5734 r5731 into r5735;\n    add r5729 33554432u128 into r5736;\n    ternary r5733 r5736 r5729 into r5737;\n    gte r5735 170141183460469231731687303715884105728u128 into r5738;\n    add.w r5735 r5735 into r5739;\n    gte r5739 r1539 into r5740;\n    or r5738 r5740 into r5741;\n    sub.w r5739 r1539 into r5742;\n    ternary r5741 r5742 r5739 into r5743;\n    add r5737 16777216u128 into r5744;\n    ternary r5741 r5744 r5737 into r5745;\n    gte r5743 170141183460469231731687303715884105728u128 into r5746;\n    add.w r5743 r5743 into r5747;\n    gte r5747 r1539 into r5748;\n    or r5746 r5748 into r5749;\n    sub.w r5747 r1539 into r5750;\n    ternary r5749 r5750 r5747 into r5751;\n    add r5745 8388608u128 into r5752;\n    ternary r5749 r5752 r5745 into r5753;\n    gte r5751 170141183460469231731687303715884105728u128 into r5754;\n    add.w r5751 r5751 into r5755;\n    gte r5755 r1539 into r5756;\n    or r5754 r5756 into r5757;\n    sub.w r5755 r1539 into r5758;\n    ternary r5757 r5758 r5755 into r5759;\n    add r5753 4194304u128 into r5760;\n    ternary r5757 r5760 r5753 into r5761;\n    gte r5759 170141183460469231731687303715884105728u128 into r5762;\n    add.w r5759 r5759 into r5763;\n    gte r5763 r1539 into r5764;\n    or r5762 r5764 into r5765;\n    sub.w r5763 r1539 into r5766;\n    ternary r5765 r5766 r5763 into r5767;\n    add r5761 2097152u128 into r5768;\n    ternary r5765 r5768 r5761 into r5769;\n    gte r5767 170141183460469231731687303715884105728u128 into r5770;\n    add.w r5767 r5767 into r5771;\n    gte r5771 r1539 into r5772;\n    or r5770 r5772 into r5773;\n    sub.w r5771 r1539 into r5774;\n    ternary r5773 r5774 r5771 into r5775;\n    add r5769 1048576u128 into r5776;\n    ternary r5773 r5776 r5769 into r5777;\n    gte r5775 170141183460469231731687303715884105728u128 into r5778;\n    add.w r5775 r5775 into r5779;\n    gte r5779 r1539 into r5780;\n    or r5778 r5780 into r5781;\n    sub.w r5779 r1539 into r5782;\n    ternary r5781 r5782 r5779 into r5783;\n    add r5777 524288u128 into r5784;\n    ternary r5781 r5784 r5777 into r5785;\n    gte r5783 170141183460469231731687303715884105728u128 into r5786;\n    add.w r5783 r5783 into r5787;\n    gte r5787 r1539 into r5788;\n    or r5786 r5788 into r5789;\n    sub.w r5787 r1539 into r5790;\n    ternary r5789 r5790 r5787 into r5791;\n    add r5785 262144u128 into r5792;\n    ternary r5789 r5792 r5785 into r5793;\n    gte r5791 170141183460469231731687303715884105728u128 into r5794;\n    add.w r5791 r5791 into r5795;\n    gte r5795 r1539 into r5796;\n    or r5794 r5796 into r5797;\n    sub.w r5795 r1539 into r5798;\n    ternary r5797 r5798 r5795 into r5799;\n    add r5793 131072u128 into r5800;\n    ternary r5797 r5800 r5793 into r5801;\n    gte r5799 170141183460469231731687303715884105728u128 into r5802;\n    add.w r5799 r5799 into r5803;\n    gte r5803 r1539 into r5804;\n    or r5802 r5804 into r5805;\n    sub.w r5803 r1539 into r5806;\n    ternary r5805 r5806 r5803 into r5807;\n    add r5801 65536u128 into r5808;\n    ternary r5805 r5808 r5801 into r5809;\n    gte r5807 170141183460469231731687303715884105728u128 into r5810;\n    add.w r5807 r5807 into r5811;\n    gte r5811 r1539 into r5812;\n    or r5810 r5812 into r5813;\n    sub.w r5811 r1539 into r5814;\n    ternary r5813 r5814 r5811 into r5815;\n    add r5809 32768u128 into r5816;\n    ternary r5813 r5816 r5809 into r5817;\n    gte r5815 170141183460469231731687303715884105728u128 into r5818;\n    add.w r5815 r5815 into r5819;\n    gte r5819 r1539 into r5820;\n    or r5818 r5820 into r5821;\n    sub.w r5819 r1539 into r5822;\n    ternary r5821 r5822 r5819 into r5823;\n    add r5817 16384u128 into r5824;\n    ternary r5821 r5824 r5817 into r5825;\n    gte r5823 170141183460469231731687303715884105728u128 into r5826;\n    add.w r5823 r5823 into r5827;\n    gte r5827 r1539 into r5828;\n    or r5826 r5828 into r5829;\n    sub.w r5827 r1539 into r5830;\n    ternary r5829 r5830 r5827 into r5831;\n    add r5825 8192u128 into r5832;\n    ternary r5829 r5832 r5825 into r5833;\n    gte r5831 170141183460469231731687303715884105728u128 into r5834;\n    add.w r5831 r5831 into r5835;\n    gte r5835 r1539 into r5836;\n    or r5834 r5836 into r5837;\n    sub.w r5835 r1539 into r5838;\n    ternary r5837 r5838 r5835 into r5839;\n    add r5833 4096u128 into r5840;\n    ternary r5837 r5840 r5833 into r5841;\n    gte r5839 170141183460469231731687303715884105728u128 into r5842;\n    add.w r5839 r5839 into r5843;\n    gte r5843 r1539 into r5844;\n    or r5842 r5844 into r5845;\n    sub.w r5843 r1539 into r5846;\n    ternary r5845 r5846 r5843 into r5847;\n    add r5841 2048u128 into r5848;\n    ternary r5845 r5848 r5841 into r5849;\n    gte r5847 170141183460469231731687303715884105728u128 into r5850;\n    add.w r5847 r5847 into r5851;\n    gte r5851 r1539 into r5852;\n    or r5850 r5852 into r5853;\n    sub.w r5851 r1539 into r5854;\n    ternary r5853 r5854 r5851 into r5855;\n    add r5849 1024u128 into r5856;\n    ternary r5853 r5856 r5849 into r5857;\n    gte r5855 170141183460469231731687303715884105728u128 into r5858;\n    add.w r5855 r5855 into r5859;\n    gte r5859 r1539 into r5860;\n    or r5858 r5860 into r5861;\n    sub.w r5859 r1539 into r5862;\n    ternary r5861 r5862 r5859 into r5863;\n    add r5857 512u128 into r5864;\n    ternary r5861 r5864 r5857 into r5865;\n    gte r5863 170141183460469231731687303715884105728u128 into r5866;\n    add.w r5863 r5863 into r5867;\n    gte r5867 r1539 into r5868;\n    or r5866 r5868 into r5869;\n    sub.w r5867 r1539 into r5870;\n    ternary r5869 r5870 r5867 into r5871;\n    add r5865 256u128 into r5872;\n    ternary r5869 r5872 r5865 into r5873;\n    gte r5871 170141183460469231731687303715884105728u128 into r5874;\n    add.w r5871 r5871 into r5875;\n    gte r5875 r1539 into r5876;\n    or r5874 r5876 into r5877;\n    sub.w r5875 r1539 into r5878;\n    ternary r5877 r5878 r5875 into r5879;\n    add r5873 128u128 into r5880;\n    ternary r5877 r5880 r5873 into r5881;\n    gte r5879 170141183460469231731687303715884105728u128 into r5882;\n    add.w r5879 r5879 into r5883;\n    gte r5883 r1539 into r5884;\n    or r5882 r5884 into r5885;\n    sub.w r5883 r1539 into r5886;\n    ternary r5885 r5886 r5883 into r5887;\n    add r5881 64u128 into r5888;\n    ternary r5885 r5888 r5881 into r5889;\n    gte r5887 170141183460469231731687303715884105728u128 into r5890;\n    add.w r5887 r5887 into r5891;\n    gte r5891 r1539 into r5892;\n    or r5890 r5892 into r5893;\n    sub.w r5891 r1539 into r5894;\n    ternary r5893 r5894 r5891 into r5895;\n    add r5889 32u128 into r5896;\n    ternary r5893 r5896 r5889 into r5897;\n    gte r5895 170141183460469231731687303715884105728u128 into r5898;\n    add.w r5895 r5895 into r5899;\n    gte r5899 r1539 into r5900;\n    or r5898 r5900 into r5901;\n    sub.w r5899 r1539 into r5902;\n    ternary r5901 r5902 r5899 into r5903;\n    add r5897 16u128 into r5904;\n    ternary r5901 r5904 r5897 into r5905;\n    gte r5903 170141183460469231731687303715884105728u128 into r5906;\n    add.w r5903 r5903 into r5907;\n    gte r5907 r1539 into r5908;\n    or r5906 r5908 into r5909;\n    sub.w r5907 r1539 into r5910;\n    ternary r5909 r5910 r5907 into r5911;\n    add r5905 8u128 into r5912;\n    ternary r5909 r5912 r5905 into r5913;\n    gte r5911 170141183460469231731687303715884105728u128 into r5914;\n    add.w r5911 r5911 into r5915;\n    gte r5915 r1539 into r5916;\n    or r5914 r5916 into r5917;\n    sub.w r5915 r1539 into r5918;\n    ternary r5917 r5918 r5915 into r5919;\n    add r5913 4u128 into r5920;\n    ternary r5917 r5920 r5913 into r5921;\n    gte r5919 170141183460469231731687303715884105728u128 into r5922;\n    add.w r5919 r5919 into r5923;\n    gte r5923 r1539 into r5924;\n    or r5922 r5924 into r5925;\n    sub.w r5923 r1539 into r5926;\n    ternary r5925 r5926 r5923 into r5927;\n    add r5921 2u128 into r5928;\n    ternary r5925 r5928 r5921 into r5929;\n    gte r5927 170141183460469231731687303715884105728u128 into r5930;\n    add.w r5927 r5927 into r5931;\n    gte r5931 r1539 into r5932;\n    or r5930 r5932 into r5933;\n    add r5929 1u128 into r5934;\n    ternary r5933 r5934 r5929 into r5935;\n    ternary r1538 r4912 0u128 into r5936;\n    ternary r1538 r5935 0u128 into r5937;\n    cast r5936 r5937 into r5938 as U256__8JquwLopp8;\n    add.w r4.lo r5938.lo into r5939;\n    lt r5939 r4.lo into r5940;\n    ternary r5940 1u128 0u128 into r5941;\n    add.w r4.hi r5938.hi into r5942;\n    add.w r5942 r5941 into r5943;\n    cast r5943 r5939 into r5944 as U256__8JquwLopp8;\n    add r3 r4677 into r5945;\n    ternary r4673 r5944.hi r4.hi into r5946;\n    ternary r4673 r5944.lo r4.lo into r5947;\n    cast r5946 r5947 into r5948 as U256__8JquwLopp8;\n    add r5 r4910 into r5949;\n    gt r4676.hi 0u128 into r5950;\n    ternary r5950 r4676.hi r4676.lo into r5951;\n    ternary r5950 128u32 0u32 into r5952;\n    gte r5951 18446744073709551616u128 into r5953;\n    shr r5951 64u8 into r5954;\n    ternary r5953 r5954 r5951 into r5955;\n    ternary r5953 64u32 0u32 into r5956;\n    gte r5955 4294967296u128 into r5957;\n    shr r5955 32u8 into r5958;\n    add r5956 32u32 into r5959;\n    ternary r5957 r5958 r5955 into r5960;\n    ternary r5957 r5959 r5956 into r5961;\n    gte r5960 65536u128 into r5962;\n    shr r5960 16u8 into r5963;\n    add r5961 16u32 into r5964;\n    ternary r5962 r5963 r5960 into r5965;\n    ternary r5962 r5964 r5961 into r5966;\n    gte r5965 256u128 into r5967;\n    shr r5965 8u8 into r5968;\n    add r5966 8u32 into r5969;\n    ternary r5967 r5968 r5965 into r5970;\n    ternary r5967 r5969 r5966 into r5971;\n    gte r5970 16u128 into r5972;\n    shr r5970 4u8 into r5973;\n    add r5971 4u32 into r5974;\n    ternary r5972 r5973 r5970 into r5975;\n    ternary r5972 r5974 r5971 into r5976;\n    gte r5975 4u128 into r5977;\n    shr r5975 2u8 into r5978;\n    add r5976 2u32 into r5979;\n    ternary r5977 r5978 r5975 into r5980;\n    ternary r5977 r5979 r5976 into r5981;\n    gte r5980 2u128 into r5982;\n    add r5981 1u32 into r5983;\n    ternary r5982 r5983 r5981 into r5984;\n    add r5952 r5984 into r5985;\n    gte r5985 127u32 into r5986;\n    ternary r5986 r5985 127u32 into r5987;\n    ternary r5986 127u32 r5985 into r5988;\n    sub r5987 r5988 into r5989;\n    cast r5989 into r5990 as u16;\n    and r5990 127u16 into r5991;\n    cast r5991 into r5992 as u8;\n    is.eq r5992 0u8 into r5993;\n    sub 128u8 r5992 into r5994;\n    shl.w r4676.hi r5994 into r5995;\n    ternary r5993 0u128 r5995 into r5996;\n    shr r4676.lo r5992 into r5997;\n    or r5997 r5996 into r5998;\n    shr r4676.hi r5992 into r5999;\n    shr r4676.hi r5992 into r6000;\n    gte r5990 128u16 into r6001;\n    ternary r6001 0u128 r5999 into r6002;\n    ternary r6001 r6000 r5998 into r6003;\n    cast r6002 r6003 into r6004 as U256__8JquwLopp8;\n    cast r5991 into r6005 as u8;\n    is.eq r6005 0u8 into r6006;\n    sub 128u8 r6005 into r6007;\n    shr.w r4676.lo r6007 into r6008;\n    ternary r6006 0u128 r6008 into r6009;\n    shl.w r4676.hi r6005 into r6010;\n    or r6010 r6009 into r6011;\n    shl.w r4676.lo r6005 into r6012;\n    shl.w r4676.lo r6005 into r6013;\n    ternary r6001 r6013 r6011 into r6014;\n    ternary r6001 0u128 r6012 into r6015;\n    cast r6014 r6015 into r6016 as U256__8JquwLopp8;\n    ternary r5986 r6004.hi r6016.hi into r6017;\n    ternary r5986 r6004.lo r6016.lo into r6018;\n    cast r6017 r6018 into r6019 as U256__8JquwLopp8;\n    shr r6019.lo 64u8 into r6020;\n    mul r6020 r6020 into r6021;\n    shr r6021 63u8 into r6022;\n    shr r6022 64u8 into r6023;\n    shl r6023 63u8 into r6024;\n    cast r6023 into r6025 as u8;\n    shr r6022 r6025 into r6026;\n    mul r6026 r6026 into r6027;\n    shr r6027 63u8 into r6028;\n    shr r6028 64u8 into r6029;\n    shl r6029 62u8 into r6030;\n    or r6024 r6030 into r6031;\n    cast r6029 into r6032 as u8;\n    shr r6028 r6032 into r6033;\n    mul r6033 r6033 into r6034;\n    shr r6034 63u8 into r6035;\n    shr r6035 64u8 into r6036;\n    shl r6036 61u8 into r6037;\n    or r6031 r6037 into r6038;\n    cast r6036 into r6039 as u8;\n    shr r6035 r6039 into r6040;\n    mul r6040 r6040 into r6041;\n    shr r6041 63u8 into r6042;\n    shr r6042 64u8 into r6043;\n    shl r6043 60u8 into r6044;\n    or r6038 r6044 into r6045;\n    cast r6043 into r6046 as u8;\n    shr r6042 r6046 into r6047;\n    mul r6047 r6047 into r6048;\n    shr r6048 63u8 into r6049;\n    shr r6049 64u8 into r6050;\n    shl r6050 59u8 into r6051;\n    or r6045 r6051 into r6052;\n    cast r6050 into r6053 as u8;\n    shr r6049 r6053 into r6054;\n    mul r6054 r6054 into r6055;\n    shr r6055 63u8 into r6056;\n    shr r6056 64u8 into r6057;\n    shl r6057 58u8 into r6058;\n    or r6052 r6058 into r6059;\n    cast r6057 into r6060 as u8;\n    shr r6056 r6060 into r6061;\n    mul r6061 r6061 into r6062;\n    shr r6062 63u8 into r6063;\n    shr r6063 64u8 into r6064;\n    shl r6064 57u8 into r6065;\n    or r6059 r6065 into r6066;\n    cast r6064 into r6067 as u8;\n    shr r6063 r6067 into r6068;\n    mul r6068 r6068 into r6069;\n    shr r6069 63u8 into r6070;\n    shr r6070 64u8 into r6071;\n    shl r6071 56u8 into r6072;\n    or r6066 r6072 into r6073;\n    cast r6071 into r6074 as u8;\n    shr r6070 r6074 into r6075;\n    mul r6075 r6075 into r6076;\n    shr r6076 63u8 into r6077;\n    shr r6077 64u8 into r6078;\n    shl r6078 55u8 into r6079;\n    or r6073 r6079 into r6080;\n    cast r6078 into r6081 as u8;\n    shr r6077 r6081 into r6082;\n    mul r6082 r6082 into r6083;\n    shr r6083 63u8 into r6084;\n    shr r6084 64u8 into r6085;\n    shl r6085 54u8 into r6086;\n    or r6080 r6086 into r6087;\n    cast r6085 into r6088 as u8;\n    shr r6084 r6088 into r6089;\n    mul r6089 r6089 into r6090;\n    shr r6090 63u8 into r6091;\n    shr r6091 64u8 into r6092;\n    shl r6092 53u8 into r6093;\n    or r6087 r6093 into r6094;\n    cast r6092 into r6095 as u8;\n    shr r6091 r6095 into r6096;\n    mul r6096 r6096 into r6097;\n    shr r6097 63u8 into r6098;\n    shr r6098 64u8 into r6099;\n    shl r6099 52u8 into r6100;\n    or r6094 r6100 into r6101;\n    cast r6099 into r6102 as u8;\n    shr r6098 r6102 into r6103;\n    mul r6103 r6103 into r6104;\n    shr r6104 63u8 into r6105;\n    shr r6105 64u8 into r6106;\n    shl r6106 51u8 into r6107;\n    or r6101 r6107 into r6108;\n    cast r6106 into r6109 as u8;\n    shr r6105 r6109 into r6110;\n    mul r6110 r6110 into r6111;\n    shr r6111 63u8 into r6112;\n    shr r6112 64u8 into r6113;\n    shl r6113 50u8 into r6114;\n    or r6108 r6114 into r6115;\n    cast r5985 into r6116 as i128;\n    sub r6116 128i128 into r6117;\n    shl r6117 64u8 into r6118;\n    cast r6115 into r6119 as i128;\n    add r6118 r6119 into r6120;\n    div r6120 1330584781654114i128 into r6121;\n    cast r6121 into r6122 as i32;\n    output r4676 as U256__8JquwLopp8.public;\n    output r5945 as u128.public;\n    output r4906 as u128.public;\n    output r5948 as U256__8JquwLopp8.public;\n    output r5949 as u128.public;\n    output r6122 as i32.public;\n\nconstructor:\n    is.eq edition 0u16 into r0;\n    branch.eq r0 false to end_then_0_0;\n    contains admin[true] into r1;\n    not r1 into r2;\n    assert.eq r2 true;\n    set aleo1fxxkwxer36ml7c8zk5dmnl7mvq938mw87d9z2vsm7jcef6fk3sqscvk3wf into admin[true];\n    set false into pool_creation_is_open[true];\n    set false into global_paused[true];\n    branch.eq true true to end_otherwise_0_1;\n    position end_then_0_0;\n    position end_otherwise_0_1;\n    gt edition 0u16 into r3;\n    branch.eq r3 false to end_then_0_2;\n    cast checksum edition into r4 as ChecksumEdition;\n    hash.bhp256 r4 into r5 as field;\n    cast shield_swap.aleo r5 into r6 as shield_swap_multisig_core.aleo/WalletSigningOpId;\n    hash.bhp256 r6 into r7 as field;\n    contains shield_swap_multisig_core.aleo/completed_signing_ops[r7] into r8;\n    assert.eq r8 true;\n    branch.eq true true to end_otherwise_0_3;\n    position end_then_0_2;\n    position end_otherwise_0_3;\n","verifying_keys":[["transfer_admin",["verifier1qygqqqqqqqqqqqqw9cqqqqqqqqqqxtsqqqqqqqqqvejsqqqqqqqqqcu9qqqqqqqqqprr7qqqqqqqqqqvqqqqqqqqqqqwc5njvzuud8tu6ye5exg5yjt9gvwgx25lkflp766w4tz5n2adz8xx85egmvrr3528q7gzwgwmac5qqvkwza5vrl92ujea6eprezlkau6qexgqxmy5w2wxvxnxhykmz4e3gcahy9ctsavce596p5vm04dsz4txugadhazaw6md44tc0pphxfmzdzlc3l7aaud99pxygwdwtlgcpgns80yqz9zjwwwsqfe67zxtqp8ccd4k6hlgmqpwuq7jnn0vs9tcdkfd326m68nk0hcnf3mh9mwne0kln3g2gdv3ej2j4n8m7p4g7qgq3m8nsadclqsaff4a37gtlc9zxtcl5crt0welv5yva2jnn52em4a73h4w6u0884stpxywuhkdzzq9fd3gxad07sw7qdjc7utjvulxqgh5hslxu5n7w9tctnwhcsvl8uhc3fum565vml7k7v5wf5zfcscqwj42uw55q09lwsehdfdl9jwfu500pxcy6ye35gyeqd00lz3ukgq28nh2eu06ne6taatdtca2gu4qzuzce4q8vqgryk8z8srxpfgae90xewxunk8tasrq9w9l44297749w42nzxw6cw9lmxavnlugzwtys8pp8e6vftzdkr9m43z8lx7d62g6jawxmsa88kzll8nkhfhwevxq43kq0hhzhq2dz5kcmndsynauzqq5tp0fdplhd4wf9pefk2m2q6h9hwx7tp6w8fk84wxdm3r6u66cvtgd9q4gnc33tweh0k07fz200gq36qm65zc4hushp5cfchcpzcyrmfd5n7mgugjhna30hshuqq05xcmthyafluc72zwy3e88008qffvpvksch4zu8hnh9d0p8cs7jpm89k3vu77xewwlutujp3rdfc7d7r776wrnp57myl3tda2rxm36agrgqkwv07tqjc3ycp7ttm9jjtea7xl9f88tsalwd8cszj7p9qn6e0urkaqqqqqqqqqqq9dgn93","certificate1qyqsqqqqqqqqqqznypfquetstvqh5a48uz920jswe4c6n9jgc93k8n64tr2lu8uyuy50erp3vh56fs3ywc8pru0qzzqqqlypdes"]],["accept_admin",["verifier1qygqqqqqqqqqqqq69gqqqqqqqqqqu2sqqqqqqqqqkatsqqqqqqqqpdnsqqqqqqqqqz4n5qqqqqqqqqqvqqqqqqqqqqqrx4dfp7ne2e3395ktyjay37c5f3peutk72cdqkz4uxuje2d4mmthu6p4gn060deygvjfgd2l5qtgqyly6d27ww4qefm995lc4k7xwequ4nsvm5tlhc7gv06jw0qgk2h2gqngrj28xk9ucv7trwz2ahqpqp7upteehah0sxe34peex62y89r3z9wjjgjxqtwa5rhn58ju86mkm0c5c9wrh7dfrvchj8dvqkmt5sr4pecu4j3ysmc9q95kuqsn907vfaee7d63u4jj0j085kmms2huq496z9e8fjp0vjt5ycqhrjfezvqterefakkydqlr7mq7c0dyrz47v4l9wruhzt6eg2yvcnra2qzce9p0zzfs0vg3j2r7g93us6uspj6qfp2a27wm9g472zhlhuhx3tnq86gy2f9cpml5fkrzeztvr7u3sz62qu06xnd29d7xew4junlg2ptgpfpefrtanvhu80glmd7vcgv9526xsf4quy875auagu0y2g3ahtnjrwlzesu2a8rv6alr6wqe8c6fczk44ugnue6596lud082e2370xz9xx00jc8gxgwswxglltdvduexwsfqp30lxn486spmzn5jgtlsasp9t9494p4nrnxsgz88tlz408e8s5qjd3wq0ekf8wh47tfysyqv53usmd6j6psqahm07cq977rwl7q8x0mlk47c2fl3k25aev4j8tgu2s0d9dc0wdmyn5xvz2ppyvkh3wna69cz8w2elktld5gjaq53lpzqya95pxr8g5f9qljuk4fv7255gpt8rdfeamh2x3khy497ax9pdgcxjj443vfznu625qyp4e9vav8qqqzg8czh3pqhg7ga3tqgv9l085yrwj6vap64lvle5yw5pcf4f28unnr28tqgvyhnxf0nqlp34wc0cqktuwg294jgmyzcl50g0h9sh9uq2gr5sh9cttayu58ptysqaplv28q7qqqqqqqqqq4q3mtn","certificate1qyqsqqqqqqqqqqxd6q9ufj5uyw354mpt9zmrfeja9ktfmz2pyrg6cystnk3c3gma8t8srgqaz4jd2ange0878tq30uqqq8yrtfs"]],["add_tick_spacing",["verifier1qygqqqqqqqqqqqqa9sqqqqqqqqqpztqqqqqqqqqqy4sqqqqqqqqqqttlqqqqqqqqqzxncqqqqqqqqqqvqqqqqqqqqqqp0dcaumnahtwqss340quddqj3hgkl8fhfq8d7gs9m5m8gh3z33ghf59u3zj803czsudjpuc60x6gpvn7qwjzmwsmz5gvqhl6mg6l5eyca5pt4ej5x2cpy3r4f8u029edug0nyn00yu8j3z9trthmxpfvczlp4h5r48qyjfxcvjzqqqmt6yfcv5e099zausf4hn44ra48m2mjpr9jltysenq57l4r3073p7hzcsqkahv50rr78jz6m2zz7d8lg8qmr9lc68578svlhmnn3fvz7u5qk889anlx3wrgps9nnrsmv8g6kcqg9zaszry34wgu4jndw4xqdj6kw2xj2sj7pfuy64k5z9x730402v8da02ddkhertkg0mrv2wx0zwwq2fc5sk5na6kdja0hh4pa3fgalft6uyx8wjp44w5kc7z94p3hnwpqx850x55duk2j5qf730hx4qdvq5tzmsmuu5cu9nmr2cjg6gktzvadc5e7auswdm6pqnft4lnjykvpmjlr7aw6zfn2n0ylzugzpgjmcpvn34yneyuat8phsjfc9uger7reyc20yfpl6ytzsx8c7w9j282dpmykm40rumnzxfymev9yd2q0zqphczym8hz2whyn870cgu97q98qyuyzutrxdump3sqvvput2myg5mtg02kf70pfsdv02cq5ql680jqzr46s2rk9mc8fzgn29gvnwpygq3pfrms5w84j548metejv0tufc67gufkuer2xcxw0hwvneqjt52qu8cn82es90lx7vugjkf0gtu4lwek0mf4nxw8fxvwrjayjg8d6ejfalvk9eszfp64dmjsankrqf9qqc2hlsvzcq24hmps3y9wl5eupynlnu2ve96342wtrf54ssd7r6yxz639tywsp8c4sglcsx4605e4grpvksc4vkxeldrh2arsyvjek77dse9rl53a7yfd05qy5gxq3sf9jrclsqqqqqqqqqlxzujm","certificate1qyqsqqqqqqqqqqqe7zvr5auuugl53fxnhw7scevwst9gepemvq7vrvjptr2x3s29rzypce5u54vw3ltvkxu8gzgtvkqsqmv8mhe"]],["add_fee_tier",["verifier1qygqqqqqqqqqqqqd9sqqqqqqqqqqztqqqqqqqqqqu40sqqqqqqqqpht7qqqqqqqqqzxncqqqqqqqqqqvqqqqqqqqqqqx4nhxmttakyv7mmdy95nau3dhhxqc34sxkuczyp0u9zeu9spayy8etw7w5dnxmgt46myl7090ydsq58xy8n3vut5rpv6uw9qlllvcwv9feuryqamjk5rlecad6erw3lnghrmy2vp3v6k5h8tw0yu70cxqq0m9rzl6qw02994nu57k2dnw6eu2vpucru5mgjangh8qmqwyw7thl03j4c6jxeupyffrrrrjm77aqz5ccxkzd5p0kzrhgnkgyqvrfaztsr7mka8v9lufte9mljfjf43kmdtquq9eaduxjmuzgy6twv3trqz65g6an8xmysffrx6wywrf8r3t4s29eymfp6mw4xckf4kaupuvd9uxne2u35w9gfs09kx6s25yqcq0ny9zlhqse8uj3e2nckn9fdeq73jxzwrptgzwjgude2n7xn683vpqa5ltwa0ux30ey86a6jpjkccp0m6wu4rc85t35gpj3puwvqxh40k5rdql9cxzpxjzgwmc527e8d62j9cw73vftdpjvh8ycpyvlu5srkc2gcp5duue9dqrycywm0m9dnmw3jh5u22l9sywzdpfpy437h77pg62f4g7x5qr7ph9mdsnm4f0qznpzs9ljwdv8l9xh7fsff4fhtly9me8pmkql9fck7t69p46ljsdeygc2tzefvgykphp29tejqpluq9pj2td2s0df9crk0zpg8wumzzza3ez9x8tvs0874pmv503g57sv0vl6zuwre7jknxe79djx9wmx5qwaw4ln2clm37mrutlxpt2schj4k5wyc9aezn94rxh6tsvqnjzdqkw5u7m4xgsxq8xl88ljh73j0vqwwzk8nd95746vys7hxakv9nemgqqdy6j8w5l0fl50fej36dza8ta8h6dxqfs7yzg6c3apswjf5psz8arnsl66wd9vxn4xktzgx00zwt8kkmjtml30aglcqnm693qht8j2clqqqqqqqqqqrs393m","certificate1qyqsqqqqqqqqqqrcpt48epn3yp9sn8tdkeune3vl386pkl68rtgsqy98g0yfkqe3ppclxuwqm8yv5dnthlh0yl5ph6qqq3r57w8"]],["bind_fee_to_tick_spacing",["verifier1qyg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 program_id: credits.aleo,\n  function_name: fee_public,\n  arguments: [\n    aleo12mhws2nvns7n0vrey5fmmq5mntmdy483lhpm20gvy2fks5vxrqgsh5g7pa,\n    1406779905u64\n  ]\n}"}],"tpk":"5146690599576167843877602047333825381500045389691511856079926282146914744946group","tcm":"4233519926385601284984626605011906269608669646823603707301233690553448980706field","scm":"3554409763216093075426087679628717752447756436323374476986830178819318445294field"},"global_state_root":"sr1gwc7g7nlxp8tjylgqcsd7g706def5s3ttl6w679haz5sg56wcuqq52g0s2","proof":"proof1qyqsqqqqqqqqqqqpqqqqqqqqqqqtlyv48gexkp3xmwpuzvteg5s024ya5y2unh65gy9p3vfjk24ezmpl6ux3p0zg7yt74lqmkgmpqrgpqytkjewavj0c0k5mmmxpyyemvm9adw8l2wjqlmv6867xagl0p5xxnu6hh3u352lgdpaez7tys2hatq86lquxlpsg479q8wzscwk8jcve2g6ern6z8wnk5e40t2zd8lfmhc5up0rt5skv2zz6qd3wkcfuvkqgp73a60kq0acyt6m8797mq2xfq0j6vk5h93l69mmdr4uy40hl9uwa3p84d5qeh2dqcepv2pz9tgspc20dn77tzpjpvtwzvr59d926dazeyh7mt2w2rc8f6x64d5x0zm3gdaamv0rdz54x492kcv7fdq9gqnsz6ypeqc3sa75mpex94f5l48awpvpe4yyl6n448zykvs2922nc4xpve4exl449rfzvsekh98ptqq6vqyulnun9myvaqj842tlu0pytgqtkwm0ypan8jrgymj405x3nkjz6r67hxuqwrc3znt4m8g9c9qr9yqw4wrpvnhrpjepmxtavxvrgte3sy406fkj8lk9m7zjv8asywnpus9xx8dm6u8p8xknx6ccenuqydeqtkcjd035de0jvc4st75jysh44p6u4tv4q8djxylryf7ef00gvu8kl7h5hptysty907dv62cupd4w0jpmqkchzuqca20mswl3ads77nc2rly47cezu3d5cjw44zv95x9ds5g4fs436acugxk2ffnvla3v9vexpha2a59c4jwqdd4gcvyrzes46m3rpyz3eqknt3hwu6j7gwzqqsz9scqkaydlg3j97k49cq4z7q4w247xv6u3t63qv2rkqksyjeyh57msn43n6smn5taz5pyps65kxpw3uk7g9p049pyat7mmfnxp22822cccu0m2kne38gk3tlsqsj30knck60c96wwm0ghx537uv4pjdwr8uwgnpxuqcktapegxrey8ccx24msqfd92whqthnl0j7j4z6ygkv5xqpe5j9tdc4ms0t5w47ps9zdyt2d6470z2fuy2und8e7p8u5eq4e5ecqmsjgxyvjfafl63p9g2yv5p0myx9gkdhtyvuz45fpuusfw5jwa5p6jmcvepz8s5cpys2dwfheszzsfms093hqtyfxgpum7z6nfpqk82gr0sjspm2qv2snqvqvqqqqqqqqqqqdz4r859cp055k2y55jaytmdelqp66dpqqn9ru2jx50hj7g42afqt70j3uccvr0z5mmd6g5kspulsyqf9sfdey8ms63dzllwc06gr3h54l2z7r59txjut0su547xssnr7uh22adgu7zame9c4wqcu6gx29vqq9zh72ykpmd6wnqvdwxgl32gv8m8pst9pzphhq7peu29yqdcwgdsmzzqyjpqwdqtz2xu3dkv2e8kjqrmgpw0eul09cqq9da7qzcmj0zdm4yph6hztuvgteev5zp3gmfvsyqqnuark7"}},"finalize":[{"type":"update_key_value","mapping_id":"2855157744830843716005407030207142101853521493742120919939436395872133863104field","key_id":"8381912663898892992045635205780305330200544420473029569795382251440043992361field","value_id":"2442554045286129457484406273236413377202367281609173993393970849561102805466field"},{"type":"initialize_mapping","mapping_id":"7959086484380022072092918245899874786476141624115888252927538889087046548656field"},{"type":"initialize_mapping","mapping_id":"4332626685128816161903132999355781119865716430507047419886660020087580531169field"}]},{"status":"accepted","type":"execute","index":2,"transaction":{"type":"execute","id":"at1e8nnqcwt70qx8y4ayp4zvjdjmwlw2j2g8qzrar7hu8zd4mpn5crqmezcxl","execution":{"transitions":[{"id":"au1dl87v3u2e5n2ylv6zyvg9hrhgls00e9ehynzm4rj68aqllh445gs2qe2jf","program":"credits.aleo","function":"transfer_public","inputs":[{"type":"public","id":"2674622453272685085862787177711807661403711403919631051166016396826325215789field","value":"aleo1c6lv9wel8wjuutls0xw3744p533hw0fqe06w4p8zh7a89l3u3ggqfvnwwc"},{"type":"public","id":"6039836619017815013149644717424678767755013311837839934547546946768481977747field","value":"24530000u64"}],"outputs":[{"type":"future","id":"1754753033983877094941046158138665850354486948745759660530340987012169105351field","value":"{\n  program_id: credits.aleo,\n  function_name: transfer_public,\n  arguments: [\n    aleo1tj0598jpstejk8yp7cldez3y4vekmzv482h8l6v59yqsw9kk6cxsc79p0f,\n    aleo1c6lv9wel8wjuutls0xw3744p533hw0fqe06w4p8zh7a89l3u3ggqfvnwwc,\n    24530000u64\n  ]\n}"}],"tpk":"7303957011326299450723722453175547635446355970274291547889177971599866348262group","tcm":"1771980178235682541218420881249753725615860968339398520998176078027727028118field","scm":"5752092929817611486832231239706127991724078433804351942862329181685857248216field"}],"global_state_root":"sr1a00e8mk8rs5hfjdnzmf87ee5wvvagpeq3k43uur7lvf53e83d5pqlc7rvs","proof":"proof1qyqsqqqqqqqqqqqpqqqqqqqqqqqzn22kavlys9ymjlapy7z002s5cf2xyvyh6cywvj6p9vsrw9a0y43wyhjmqrdq4q93qcftuhtwtxvqq8jpsrmxpklyjkgf7ygnrk2p6zyna774aew9lly96275k2dyxd9rr6947r8zcacpr258t5wa4vh25q9q3l3mfe24m9670w05phn69ad4l6wcjkrsqz4zee2gxpj24kjc7la4ylrajz4cwd5jkj4a0qddgkq39dp9xwgrxzmwcrup4enlgfd5czc4n4fxdl2jk50x5976lklynf0mu36dntfamzracalkmvtmq3qq7ndkmgxh4weqfrd0nyt0clygkfjyr284r7qwvzdq8eyxavp8543hmhf0vxp4r5j8aahsmdrfjvcqq8rjj900mg29xaxny44k86zdgrv5ug7qu5qd9qjtc5cnw7uqtfvd8ufe4qlt7h7mt2jgx7gq64nvq97qm8xnwtnp64kd2nu7vqarqzkt84n4zt3qzutpjwht7p3a3v76gujfvtx2qysgclqhs9g8urqfaqgv3u5tpp375jmmrklpj4ey5m7xvw0j82rjcvcszdd94xq2gcmzgz5hqj9uftau7fxk4ptac5y572qre02j5pztuhjr7wpqymmfpnapq206465mje6l4frn9gpzadz8zallu3fsfpz6vx7zfjx73kq56pcpgqpscfdf5x735ujl05ya4gyj443c789n05d89fy7sfl832eulq8m9h9g26sv30sa9h9nqq6jzud4xfqudk7pcy5vna4jhafffmdxuqaj2qyl6wrqdr6vmkfzhqmr9fsmty73v8kl4r32xla7ylta0etgppd0s7edjll0nee3x84hveghquspxj73r7gkpuxr5e3x84zthhrqf5qtvwdxt0tc4ptsyqx5gkgsn9nzmv3vwr5he4edmlqwpnzzqeqxjtftenc8ec2p7lcj3y6p32tf8jvxce35464z9cgnr946dfk6xq9uv38cw67nmcjahqz5gcpnuyyca5ks4p0372apwf9zvrkl9rygyplye6mrvpqu5rxu6z2w8hxfwf97j7ep4m9wa0dnkya3n6tq2crsz8nw7l7j8mvk9xj4vcv4ef6x7l5ga4ggag5haa0lhg8uffzzj35p9kv3esg0zsz2999sk36utpmyp8qwsn8xhlm2wmy4mhcafeu770gyqvqqqqqqqqqqqzjc88xk7tf3c4nxp8we8pt7upgzd4mnxhdy4kecwg2nn3xzsn8qkun6dcdtzx65kksxpe9jre3gqyqt832n383nm69r064suxe6na5w3dxc80nemu65h74lhp9kzxm9mzx2dnv29009sv3ffr5vs4f34fsqqx3kkfsyuhsarhl25qufa4uzpkqg9dv3wjcqy3k35pdu2zx63dcq7jm42elj3dd8ne272xdt45e0ad9hsqsdpp2gc837ylupqzleamutawtt2urzd3ak4c0denaf52ersqqqqjqctf"},"fee":{"transition":{"id":"au10hv4p503uuc8ed4zhhl64tvd45vdnrkejsarp2244ja9ggydqczsrr4dvv","program":"credits.aleo","function":"fee_public","inputs":[{"type":"public","id":"3827242749792725486079782172351640342327861191640993371859530088821376716829field","value":"2725u64"},{"type":"public","id":"3502454478485511388108680223973586878677662022809059256048357778467561116415field","value":"0u64"},{"type":"public","id":"7957496781698720006981182421977038470828500455911083990014157429331382834749field","value":"4961630725588415687999472398601422300271980056732738805035419705339387307552field"}],"outputs":[{"type":"future","id":"7208585343593729888216761772124493033792607262837754839168758728577959620203field","value":"{\n  program_id: credits.aleo,\n  function_name: fee_public,\n  arguments: [\n    aleo1tj0598jpstejk8yp7cldez3y4vekmzv482h8l6v59yqsw9kk6cxsc79p0f,\n    2725u64\n  ]\n}"}],"tpk":"1572327207450409093776081921998139925958228507456849885544599042775351610323group","tcm":"4538643073468975434319863689173766096255830313760178486543195598641710875771field","scm":"733992899691096733646356406871121504880953741567889966313061821965057910257field"},"global_state_root":"sr1kzaqmgzztd6djuslr558m69zezpvcgnkxvqpuf3e7et405tc2c9sjns2nw","proof":"proof1qyqsqqqqqqqqqqqpqqqqqqqqqqqzpvxv6h6xlj6mcy3ucfk8ca5t262u6zygtrzwudx358pvm7cl5hy8nnctayk8zl0duymmqfej98spq8wwvkz4ktwmn4n4g3rxa7qesfsph5u8u0rx58gxwxv6plm0jy2ff79amzv4h084u2d68rlj5czcaqp0qe63nw67jrwp080vvgwf3llq98ema66lmhmem24mg4cvgnrlz3shjuaf6ye42j9dqp33h3cq0gqep2yy76ddc4c207hvpp44devgys6ferd3zr5sfcrd28dd2vsvv7wk5vujgznf2h4a98ntw5ft69gp7d0jcms395zq34l2ck7fqh2jv276ug9xscwmle6rkdwuwgnnmr6uy620rd95hcdr986h52wtwussp7mgedas5dy820wtuv6f6l2ytwhh36ceutz5chv5zras5tef5rmevucnmt7mn5q7v6yjflte8crds9p6ev05xl95snr2k7wlfsygfkz5cl2s3mc4r978jxune427wnaw0wyfdj0hc90j54nyf3lflppn4qxxpar6fz9a66qhx0tk3skgyjczxu665xc9xf0u7jeyw9e2289dlpdlhrghjl542989qvvr0uqur2qzftyndjrmjpjenpgkh4y088enaks7fn6gw5wm52clnqrxeujkr0zucylrwmtyvpecq5ylh95k0e5qsjtny7duf20q3dv0skqtt7hnqvp66k73wvc6dwpzssemjy6msyxx0yjsmsvpvpqjl684543t3c8kpfznsu9j4hv0avzgxct97uur5phc9s6kdlsv8q79vc29mymtwmn4x44m4h4uc9v6sg3p6c4cjg65q3v2h33d4zf7qgpu06zyf0zy47ry35874wk8hhe5r2x7ts2gee9sc0hasa5ww5uxfg3qc8cehp8sut55s99ecrxf0nu3q80fa0ut0vg0q4zknfzk83zght6tfwjy73wqty4xe5s5f6n33ud6sxcj82y7jgru43sde52s2wfu6d6wqlemycdvrfcesgh735wy9flucunl6eq0wz38cwrtdqu6v0r57gv4j4rs94llq72fftfg5tlk2adp30ndugz9qeazvhrhevpheyy20avy8a9jc4ev5chr3wuvy7kyu830elxzupcsj8xpqg4yypylpds9wwtj56emkv7qew8vlgm924wd3x4zf95202sfqvqqqqqqqqqqqvdzrq5tuk9mhhkjsjua7ze4kekflmvfryvknfp6znh32m9frsxxltnqkvaqtwz40j8zfp8xrr3asqqpj47g0kw33hd7nureek44psxd0udk2nlzgz8qdwnulcaf6whdurageuyzqs4ch2sf57uwp2tqelcqqyuafe67y3d36d3lhevqyqr57e5y9qwu4sv0namrgkzhvpxw85csquzkjcajnwa8qmfpde3gt9t5t602h0g5x8xhss8hkfeza80cssskxc033yvewsj23yufjtwwyqnqsyqq8w0y8f"}},"finalize":[{"type":"update_key_value","mapping_id":"2855157744830843716005407030207142101853521493742120919939436395872133863104field","key_id":"3173284676052768370492800882242470367997567168667336432369397697945324447457field","value_id":"5603289887162609818037713573103143594342779421046907591337226223681767079280field"},{"type":"update_key_value","mapping_id":"2855157744830843716005407030207142101853521493742120919939436395872133863104field","key_id":"4866241898210844553083802527439023433801385420751506138953646726827083665988field","value_id":"3365075726451792521691879836226856006379426623077187928143357286733165168904field"},{"type":"update_key_value","mapping_id":"2855157744830843716005407030207142101853521493742120919939436395872133863104field","key_id":"3173284676052768370492800882242470367997567168667336432369397697945324447457field","value_id":"2843091386285633373086134049653878353436318741229726560452168523058066933799field"}]},{"status":"accepted","type":"execute","index":3,"transaction":{"type":"execute","id":"at1spnevs6ldcgfxprzzxullln7gmn7a72mv95w6848j2u92qqxqyqq5su20u","execution":{"transitions":[{"id":"au13mxgluvrld488988cvzkley0rlxl2gtj2jd78c7ujdjaxv7ztgrsryvs5v","program":"credits.aleo","function":"transfer_public","inputs":[{"type":"public","id":"5798987487623638921727593400744365627602119876223831678604902077377078427051field","value":"aleo1a4plmxs0rpc5523ny544ym28enfsszuj8m3a9gper7kxl5cw4urqpq0gqm"},{"type":"public","id":"6057774691067899939536441999792025048786357472802433925870746082081271107100field","value":"24580000u64"}],"outputs":[{"type":"future","id":"7823343152945661451693719139397108294170976422319371479993646534512702891189field","value":"{\n  program_id: credits.aleo,\n  function_name: transfer_public,\n  arguments: [\n    aleo1tj0598jpstejk8yp7cldez3y4vekmzv482h8l6v59yqsw9kk6cxsc79p0f,\n    aleo1a4plmxs0rpc5523ny544ym28enfsszuj8m3a9gper7kxl5cw4urqpq0gqm,\n    24580000u64\n  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 program_id: credits.aleo,\n  function_name: fee_public,\n  arguments: [\n    aleo1tj0598jpstejk8yp7cldez3y4vekmzv482h8l6v59yqsw9kk6cxsc79p0f,\n    2725u64\n  ]\n}"}],"tpk":"6197847112817169402438665756773681600529763045729132400614287505025342213409group","tcm":"231975022031936047046968662375753531202564783285325850651507973490396734090field","scm":"6006650825251395409980537078384291969386013327673121688432161298867530688756field"},"global_state_root":"sr1kzaqmgzztd6djuslr558m69zezpvcgnkxvqpuf3e7et405tc2c9sjns2nw","proof":"proof1qyqsqqqqqqqqqqqpqqqqqqqqqqqvtfsznhudxscnwavvaktyufk2jjqx6h4vzclhavkzxagf9jnw09yqj0d7m6ymhjjtyap9dzmm7svqq86fmxyncad83v0mtstswatrpyen2d760mleyxmzyls65ht34ehagls6tt28lztphv3zwwhqqqe8vqp9urs5hkavtrvdquagv7ylac46fc6l6vzm9wzuhayh9wxmevd7kurkr3mwlpph6w89yhk8cw92vzqde738nf5tlznyfndw5dd5kqyc2rltmz2yavs4deym8e2rrzemywm8njjp4qjt6f5j0fn6lc94dusqrrvkr5sng6txtuexsdquxpn3nuq6hfqp06wd3efuf23wjxkqtq5phf0avxm6juhlt9c9plcfxnhqpsrjs8dwazsfgrvwjxguz28767kkcs2tskvzwchp6226u6cahlsc7r9r74eyfquyee2q7q65ztazqq8c8psd6apkf8j09je55ez9q0c64pdfnkmpzs93spuunefu6av3drsx6wgtrxlamjuyn8xqa938pqpdjlvqdfugqulwfyr4desepvrymz76wxhzf0yv3c9w6rtyedydhdmrxskjnh9vrjknf7cemfgqaxqpvhypnu4s9sxknnr38gjakcx9nts6ks4kfg9nld60l6xlyudx5ahr5gr4wmfswpn6597kecywh7qq7thxqg5a0e93xl0hxyg97mtr8fjp2eswx8msgtx78xmm5708hcz75ltgayr7njzvkjnxnwfhkzsjrzsjq5nv2xtuumkf7w8sghysqyvy5cvyd35ev7sfejujesr0p90gjra8zlfaclh3ngy7ndcjw9ygzpz34muq3zqze2na5t8t55nsgmx296k8hpaj7egqphfa7468zkwqzpu8zwejy0errnqe6qm9twl367kcpyfun7l6znvmuc3ctn8d4dcrkgjgyz027dje64qnjyd9lhqfu2hjmkvkwcht3gpjgsx0zaf3qgz5k5z9s7hrqx7p4myktehr35mcmtfez6g2e003d0ah60w9625azzpeep2sn75znsn9g5qv2helxc4qrl998g05lfnnwlwltpfh9aamqdpgwper22g7zmxj9n03setqurkh9rg0vyu65vn882jtzx6flwmq9er0n4x3lucpz7mmzv3wk79neeppvxpnn6jxy8vvznav5rapmwcrqvqqqqqqqqqqphvxdjjk5cuear6r9dllmskjhylzeuc3gnn5pe3sfe3wxh9f07rpt8a4q8whrecfpstx7kxaxcuysqqzyp8ghg9d8u0zu7n7rp6mw22t55shs5axtr2wjcnjpc69my8hkdycvv4grwagt27c9zvpssrqpycpqy5jjrl257s6nhtf8f94mgj797kdvpkqgwslhjjw2n4v6ev90skpz4zf845pfjns4pm0jt4dprc0nnwq68uymg9j4ywztc9ucqnc8et3ded7r4mjy8cc0j06ny55qfwysqqqp8z8rz"}},"finalize":[{"type":"update_key_value","mapping_id":"2855157744830843716005407030207142101853521493742120919939436395872133863104field","key_id":"3173284676052768370492800882242470367997567168667336432369397697945324447457field","value_id":"3132167305889179786866728513799583774165167883293747516130894659870467608515field"},{"type":"update_key_value","mapping_id":"2855157744830843716005407030207142101853521493742120919939436395872133863104field","key_id":"4192675573714539049750836876678090491271406648752245284224526169313859239131field","value_id":"3257043252824706583069247378369888864730031328055837952851141983917651544463field"},{"type":"update_key_value","mapping_id":"2855157744830843716005407030207142101853521493742120919939436395872133863104field","key_id":"3173284676052768370492800882242470367997567168667336432369397697945324447457field","value_id":"4385004237222174920344573613261411550436161328804283881399303696235509114842field"}]}],"aborted_transaction_ids":[]}